ipl_parm.c 4.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/init.h>
  3. #include <linux/ctype.h>
  4. #include <asm/ebcdic.h>
  5. #include <asm/sclp.h>
  6. #include <asm/sections.h>
  7. #include <asm/boot_data.h>
  8. #include "boot.h"
  9. char __bootdata(early_command_line)[COMMAND_LINE_SIZE];
  10. struct ipl_parameter_block __bootdata(early_ipl_block);
  11. int __bootdata(early_ipl_block_valid);
  12. unsigned long __bootdata(memory_end);
  13. int __bootdata(memory_end_set);
  14. int __bootdata(noexec_disabled);
  15. static inline int __diag308(unsigned long subcode, void *addr)
  16. {
  17. register unsigned long _addr asm("0") = (unsigned long)addr;
  18. register unsigned long _rc asm("1") = 0;
  19. unsigned long reg1, reg2;
  20. psw_t old = S390_lowcore.program_new_psw;
  21. asm volatile(
  22. " epsw %0,%1\n"
  23. " st %0,%[psw_pgm]\n"
  24. " st %1,%[psw_pgm]+4\n"
  25. " larl %0,1f\n"
  26. " stg %0,%[psw_pgm]+8\n"
  27. " diag %[addr],%[subcode],0x308\n"
  28. "1: nopr %%r7\n"
  29. : "=&d" (reg1), "=&a" (reg2),
  30. [psw_pgm] "=Q" (S390_lowcore.program_new_psw),
  31. [addr] "+d" (_addr), "+d" (_rc)
  32. : [subcode] "d" (subcode)
  33. : "cc", "memory");
  34. S390_lowcore.program_new_psw = old;
  35. return _rc;
  36. }
  37. void store_ipl_parmblock(void)
  38. {
  39. int rc;
  40. rc = __diag308(DIAG308_STORE, &early_ipl_block);
  41. if (rc == DIAG308_RC_OK &&
  42. early_ipl_block.hdr.version <= IPL_MAX_SUPPORTED_VERSION)
  43. early_ipl_block_valid = 1;
  44. }
  45. static size_t scpdata_length(const char *buf, size_t count)
  46. {
  47. while (count) {
  48. if (buf[count - 1] != '\0' && buf[count - 1] != ' ')
  49. break;
  50. count--;
  51. }
  52. return count;
  53. }
  54. static size_t ipl_block_get_ascii_scpdata(char *dest, size_t size,
  55. const struct ipl_parameter_block *ipb)
  56. {
  57. size_t count;
  58. size_t i;
  59. int has_lowercase;
  60. count = min(size - 1, scpdata_length(ipb->ipl_info.fcp.scp_data,
  61. ipb->ipl_info.fcp.scp_data_len));
  62. if (!count)
  63. goto out;
  64. has_lowercase = 0;
  65. for (i = 0; i < count; i++) {
  66. if (!isascii(ipb->ipl_info.fcp.scp_data[i])) {
  67. count = 0;
  68. goto out;
  69. }
  70. if (!has_lowercase && islower(ipb->ipl_info.fcp.scp_data[i]))
  71. has_lowercase = 1;
  72. }
  73. if (has_lowercase)
  74. memcpy(dest, ipb->ipl_info.fcp.scp_data, count);
  75. else
  76. for (i = 0; i < count; i++)
  77. dest[i] = tolower(ipb->ipl_info.fcp.scp_data[i]);
  78. out:
  79. dest[count] = '\0';
  80. return count;
  81. }
  82. static void append_ipl_block_parm(void)
  83. {
  84. char *parm, *delim;
  85. size_t len, rc = 0;
  86. len = strlen(early_command_line);
  87. delim = early_command_line + len; /* '\0' character position */
  88. parm = early_command_line + len + 1; /* append right after '\0' */
  89. switch (early_ipl_block.hdr.pbt) {
  90. case DIAG308_IPL_TYPE_CCW:
  91. rc = ipl_block_get_ascii_vmparm(
  92. parm, COMMAND_LINE_SIZE - len - 1, &early_ipl_block);
  93. break;
  94. case DIAG308_IPL_TYPE_FCP:
  95. rc = ipl_block_get_ascii_scpdata(
  96. parm, COMMAND_LINE_SIZE - len - 1, &early_ipl_block);
  97. break;
  98. }
  99. if (rc) {
  100. if (*parm == '=')
  101. memmove(early_command_line, parm + 1, rc);
  102. else
  103. *delim = ' '; /* replace '\0' with space */
  104. }
  105. }
  106. static inline int has_ebcdic_char(const char *str)
  107. {
  108. int i;
  109. for (i = 0; str[i]; i++)
  110. if (str[i] & 0x80)
  111. return 1;
  112. return 0;
  113. }
  114. void setup_boot_command_line(void)
  115. {
  116. COMMAND_LINE[ARCH_COMMAND_LINE_SIZE - 1] = 0;
  117. /* convert arch command line to ascii if necessary */
  118. if (has_ebcdic_char(COMMAND_LINE))
  119. EBCASC(COMMAND_LINE, ARCH_COMMAND_LINE_SIZE);
  120. /* copy arch command line */
  121. strcpy(early_command_line, strim(COMMAND_LINE));
  122. /* append IPL PARM data to the boot command line */
  123. if (early_ipl_block_valid)
  124. append_ipl_block_parm();
  125. }
  126. static char command_line_buf[COMMAND_LINE_SIZE] __section(.data);
  127. static void parse_mem_opt(void)
  128. {
  129. char *param, *val;
  130. bool enabled;
  131. char *args;
  132. int rc;
  133. args = strcpy(command_line_buf, early_command_line);
  134. while (*args) {
  135. args = next_arg(args, &param, &val);
  136. if (!strcmp(param, "mem")) {
  137. memory_end = memparse(val, NULL);
  138. memory_end_set = 1;
  139. }
  140. if (!strcmp(param, "noexec")) {
  141. rc = kstrtobool(val, &enabled);
  142. if (!rc && !enabled)
  143. noexec_disabled = 1;
  144. }
  145. }
  146. }
  147. void setup_memory_end(void)
  148. {
  149. parse_mem_opt();
  150. #ifdef CONFIG_CRASH_DUMP
  151. if (!OLDMEM_BASE && early_ipl_block_valid &&
  152. early_ipl_block.hdr.pbt == DIAG308_IPL_TYPE_FCP &&
  153. early_ipl_block.ipl_info.fcp.opt == DIAG308_IPL_OPT_DUMP) {
  154. if (!sclp_early_get_hsa_size(&memory_end) && memory_end)
  155. memory_end_set = 1;
  156. }
  157. #endif
  158. }