cpu.c 4.4 KB

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  1. /*
  2. * Copyright (C) 2012 Regents of the University of California
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation, version 2.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/init.h>
  14. #include <linux/seq_file.h>
  15. #include <linux/of.h>
  16. #include <asm/smp.h>
  17. /*
  18. * Returns the hart ID of the given device tree node, or -1 if the device tree
  19. * node isn't a RISC-V hart.
  20. */
  21. int riscv_of_processor_hartid(struct device_node *node)
  22. {
  23. const char *isa, *status;
  24. u32 hart;
  25. if (!of_device_is_compatible(node, "riscv")) {
  26. pr_warn("Found incompatible CPU\n");
  27. return -(ENODEV);
  28. }
  29. if (of_property_read_u32(node, "reg", &hart)) {
  30. pr_warn("Found CPU without hart ID\n");
  31. return -(ENODEV);
  32. }
  33. if (hart >= NR_CPUS) {
  34. pr_info("Found hart ID %d, which is above NR_CPUs. Disabling this hart\n", hart);
  35. return -(ENODEV);
  36. }
  37. if (of_property_read_string(node, "status", &status)) {
  38. pr_warn("CPU with hartid=%d has no \"status\" property\n", hart);
  39. return -(ENODEV);
  40. }
  41. if (strcmp(status, "okay")) {
  42. pr_info("CPU with hartid=%d has a non-okay status of \"%s\"\n", hart, status);
  43. return -(ENODEV);
  44. }
  45. if (of_property_read_string(node, "riscv,isa", &isa)) {
  46. pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", hart);
  47. return -(ENODEV);
  48. }
  49. if (isa[0] != 'r' || isa[1] != 'v') {
  50. pr_warn("CPU with hartid=%d has an invalid ISA of \"%s\"\n", hart, isa);
  51. return -(ENODEV);
  52. }
  53. return hart;
  54. }
  55. #ifdef CONFIG_PROC_FS
  56. static void print_isa(struct seq_file *f, const char *orig_isa)
  57. {
  58. static const char *ext = "mafdcsu";
  59. const char *isa = orig_isa;
  60. const char *e;
  61. /*
  62. * Linux doesn't support rv32e or rv128i, and we only support booting
  63. * kernels on harts with the same ISA that the kernel is compiled for.
  64. */
  65. #if defined(CONFIG_32BIT)
  66. if (strncmp(isa, "rv32i", 5) != 0)
  67. return;
  68. #elif defined(CONFIG_64BIT)
  69. if (strncmp(isa, "rv64i", 5) != 0)
  70. return;
  71. #endif
  72. /* Print the base ISA, as we already know it's legal. */
  73. seq_puts(f, "isa\t\t: ");
  74. seq_write(f, isa, 5);
  75. isa += 5;
  76. /*
  77. * Check the rest of the ISA string for valid extensions, printing those
  78. * we find. RISC-V ISA strings define an order, so we only print the
  79. * extension bits when they're in order. Hide the supervisor (S)
  80. * extension from userspace as it's not accessible from there.
  81. */
  82. for (e = ext; *e != '\0'; ++e) {
  83. if (isa[0] == e[0]) {
  84. if (isa[0] != 's')
  85. seq_write(f, isa, 1);
  86. isa++;
  87. }
  88. }
  89. seq_puts(f, "\n");
  90. /*
  91. * If we were given an unsupported ISA in the device tree then print
  92. * a bit of info describing what went wrong.
  93. */
  94. if (isa[0] != '\0')
  95. pr_info("unsupported ISA \"%s\" in device tree", orig_isa);
  96. }
  97. static void print_mmu(struct seq_file *f, const char *mmu_type)
  98. {
  99. #if defined(CONFIG_32BIT)
  100. if (strcmp(mmu_type, "riscv,sv32") != 0)
  101. return;
  102. #elif defined(CONFIG_64BIT)
  103. if (strcmp(mmu_type, "riscv,sv39") != 0 &&
  104. strcmp(mmu_type, "riscv,sv48") != 0)
  105. return;
  106. #endif
  107. seq_printf(f, "mmu\t\t: %s\n", mmu_type+6);
  108. }
  109. static void *c_start(struct seq_file *m, loff_t *pos)
  110. {
  111. *pos = cpumask_next(*pos - 1, cpu_online_mask);
  112. if ((*pos) < nr_cpu_ids)
  113. return (void *)(uintptr_t)(1 + *pos);
  114. return NULL;
  115. }
  116. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  117. {
  118. (*pos)++;
  119. return c_start(m, pos);
  120. }
  121. static void c_stop(struct seq_file *m, void *v)
  122. {
  123. }
  124. static int c_show(struct seq_file *m, void *v)
  125. {
  126. unsigned long cpu_id = (unsigned long)v - 1;
  127. struct device_node *node = of_get_cpu_node(cpuid_to_hartid_map(cpu_id),
  128. NULL);
  129. const char *compat, *isa, *mmu;
  130. seq_printf(m, "processor\t: %lu\n", cpu_id);
  131. seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id));
  132. if (!of_property_read_string(node, "riscv,isa", &isa))
  133. print_isa(m, isa);
  134. if (!of_property_read_string(node, "mmu-type", &mmu))
  135. print_mmu(m, mmu);
  136. if (!of_property_read_string(node, "compatible", &compat)
  137. && strcmp(compat, "riscv"))
  138. seq_printf(m, "uarch\t\t: %s\n", compat);
  139. seq_puts(m, "\n");
  140. return 0;
  141. }
  142. const struct seq_operations cpuinfo_op = {
  143. .start = c_start,
  144. .next = c_next,
  145. .stop = c_stop,
  146. .show = c_show
  147. };
  148. #endif /* CONFIG_PROC_FS */