time.c 5.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Support for periodic interrupts (100 per second) and for getting
  4. * the current time from the RTC on Power Macintoshes.
  5. *
  6. * We use the decrementer register for our periodic interrupts.
  7. *
  8. * Paul Mackerras August 1996.
  9. * Copyright (C) 1996 Paul Mackerras.
  10. * Copyright (C) 2003-2005 Benjamin Herrenschmidt.
  11. *
  12. */
  13. #include <linux/errno.h>
  14. #include <linux/sched.h>
  15. #include <linux/kernel.h>
  16. #include <linux/param.h>
  17. #include <linux/string.h>
  18. #include <linux/mm.h>
  19. #include <linux/init.h>
  20. #include <linux/time.h>
  21. #include <linux/adb.h>
  22. #include <linux/cuda.h>
  23. #include <linux/pmu.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/hardirq.h>
  26. #include <linux/rtc.h>
  27. #include <asm/sections.h>
  28. #include <asm/prom.h>
  29. #include <asm/io.h>
  30. #include <asm/pgtable.h>
  31. #include <asm/machdep.h>
  32. #include <asm/time.h>
  33. #include <asm/nvram.h>
  34. #include <asm/smu.h>
  35. #include "pmac.h"
  36. #undef DEBUG
  37. #ifdef DEBUG
  38. #define DBG(x...) printk(x)
  39. #else
  40. #define DBG(x...)
  41. #endif
  42. /*
  43. * Calibrate the decrementer frequency with the VIA timer 1.
  44. */
  45. #define VIA_TIMER_FREQ_6 4700000 /* time 1 frequency * 6 */
  46. /* VIA registers */
  47. #define RS 0x200 /* skip between registers */
  48. #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
  49. #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
  50. #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
  51. #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
  52. #define ACR (11*RS) /* Auxiliary control register */
  53. #define IFR (13*RS) /* Interrupt flag register */
  54. /* Bits in ACR */
  55. #define T1MODE 0xc0 /* Timer 1 mode */
  56. #define T1MODE_CONT 0x40 /* continuous interrupts */
  57. /* Bits in IFR and IER */
  58. #define T1_INT 0x40 /* Timer 1 interrupt */
  59. long __init pmac_time_init(void)
  60. {
  61. s32 delta = 0;
  62. #ifdef CONFIG_NVRAM
  63. int dst;
  64. delta = ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x9)) << 16;
  65. delta |= ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xa)) << 8;
  66. delta |= pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xb);
  67. if (delta & 0x00800000UL)
  68. delta |= 0xFF000000UL;
  69. dst = ((pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x8) & 0x80) != 0);
  70. printk("GMT Delta read from XPRAM: %d minutes, DST: %s\n", delta/60,
  71. dst ? "on" : "off");
  72. #endif
  73. return delta;
  74. }
  75. #ifdef CONFIG_PMAC_SMU
  76. static time64_t smu_get_time(void)
  77. {
  78. struct rtc_time tm;
  79. if (smu_get_rtc_time(&tm, 1))
  80. return 0;
  81. return rtc_tm_to_time64(&tm);
  82. }
  83. #endif
  84. /* Can't be __init, it's called when suspending and resuming */
  85. time64_t pmac_get_boot_time(void)
  86. {
  87. /* Get the time from the RTC, used only at boot time */
  88. switch (sys_ctrler) {
  89. #ifdef CONFIG_ADB_CUDA
  90. case SYS_CTRLER_CUDA:
  91. return cuda_get_time();
  92. #endif
  93. #ifdef CONFIG_ADB_PMU
  94. case SYS_CTRLER_PMU:
  95. return pmu_get_time();
  96. #endif
  97. #ifdef CONFIG_PMAC_SMU
  98. case SYS_CTRLER_SMU:
  99. return smu_get_time();
  100. #endif
  101. default:
  102. return 0;
  103. }
  104. }
  105. void pmac_get_rtc_time(struct rtc_time *tm)
  106. {
  107. /* Get the time from the RTC, used only at boot time */
  108. switch (sys_ctrler) {
  109. #ifdef CONFIG_ADB_CUDA
  110. case SYS_CTRLER_CUDA:
  111. rtc_time64_to_tm(cuda_get_time(), tm);
  112. break;
  113. #endif
  114. #ifdef CONFIG_ADB_PMU
  115. case SYS_CTRLER_PMU:
  116. rtc_time64_to_tm(pmu_get_time(), tm);
  117. break;
  118. #endif
  119. #ifdef CONFIG_PMAC_SMU
  120. case SYS_CTRLER_SMU:
  121. smu_get_rtc_time(tm, 1);
  122. break;
  123. #endif
  124. default:
  125. ;
  126. }
  127. }
  128. int pmac_set_rtc_time(struct rtc_time *tm)
  129. {
  130. switch (sys_ctrler) {
  131. #ifdef CONFIG_ADB_CUDA
  132. case SYS_CTRLER_CUDA:
  133. return cuda_set_rtc_time(tm);
  134. #endif
  135. #ifdef CONFIG_ADB_PMU
  136. case SYS_CTRLER_PMU:
  137. return pmu_set_rtc_time(tm);
  138. #endif
  139. #ifdef CONFIG_PMAC_SMU
  140. case SYS_CTRLER_SMU:
  141. return smu_set_rtc_time(tm, 1);
  142. #endif
  143. default:
  144. return -ENODEV;
  145. }
  146. }
  147. #ifdef CONFIG_PPC32
  148. /*
  149. * Calibrate the decrementer register using VIA timer 1.
  150. * This is used both on powermacs and CHRP machines.
  151. */
  152. static int __init via_calibrate_decr(void)
  153. {
  154. struct device_node *vias;
  155. volatile unsigned char __iomem *via;
  156. int count = VIA_TIMER_FREQ_6 / 100;
  157. unsigned int dstart, dend;
  158. struct resource rsrc;
  159. vias = of_find_node_by_name(NULL, "via-cuda");
  160. if (vias == NULL)
  161. vias = of_find_node_by_name(NULL, "via-pmu");
  162. if (vias == NULL)
  163. vias = of_find_node_by_name(NULL, "via");
  164. if (vias == NULL || of_address_to_resource(vias, 0, &rsrc)) {
  165. of_node_put(vias);
  166. return 0;
  167. }
  168. of_node_put(vias);
  169. via = ioremap(rsrc.start, resource_size(&rsrc));
  170. if (via == NULL) {
  171. printk(KERN_ERR "Failed to map VIA for timer calibration !\n");
  172. return 0;
  173. }
  174. /* set timer 1 for continuous interrupts */
  175. out_8(&via[ACR], (via[ACR] & ~T1MODE) | T1MODE_CONT);
  176. /* set the counter to a small value */
  177. out_8(&via[T1CH], 2);
  178. /* set the latch to `count' */
  179. out_8(&via[T1LL], count);
  180. out_8(&via[T1LH], count >> 8);
  181. /* wait until it hits 0 */
  182. while ((in_8(&via[IFR]) & T1_INT) == 0)
  183. ;
  184. dstart = get_dec();
  185. /* clear the interrupt & wait until it hits 0 again */
  186. in_8(&via[T1CL]);
  187. while ((in_8(&via[IFR]) & T1_INT) == 0)
  188. ;
  189. dend = get_dec();
  190. ppc_tb_freq = (dstart - dend) * 100 / 6;
  191. iounmap(via);
  192. return 1;
  193. }
  194. #endif
  195. /*
  196. * Query the OF and get the decr frequency.
  197. */
  198. void __init pmac_calibrate_decr(void)
  199. {
  200. generic_calibrate_decr();
  201. #ifdef CONFIG_PPC32
  202. /* We assume MacRISC2 machines have correct device-tree
  203. * calibration. That's better since the VIA itself seems
  204. * to be slightly off. --BenH
  205. */
  206. if (!of_machine_is_compatible("MacRISC2") &&
  207. !of_machine_is_compatible("MacRISC3") &&
  208. !of_machine_is_compatible("MacRISC4"))
  209. if (via_calibrate_decr())
  210. return;
  211. /* Special case: QuickSilver G4s seem to have a badly calibrated
  212. * timebase-frequency in OF, VIA is much better on these. We should
  213. * probably implement calibration based on the KL timer on these
  214. * machines anyway... -BenH
  215. */
  216. if (of_machine_is_compatible("PowerMac3,5"))
  217. if (via_calibrate_decr())
  218. return;
  219. #endif
  220. }