Kconfig 2.5 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. config PPC_CELL
  3. bool
  4. config PPC_CELL_COMMON
  5. bool
  6. select PPC_CELL
  7. select PPC_DCR_MMIO
  8. select PPC_INDIRECT_PIO
  9. select PPC_INDIRECT_MMIO
  10. select PPC_NATIVE
  11. select PPC_RTAS
  12. select IRQ_EDGE_EOI_HANDLER
  13. config PPC_CELL_NATIVE
  14. bool
  15. select PPC_CELL_COMMON
  16. select MPIC
  17. select PPC_IO_WORKAROUNDS
  18. select IBM_EMAC_EMAC4 if IBM_EMAC
  19. select IBM_EMAC_RGMII if IBM_EMAC
  20. select IBM_EMAC_ZMII if IBM_EMAC #test only
  21. select IBM_EMAC_TAH if IBM_EMAC #test only
  22. config PPC_IBM_CELL_BLADE
  23. bool "IBM Cell Blade"
  24. depends on PPC64 && PPC_BOOK3S && CPU_BIG_ENDIAN
  25. select PPC_CELL_NATIVE
  26. select PPC_OF_PLATFORM_PCI
  27. select PCI
  28. select MMIO_NVRAM
  29. select PPC_UDBG_16550
  30. select UDBG_RTAS_CONSOLE
  31. config AXON_MSI
  32. bool
  33. depends on PPC_IBM_CELL_BLADE && PCI_MSI
  34. default y
  35. menu "Cell Broadband Engine options"
  36. depends on PPC_CELL
  37. config SPU_FS
  38. tristate "SPU file system"
  39. default m
  40. depends on PPC_CELL
  41. select SPU_BASE
  42. help
  43. The SPU file system is used to access Synergistic Processing
  44. Units on machines implementing the Broadband Processor
  45. Architecture.
  46. config SPU_BASE
  47. bool
  48. select PPC_COPRO_BASE
  49. config CBE_RAS
  50. bool "RAS features for bare metal Cell BE"
  51. depends on PPC_CELL_NATIVE
  52. default y
  53. config PPC_IBM_CELL_RESETBUTTON
  54. bool "IBM Cell Blade Pinhole reset button"
  55. depends on CBE_RAS && PPC_IBM_CELL_BLADE
  56. default y
  57. help
  58. Support Pinhole Resetbutton on IBM Cell blades.
  59. This adds a method to trigger system reset via front panel pinhole button.
  60. config PPC_IBM_CELL_POWERBUTTON
  61. tristate "IBM Cell Blade power button"
  62. depends on PPC_IBM_CELL_BLADE && INPUT_EVDEV
  63. default y
  64. help
  65. Support Powerbutton on IBM Cell blades.
  66. This will enable the powerbutton as an input device.
  67. config CBE_THERM
  68. tristate "CBE thermal support"
  69. default m
  70. depends on CBE_RAS && SPU_BASE
  71. config PPC_PMI
  72. tristate
  73. default y
  74. depends on CPU_FREQ_CBE_PMI || PPC_IBM_CELL_POWERBUTTON
  75. help
  76. PMI (Platform Management Interrupt) is a way to
  77. communicate with the BMC (Baseboard Management Controller).
  78. It is used in some IBM Cell blades.
  79. config CBE_CPUFREQ_SPU_GOVERNOR
  80. tristate "CBE frequency scaling based on SPU usage"
  81. depends on SPU_FS && CPU_FREQ
  82. default m
  83. help
  84. This governor checks for spu usage to adjust the cpu frequency.
  85. If no spu is running on a given cpu, that cpu will be throttled to
  86. the minimal possible frequency.
  87. endmenu
  88. config OPROFILE_CELL
  89. def_bool y
  90. depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y) && SPU_BASE