hugetlbpage-book3e.c 4.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * PPC Huge TLB Page Support for Book3E MMU
  4. *
  5. * Copyright (C) 2009 David Gibson, IBM Corporation.
  6. * Copyright (C) 2011 Becky Bruce, Freescale Semiconductor
  7. *
  8. */
  9. #include <linux/mm.h>
  10. #include <linux/hugetlb.h>
  11. #include <asm/mmu.h>
  12. #ifdef CONFIG_PPC_FSL_BOOK3E
  13. #ifdef CONFIG_PPC64
  14. static inline int tlb1_next(void)
  15. {
  16. struct paca_struct *paca = get_paca();
  17. struct tlb_core_data *tcd;
  18. int this, next;
  19. tcd = paca->tcd_ptr;
  20. this = tcd->esel_next;
  21. next = this + 1;
  22. if (next >= tcd->esel_max)
  23. next = tcd->esel_first;
  24. tcd->esel_next = next;
  25. return this;
  26. }
  27. #else
  28. static inline int tlb1_next(void)
  29. {
  30. int index, ncams;
  31. ncams = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
  32. index = this_cpu_read(next_tlbcam_idx);
  33. /* Just round-robin the entries and wrap when we hit the end */
  34. if (unlikely(index == ncams - 1))
  35. __this_cpu_write(next_tlbcam_idx, tlbcam_index);
  36. else
  37. __this_cpu_inc(next_tlbcam_idx);
  38. return index;
  39. }
  40. #endif /* !PPC64 */
  41. #endif /* FSL */
  42. static inline int mmu_get_tsize(int psize)
  43. {
  44. return mmu_psize_defs[psize].enc;
  45. }
  46. #if defined(CONFIG_PPC_FSL_BOOK3E) && defined(CONFIG_PPC64)
  47. #include <asm/paca.h>
  48. static inline void book3e_tlb_lock(void)
  49. {
  50. struct paca_struct *paca = get_paca();
  51. unsigned long tmp;
  52. int token = smp_processor_id() + 1;
  53. /*
  54. * Besides being unnecessary in the absence of SMT, this
  55. * check prevents trying to do lbarx/stbcx. on e5500 which
  56. * doesn't implement either feature.
  57. */
  58. if (!cpu_has_feature(CPU_FTR_SMT))
  59. return;
  60. asm volatile("1: lbarx %0, 0, %1;"
  61. "cmpwi %0, 0;"
  62. "bne 2f;"
  63. "stbcx. %2, 0, %1;"
  64. "bne 1b;"
  65. "b 3f;"
  66. "2: lbzx %0, 0, %1;"
  67. "cmpwi %0, 0;"
  68. "bne 2b;"
  69. "b 1b;"
  70. "3:"
  71. : "=&r" (tmp)
  72. : "r" (&paca->tcd_ptr->lock), "r" (token)
  73. : "memory");
  74. }
  75. static inline void book3e_tlb_unlock(void)
  76. {
  77. struct paca_struct *paca = get_paca();
  78. if (!cpu_has_feature(CPU_FTR_SMT))
  79. return;
  80. isync();
  81. paca->tcd_ptr->lock = 0;
  82. }
  83. #else
  84. static inline void book3e_tlb_lock(void)
  85. {
  86. }
  87. static inline void book3e_tlb_unlock(void)
  88. {
  89. }
  90. #endif
  91. static inline int book3e_tlb_exists(unsigned long ea, unsigned long pid)
  92. {
  93. int found = 0;
  94. mtspr(SPRN_MAS6, pid << 16);
  95. if (mmu_has_feature(MMU_FTR_USE_TLBRSRV)) {
  96. asm volatile(
  97. "li %0,0\n"
  98. "tlbsx. 0,%1\n"
  99. "bne 1f\n"
  100. "li %0,1\n"
  101. "1:\n"
  102. : "=&r"(found) : "r"(ea));
  103. } else {
  104. asm volatile(
  105. "tlbsx 0,%1\n"
  106. "mfspr %0,0x271\n"
  107. "srwi %0,%0,31\n"
  108. : "=&r"(found) : "r"(ea));
  109. }
  110. return found;
  111. }
  112. void book3e_hugetlb_preload(struct vm_area_struct *vma, unsigned long ea,
  113. pte_t pte)
  114. {
  115. unsigned long mas1, mas2;
  116. u64 mas7_3;
  117. unsigned long psize, tsize, shift;
  118. unsigned long flags;
  119. struct mm_struct *mm;
  120. #ifdef CONFIG_PPC_FSL_BOOK3E
  121. int index;
  122. #endif
  123. if (unlikely(is_kernel_addr(ea)))
  124. return;
  125. mm = vma->vm_mm;
  126. psize = vma_mmu_pagesize(vma);
  127. shift = __ilog2(psize);
  128. tsize = shift - 10;
  129. /*
  130. * We can't be interrupted while we're setting up the MAS
  131. * regusters or after we've confirmed that no tlb exists.
  132. */
  133. local_irq_save(flags);
  134. book3e_tlb_lock();
  135. if (unlikely(book3e_tlb_exists(ea, mm->context.id))) {
  136. book3e_tlb_unlock();
  137. local_irq_restore(flags);
  138. return;
  139. }
  140. #ifdef CONFIG_PPC_FSL_BOOK3E
  141. /* We have to use the CAM(TLB1) on FSL parts for hugepages */
  142. index = tlb1_next();
  143. mtspr(SPRN_MAS0, MAS0_ESEL(index) | MAS0_TLBSEL(1));
  144. #endif
  145. mas1 = MAS1_VALID | MAS1_TID(mm->context.id) | MAS1_TSIZE(tsize);
  146. mas2 = ea & ~((1UL << shift) - 1);
  147. mas2 |= (pte_val(pte) >> PTE_WIMGE_SHIFT) & MAS2_WIMGE_MASK;
  148. mas7_3 = (u64)pte_pfn(pte) << PAGE_SHIFT;
  149. mas7_3 |= (pte_val(pte) >> PTE_BAP_SHIFT) & MAS3_BAP_MASK;
  150. if (!pte_dirty(pte))
  151. mas7_3 &= ~(MAS3_SW|MAS3_UW);
  152. mtspr(SPRN_MAS1, mas1);
  153. mtspr(SPRN_MAS2, mas2);
  154. if (mmu_has_feature(MMU_FTR_USE_PAIRED_MAS)) {
  155. mtspr(SPRN_MAS7_MAS3, mas7_3);
  156. } else {
  157. if (mmu_has_feature(MMU_FTR_BIG_PHYS))
  158. mtspr(SPRN_MAS7, upper_32_bits(mas7_3));
  159. mtspr(SPRN_MAS3, lower_32_bits(mas7_3));
  160. }
  161. asm volatile ("tlbwe");
  162. book3e_tlb_unlock();
  163. local_irq_restore(flags);
  164. }
  165. void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
  166. {
  167. struct hstate *hstate = hstate_file(vma->vm_file);
  168. unsigned long tsize = huge_page_shift(hstate) - 10;
  169. __flush_tlb_page(vma->vm_mm, vmaddr, tsize, 0);
  170. }