io.h 8.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef _ASM_IO_H
  3. #define _ASM_IO_H
  4. #include <linux/types.h>
  5. #include <asm/pgtable.h>
  6. #define virt_to_phys(a) ((unsigned long)__pa(a))
  7. #define phys_to_virt(a) __va(a)
  8. #define virt_to_bus virt_to_phys
  9. #define bus_to_virt phys_to_virt
  10. static inline unsigned long isa_bus_to_virt(unsigned long addr) {
  11. BUG();
  12. return 0;
  13. }
  14. static inline unsigned long isa_virt_to_bus(void *addr) {
  15. BUG();
  16. return 0;
  17. }
  18. /*
  19. * Memory mapped I/O
  20. *
  21. * readX()/writeX() do byteswapping and take an ioremapped address
  22. * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
  23. * gsc_*() don't byteswap and operate on physical addresses;
  24. * eg dev->hpa or 0xfee00000.
  25. */
  26. static inline unsigned char gsc_readb(unsigned long addr)
  27. {
  28. long flags;
  29. unsigned char ret;
  30. __asm__ __volatile__(
  31. " rsm %3,%0\n"
  32. " ldbx 0(%2),%1\n"
  33. " mtsm %0\n"
  34. : "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );
  35. return ret;
  36. }
  37. static inline unsigned short gsc_readw(unsigned long addr)
  38. {
  39. long flags;
  40. unsigned short ret;
  41. __asm__ __volatile__(
  42. " rsm %3,%0\n"
  43. " ldhx 0(%2),%1\n"
  44. " mtsm %0\n"
  45. : "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );
  46. return ret;
  47. }
  48. static inline unsigned int gsc_readl(unsigned long addr)
  49. {
  50. u32 ret;
  51. __asm__ __volatile__(
  52. " ldwax 0(%1),%0\n"
  53. : "=r" (ret) : "r" (addr) );
  54. return ret;
  55. }
  56. static inline unsigned long long gsc_readq(unsigned long addr)
  57. {
  58. unsigned long long ret;
  59. #ifdef CONFIG_64BIT
  60. __asm__ __volatile__(
  61. " ldda 0(%1),%0\n"
  62. : "=r" (ret) : "r" (addr) );
  63. #else
  64. /* two reads may have side effects.. */
  65. ret = ((u64) gsc_readl(addr)) << 32;
  66. ret |= gsc_readl(addr+4);
  67. #endif
  68. return ret;
  69. }
  70. static inline void gsc_writeb(unsigned char val, unsigned long addr)
  71. {
  72. long flags;
  73. __asm__ __volatile__(
  74. " rsm %3,%0\n"
  75. " stbs %1,0(%2)\n"
  76. " mtsm %0\n"
  77. : "=&r" (flags) : "r" (val), "r" (addr), "i" (PSW_SM_D) );
  78. }
  79. static inline void gsc_writew(unsigned short val, unsigned long addr)
  80. {
  81. long flags;
  82. __asm__ __volatile__(
  83. " rsm %3,%0\n"
  84. " sths %1,0(%2)\n"
  85. " mtsm %0\n"
  86. : "=&r" (flags) : "r" (val), "r" (addr), "i" (PSW_SM_D) );
  87. }
  88. static inline void gsc_writel(unsigned int val, unsigned long addr)
  89. {
  90. __asm__ __volatile__(
  91. " stwas %0,0(%1)\n"
  92. : : "r" (val), "r" (addr) );
  93. }
  94. static inline void gsc_writeq(unsigned long long val, unsigned long addr)
  95. {
  96. #ifdef CONFIG_64BIT
  97. __asm__ __volatile__(
  98. " stda %0,0(%1)\n"
  99. : : "r" (val), "r" (addr) );
  100. #else
  101. /* two writes may have side effects.. */
  102. gsc_writel(val >> 32, addr);
  103. gsc_writel(val, addr+4);
  104. #endif
  105. }
  106. /*
  107. * The standard PCI ioremap interfaces
  108. */
  109. extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
  110. /* Most machines react poorly to I/O-space being cacheable... Instead let's
  111. * define ioremap() in terms of ioremap_nocache().
  112. */
  113. static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
  114. {
  115. return __ioremap(offset, size, _PAGE_NO_CACHE);
  116. }
  117. #define ioremap_nocache(off, sz) ioremap((off), (sz))
  118. #define ioremap_wc ioremap_nocache
  119. #define ioremap_uc ioremap_nocache
  120. extern void iounmap(const volatile void __iomem *addr);
  121. static inline unsigned char __raw_readb(const volatile void __iomem *addr)
  122. {
  123. return (*(volatile unsigned char __force *) (addr));
  124. }
  125. static inline unsigned short __raw_readw(const volatile void __iomem *addr)
  126. {
  127. return *(volatile unsigned short __force *) addr;
  128. }
  129. static inline unsigned int __raw_readl(const volatile void __iomem *addr)
  130. {
  131. return *(volatile unsigned int __force *) addr;
  132. }
  133. static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
  134. {
  135. return *(volatile unsigned long long __force *) addr;
  136. }
  137. static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
  138. {
  139. *(volatile unsigned char __force *) addr = b;
  140. }
  141. static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
  142. {
  143. *(volatile unsigned short __force *) addr = b;
  144. }
  145. static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
  146. {
  147. *(volatile unsigned int __force *) addr = b;
  148. }
  149. static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
  150. {
  151. *(volatile unsigned long long __force *) addr = b;
  152. }
  153. static inline unsigned char readb(const volatile void __iomem *addr)
  154. {
  155. return __raw_readb(addr);
  156. }
  157. static inline unsigned short readw(const volatile void __iomem *addr)
  158. {
  159. return le16_to_cpu((__le16 __force) __raw_readw(addr));
  160. }
  161. static inline unsigned int readl(const volatile void __iomem *addr)
  162. {
  163. return le32_to_cpu((__le32 __force) __raw_readl(addr));
  164. }
  165. static inline unsigned long long readq(const volatile void __iomem *addr)
  166. {
  167. return le64_to_cpu((__le64 __force) __raw_readq(addr));
  168. }
  169. static inline void writeb(unsigned char b, volatile void __iomem *addr)
  170. {
  171. __raw_writeb(b, addr);
  172. }
  173. static inline void writew(unsigned short w, volatile void __iomem *addr)
  174. {
  175. __raw_writew((__u16 __force) cpu_to_le16(w), addr);
  176. }
  177. static inline void writel(unsigned int l, volatile void __iomem *addr)
  178. {
  179. __raw_writel((__u32 __force) cpu_to_le32(l), addr);
  180. }
  181. static inline void writeq(unsigned long long q, volatile void __iomem *addr)
  182. {
  183. __raw_writeq((__u64 __force) cpu_to_le64(q), addr);
  184. }
  185. #define readb readb
  186. #define readw readw
  187. #define readl readl
  188. #define readq readq
  189. #define writeb writeb
  190. #define writew writew
  191. #define writel writel
  192. #define writeq writeq
  193. #define readb_relaxed(addr) readb(addr)
  194. #define readw_relaxed(addr) readw(addr)
  195. #define readl_relaxed(addr) readl(addr)
  196. #define readq_relaxed(addr) readq(addr)
  197. #define writeb_relaxed(b, addr) writeb(b, addr)
  198. #define writew_relaxed(w, addr) writew(w, addr)
  199. #define writel_relaxed(l, addr) writel(l, addr)
  200. #define writeq_relaxed(q, addr) writeq(q, addr)
  201. #define mmiowb() do { } while (0)
  202. void memset_io(volatile void __iomem *addr, unsigned char val, int count);
  203. void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
  204. void memcpy_toio(volatile void __iomem *dst, const void *src, int count);
  205. /* Port-space IO */
  206. #define inb_p inb
  207. #define inw_p inw
  208. #define inl_p inl
  209. #define outb_p outb
  210. #define outw_p outw
  211. #define outl_p outl
  212. extern unsigned char eisa_in8(unsigned short port);
  213. extern unsigned short eisa_in16(unsigned short port);
  214. extern unsigned int eisa_in32(unsigned short port);
  215. extern void eisa_out8(unsigned char data, unsigned short port);
  216. extern void eisa_out16(unsigned short data, unsigned short port);
  217. extern void eisa_out32(unsigned int data, unsigned short port);
  218. #if defined(CONFIG_PCI)
  219. extern unsigned char inb(int addr);
  220. extern unsigned short inw(int addr);
  221. extern unsigned int inl(int addr);
  222. extern void outb(unsigned char b, int addr);
  223. extern void outw(unsigned short b, int addr);
  224. extern void outl(unsigned int b, int addr);
  225. #elif defined(CONFIG_EISA)
  226. #define inb eisa_in8
  227. #define inw eisa_in16
  228. #define inl eisa_in32
  229. #define outb eisa_out8
  230. #define outw eisa_out16
  231. #define outl eisa_out32
  232. #else
  233. static inline char inb(unsigned long addr)
  234. {
  235. BUG();
  236. return -1;
  237. }
  238. static inline short inw(unsigned long addr)
  239. {
  240. BUG();
  241. return -1;
  242. }
  243. static inline int inl(unsigned long addr)
  244. {
  245. BUG();
  246. return -1;
  247. }
  248. #define outb(x, y) BUG()
  249. #define outw(x, y) BUG()
  250. #define outl(x, y) BUG()
  251. #endif
  252. /*
  253. * String versions of in/out ops:
  254. */
  255. extern void insb (unsigned long port, void *dst, unsigned long count);
  256. extern void insw (unsigned long port, void *dst, unsigned long count);
  257. extern void insl (unsigned long port, void *dst, unsigned long count);
  258. extern void outsb (unsigned long port, const void *src, unsigned long count);
  259. extern void outsw (unsigned long port, const void *src, unsigned long count);
  260. extern void outsl (unsigned long port, const void *src, unsigned long count);
  261. /* IO Port space is : BBiiii where BB is HBA number. */
  262. #define IO_SPACE_LIMIT 0x00ffffff
  263. /* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
  264. * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
  265. * mode (essentially just sign extending. This macro takes in a 32
  266. * bit I/O address (still with the leading f) and outputs the correct
  267. * value for either 32 or 64 bit mode */
  268. #define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
  269. #include <asm-generic/iomap.h>
  270. /*
  271. * Convert a physical pointer to a virtual kernel pointer for /dev/mem
  272. * access
  273. */
  274. #define xlate_dev_mem_ptr(p) __va(p)
  275. /*
  276. * Convert a virtual cached pointer to an uncached pointer
  277. */
  278. #define xlate_dev_kmem_ptr(p) p
  279. #endif