mt7628a.dtsi 2.2 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "ralink,mt7628a-soc";
  5. cpus {
  6. #address-cells = <1>;
  7. #size-cells = <0>;
  8. cpu@0 {
  9. compatible = "mti,mips24KEc";
  10. device_type = "cpu";
  11. reg = <0>;
  12. };
  13. };
  14. resetc: reset-controller {
  15. compatible = "ralink,rt2880-reset";
  16. #reset-cells = <1>;
  17. };
  18. cpuintc: interrupt-controller {
  19. #address-cells = <0>;
  20. #interrupt-cells = <1>;
  21. interrupt-controller;
  22. compatible = "mti,cpu-interrupt-controller";
  23. };
  24. palmbus@10000000 {
  25. compatible = "palmbus";
  26. reg = <0x10000000 0x200000>;
  27. ranges = <0x0 0x10000000 0x1FFFFF>;
  28. #address-cells = <1>;
  29. #size-cells = <1>;
  30. sysc: system-controller@0 {
  31. compatible = "ralink,mt7620a-sysc", "syscon";
  32. reg = <0x0 0x100>;
  33. };
  34. intc: interrupt-controller@200 {
  35. compatible = "ralink,rt2880-intc";
  36. reg = <0x200 0x100>;
  37. interrupt-controller;
  38. #interrupt-cells = <1>;
  39. resets = <&resetc 9>;
  40. reset-names = "intc";
  41. interrupt-parent = <&cpuintc>;
  42. interrupts = <2>;
  43. ralink,intc-registers = <0x9c 0xa0
  44. 0x6c 0xa4
  45. 0x80 0x78>;
  46. };
  47. memory-controller@300 {
  48. compatible = "ralink,mt7620a-memc";
  49. reg = <0x300 0x100>;
  50. };
  51. uart0: uartlite@c00 {
  52. compatible = "ns16550a";
  53. reg = <0xc00 0x100>;
  54. resets = <&resetc 12>;
  55. reset-names = "uart0";
  56. interrupt-parent = <&intc>;
  57. interrupts = <20>;
  58. reg-shift = <2>;
  59. };
  60. uart1: uart1@d00 {
  61. compatible = "ns16550a";
  62. reg = <0xd00 0x100>;
  63. resets = <&resetc 19>;
  64. reset-names = "uart1";
  65. interrupt-parent = <&intc>;
  66. interrupts = <21>;
  67. reg-shift = <2>;
  68. };
  69. uart2: uart2@e00 {
  70. compatible = "ns16550a";
  71. reg = <0xe00 0x100>;
  72. resets = <&resetc 20>;
  73. reset-names = "uart2";
  74. interrupt-parent = <&intc>;
  75. interrupts = <22>;
  76. reg-shift = <2>;
  77. };
  78. };
  79. usb_phy: usb-phy@10120000 {
  80. compatible = "mediatek,mt7628-usbphy";
  81. reg = <0x10120000 0x1000>;
  82. #phy-cells = <0>;
  83. ralink,sysctl = <&sysc>;
  84. resets = <&resetc 22 &resetc 25>;
  85. reset-names = "host", "device";
  86. };
  87. ehci@101c0000 {
  88. compatible = "generic-ehci";
  89. reg = <0x101c0000 0x1000>;
  90. phys = <&usb_phy>;
  91. phy-names = "usb";
  92. interrupt-parent = <&intc>;
  93. interrupts = <18>;
  94. };
  95. };