head.S 1.2 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677
  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #include <linux/linkage.h>
  3. #include <linux/init.h>
  4. #include <asm/page.h>
  5. #include <abi/entry.h>
  6. __HEAD
  7. ENTRY(_start)
  8. /* set super user mode */
  9. lrw a3, DEFAULT_PSR_VALUE
  10. mtcr a3, psr
  11. psrset ee
  12. SETUP_MMU a3
  13. /* set stack point */
  14. lrw a3, init_thread_union + THREAD_SIZE
  15. mov sp, a3
  16. jmpi csky_start
  17. END(_start)
  18. #ifdef CONFIG_SMP
  19. .align 10
  20. ENTRY(_start_smp_secondary)
  21. /* Invalid I/Dcache BTB BHT */
  22. movi a3, 7
  23. lsli a3, 16
  24. addi a3, (1<<4) | 3
  25. mtcr a3, cr17
  26. tlbi.alls
  27. /* setup PAGEMASK */
  28. movi a3, 0
  29. mtcr a3, cr<6, 15>
  30. /* setup MEL0/MEL1 */
  31. grs a0, _start_smp_pc
  32. _start_smp_pc:
  33. bmaski a1, 13
  34. andn a0, a1
  35. movi a1, 0x00000006
  36. movi a2, 0x00001006
  37. or a1, a0
  38. or a2, a0
  39. mtcr a1, cr<2, 15>
  40. mtcr a2, cr<3, 15>
  41. /* setup MEH */
  42. mtcr a0, cr<4, 15>
  43. /* write TLB */
  44. bgeni a3, 28
  45. mtcr a3, cr<8, 15>
  46. SETUP_MMU a3
  47. /* enable MMU */
  48. movi a3, 1
  49. mtcr a3, cr18
  50. jmpi _goto_mmu_on
  51. _goto_mmu_on:
  52. lrw a3, DEFAULT_PSR_VALUE
  53. mtcr a3, psr
  54. psrset ee
  55. /* set stack point */
  56. lrw a3, secondary_stack
  57. ld.w a3, (a3, 0)
  58. mov sp, a3
  59. jmpi csky_start_secondary
  60. END(_start_smp_secondary)
  61. #endif