ulcb.dtsi 8.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device Tree Source for the R-Car Gen3 ULCB board
  4. *
  5. * Copyright (C) 2016 Renesas Electronics Corp.
  6. * Copyright (C) 2016 Cogent Embedded, Inc.
  7. */
  8. #include <dt-bindings/gpio/gpio.h>
  9. #include <dt-bindings/input/input.h>
  10. / {
  11. model = "Renesas R-Car Gen3 ULCB board";
  12. aliases {
  13. serial0 = &scif2;
  14. ethernet0 = &avb;
  15. };
  16. chosen {
  17. bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  18. stdout-path = "serial0:115200n8";
  19. };
  20. audio_clkout: audio-clkout {
  21. /*
  22. * This is same as <&rcar_sound 0>
  23. * but needed to avoid cs2000/rcar_sound probe dead-lock
  24. */
  25. compatible = "fixed-clock";
  26. #clock-cells = <0>;
  27. clock-frequency = <12288000>;
  28. };
  29. hdmi0-out {
  30. compatible = "hdmi-connector";
  31. type = "a";
  32. port {
  33. hdmi0_con: endpoint {
  34. };
  35. };
  36. };
  37. keyboard {
  38. compatible = "gpio-keys";
  39. key-1 {
  40. linux,code = <KEY_1>;
  41. label = "SW3";
  42. wakeup-source;
  43. debounce-interval = <20>;
  44. gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
  45. };
  46. };
  47. leds {
  48. compatible = "gpio-leds";
  49. led5 {
  50. gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
  51. };
  52. led6 {
  53. gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
  54. };
  55. };
  56. reg_1p8v: regulator0 {
  57. compatible = "regulator-fixed";
  58. regulator-name = "fixed-1.8V";
  59. regulator-min-microvolt = <1800000>;
  60. regulator-max-microvolt = <1800000>;
  61. regulator-boot-on;
  62. regulator-always-on;
  63. };
  64. reg_3p3v: regulator1 {
  65. compatible = "regulator-fixed";
  66. regulator-name = "fixed-3.3V";
  67. regulator-min-microvolt = <3300000>;
  68. regulator-max-microvolt = <3300000>;
  69. regulator-boot-on;
  70. regulator-always-on;
  71. };
  72. rsnd_ak4613: sound {
  73. compatible = "simple-audio-card";
  74. simple-audio-card,format = "left_j";
  75. simple-audio-card,bitclock-master = <&sndcpu>;
  76. simple-audio-card,frame-master = <&sndcpu>;
  77. sndcpu: simple-audio-card,cpu {
  78. sound-dai = <&rcar_sound>;
  79. };
  80. sndcodec: simple-audio-card,codec {
  81. sound-dai = <&ak4613>;
  82. };
  83. };
  84. vcc_sdhi0: regulator-vcc-sdhi0 {
  85. compatible = "regulator-fixed";
  86. regulator-name = "SDHI0 Vcc";
  87. regulator-min-microvolt = <3300000>;
  88. regulator-max-microvolt = <3300000>;
  89. gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
  90. enable-active-high;
  91. };
  92. vccq_sdhi0: regulator-vccq-sdhi0 {
  93. compatible = "regulator-gpio";
  94. regulator-name = "SDHI0 VccQ";
  95. regulator-min-microvolt = <1800000>;
  96. regulator-max-microvolt = <3300000>;
  97. gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
  98. gpios-states = <1>;
  99. states = <3300000 1
  100. 1800000 0>;
  101. };
  102. x12_clk: x12 {
  103. compatible = "fixed-clock";
  104. #clock-cells = <0>;
  105. clock-frequency = <24576000>;
  106. };
  107. x23_clk: x23-clock {
  108. compatible = "fixed-clock";
  109. #clock-cells = <0>;
  110. clock-frequency = <25000000>;
  111. };
  112. };
  113. &audio_clk_a {
  114. clock-frequency = <22579200>;
  115. };
  116. &avb {
  117. pinctrl-0 = <&avb_pins>;
  118. pinctrl-names = "default";
  119. phy-handle = <&phy0>;
  120. phy-mode = "rgmii-txid";
  121. status = "okay";
  122. phy0: ethernet-phy@0 {
  123. rxc-skew-ps = <1500>;
  124. reg = <0>;
  125. interrupt-parent = <&gpio2>;
  126. interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
  127. reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
  128. };
  129. };
  130. &du {
  131. status = "okay";
  132. };
  133. &ehci1 {
  134. status = "okay";
  135. };
  136. &extal_clk {
  137. clock-frequency = <16666666>;
  138. };
  139. &extalr_clk {
  140. clock-frequency = <32768>;
  141. };
  142. &hdmi0 {
  143. status = "okay";
  144. ports {
  145. port@1 {
  146. reg = <1>;
  147. rcar_dw_hdmi0_out: endpoint {
  148. remote-endpoint = <&hdmi0_con>;
  149. };
  150. };
  151. };
  152. };
  153. &hdmi0_con {
  154. remote-endpoint = <&rcar_dw_hdmi0_out>;
  155. };
  156. &i2c2 {
  157. pinctrl-0 = <&i2c2_pins>;
  158. pinctrl-names = "default";
  159. status = "okay";
  160. clock-frequency = <100000>;
  161. ak4613: codec@10 {
  162. compatible = "asahi-kasei,ak4613";
  163. #sound-dai-cells = <0>;
  164. reg = <0x10>;
  165. clocks = <&rcar_sound 3>;
  166. asahi-kasei,in1-single-end;
  167. asahi-kasei,in2-single-end;
  168. asahi-kasei,out1-single-end;
  169. asahi-kasei,out2-single-end;
  170. asahi-kasei,out3-single-end;
  171. asahi-kasei,out4-single-end;
  172. asahi-kasei,out5-single-end;
  173. asahi-kasei,out6-single-end;
  174. };
  175. cs2000: clk-multiplier@4f {
  176. #clock-cells = <0>;
  177. compatible = "cirrus,cs2000-cp";
  178. reg = <0x4f>;
  179. clocks = <&audio_clkout>, <&x12_clk>;
  180. clock-names = "clk_in", "ref_clk";
  181. assigned-clocks = <&cs2000>;
  182. assigned-clock-rates = <24576000>; /* 1/1 divide */
  183. };
  184. };
  185. &i2c4 {
  186. status = "okay";
  187. clock-frequency = <400000>;
  188. versaclock5: clock-generator@6a {
  189. compatible = "idt,5p49v5925";
  190. reg = <0x6a>;
  191. #clock-cells = <1>;
  192. clocks = <&x23_clk>;
  193. clock-names = "xin";
  194. };
  195. };
  196. &i2c_dvfs {
  197. status = "okay";
  198. clock-frequency = <400000>;
  199. pmic: pmic@30 {
  200. pinctrl-0 = <&irq0_pins>;
  201. pinctrl-names = "default";
  202. compatible = "rohm,bd9571mwv";
  203. reg = <0x30>;
  204. interrupt-parent = <&intc_ex>;
  205. interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
  206. interrupt-controller;
  207. #interrupt-cells = <2>;
  208. gpio-controller;
  209. #gpio-cells = <2>;
  210. rohm,ddr-backup-power = <0xf>;
  211. rohm,rstbmode-pulse;
  212. regulators {
  213. dvfs: dvfs {
  214. regulator-name = "dvfs";
  215. regulator-min-microvolt = <750000>;
  216. regulator-max-microvolt = <1030000>;
  217. regulator-boot-on;
  218. regulator-always-on;
  219. };
  220. };
  221. };
  222. };
  223. &ohci1 {
  224. status = "okay";
  225. };
  226. &pfc {
  227. pinctrl-0 = <&scif_clk_pins>;
  228. pinctrl-names = "default";
  229. avb_pins: avb {
  230. mux {
  231. groups = "avb_link", "avb_mdio", "avb_mii";
  232. function = "avb";
  233. };
  234. pins_mdio {
  235. groups = "avb_mdio";
  236. drive-strength = <24>;
  237. };
  238. pins_mii_tx {
  239. pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
  240. "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
  241. drive-strength = <12>;
  242. };
  243. };
  244. i2c2_pins: i2c2 {
  245. groups = "i2c2_a";
  246. function = "i2c2";
  247. };
  248. irq0_pins: irq0 {
  249. groups = "intc_ex_irq0";
  250. function = "intc_ex";
  251. };
  252. scif2_pins: scif2 {
  253. groups = "scif2_data_a";
  254. function = "scif2";
  255. };
  256. scif_clk_pins: scif_clk {
  257. groups = "scif_clk_a";
  258. function = "scif_clk";
  259. };
  260. sdhi0_pins: sd0 {
  261. groups = "sdhi0_data4", "sdhi0_ctrl";
  262. function = "sdhi0";
  263. power-source = <3300>;
  264. };
  265. sdhi0_pins_uhs: sd0_uhs {
  266. groups = "sdhi0_data4", "sdhi0_ctrl";
  267. function = "sdhi0";
  268. power-source = <1800>;
  269. };
  270. sdhi2_pins: sd2 {
  271. groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
  272. function = "sdhi2";
  273. power-source = <3300>;
  274. };
  275. sdhi2_pins_uhs: sd2_uhs {
  276. groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
  277. function = "sdhi2";
  278. power-source = <1800>;
  279. };
  280. sound_pins: sound {
  281. groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
  282. function = "ssi";
  283. };
  284. sound_clk_pins: sound-clk {
  285. groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
  286. "audio_clkout_a", "audio_clkout3_a";
  287. function = "audio_clk";
  288. };
  289. usb1_pins: usb1 {
  290. groups = "usb1";
  291. function = "usb1";
  292. };
  293. };
  294. &rcar_sound {
  295. pinctrl-0 = <&sound_pins &sound_clk_pins>;
  296. pinctrl-names = "default";
  297. /* Single DAI */
  298. #sound-dai-cells = <0>;
  299. /* audio_clkout0/1/2/3 */
  300. #clock-cells = <1>;
  301. clock-frequency = <12288000 11289600>;
  302. status = "okay";
  303. /* update <audio_clk_b> to <cs2000> */
  304. clocks = <&cpg CPG_MOD 1005>,
  305. <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
  306. <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
  307. <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
  308. <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
  309. <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
  310. <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
  311. <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
  312. <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
  313. <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
  314. <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
  315. <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
  316. <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
  317. <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
  318. <&audio_clk_a>, <&cs2000>,
  319. <&audio_clk_c>,
  320. <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
  321. rcar_sound,dai {
  322. dai0 {
  323. playback = <&ssi0 &src0 &dvc0>;
  324. capture = <&ssi1 &src1 &dvc1>;
  325. };
  326. };
  327. };
  328. &scif2 {
  329. pinctrl-0 = <&scif2_pins>;
  330. pinctrl-names = "default";
  331. status = "okay";
  332. };
  333. &scif_clk {
  334. clock-frequency = <14745600>;
  335. };
  336. &sdhi0 {
  337. pinctrl-0 = <&sdhi0_pins>;
  338. pinctrl-1 = <&sdhi0_pins_uhs>;
  339. pinctrl-names = "default", "state_uhs";
  340. vmmc-supply = <&vcc_sdhi0>;
  341. vqmmc-supply = <&vccq_sdhi0>;
  342. cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
  343. bus-width = <4>;
  344. sd-uhs-sdr50;
  345. sd-uhs-sdr104;
  346. status = "okay";
  347. };
  348. &sdhi2 {
  349. /* used for on-board 8bit eMMC */
  350. pinctrl-0 = <&sdhi2_pins>;
  351. pinctrl-1 = <&sdhi2_pins_uhs>;
  352. pinctrl-names = "default", "state_uhs";
  353. vmmc-supply = <&reg_3p3v>;
  354. vqmmc-supply = <&reg_1p8v>;
  355. bus-width = <8>;
  356. mmc-hs200-1_8v;
  357. non-removable;
  358. status = "okay";
  359. };
  360. &ssi1 {
  361. shared-pin;
  362. };
  363. &usb2_phy1 {
  364. pinctrl-0 = <&usb1_pins>;
  365. pinctrl-names = "default";
  366. status = "okay";
  367. };
  368. &rwdt {
  369. timeout-sec = <60>;
  370. status = "okay";
  371. };