r8a77990-ebisu.dts 5.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Device Tree Source for the ebisu board
  4. *
  5. * Copyright (C) 2018 Renesas Electronics Corp.
  6. */
  7. /dts-v1/;
  8. #include "r8a77990.dtsi"
  9. #include <dt-bindings/gpio/gpio.h>
  10. / {
  11. model = "Renesas Ebisu board based on r8a77990";
  12. compatible = "renesas,ebisu", "renesas,r8a77990";
  13. aliases {
  14. serial0 = &scif2;
  15. ethernet0 = &avb;
  16. };
  17. chosen {
  18. bootargs = "ignore_loglevel";
  19. stdout-path = "serial0:115200n8";
  20. };
  21. memory@48000000 {
  22. device_type = "memory";
  23. /* first 128MB is reserved for secure area. */
  24. reg = <0x0 0x48000000 0x0 0x38000000>;
  25. };
  26. cvbs-in {
  27. compatible = "composite-video-connector";
  28. label = "CVBS IN";
  29. port {
  30. cvbs_con: endpoint {
  31. remote-endpoint = <&adv7482_ain7>;
  32. };
  33. };
  34. };
  35. hdmi-in {
  36. compatible = "hdmi-connector";
  37. label = "HDMI IN";
  38. type = "a";
  39. port {
  40. hdmi_in_con: endpoint {
  41. remote-endpoint = <&adv7482_hdmi>;
  42. };
  43. };
  44. };
  45. hdmi-out {
  46. compatible = "hdmi-connector";
  47. type = "a";
  48. port {
  49. hdmi_con_out: endpoint {
  50. remote-endpoint = <&adv7511_out>;
  51. };
  52. };
  53. };
  54. lvds-decoder {
  55. compatible = "thine,thc63lvd1024";
  56. vcc-supply = <&reg_3p3v>;
  57. ports {
  58. #address-cells = <1>;
  59. #size-cells = <0>;
  60. port@0 {
  61. reg = <0>;
  62. thc63lvd1024_in: endpoint {
  63. remote-endpoint = <&lvds0_out>;
  64. };
  65. };
  66. port@2 {
  67. reg = <2>;
  68. thc63lvd1024_out: endpoint {
  69. remote-endpoint = <&adv7511_in>;
  70. };
  71. };
  72. };
  73. };
  74. vga {
  75. compatible = "vga-connector";
  76. port {
  77. vga_in: endpoint {
  78. remote-endpoint = <&adv7123_out>;
  79. };
  80. };
  81. };
  82. vga-encoder {
  83. compatible = "adi,adv7123";
  84. ports {
  85. #address-cells = <1>;
  86. #size-cells = <0>;
  87. port@0 {
  88. reg = <0>;
  89. adv7123_in: endpoint {
  90. remote-endpoint = <&du_out_rgb>;
  91. };
  92. };
  93. port@1 {
  94. reg = <1>;
  95. adv7123_out: endpoint {
  96. remote-endpoint = <&vga_in>;
  97. };
  98. };
  99. };
  100. };
  101. reg_3p3v: regulator1 {
  102. compatible = "regulator-fixed";
  103. regulator-name = "fixed-3.3V";
  104. regulator-min-microvolt = <3300000>;
  105. regulator-max-microvolt = <3300000>;
  106. regulator-boot-on;
  107. regulator-always-on;
  108. };
  109. x13_clk: x13 {
  110. compatible = "fixed-clock";
  111. #clock-cells = <0>;
  112. clock-frequency = <74250000>;
  113. };
  114. };
  115. &avb {
  116. pinctrl-0 = <&avb_pins>;
  117. pinctrl-names = "default";
  118. renesas,no-ether-link;
  119. phy-handle = <&phy0>;
  120. phy-mode = "rgmii-txid";
  121. status = "okay";
  122. phy0: ethernet-phy@0 {
  123. rxc-skew-ps = <1500>;
  124. reg = <0>;
  125. interrupt-parent = <&gpio2>;
  126. interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
  127. reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
  128. };
  129. };
  130. &csi40 {
  131. status = "okay";
  132. ports {
  133. port@0 {
  134. reg = <0>;
  135. csi40_in: endpoint {
  136. clock-lanes = <0>;
  137. data-lanes = <1 2>;
  138. remote-endpoint = <&adv7482_txa>;
  139. };
  140. };
  141. };
  142. };
  143. &du {
  144. pinctrl-0 = <&du_pins>;
  145. pinctrl-names = "default";
  146. status = "okay";
  147. clocks = <&cpg CPG_MOD 724>,
  148. <&cpg CPG_MOD 723>,
  149. <&x13_clk>;
  150. clock-names = "du.0", "du.1", "dclkin.0";
  151. ports {
  152. port@0 {
  153. endpoint {
  154. remote-endpoint = <&adv7123_in>;
  155. };
  156. };
  157. };
  158. };
  159. &ehci0 {
  160. status = "okay";
  161. };
  162. &extal_clk {
  163. clock-frequency = <48000000>;
  164. };
  165. &i2c0 {
  166. status = "okay";
  167. hdmi-encoder@39 {
  168. compatible = "adi,adv7511w";
  169. reg = <0x39>;
  170. interrupt-parent = <&gpio1>;
  171. interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
  172. adi,input-depth = <8>;
  173. adi,input-colorspace = "rgb";
  174. adi,input-clock = "1x";
  175. adi,input-style = <1>;
  176. adi,input-justification = "evenly";
  177. ports {
  178. #address-cells = <1>;
  179. #size-cells = <0>;
  180. port@0 {
  181. reg = <0>;
  182. adv7511_in: endpoint {
  183. remote-endpoint = <&thc63lvd1024_out>;
  184. };
  185. };
  186. port@1 {
  187. reg = <1>;
  188. adv7511_out: endpoint {
  189. remote-endpoint = <&hdmi_con_out>;
  190. };
  191. };
  192. };
  193. };
  194. video-receiver@70 {
  195. compatible = "adi,adv7482";
  196. reg = <0x70>;
  197. #address-cells = <1>;
  198. #size-cells = <0>;
  199. interrupt-parent = <&gpio0>;
  200. interrupt-names = "intrq1", "intrq2";
  201. interrupts = <7 IRQ_TYPE_LEVEL_LOW>,
  202. <17 IRQ_TYPE_LEVEL_LOW>;
  203. port@7 {
  204. reg = <7>;
  205. adv7482_ain7: endpoint {
  206. remote-endpoint = <&cvbs_con>;
  207. };
  208. };
  209. port@8 {
  210. reg = <8>;
  211. adv7482_hdmi: endpoint {
  212. remote-endpoint = <&hdmi_in_con>;
  213. };
  214. };
  215. port@a {
  216. reg = <0xa>;
  217. adv7482_txa: endpoint {
  218. clock-lanes = <0>;
  219. data-lanes = <1 2>;
  220. remote-endpoint = <&csi40_in>;
  221. };
  222. };
  223. };
  224. };
  225. &lvds0 {
  226. status = "okay";
  227. clocks = <&cpg CPG_MOD 727>,
  228. <&x13_clk>,
  229. <&extal_clk>;
  230. clock-names = "fck", "dclkin.0", "extal";
  231. ports {
  232. port@1 {
  233. lvds0_out: endpoint {
  234. remote-endpoint = <&thc63lvd1024_in>;
  235. };
  236. };
  237. };
  238. };
  239. &lvds1 {
  240. clocks = <&cpg CPG_MOD 727>,
  241. <&x13_clk>,
  242. <&extal_clk>;
  243. clock-names = "fck", "dclkin.0", "extal";
  244. };
  245. &ohci0 {
  246. status = "okay";
  247. };
  248. &pfc {
  249. avb_pins: avb {
  250. mux {
  251. groups = "avb_link", "avb_mii";
  252. function = "avb";
  253. };
  254. };
  255. du_pins: du {
  256. groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
  257. function = "du";
  258. };
  259. pwm3_pins: pwm3 {
  260. groups = "pwm3_b";
  261. function = "pwm3";
  262. };
  263. pwm5_pins: pwm5 {
  264. groups = "pwm5_a";
  265. function = "pwm5";
  266. };
  267. usb0_pins: usb {
  268. groups = "usb0_b";
  269. function = "usb0";
  270. };
  271. usb30_pins: usb30 {
  272. groups = "usb30";
  273. function = "usb30";
  274. };
  275. };
  276. &pwm3 {
  277. pinctrl-0 = <&pwm3_pins>;
  278. pinctrl-names = "default";
  279. status = "okay";
  280. };
  281. &pwm5 {
  282. pinctrl-0 = <&pwm5_pins>;
  283. pinctrl-names = "default";
  284. status = "okay";
  285. };
  286. &rwdt {
  287. timeout-sec = <60>;
  288. status = "okay";
  289. };
  290. &scif2 {
  291. status = "okay";
  292. };
  293. &usb2_phy0 {
  294. pinctrl-0 = <&usb0_pins>;
  295. pinctrl-names = "default";
  296. status = "okay";
  297. };
  298. &vin4 {
  299. status = "okay";
  300. };
  301. &xhci0 {
  302. pinctrl-0 = <&usb30_pins>;
  303. pinctrl-names = "default";
  304. status = "okay";
  305. };