fsl-ls1043a-qds.dts 2.3 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Device Tree Include file for Freescale Layerscape-1043A family SoC.
  4. *
  5. * Copyright 2014-2015 Freescale Semiconductor, Inc.
  6. * Copyright 2018 NXP
  7. *
  8. * Mingkai Hu <Mingkai.hu@freescale.com>
  9. */
  10. /dts-v1/;
  11. #include "fsl-ls1043a.dtsi"
  12. / {
  13. model = "LS1043A QDS Board";
  14. compatible = "fsl,ls1043a-qds", "fsl,ls1043a";
  15. aliases {
  16. gpio0 = &gpio1;
  17. gpio1 = &gpio2;
  18. gpio2 = &gpio3;
  19. gpio3 = &gpio4;
  20. serial0 = &duart0;
  21. serial1 = &duart1;
  22. serial2 = &duart2;
  23. serial3 = &duart3;
  24. };
  25. chosen {
  26. stdout-path = "serial0:115200n8";
  27. };
  28. };
  29. &duart0 {
  30. status = "okay";
  31. };
  32. &duart1 {
  33. status = "okay";
  34. };
  35. &ifc {
  36. #address-cells = <2>;
  37. #size-cells = <1>;
  38. /* NOR, NAND Flashes and FPGA on board */
  39. ranges = <0x0 0x0 0x0 0x60000000 0x08000000
  40. 0x1 0x0 0x0 0x7e800000 0x00010000
  41. 0x2 0x0 0x0 0x7fb00000 0x00000100>;
  42. status = "okay";
  43. nor@0,0 {
  44. compatible = "cfi-flash";
  45. reg = <0x0 0x0 0x8000000>;
  46. big-endian;
  47. bank-width = <2>;
  48. device-width = <1>;
  49. };
  50. nand@1,0 {
  51. compatible = "fsl,ifc-nand";
  52. reg = <0x1 0x0 0x10000>;
  53. };
  54. fpga: board-control@2,0 {
  55. compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis";
  56. reg = <0x2 0x0 0x0000100>;
  57. };
  58. };
  59. &i2c0 {
  60. status = "okay";
  61. pca9547@77 {
  62. compatible = "nxp,pca9547";
  63. reg = <0x77>;
  64. #address-cells = <1>;
  65. #size-cells = <0>;
  66. i2c@0 {
  67. #address-cells = <1>;
  68. #size-cells = <0>;
  69. reg = <0x0>;
  70. rtc@68 {
  71. compatible = "dallas,ds3232";
  72. reg = <0x68>;
  73. /* IRQ10_B */
  74. interrupts = <0 150 0x4>;
  75. };
  76. };
  77. i2c@2 {
  78. #address-cells = <1>;
  79. #size-cells = <0>;
  80. reg = <0x2>;
  81. ina220@40 {
  82. compatible = "ti,ina220";
  83. reg = <0x40>;
  84. shunt-resistor = <1000>;
  85. };
  86. ina220@41 {
  87. compatible = "ti,ina220";
  88. reg = <0x41>;
  89. shunt-resistor = <1000>;
  90. };
  91. };
  92. i2c@3 {
  93. #address-cells = <1>;
  94. #size-cells = <0>;
  95. reg = <0x3>;
  96. eeprom@56 {
  97. compatible = "atmel,24c512";
  98. reg = <0x56>;
  99. };
  100. eeprom@57 {
  101. compatible = "atmel,24c512";
  102. reg = <0x57>;
  103. };
  104. temp-sensor@4c {
  105. compatible = "adi,adt7461a";
  106. reg = <0x4c>;
  107. };
  108. };
  109. };
  110. };
  111. &lpuart0 {
  112. status = "okay";
  113. };
  114. &qspi {
  115. bus-num = <0>;
  116. status = "okay";
  117. qflash0: s25fl128s@0 {
  118. compatible = "spansion,m25p80";
  119. #address-cells = <1>;
  120. #size-cells = <1>;
  121. spi-max-frequency = <20000000>;
  122. reg = <0>;
  123. };
  124. };
  125. #include "fsl-ls1043-post.dtsi"