exynos5433-tm2-common.dtsi 29 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * SAMSUNG Exynos5433 TM2 board device tree source
  4. *
  5. * Copyright (c) 2016 Samsung Electronics Co., Ltd.
  6. *
  7. * Common device tree source file for Samsung's TM2 and TM2E boards
  8. * which are based on Samsung Exynos5433 SoC.
  9. */
  10. /dts-v1/;
  11. #include "exynos5433.dtsi"
  12. #include <dt-bindings/clock/samsung,s2mps11.h>
  13. #include <dt-bindings/gpio/gpio.h>
  14. #include <dt-bindings/input/input.h>
  15. #include <dt-bindings/interrupt-controller/irq.h>
  16. #include <dt-bindings/sound/samsung-i2s.h>
  17. / {
  18. aliases {
  19. gsc0 = &gsc_0;
  20. gsc1 = &gsc_1;
  21. gsc2 = &gsc_2;
  22. pinctrl0 = &pinctrl_alive;
  23. pinctrl1 = &pinctrl_aud;
  24. pinctrl2 = &pinctrl_cpif;
  25. pinctrl3 = &pinctrl_ese;
  26. pinctrl4 = &pinctrl_finger;
  27. pinctrl5 = &pinctrl_fsys;
  28. pinctrl6 = &pinctrl_imem;
  29. pinctrl7 = &pinctrl_nfc;
  30. pinctrl8 = &pinctrl_peric;
  31. pinctrl9 = &pinctrl_touch;
  32. serial0 = &serial_0;
  33. serial1 = &serial_1;
  34. serial2 = &serial_2;
  35. serial3 = &serial_3;
  36. spi0 = &spi_0;
  37. spi1 = &spi_1;
  38. spi2 = &spi_2;
  39. spi3 = &spi_3;
  40. spi4 = &spi_4;
  41. mshc0 = &mshc_0;
  42. mshc2 = &mshc_2;
  43. };
  44. chosen {
  45. stdout-path = &serial_1;
  46. };
  47. memory@20000000 {
  48. device_type = "memory";
  49. reg = <0x0 0x20000000 0x0 0xc0000000>;
  50. };
  51. gpio-keys {
  52. compatible = "gpio-keys";
  53. power-key {
  54. gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
  55. linux,code = <KEY_POWER>;
  56. label = "power key";
  57. debounce-interval = <10>;
  58. };
  59. volume-up-key {
  60. gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
  61. linux,code = <KEY_VOLUMEUP>;
  62. label = "volume-up key";
  63. debounce-interval = <10>;
  64. };
  65. volume-down-key {
  66. gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
  67. linux,code = <KEY_VOLUMEDOWN>;
  68. label = "volume-down key";
  69. debounce-interval = <10>;
  70. };
  71. homepage-key {
  72. gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
  73. linux,code = <KEY_MENU>;
  74. label = "homepage key";
  75. debounce-interval = <10>;
  76. };
  77. };
  78. i2c_max98504: i2c-gpio-0 {
  79. compatible = "i2c-gpio";
  80. gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
  81. &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
  82. i2c-gpio,delay-us = <2>;
  83. #address-cells = <1>;
  84. #size-cells = <0>;
  85. status = "okay";
  86. max98504: max98504@31 {
  87. compatible = "maxim,max98504";
  88. reg = <0x31>;
  89. maxim,rx-path = <1>;
  90. maxim,tx-path = <1>;
  91. maxim,tx-channel-mask = <3>;
  92. maxim,tx-channel-source = <2>;
  93. };
  94. };
  95. irda_regulator: irda-regulator {
  96. compatible = "regulator-fixed";
  97. enable-active-high;
  98. gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>;
  99. regulator-name = "irda_regulator";
  100. };
  101. sound {
  102. compatible = "samsung,tm2-audio";
  103. audio-codec = <&wm5110>, <&hdmi>;
  104. i2s-controller = <&i2s0 0>, <&i2s1 0>;
  105. audio-amplifier = <&max98504>;
  106. mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
  107. model = "wm5110";
  108. samsung,audio-routing =
  109. /* Headphone */
  110. "HP", "HPOUT1L",
  111. "HP", "HPOUT1R",
  112. /* Speaker */
  113. "SPK", "SPKOUT",
  114. "SPKOUT", "HPOUT2L",
  115. "SPKOUT", "HPOUT2R",
  116. /* Receiver */
  117. "RCV", "HPOUT3L",
  118. "RCV", "HPOUT3R";
  119. status = "okay";
  120. };
  121. };
  122. &adc {
  123. vdd-supply = <&ldo3_reg>;
  124. status = "okay";
  125. thermistor-ap {
  126. compatible = "murata,ncp03wf104";
  127. pullup-uv = <1800000>;
  128. pullup-ohm = <100000>;
  129. pulldown-ohm = <0>;
  130. io-channels = <&adc 0>;
  131. };
  132. thermistor-battery {
  133. compatible = "murata,ncp03wf104";
  134. pullup-uv = <1800000>;
  135. pullup-ohm = <100000>;
  136. pulldown-ohm = <0>;
  137. io-channels = <&adc 1>;
  138. #thermal-sensor-cells = <0>;
  139. };
  140. thermistor-charger {
  141. compatible = "murata,ncp03wf104";
  142. pullup-uv = <1800000>;
  143. pullup-ohm = <100000>;
  144. pulldown-ohm = <0>;
  145. io-channels = <&adc 2>;
  146. };
  147. };
  148. &bus_g2d_400 {
  149. devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
  150. vdd-supply = <&buck4_reg>;
  151. exynos,saturation-ratio = <10>;
  152. status = "okay";
  153. };
  154. &bus_g2d_266 {
  155. devfreq = <&bus_g2d_400>;
  156. status = "okay";
  157. };
  158. &bus_gscl {
  159. devfreq = <&bus_g2d_400>;
  160. status = "okay";
  161. };
  162. &bus_hevc {
  163. devfreq = <&bus_g2d_400>;
  164. status = "okay";
  165. };
  166. &bus_jpeg {
  167. devfreq = <&bus_g2d_400>;
  168. status = "okay";
  169. };
  170. &bus_mfc {
  171. devfreq = <&bus_g2d_400>;
  172. status = "okay";
  173. };
  174. &bus_mscl {
  175. devfreq = <&bus_g2d_400>;
  176. status = "okay";
  177. };
  178. &bus_noc0 {
  179. devfreq = <&bus_g2d_400>;
  180. status = "okay";
  181. };
  182. &bus_noc1 {
  183. devfreq = <&bus_g2d_400>;
  184. status = "okay";
  185. };
  186. &bus_noc2 {
  187. devfreq = <&bus_g2d_400>;
  188. status = "okay";
  189. };
  190. &cmu_aud {
  191. assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
  192. <&cmu_aud CLK_MOUT_SCLK_AUD_I2S>,
  193. <&cmu_aud CLK_MOUT_SCLK_AUD_PCM>,
  194. <&cmu_top CLK_MOUT_AUD_PLL>,
  195. <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
  196. <&cmu_top CLK_MOUT_SCLK_AUDIO0>,
  197. <&cmu_top CLK_MOUT_SCLK_AUDIO1>,
  198. <&cmu_top CLK_MOUT_SCLK_SPDIF>,
  199. <&cmu_aud CLK_DIV_AUD_CA5>,
  200. <&cmu_aud CLK_DIV_ACLK_AUD>,
  201. <&cmu_aud CLK_DIV_PCLK_DBG_AUD>,
  202. <&cmu_aud CLK_DIV_SCLK_AUD_I2S>,
  203. <&cmu_aud CLK_DIV_SCLK_AUD_PCM>,
  204. <&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>,
  205. <&cmu_aud CLK_DIV_SCLK_AUD_UART>,
  206. <&cmu_top CLK_DIV_SCLK_AUDIO0>,
  207. <&cmu_top CLK_DIV_SCLK_AUDIO1>,
  208. <&cmu_top CLK_DIV_SCLK_PCM1>,
  209. <&cmu_top CLK_DIV_SCLK_I2S1>;
  210. assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>,
  211. <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
  212. <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
  213. <&cmu_top CLK_FOUT_AUD_PLL>,
  214. <&cmu_top CLK_MOUT_AUD_PLL>,
  215. <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
  216. <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
  217. <&cmu_top CLK_SCLK_AUDIO0>;
  218. assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
  219. <196608001>, <65536001>, <32768001>, <49152001>,
  220. <2048001>, <24576001>, <196608001>,
  221. <24576001>, <98304001>, <2048001>, <49152001>;
  222. };
  223. &cmu_fsys {
  224. assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
  225. <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
  226. <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
  227. <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
  228. <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
  229. <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
  230. <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
  231. <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
  232. <&cmu_top CLK_DIV_SCLK_USBDRD30>,
  233. <&cmu_top CLK_DIV_SCLK_USBHOST30>;
  234. assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
  235. <&cmu_top CLK_MOUT_BUS_PLL_USER>,
  236. <&cmu_top CLK_SCLK_USBDRD30_FSYS>,
  237. <&cmu_top CLK_SCLK_USBHOST30_FSYS>,
  238. <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
  239. <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
  240. <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
  241. <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
  242. assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
  243. <66700000>, <66700000>;
  244. };
  245. &cmu_gscl {
  246. assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
  247. <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
  248. assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
  249. <&cmu_top CLK_ACLK_GSCL_333>;
  250. };
  251. &cmu_mfc {
  252. assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
  253. assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
  254. };
  255. &cmu_mscl {
  256. assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
  257. <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
  258. <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
  259. <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
  260. assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
  261. <&cmu_top CLK_SCLK_JPEG_MSCL>,
  262. <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
  263. <&cmu_top CLK_MOUT_BUS_PLL_USER>;
  264. };
  265. &cmu_top {
  266. assigned-clocks = <&cmu_top CLK_FOUT_AUD_PLL>;
  267. assigned-clock-rates = <196608001>;
  268. };
  269. &cpu0 {
  270. cpu-supply = <&buck3_reg>;
  271. };
  272. &cpu4 {
  273. cpu-supply = <&buck2_reg>;
  274. };
  275. &decon {
  276. status = "okay";
  277. };
  278. &decon_tv {
  279. status = "okay";
  280. ports {
  281. #address-cells = <1>;
  282. #size-cells = <0>;
  283. port@0 {
  284. reg = <0>;
  285. tv_to_hdmi: endpoint {
  286. remote-endpoint = <&hdmi_to_tv>;
  287. };
  288. };
  289. };
  290. };
  291. &dsi {
  292. status = "okay";
  293. vddcore-supply = <&ldo6_reg>;
  294. vddio-supply = <&ldo7_reg>;
  295. samsung,burst-clock-frequency = <512000000>;
  296. samsung,esc-clock-frequency = <16000000>;
  297. samsung,pll-clock-frequency = <24000000>;
  298. pinctrl-names = "default";
  299. pinctrl-0 = <&te_irq>;
  300. };
  301. &hdmi {
  302. hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
  303. status = "okay";
  304. vdd-supply = <&ldo6_reg>;
  305. vdd_osc-supply = <&ldo7_reg>;
  306. vdd_pll-supply = <&ldo6_reg>;
  307. ports {
  308. #address-cells = <1>;
  309. #size-cells = <0>;
  310. port@0 {
  311. reg = <0>;
  312. hdmi_to_tv: endpoint {
  313. remote-endpoint = <&tv_to_hdmi>;
  314. };
  315. };
  316. port@1 {
  317. reg = <1>;
  318. hdmi_to_mhl: endpoint {
  319. remote-endpoint = <&mhl_to_hdmi>;
  320. };
  321. };
  322. };
  323. };
  324. &hsi2c_0 {
  325. status = "okay";
  326. clock-frequency = <2500000>;
  327. s2mps13-pmic@66 {
  328. compatible = "samsung,s2mps13-pmic";
  329. interrupt-parent = <&gpa0>;
  330. interrupts = <7 IRQ_TYPE_NONE>;
  331. reg = <0x66>;
  332. samsung,s2mps11-wrstbi-ground;
  333. s2mps13_osc: clocks {
  334. compatible = "samsung,s2mps13-clk";
  335. #clock-cells = <1>;
  336. clock-output-names = "s2mps13_ap", "s2mps13_cp",
  337. "s2mps13_bt";
  338. };
  339. regulators {
  340. ldo1_reg: LDO1 {
  341. regulator-name = "VDD_ALIVE_0.9V_AP";
  342. regulator-min-microvolt = <900000>;
  343. regulator-max-microvolt = <900000>;
  344. regulator-always-on;
  345. };
  346. ldo2_reg: LDO2 {
  347. regulator-name = "VDDQ_MMC2_2.8V_AP";
  348. regulator-min-microvolt = <2800000>;
  349. regulator-max-microvolt = <2800000>;
  350. regulator-always-on;
  351. regulator-state-mem {
  352. regulator-off-in-suspend;
  353. };
  354. };
  355. ldo3_reg: LDO3 {
  356. regulator-name = "VDD1_E_1.8V_AP";
  357. regulator-min-microvolt = <1800000>;
  358. regulator-max-microvolt = <1800000>;
  359. regulator-always-on;
  360. };
  361. ldo4_reg: LDO4 {
  362. regulator-name = "VDD10_MIF_PLL_1.0V_AP";
  363. regulator-min-microvolt = <1300000>;
  364. regulator-max-microvolt = <1300000>;
  365. regulator-always-on;
  366. regulator-state-mem {
  367. regulator-off-in-suspend;
  368. };
  369. };
  370. ldo5_reg: LDO5 {
  371. regulator-name = "VDD10_DPLL_1.0V_AP";
  372. regulator-min-microvolt = <1000000>;
  373. regulator-max-microvolt = <1000000>;
  374. regulator-always-on;
  375. regulator-state-mem {
  376. regulator-off-in-suspend;
  377. };
  378. };
  379. ldo6_reg: LDO6 {
  380. regulator-name = "VDD10_MIPI2L_1.0V_AP";
  381. regulator-min-microvolt = <1000000>;
  382. regulator-max-microvolt = <1000000>;
  383. regulator-state-mem {
  384. regulator-off-in-suspend;
  385. };
  386. };
  387. ldo7_reg: LDO7 {
  388. regulator-name = "VDD18_MIPI2L_1.8V_AP";
  389. regulator-min-microvolt = <1800000>;
  390. regulator-max-microvolt = <1800000>;
  391. regulator-always-on;
  392. regulator-state-mem {
  393. regulator-off-in-suspend;
  394. };
  395. };
  396. ldo8_reg: LDO8 {
  397. regulator-name = "VDD18_LLI_1.8V_AP";
  398. regulator-min-microvolt = <1800000>;
  399. regulator-max-microvolt = <1800000>;
  400. regulator-always-on;
  401. regulator-state-mem {
  402. regulator-off-in-suspend;
  403. };
  404. };
  405. ldo9_reg: LDO9 {
  406. regulator-name = "VDD18_ABB_ETC_1.8V_AP";
  407. regulator-min-microvolt = <1800000>;
  408. regulator-max-microvolt = <1800000>;
  409. regulator-always-on;
  410. regulator-state-mem {
  411. regulator-off-in-suspend;
  412. };
  413. };
  414. ldo10_reg: LDO10 {
  415. regulator-name = "VDD33_USB30_3.0V_AP";
  416. regulator-min-microvolt = <3000000>;
  417. regulator-max-microvolt = <3000000>;
  418. regulator-state-mem {
  419. regulator-off-in-suspend;
  420. };
  421. };
  422. ldo11_reg: LDO11 {
  423. regulator-name = "VDD_INT_M_1.0V_AP";
  424. regulator-min-microvolt = <1000000>;
  425. regulator-max-microvolt = <1000000>;
  426. regulator-always-on;
  427. regulator-state-mem {
  428. regulator-off-in-suspend;
  429. };
  430. };
  431. ldo12_reg: LDO12 {
  432. regulator-name = "VDD_KFC_M_1.1V_AP";
  433. regulator-min-microvolt = <800000>;
  434. regulator-max-microvolt = <1350000>;
  435. regulator-always-on;
  436. };
  437. ldo13_reg: LDO13 {
  438. regulator-name = "VDD_G3D_M_0.95V_AP";
  439. regulator-min-microvolt = <950000>;
  440. regulator-max-microvolt = <950000>;
  441. regulator-always-on;
  442. regulator-state-mem {
  443. regulator-off-in-suspend;
  444. };
  445. };
  446. ldo14_reg: LDO14 {
  447. regulator-name = "VDDQ_M1_LDO_1.2V_AP";
  448. regulator-min-microvolt = <1200000>;
  449. regulator-max-microvolt = <1200000>;
  450. regulator-always-on;
  451. regulator-state-mem {
  452. regulator-off-in-suspend;
  453. };
  454. };
  455. ldo15_reg: LDO15 {
  456. regulator-name = "VDDQ_M2_LDO_1.2V_AP";
  457. regulator-min-microvolt = <1200000>;
  458. regulator-max-microvolt = <1200000>;
  459. regulator-always-on;
  460. regulator-state-mem {
  461. regulator-off-in-suspend;
  462. };
  463. };
  464. ldo16_reg: LDO16 {
  465. regulator-name = "VDDQ_EFUSE";
  466. regulator-min-microvolt = <1400000>;
  467. regulator-max-microvolt = <3400000>;
  468. regulator-always-on;
  469. };
  470. ldo17_reg: LDO17 {
  471. regulator-name = "V_TFLASH_2.8V_AP";
  472. regulator-min-microvolt = <2800000>;
  473. regulator-max-microvolt = <2800000>;
  474. };
  475. ldo18_reg: LDO18 {
  476. regulator-name = "V_CODEC_1.8V_AP";
  477. regulator-min-microvolt = <1800000>;
  478. regulator-max-microvolt = <1800000>;
  479. };
  480. ldo19_reg: LDO19 {
  481. regulator-name = "VDDA_1.8V_COMP";
  482. regulator-min-microvolt = <1800000>;
  483. regulator-max-microvolt = <1800000>;
  484. regulator-always-on;
  485. };
  486. ldo20_reg: LDO20 {
  487. regulator-name = "VCC_2.8V_AP";
  488. regulator-min-microvolt = <2800000>;
  489. regulator-max-microvolt = <2800000>;
  490. regulator-always-on;
  491. };
  492. ldo21_reg: LDO21 {
  493. regulator-name = "VT_CAM_1.8V";
  494. regulator-min-microvolt = <1800000>;
  495. regulator-max-microvolt = <1800000>;
  496. };
  497. ldo22_reg: LDO22 {
  498. regulator-name = "CAM_IO_1.8V_AP";
  499. regulator-min-microvolt = <1800000>;
  500. regulator-max-microvolt = <1800000>;
  501. };
  502. ldo23_reg: LDO23 {
  503. regulator-name = "CAM_SEN_CORE_1.05V_AP";
  504. regulator-min-microvolt = <1050000>;
  505. regulator-max-microvolt = <1050000>;
  506. };
  507. ldo24_reg: LDO24 {
  508. regulator-name = "VT_CAM_1.2V";
  509. regulator-min-microvolt = <1200000>;
  510. regulator-max-microvolt = <1200000>;
  511. };
  512. ldo25_reg: LDO25 {
  513. regulator-name = "UNUSED_LDO25";
  514. regulator-min-microvolt = <2800000>;
  515. regulator-max-microvolt = <2800000>;
  516. };
  517. ldo26_reg: LDO26 {
  518. regulator-name = "CAM_AF_2.8V_AP";
  519. regulator-min-microvolt = <2800000>;
  520. regulator-max-microvolt = <2800000>;
  521. };
  522. ldo27_reg: LDO27 {
  523. regulator-name = "VCC_3.0V_LCD_AP";
  524. regulator-min-microvolt = <3000000>;
  525. regulator-max-microvolt = <3000000>;
  526. };
  527. ldo28_reg: LDO28 {
  528. regulator-name = "VCC_1.8V_LCD_AP";
  529. regulator-min-microvolt = <1800000>;
  530. regulator-max-microvolt = <1800000>;
  531. };
  532. ldo29_reg: LDO29 {
  533. regulator-name = "VT_CAM_2.8V";
  534. regulator-min-microvolt = <3000000>;
  535. regulator-max-microvolt = <3000000>;
  536. };
  537. ldo30_reg: LDO30 {
  538. regulator-name = "TSP_AVDD_3.3V_AP";
  539. regulator-min-microvolt = <3300000>;
  540. regulator-max-microvolt = <3300000>;
  541. };
  542. ldo31_reg: LDO31 {
  543. /*
  544. * LDO31 differs from target to target,
  545. * its definition is in the .dts
  546. */
  547. };
  548. ldo32_reg: LDO32 {
  549. regulator-name = "VTOUCH_1.8V_AP";
  550. regulator-min-microvolt = <1800000>;
  551. regulator-max-microvolt = <1800000>;
  552. };
  553. ldo33_reg: LDO33 {
  554. regulator-name = "VTOUCH_LED_3.3V";
  555. regulator-min-microvolt = <2500000>;
  556. regulator-max-microvolt = <3300000>;
  557. regulator-ramp-delay = <12500>;
  558. };
  559. ldo34_reg: LDO34 {
  560. regulator-name = "VCC_1.8V_MHL_AP";
  561. regulator-min-microvolt = <1000000>;
  562. regulator-max-microvolt = <2100000>;
  563. };
  564. ldo35_reg: LDO35 {
  565. regulator-name = "OIS_VM_2.8V";
  566. regulator-min-microvolt = <1800000>;
  567. regulator-max-microvolt = <2800000>;
  568. };
  569. ldo36_reg: LDO36 {
  570. regulator-name = "VSIL_1.0V";
  571. regulator-min-microvolt = <1000000>;
  572. regulator-max-microvolt = <1000000>;
  573. };
  574. ldo37_reg: LDO37 {
  575. regulator-name = "VF_1.8V";
  576. regulator-min-microvolt = <1800000>;
  577. regulator-max-microvolt = <1800000>;
  578. };
  579. ldo38_reg: LDO38 {
  580. /*
  581. * LDO38 differs from target to target,
  582. * its definition is in the .dts
  583. */
  584. };
  585. ldo39_reg: LDO39 {
  586. regulator-name = "V_HRM_1.8V";
  587. regulator-min-microvolt = <1800000>;
  588. regulator-max-microvolt = <1800000>;
  589. };
  590. ldo40_reg: LDO40 {
  591. regulator-name = "V_HRM_3.3V";
  592. regulator-min-microvolt = <3300000>;
  593. regulator-max-microvolt = <3300000>;
  594. };
  595. buck1_reg: BUCK1 {
  596. regulator-name = "VDD_MIF_0.9V_AP";
  597. regulator-min-microvolt = <600000>;
  598. regulator-max-microvolt = <1500000>;
  599. regulator-always-on;
  600. regulator-state-mem {
  601. regulator-off-in-suspend;
  602. };
  603. };
  604. buck2_reg: BUCK2 {
  605. regulator-name = "VDD_EGL_1.0V_AP";
  606. regulator-min-microvolt = <900000>;
  607. regulator-max-microvolt = <1300000>;
  608. regulator-always-on;
  609. regulator-state-mem {
  610. regulator-off-in-suspend;
  611. };
  612. };
  613. buck3_reg: BUCK3 {
  614. regulator-name = "VDD_KFC_1.0V_AP";
  615. regulator-min-microvolt = <800000>;
  616. regulator-max-microvolt = <1200000>;
  617. regulator-always-on;
  618. regulator-state-mem {
  619. regulator-off-in-suspend;
  620. };
  621. };
  622. buck4_reg: BUCK4 {
  623. regulator-name = "VDD_INT_0.95V_AP";
  624. regulator-min-microvolt = <600000>;
  625. regulator-max-microvolt = <1500000>;
  626. regulator-always-on;
  627. regulator-state-mem {
  628. regulator-off-in-suspend;
  629. };
  630. };
  631. buck5_reg: BUCK5 {
  632. regulator-name = "VDD_DISP_CAM0_0.9V_AP";
  633. regulator-min-microvolt = <600000>;
  634. regulator-max-microvolt = <1500000>;
  635. regulator-always-on;
  636. regulator-state-mem {
  637. regulator-off-in-suspend;
  638. };
  639. };
  640. buck6_reg: BUCK6 {
  641. regulator-name = "VDD_G3D_0.9V_AP";
  642. regulator-min-microvolt = <600000>;
  643. regulator-max-microvolt = <1500000>;
  644. regulator-always-on;
  645. regulator-state-mem {
  646. regulator-off-in-suspend;
  647. };
  648. };
  649. buck7_reg: BUCK7 {
  650. regulator-name = "VDD_MEM1_1.2V_AP";
  651. regulator-min-microvolt = <1200000>;
  652. regulator-max-microvolt = <1200000>;
  653. regulator-always-on;
  654. };
  655. buck8_reg: BUCK8 {
  656. regulator-name = "VDD_LLDO_1.35V_AP";
  657. regulator-min-microvolt = <1350000>;
  658. regulator-max-microvolt = <3300000>;
  659. regulator-always-on;
  660. };
  661. buck9_reg: BUCK9 {
  662. regulator-name = "VDD_MLDO_2.0V_AP";
  663. regulator-min-microvolt = <1350000>;
  664. regulator-max-microvolt = <3300000>;
  665. regulator-always-on;
  666. };
  667. buck10_reg: BUCK10 {
  668. regulator-name = "vdd_mem2";
  669. regulator-min-microvolt = <550000>;
  670. regulator-max-microvolt = <1500000>;
  671. regulator-always-on;
  672. };
  673. };
  674. };
  675. };
  676. &hsi2c_4 {
  677. status = "okay";
  678. s3fwrn5: nfc@27 {
  679. compatible = "samsung,s3fwrn5-i2c";
  680. reg = <0x27>;
  681. interrupt-parent = <&gpa1>;
  682. interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
  683. s3fwrn5,en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>;
  684. s3fwrn5,fw-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>;
  685. };
  686. };
  687. &hsi2c_5 {
  688. status = "okay";
  689. stmfts: touchscreen@49 {
  690. compatible = "st,stmfts";
  691. reg = <0x49>;
  692. interrupt-parent = <&gpa1>;
  693. interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
  694. avdd-supply = <&ldo30_reg>;
  695. vdd-supply = <&ldo31_reg>;
  696. };
  697. };
  698. &hsi2c_7 {
  699. status = "okay";
  700. clock-frequency = <1000000>;
  701. sii8620@39 {
  702. reg = <0x39>;
  703. compatible = "sil,sii8620";
  704. cvcc10-supply = <&ldo36_reg>;
  705. iovcc18-supply = <&ldo34_reg>;
  706. interrupt-parent = <&gpf0>;
  707. interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
  708. reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
  709. clocks = <&pmu_system_controller 0>;
  710. clock-names = "xtal";
  711. ports {
  712. #address-cells = <1>;
  713. #size-cells = <0>;
  714. port@0 {
  715. reg = <0>;
  716. mhl_to_hdmi: endpoint {
  717. remote-endpoint = <&hdmi_to_mhl>;
  718. };
  719. };
  720. port@1 {
  721. reg = <1>;
  722. mhl_to_musb_con: endpoint {
  723. remote-endpoint = <&musb_con_to_mhl>;
  724. };
  725. };
  726. };
  727. };
  728. };
  729. &hsi2c_8 {
  730. status = "okay";
  731. max77843@66 {
  732. compatible = "maxim,max77843";
  733. interrupt-parent = <&gpa1>;
  734. interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
  735. reg = <0x66>;
  736. muic: max77843-muic {
  737. compatible = "maxim,max77843-muic";
  738. musb_con: musb_connector {
  739. compatible = "samsung,usb-connector-11pin",
  740. "usb-b-connector";
  741. label = "micro-USB";
  742. type = "micro";
  743. ports {
  744. #address-cells = <1>;
  745. #size-cells = <0>;
  746. port@3 {
  747. reg = <3>;
  748. musb_con_to_mhl: endpoint {
  749. remote-endpoint = <&mhl_to_musb_con>;
  750. };
  751. };
  752. };
  753. };
  754. ports {
  755. port {
  756. muic_to_usb: endpoint {
  757. remote-endpoint = <&usb_to_muic>;
  758. };
  759. };
  760. };
  761. };
  762. regulators {
  763. compatible = "maxim,max77843-regulator";
  764. safeout1_reg: SAFEOUT1 {
  765. regulator-name = "SAFEOUT1";
  766. regulator-min-microvolt = <3300000>;
  767. regulator-max-microvolt = <4950000>;
  768. };
  769. safeout2_reg: SAFEOUT2 {
  770. regulator-name = "SAFEOUT2";
  771. regulator-min-microvolt = <3300000>;
  772. regulator-max-microvolt = <4950000>;
  773. };
  774. charger_reg: CHARGER {
  775. regulator-name = "CHARGER";
  776. regulator-min-microamp = <100000>;
  777. regulator-max-microamp = <3150000>;
  778. };
  779. };
  780. haptic: max77843-haptic {
  781. compatible = "maxim,max77843-haptic";
  782. haptic-supply = <&ldo38_reg>;
  783. pwms = <&pwm 0 33670 0>;
  784. pwm-names = "haptic";
  785. };
  786. };
  787. };
  788. &hsi2c_11 {
  789. status = "okay";
  790. };
  791. &i2s0 {
  792. status = "okay";
  793. };
  794. &i2s1 {
  795. assigned-clocks = <&i2s1 CLK_I2S_RCLK_SRC>;
  796. assigned-clock-parents = <&cmu_peric CLK_SCLK_I2S1>;
  797. status = "okay";
  798. };
  799. &mshc_0 {
  800. status = "okay";
  801. mmc-hs200-1_8v;
  802. mmc-hs400-1_8v;
  803. cap-mmc-highspeed;
  804. non-removable;
  805. card-detect-delay = <200>;
  806. samsung,dw-mshc-ciu-div = <3>;
  807. samsung,dw-mshc-sdr-timing = <0 4>;
  808. samsung,dw-mshc-ddr-timing = <0 2>;
  809. samsung,dw-mshc-hs400-timing = <0 3>;
  810. samsung,read-strobe-delay = <90>;
  811. fifo-depth = <0x80>;
  812. pinctrl-names = "default";
  813. pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
  814. &sd0_bus8 &sd0_rdqs>;
  815. bus-width = <8>;
  816. assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
  817. assigned-clock-rates = <800000000>;
  818. };
  819. &mshc_2 {
  820. status = "okay";
  821. cap-sd-highspeed;
  822. disable-wp;
  823. cd-gpios = <&gpa2 4 GPIO_ACTIVE_LOW>;
  824. card-detect-delay = <200>;
  825. samsung,dw-mshc-ciu-div = <3>;
  826. samsung,dw-mshc-sdr-timing = <0 4>;
  827. samsung,dw-mshc-ddr-timing = <0 2>;
  828. fifo-depth = <0x80>;
  829. pinctrl-names = "default";
  830. pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
  831. bus-width = <4>;
  832. };
  833. &ppmu_d0_general {
  834. status = "okay";
  835. events {
  836. ppmu_event0_d0_general: ppmu-event0-d0-general {
  837. event-name = "ppmu-event0-d0-general";
  838. };
  839. };
  840. };
  841. &ppmu_d1_general {
  842. status = "okay";
  843. events {
  844. ppmu_event0_d1_general: ppmu-event0-d1-general {
  845. event-name = "ppmu-event0-d1-general";
  846. };
  847. };
  848. };
  849. &pinctrl_alive {
  850. pinctrl-names = "default";
  851. pinctrl-0 = <&initial_alive>;
  852. initial_alive: initial-state {
  853. PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
  854. PIN(INPUT, gpa0-1, NONE, FAST_SR1);
  855. PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
  856. PIN(INPUT, gpa0-3, NONE, FAST_SR1);
  857. PIN(INPUT, gpa0-4, NONE, FAST_SR1);
  858. PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
  859. PIN(INPUT, gpa0-6, NONE, FAST_SR1);
  860. PIN(INPUT, gpa0-7, NONE, FAST_SR1);
  861. PIN(INPUT, gpa1-0, UP, FAST_SR1);
  862. PIN(INPUT, gpa1-1, UP, FAST_SR1);
  863. PIN(INPUT, gpa1-2, NONE, FAST_SR1);
  864. PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
  865. PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
  866. PIN(INPUT, gpa1-5, NONE, FAST_SR1);
  867. PIN(INPUT, gpa1-6, NONE, FAST_SR1);
  868. PIN(INPUT, gpa1-7, NONE, FAST_SR1);
  869. PIN(INPUT, gpa2-0, NONE, FAST_SR1);
  870. PIN(INPUT, gpa2-1, NONE, FAST_SR1);
  871. PIN(INPUT, gpa2-2, NONE, FAST_SR1);
  872. PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
  873. PIN(INPUT, gpa2-4, NONE, FAST_SR1);
  874. PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
  875. PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
  876. PIN(INPUT, gpa2-7, NONE, FAST_SR1);
  877. PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
  878. PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
  879. PIN(INPUT, gpa3-2, NONE, FAST_SR1);
  880. PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
  881. PIN(INPUT, gpa3-4, NONE, FAST_SR1);
  882. PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
  883. PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
  884. PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
  885. PIN(INPUT, gpf1-0, NONE, FAST_SR1);
  886. PIN(INPUT, gpf1-1, NONE, FAST_SR1);
  887. PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
  888. PIN(INPUT, gpf1-4, UP, FAST_SR1);
  889. PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
  890. PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
  891. PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
  892. PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
  893. PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
  894. PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
  895. PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
  896. PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
  897. PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
  898. PIN(INPUT, gpf3-2, NONE, FAST_SR1);
  899. PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
  900. PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
  901. PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
  902. PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
  903. PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
  904. PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
  905. PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
  906. PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
  907. PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
  908. PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
  909. PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
  910. PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
  911. PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
  912. PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
  913. PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
  914. PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
  915. PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
  916. };
  917. te_irq: te_irq {
  918. samsung,pins = "gpf1-3";
  919. samsung,pin-function = <0xf>;
  920. };
  921. };
  922. &pinctrl_cpif {
  923. pinctrl-names = "default";
  924. pinctrl-0 = <&initial_cpif>;
  925. initial_cpif: initial-state {
  926. PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
  927. PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
  928. };
  929. };
  930. &pinctrl_ese {
  931. pinctrl-names = "default";
  932. pinctrl-0 = <&initial_ese>;
  933. initial_ese: initial-state {
  934. PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
  935. PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
  936. PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
  937. };
  938. };
  939. &pinctrl_fsys {
  940. pinctrl-names = "default";
  941. pinctrl-0 = <&initial_fsys>;
  942. initial_fsys: initial-state {
  943. PIN(INPUT, gpr3-0, NONE, FAST_SR1);
  944. PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
  945. PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
  946. PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
  947. PIN(INPUT, gpr3-7, NONE, FAST_SR1);
  948. };
  949. };
  950. &pinctrl_imem {
  951. pinctrl-names = "default";
  952. pinctrl-0 = <&initial_imem>;
  953. initial_imem: initial-state {
  954. PIN(INPUT, gpf0-0, UP, FAST_SR1);
  955. PIN(INPUT, gpf0-1, UP, FAST_SR1);
  956. PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
  957. PIN(INPUT, gpf0-3, UP, FAST_SR1);
  958. PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
  959. PIN(INPUT, gpf0-5, NONE, FAST_SR1);
  960. PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
  961. PIN(INPUT, gpf0-7, UP, FAST_SR1);
  962. };
  963. };
  964. &pinctrl_nfc {
  965. pinctrl-names = "default";
  966. pinctrl-0 = <&initial_nfc>;
  967. initial_nfc: initial-state {
  968. PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
  969. };
  970. };
  971. &pinctrl_peric {
  972. pinctrl-names = "default";
  973. pinctrl-0 = <&initial_peric>;
  974. initial_peric: initial-state {
  975. PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
  976. PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
  977. PIN(INPUT, gpv7-2, NONE, FAST_SR1);
  978. PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
  979. PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
  980. PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
  981. PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
  982. PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
  983. PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
  984. PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
  985. PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
  986. PIN(INPUT, gpc3-4, NONE, FAST_SR1);
  987. PIN(INPUT, gpc3-5, NONE, FAST_SR1);
  988. PIN(INPUT, gpc3-6, NONE, FAST_SR1);
  989. PIN(INPUT, gpc3-7, NONE, FAST_SR1);
  990. PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
  991. PIN(2, gpg0-1, DOWN, FAST_SR1);
  992. PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
  993. PIN(INPUT, gpd4-0, NONE, FAST_SR1);
  994. PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
  995. PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
  996. PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
  997. PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
  998. PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
  999. PIN(INPUT, gpd8-1, UP, FAST_SR1);
  1000. PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
  1001. PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
  1002. PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
  1003. PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
  1004. PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
  1005. PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
  1006. PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
  1007. PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
  1008. PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
  1009. PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
  1010. };
  1011. };
  1012. &pinctrl_touch {
  1013. pinctrl-names = "default";
  1014. pinctrl-0 = <&initial_touch>;
  1015. initial_touch: initial-state {
  1016. PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
  1017. };
  1018. };
  1019. &pwm {
  1020. pinctrl-0 = <&pwm0_out>;
  1021. pinctrl-names = "default";
  1022. status = "okay";
  1023. };
  1024. &mic {
  1025. status = "okay";
  1026. };
  1027. &pmu_system_controller {
  1028. assigned-clocks = <&pmu_system_controller 0>;
  1029. assigned-clock-parents = <&xxti>;
  1030. };
  1031. &serial_1 {
  1032. status = "okay";
  1033. };
  1034. &spi_1 {
  1035. cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
  1036. status = "okay";
  1037. wm5110: wm5110-codec@0 {
  1038. compatible = "wlf,wm5110";
  1039. reg = <0x0>;
  1040. spi-max-frequency = <20000000>;
  1041. interrupt-parent = <&gpa0>;
  1042. interrupts = <4 IRQ_TYPE_NONE>;
  1043. clocks = <&pmu_system_controller 0>,
  1044. <&s2mps13_osc S2MPS11_CLK_BT>;
  1045. clock-names = "mclk1", "mclk2";
  1046. gpio-controller;
  1047. #gpio-cells = <2>;
  1048. wlf,micd-detect-debounce = <300>;
  1049. wlf,micd-bias-start-time = <0x1>;
  1050. wlf,micd-rate = <0x7>;
  1051. wlf,micd-dbtime = <0x1>;
  1052. wlf,micd-force-micbias;
  1053. wlf,micd-configs = <0x0 1 0>;
  1054. wlf,hpdet-channel = <1>;
  1055. wlf,gpsw = <0x1>;
  1056. wlf,inmode = <2 0 2 0>;
  1057. wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
  1058. wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
  1059. /* core supplies */
  1060. AVDD-supply = <&ldo18_reg>;
  1061. DBVDD1-supply = <&ldo18_reg>;
  1062. CPVDD-supply = <&ldo18_reg>;
  1063. DBVDD2-supply = <&ldo18_reg>;
  1064. DBVDD3-supply = <&ldo18_reg>;
  1065. controller-data {
  1066. samsung,spi-feedback-delay = <0>;
  1067. };
  1068. };
  1069. };
  1070. &spi_3 {
  1071. status = "okay";
  1072. no-cs-readback;
  1073. irled@0 {
  1074. compatible = "ir-spi-led";
  1075. reg = <0x0>;
  1076. spi-max-frequency = <5000000>;
  1077. power-supply = <&irda_regulator>;
  1078. duty-cycle = <60>;
  1079. led-active-low;
  1080. controller-data {
  1081. samsung,spi-feedback-delay = <0>;
  1082. };
  1083. };
  1084. };
  1085. &timer {
  1086. clock-frequency = <24000000>;
  1087. };
  1088. &tmu_atlas0 {
  1089. vtmu-supply = <&ldo3_reg>;
  1090. status = "okay";
  1091. };
  1092. &tmu_apollo {
  1093. vtmu-supply = <&ldo3_reg>;
  1094. status = "okay";
  1095. };
  1096. &tmu_g3d {
  1097. vtmu-supply = <&ldo3_reg>;
  1098. status = "okay";
  1099. };
  1100. &usbdrd30 {
  1101. vdd33-supply = <&ldo10_reg>;
  1102. vdd10-supply = <&ldo6_reg>;
  1103. status = "okay";
  1104. };
  1105. &usbdrd_dwc3 {
  1106. dr_mode = "otg";
  1107. };
  1108. &usbdrd30_phy {
  1109. vbus-supply = <&safeout1_reg>;
  1110. status = "okay";
  1111. port {
  1112. usb_to_muic: endpoint {
  1113. remote-endpoint = <&muic_to_usb>;
  1114. };
  1115. };
  1116. };
  1117. &xxti {
  1118. clock-frequency = <24000000>;
  1119. };