st_accel_core.c 21 KB

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  1. /*
  2. * STMicroelectronics accelerometers driver
  3. *
  4. * Copyright 2012-2013 STMicroelectronics Inc.
  5. *
  6. * Denis Ciocca <denis.ciocca@st.com>
  7. *
  8. * Licensed under the GPL-2.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/slab.h>
  13. #include <linux/errno.h>
  14. #include <linux/types.h>
  15. #include <linux/mutex.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/i2c.h>
  18. #include <linux/gpio.h>
  19. #include <linux/irq.h>
  20. #include <linux/iio/iio.h>
  21. #include <linux/iio/sysfs.h>
  22. #include <linux/iio/trigger.h>
  23. #include <linux/iio/buffer.h>
  24. #include <linux/iio/common/st_sensors.h>
  25. #include "st_accel.h"
  26. #define ST_ACCEL_NUMBER_DATA_CHANNELS 3
  27. /* DEFAULT VALUE FOR SENSORS */
  28. #define ST_ACCEL_DEFAULT_OUT_X_L_ADDR 0x28
  29. #define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a
  30. #define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c
  31. /* FULLSCALE */
  32. #define ST_ACCEL_FS_AVL_2G 2
  33. #define ST_ACCEL_FS_AVL_4G 4
  34. #define ST_ACCEL_FS_AVL_6G 6
  35. #define ST_ACCEL_FS_AVL_8G 8
  36. #define ST_ACCEL_FS_AVL_16G 16
  37. /* CUSTOM VALUES FOR SENSOR 1 */
  38. #define ST_ACCEL_1_WAI_EXP 0x33
  39. #define ST_ACCEL_1_ODR_ADDR 0x20
  40. #define ST_ACCEL_1_ODR_MASK 0xf0
  41. #define ST_ACCEL_1_ODR_AVL_1HZ_VAL 0x01
  42. #define ST_ACCEL_1_ODR_AVL_10HZ_VAL 0x02
  43. #define ST_ACCEL_1_ODR_AVL_25HZ_VAL 0x03
  44. #define ST_ACCEL_1_ODR_AVL_50HZ_VAL 0x04
  45. #define ST_ACCEL_1_ODR_AVL_100HZ_VAL 0x05
  46. #define ST_ACCEL_1_ODR_AVL_200HZ_VAL 0x06
  47. #define ST_ACCEL_1_ODR_AVL_400HZ_VAL 0x07
  48. #define ST_ACCEL_1_ODR_AVL_1600HZ_VAL 0x08
  49. #define ST_ACCEL_1_FS_ADDR 0x23
  50. #define ST_ACCEL_1_FS_MASK 0x30
  51. #define ST_ACCEL_1_FS_AVL_2_VAL 0x00
  52. #define ST_ACCEL_1_FS_AVL_4_VAL 0x01
  53. #define ST_ACCEL_1_FS_AVL_8_VAL 0x02
  54. #define ST_ACCEL_1_FS_AVL_16_VAL 0x03
  55. #define ST_ACCEL_1_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000)
  56. #define ST_ACCEL_1_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000)
  57. #define ST_ACCEL_1_FS_AVL_8_GAIN IIO_G_TO_M_S_2(4000)
  58. #define ST_ACCEL_1_FS_AVL_16_GAIN IIO_G_TO_M_S_2(12000)
  59. #define ST_ACCEL_1_BDU_ADDR 0x23
  60. #define ST_ACCEL_1_BDU_MASK 0x80
  61. #define ST_ACCEL_1_DRDY_IRQ_ADDR 0x22
  62. #define ST_ACCEL_1_DRDY_IRQ_INT1_MASK 0x10
  63. #define ST_ACCEL_1_DRDY_IRQ_INT2_MASK 0x08
  64. #define ST_ACCEL_1_IHL_IRQ_ADDR 0x25
  65. #define ST_ACCEL_1_IHL_IRQ_MASK 0x02
  66. #define ST_ACCEL_1_MULTIREAD_BIT true
  67. /* CUSTOM VALUES FOR SENSOR 2 */
  68. #define ST_ACCEL_2_WAI_EXP 0x32
  69. #define ST_ACCEL_2_ODR_ADDR 0x20
  70. #define ST_ACCEL_2_ODR_MASK 0x18
  71. #define ST_ACCEL_2_ODR_AVL_50HZ_VAL 0x00
  72. #define ST_ACCEL_2_ODR_AVL_100HZ_VAL 0x01
  73. #define ST_ACCEL_2_ODR_AVL_400HZ_VAL 0x02
  74. #define ST_ACCEL_2_ODR_AVL_1000HZ_VAL 0x03
  75. #define ST_ACCEL_2_PW_ADDR 0x20
  76. #define ST_ACCEL_2_PW_MASK 0xe0
  77. #define ST_ACCEL_2_FS_ADDR 0x23
  78. #define ST_ACCEL_2_FS_MASK 0x30
  79. #define ST_ACCEL_2_FS_AVL_2_VAL 0X00
  80. #define ST_ACCEL_2_FS_AVL_4_VAL 0X01
  81. #define ST_ACCEL_2_FS_AVL_8_VAL 0x03
  82. #define ST_ACCEL_2_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000)
  83. #define ST_ACCEL_2_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000)
  84. #define ST_ACCEL_2_FS_AVL_8_GAIN IIO_G_TO_M_S_2(3900)
  85. #define ST_ACCEL_2_BDU_ADDR 0x23
  86. #define ST_ACCEL_2_BDU_MASK 0x80
  87. #define ST_ACCEL_2_DRDY_IRQ_ADDR 0x22
  88. #define ST_ACCEL_2_DRDY_IRQ_INT1_MASK 0x02
  89. #define ST_ACCEL_2_DRDY_IRQ_INT2_MASK 0x10
  90. #define ST_ACCEL_2_IHL_IRQ_ADDR 0x22
  91. #define ST_ACCEL_2_IHL_IRQ_MASK 0x80
  92. #define ST_ACCEL_2_MULTIREAD_BIT true
  93. /* CUSTOM VALUES FOR SENSOR 3 */
  94. #define ST_ACCEL_3_WAI_EXP 0x40
  95. #define ST_ACCEL_3_ODR_ADDR 0x20
  96. #define ST_ACCEL_3_ODR_MASK 0xf0
  97. #define ST_ACCEL_3_ODR_AVL_3HZ_VAL 0x01
  98. #define ST_ACCEL_3_ODR_AVL_6HZ_VAL 0x02
  99. #define ST_ACCEL_3_ODR_AVL_12HZ_VAL 0x03
  100. #define ST_ACCEL_3_ODR_AVL_25HZ_VAL 0x04
  101. #define ST_ACCEL_3_ODR_AVL_50HZ_VAL 0x05
  102. #define ST_ACCEL_3_ODR_AVL_100HZ_VAL 0x06
  103. #define ST_ACCEL_3_ODR_AVL_200HZ_VAL 0x07
  104. #define ST_ACCEL_3_ODR_AVL_400HZ_VAL 0x08
  105. #define ST_ACCEL_3_ODR_AVL_800HZ_VAL 0x09
  106. #define ST_ACCEL_3_ODR_AVL_1600HZ_VAL 0x0a
  107. #define ST_ACCEL_3_FS_ADDR 0x24
  108. #define ST_ACCEL_3_FS_MASK 0x38
  109. #define ST_ACCEL_3_FS_AVL_2_VAL 0X00
  110. #define ST_ACCEL_3_FS_AVL_4_VAL 0X01
  111. #define ST_ACCEL_3_FS_AVL_6_VAL 0x02
  112. #define ST_ACCEL_3_FS_AVL_8_VAL 0x03
  113. #define ST_ACCEL_3_FS_AVL_16_VAL 0x04
  114. #define ST_ACCEL_3_FS_AVL_2_GAIN IIO_G_TO_M_S_2(61)
  115. #define ST_ACCEL_3_FS_AVL_4_GAIN IIO_G_TO_M_S_2(122)
  116. #define ST_ACCEL_3_FS_AVL_6_GAIN IIO_G_TO_M_S_2(183)
  117. #define ST_ACCEL_3_FS_AVL_8_GAIN IIO_G_TO_M_S_2(244)
  118. #define ST_ACCEL_3_FS_AVL_16_GAIN IIO_G_TO_M_S_2(732)
  119. #define ST_ACCEL_3_BDU_ADDR 0x20
  120. #define ST_ACCEL_3_BDU_MASK 0x08
  121. #define ST_ACCEL_3_DRDY_IRQ_ADDR 0x23
  122. #define ST_ACCEL_3_DRDY_IRQ_INT1_MASK 0x80
  123. #define ST_ACCEL_3_DRDY_IRQ_INT2_MASK 0x00
  124. #define ST_ACCEL_3_IHL_IRQ_ADDR 0x23
  125. #define ST_ACCEL_3_IHL_IRQ_MASK 0x40
  126. #define ST_ACCEL_3_IG1_EN_ADDR 0x23
  127. #define ST_ACCEL_3_IG1_EN_MASK 0x08
  128. #define ST_ACCEL_3_MULTIREAD_BIT false
  129. /* CUSTOM VALUES FOR SENSOR 4 */
  130. #define ST_ACCEL_4_WAI_EXP 0x3a
  131. #define ST_ACCEL_4_ODR_ADDR 0x20
  132. #define ST_ACCEL_4_ODR_MASK 0x30 /* DF1 and DF0 */
  133. #define ST_ACCEL_4_ODR_AVL_40HZ_VAL 0x00
  134. #define ST_ACCEL_4_ODR_AVL_160HZ_VAL 0x01
  135. #define ST_ACCEL_4_ODR_AVL_640HZ_VAL 0x02
  136. #define ST_ACCEL_4_ODR_AVL_2560HZ_VAL 0x03
  137. #define ST_ACCEL_4_PW_ADDR 0x20
  138. #define ST_ACCEL_4_PW_MASK 0xc0
  139. #define ST_ACCEL_4_FS_ADDR 0x21
  140. #define ST_ACCEL_4_FS_MASK 0x80
  141. #define ST_ACCEL_4_FS_AVL_2_VAL 0X00
  142. #define ST_ACCEL_4_FS_AVL_6_VAL 0X01
  143. #define ST_ACCEL_4_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1024)
  144. #define ST_ACCEL_4_FS_AVL_6_GAIN IIO_G_TO_M_S_2(340)
  145. #define ST_ACCEL_4_BDU_ADDR 0x21
  146. #define ST_ACCEL_4_BDU_MASK 0x40
  147. #define ST_ACCEL_4_DRDY_IRQ_ADDR 0x21
  148. #define ST_ACCEL_4_DRDY_IRQ_INT1_MASK 0x04
  149. #define ST_ACCEL_4_MULTIREAD_BIT true
  150. /* CUSTOM VALUES FOR SENSOR 5 */
  151. #define ST_ACCEL_5_WAI_EXP 0x3b
  152. #define ST_ACCEL_5_ODR_ADDR 0x20
  153. #define ST_ACCEL_5_ODR_MASK 0x80
  154. #define ST_ACCEL_5_ODR_AVL_100HZ_VAL 0x00
  155. #define ST_ACCEL_5_ODR_AVL_400HZ_VAL 0x01
  156. #define ST_ACCEL_5_PW_ADDR 0x20
  157. #define ST_ACCEL_5_PW_MASK 0x40
  158. #define ST_ACCEL_5_FS_ADDR 0x20
  159. #define ST_ACCEL_5_FS_MASK 0x20
  160. #define ST_ACCEL_5_FS_AVL_2_VAL 0X00
  161. #define ST_ACCEL_5_FS_AVL_8_VAL 0X01
  162. /* TODO: check these resulting gain settings, these are not in the datsheet */
  163. #define ST_ACCEL_5_FS_AVL_2_GAIN IIO_G_TO_M_S_2(18000)
  164. #define ST_ACCEL_5_FS_AVL_8_GAIN IIO_G_TO_M_S_2(72000)
  165. #define ST_ACCEL_5_DRDY_IRQ_ADDR 0x22
  166. #define ST_ACCEL_5_DRDY_IRQ_INT1_MASK 0x04
  167. #define ST_ACCEL_5_DRDY_IRQ_INT2_MASK 0x20
  168. #define ST_ACCEL_5_IHL_IRQ_ADDR 0x22
  169. #define ST_ACCEL_5_IHL_IRQ_MASK 0x80
  170. #define ST_ACCEL_5_IG1_EN_ADDR 0x21
  171. #define ST_ACCEL_5_IG1_EN_MASK 0x08
  172. #define ST_ACCEL_5_MULTIREAD_BIT false
  173. static const struct iio_chan_spec st_accel_8bit_channels[] = {
  174. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  175. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  176. ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 8, 8,
  177. ST_ACCEL_DEFAULT_OUT_X_L_ADDR+1),
  178. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  179. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  180. ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 8, 8,
  181. ST_ACCEL_DEFAULT_OUT_Y_L_ADDR+1),
  182. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  183. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  184. ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 8, 8,
  185. ST_ACCEL_DEFAULT_OUT_Z_L_ADDR+1),
  186. IIO_CHAN_SOFT_TIMESTAMP(3)
  187. };
  188. static const struct iio_chan_spec st_accel_12bit_channels[] = {
  189. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  190. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  191. ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 12, 16,
  192. ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
  193. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  194. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  195. ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 12, 16,
  196. ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
  197. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  198. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  199. ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 12, 16,
  200. ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
  201. IIO_CHAN_SOFT_TIMESTAMP(3)
  202. };
  203. static const struct iio_chan_spec st_accel_16bit_channels[] = {
  204. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  205. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  206. ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 16, 16,
  207. ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
  208. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  209. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  210. ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 16, 16,
  211. ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
  212. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  213. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  214. ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 16, 16,
  215. ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
  216. IIO_CHAN_SOFT_TIMESTAMP(3)
  217. };
  218. static const struct st_sensor_settings st_accel_sensors_settings[] = {
  219. {
  220. .wai = ST_ACCEL_1_WAI_EXP,
  221. .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
  222. .sensors_supported = {
  223. [0] = LIS3DH_ACCEL_DEV_NAME,
  224. [1] = LSM303DLHC_ACCEL_DEV_NAME,
  225. [2] = LSM330D_ACCEL_DEV_NAME,
  226. [3] = LSM330DL_ACCEL_DEV_NAME,
  227. [4] = LSM330DLC_ACCEL_DEV_NAME,
  228. [5] = LSM303AGR_ACCEL_DEV_NAME,
  229. [6] = LIS2DH12_ACCEL_DEV_NAME,
  230. },
  231. .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
  232. .odr = {
  233. .addr = ST_ACCEL_1_ODR_ADDR,
  234. .mask = ST_ACCEL_1_ODR_MASK,
  235. .odr_avl = {
  236. { 1, ST_ACCEL_1_ODR_AVL_1HZ_VAL, },
  237. { 10, ST_ACCEL_1_ODR_AVL_10HZ_VAL, },
  238. { 25, ST_ACCEL_1_ODR_AVL_25HZ_VAL, },
  239. { 50, ST_ACCEL_1_ODR_AVL_50HZ_VAL, },
  240. { 100, ST_ACCEL_1_ODR_AVL_100HZ_VAL, },
  241. { 200, ST_ACCEL_1_ODR_AVL_200HZ_VAL, },
  242. { 400, ST_ACCEL_1_ODR_AVL_400HZ_VAL, },
  243. { 1600, ST_ACCEL_1_ODR_AVL_1600HZ_VAL, },
  244. },
  245. },
  246. .pw = {
  247. .addr = ST_ACCEL_1_ODR_ADDR,
  248. .mask = ST_ACCEL_1_ODR_MASK,
  249. .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
  250. },
  251. .enable_axis = {
  252. .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
  253. .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
  254. },
  255. .fs = {
  256. .addr = ST_ACCEL_1_FS_ADDR,
  257. .mask = ST_ACCEL_1_FS_MASK,
  258. .fs_avl = {
  259. [0] = {
  260. .num = ST_ACCEL_FS_AVL_2G,
  261. .value = ST_ACCEL_1_FS_AVL_2_VAL,
  262. .gain = ST_ACCEL_1_FS_AVL_2_GAIN,
  263. },
  264. [1] = {
  265. .num = ST_ACCEL_FS_AVL_4G,
  266. .value = ST_ACCEL_1_FS_AVL_4_VAL,
  267. .gain = ST_ACCEL_1_FS_AVL_4_GAIN,
  268. },
  269. [2] = {
  270. .num = ST_ACCEL_FS_AVL_8G,
  271. .value = ST_ACCEL_1_FS_AVL_8_VAL,
  272. .gain = ST_ACCEL_1_FS_AVL_8_GAIN,
  273. },
  274. [3] = {
  275. .num = ST_ACCEL_FS_AVL_16G,
  276. .value = ST_ACCEL_1_FS_AVL_16_VAL,
  277. .gain = ST_ACCEL_1_FS_AVL_16_GAIN,
  278. },
  279. },
  280. },
  281. .bdu = {
  282. .addr = ST_ACCEL_1_BDU_ADDR,
  283. .mask = ST_ACCEL_1_BDU_MASK,
  284. },
  285. .drdy_irq = {
  286. .addr = ST_ACCEL_1_DRDY_IRQ_ADDR,
  287. .mask_int1 = ST_ACCEL_1_DRDY_IRQ_INT1_MASK,
  288. .mask_int2 = ST_ACCEL_1_DRDY_IRQ_INT2_MASK,
  289. .addr_ihl = ST_ACCEL_1_IHL_IRQ_ADDR,
  290. .mask_ihl = ST_ACCEL_1_IHL_IRQ_MASK,
  291. },
  292. .multi_read_bit = ST_ACCEL_1_MULTIREAD_BIT,
  293. .bootime = 2,
  294. },
  295. {
  296. .wai = ST_ACCEL_2_WAI_EXP,
  297. .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
  298. .sensors_supported = {
  299. [0] = LIS331DLH_ACCEL_DEV_NAME,
  300. [1] = LSM303DL_ACCEL_DEV_NAME,
  301. [2] = LSM303DLH_ACCEL_DEV_NAME,
  302. [3] = LSM303DLM_ACCEL_DEV_NAME,
  303. },
  304. .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
  305. .odr = {
  306. .addr = ST_ACCEL_2_ODR_ADDR,
  307. .mask = ST_ACCEL_2_ODR_MASK,
  308. .odr_avl = {
  309. { 50, ST_ACCEL_2_ODR_AVL_50HZ_VAL, },
  310. { 100, ST_ACCEL_2_ODR_AVL_100HZ_VAL, },
  311. { 400, ST_ACCEL_2_ODR_AVL_400HZ_VAL, },
  312. { 1000, ST_ACCEL_2_ODR_AVL_1000HZ_VAL, },
  313. },
  314. },
  315. .pw = {
  316. .addr = ST_ACCEL_2_PW_ADDR,
  317. .mask = ST_ACCEL_2_PW_MASK,
  318. .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
  319. .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
  320. },
  321. .enable_axis = {
  322. .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
  323. .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
  324. },
  325. .fs = {
  326. .addr = ST_ACCEL_2_FS_ADDR,
  327. .mask = ST_ACCEL_2_FS_MASK,
  328. .fs_avl = {
  329. [0] = {
  330. .num = ST_ACCEL_FS_AVL_2G,
  331. .value = ST_ACCEL_2_FS_AVL_2_VAL,
  332. .gain = ST_ACCEL_2_FS_AVL_2_GAIN,
  333. },
  334. [1] = {
  335. .num = ST_ACCEL_FS_AVL_4G,
  336. .value = ST_ACCEL_2_FS_AVL_4_VAL,
  337. .gain = ST_ACCEL_2_FS_AVL_4_GAIN,
  338. },
  339. [2] = {
  340. .num = ST_ACCEL_FS_AVL_8G,
  341. .value = ST_ACCEL_2_FS_AVL_8_VAL,
  342. .gain = ST_ACCEL_2_FS_AVL_8_GAIN,
  343. },
  344. },
  345. },
  346. .bdu = {
  347. .addr = ST_ACCEL_2_BDU_ADDR,
  348. .mask = ST_ACCEL_2_BDU_MASK,
  349. },
  350. .drdy_irq = {
  351. .addr = ST_ACCEL_2_DRDY_IRQ_ADDR,
  352. .mask_int1 = ST_ACCEL_2_DRDY_IRQ_INT1_MASK,
  353. .mask_int2 = ST_ACCEL_2_DRDY_IRQ_INT2_MASK,
  354. .addr_ihl = ST_ACCEL_2_IHL_IRQ_ADDR,
  355. .mask_ihl = ST_ACCEL_2_IHL_IRQ_MASK,
  356. },
  357. .multi_read_bit = ST_ACCEL_2_MULTIREAD_BIT,
  358. .bootime = 2,
  359. },
  360. {
  361. .wai = ST_ACCEL_3_WAI_EXP,
  362. .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
  363. .sensors_supported = {
  364. [0] = LSM330_ACCEL_DEV_NAME,
  365. },
  366. .ch = (struct iio_chan_spec *)st_accel_16bit_channels,
  367. .odr = {
  368. .addr = ST_ACCEL_3_ODR_ADDR,
  369. .mask = ST_ACCEL_3_ODR_MASK,
  370. .odr_avl = {
  371. { 3, ST_ACCEL_3_ODR_AVL_3HZ_VAL },
  372. { 6, ST_ACCEL_3_ODR_AVL_6HZ_VAL, },
  373. { 12, ST_ACCEL_3_ODR_AVL_12HZ_VAL, },
  374. { 25, ST_ACCEL_3_ODR_AVL_25HZ_VAL, },
  375. { 50, ST_ACCEL_3_ODR_AVL_50HZ_VAL, },
  376. { 100, ST_ACCEL_3_ODR_AVL_100HZ_VAL, },
  377. { 200, ST_ACCEL_3_ODR_AVL_200HZ_VAL, },
  378. { 400, ST_ACCEL_3_ODR_AVL_400HZ_VAL, },
  379. { 800, ST_ACCEL_3_ODR_AVL_800HZ_VAL, },
  380. { 1600, ST_ACCEL_3_ODR_AVL_1600HZ_VAL, },
  381. },
  382. },
  383. .pw = {
  384. .addr = ST_ACCEL_3_ODR_ADDR,
  385. .mask = ST_ACCEL_3_ODR_MASK,
  386. .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
  387. },
  388. .enable_axis = {
  389. .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
  390. .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
  391. },
  392. .fs = {
  393. .addr = ST_ACCEL_3_FS_ADDR,
  394. .mask = ST_ACCEL_3_FS_MASK,
  395. .fs_avl = {
  396. [0] = {
  397. .num = ST_ACCEL_FS_AVL_2G,
  398. .value = ST_ACCEL_3_FS_AVL_2_VAL,
  399. .gain = ST_ACCEL_3_FS_AVL_2_GAIN,
  400. },
  401. [1] = {
  402. .num = ST_ACCEL_FS_AVL_4G,
  403. .value = ST_ACCEL_3_FS_AVL_4_VAL,
  404. .gain = ST_ACCEL_3_FS_AVL_4_GAIN,
  405. },
  406. [2] = {
  407. .num = ST_ACCEL_FS_AVL_6G,
  408. .value = ST_ACCEL_3_FS_AVL_6_VAL,
  409. .gain = ST_ACCEL_3_FS_AVL_6_GAIN,
  410. },
  411. [3] = {
  412. .num = ST_ACCEL_FS_AVL_8G,
  413. .value = ST_ACCEL_3_FS_AVL_8_VAL,
  414. .gain = ST_ACCEL_3_FS_AVL_8_GAIN,
  415. },
  416. [4] = {
  417. .num = ST_ACCEL_FS_AVL_16G,
  418. .value = ST_ACCEL_3_FS_AVL_16_VAL,
  419. .gain = ST_ACCEL_3_FS_AVL_16_GAIN,
  420. },
  421. },
  422. },
  423. .bdu = {
  424. .addr = ST_ACCEL_3_BDU_ADDR,
  425. .mask = ST_ACCEL_3_BDU_MASK,
  426. },
  427. .drdy_irq = {
  428. .addr = ST_ACCEL_3_DRDY_IRQ_ADDR,
  429. .mask_int1 = ST_ACCEL_3_DRDY_IRQ_INT1_MASK,
  430. .mask_int2 = ST_ACCEL_3_DRDY_IRQ_INT2_MASK,
  431. .addr_ihl = ST_ACCEL_3_IHL_IRQ_ADDR,
  432. .mask_ihl = ST_ACCEL_3_IHL_IRQ_MASK,
  433. .ig1 = {
  434. .en_addr = ST_ACCEL_3_IG1_EN_ADDR,
  435. .en_mask = ST_ACCEL_3_IG1_EN_MASK,
  436. },
  437. },
  438. .multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT,
  439. .bootime = 2,
  440. },
  441. {
  442. .wai = ST_ACCEL_4_WAI_EXP,
  443. .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
  444. .sensors_supported = {
  445. [0] = LIS3LV02DL_ACCEL_DEV_NAME,
  446. },
  447. .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
  448. .odr = {
  449. .addr = ST_ACCEL_4_ODR_ADDR,
  450. .mask = ST_ACCEL_4_ODR_MASK,
  451. .odr_avl = {
  452. { 40, ST_ACCEL_4_ODR_AVL_40HZ_VAL },
  453. { 160, ST_ACCEL_4_ODR_AVL_160HZ_VAL, },
  454. { 640, ST_ACCEL_4_ODR_AVL_640HZ_VAL, },
  455. { 2560, ST_ACCEL_4_ODR_AVL_2560HZ_VAL, },
  456. },
  457. },
  458. .pw = {
  459. .addr = ST_ACCEL_4_PW_ADDR,
  460. .mask = ST_ACCEL_4_PW_MASK,
  461. .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
  462. .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
  463. },
  464. .enable_axis = {
  465. .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
  466. .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
  467. },
  468. .fs = {
  469. .addr = ST_ACCEL_4_FS_ADDR,
  470. .mask = ST_ACCEL_4_FS_MASK,
  471. .fs_avl = {
  472. [0] = {
  473. .num = ST_ACCEL_FS_AVL_2G,
  474. .value = ST_ACCEL_4_FS_AVL_2_VAL,
  475. .gain = ST_ACCEL_4_FS_AVL_2_GAIN,
  476. },
  477. [1] = {
  478. .num = ST_ACCEL_FS_AVL_6G,
  479. .value = ST_ACCEL_4_FS_AVL_6_VAL,
  480. .gain = ST_ACCEL_4_FS_AVL_6_GAIN,
  481. },
  482. },
  483. },
  484. .bdu = {
  485. .addr = ST_ACCEL_4_BDU_ADDR,
  486. .mask = ST_ACCEL_4_BDU_MASK,
  487. },
  488. .drdy_irq = {
  489. .addr = ST_ACCEL_4_DRDY_IRQ_ADDR,
  490. .mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK,
  491. },
  492. .multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT,
  493. .bootime = 2, /* guess */
  494. },
  495. {
  496. .wai = ST_ACCEL_5_WAI_EXP,
  497. .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
  498. .sensors_supported = {
  499. [0] = LIS331DL_ACCEL_DEV_NAME,
  500. },
  501. .ch = (struct iio_chan_spec *)st_accel_8bit_channels,
  502. .odr = {
  503. .addr = ST_ACCEL_5_ODR_ADDR,
  504. .mask = ST_ACCEL_5_ODR_MASK,
  505. .odr_avl = {
  506. { 100, ST_ACCEL_5_ODR_AVL_100HZ_VAL },
  507. { 400, ST_ACCEL_5_ODR_AVL_400HZ_VAL, },
  508. },
  509. },
  510. .pw = {
  511. .addr = ST_ACCEL_5_PW_ADDR,
  512. .mask = ST_ACCEL_5_PW_MASK,
  513. .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
  514. .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
  515. },
  516. .enable_axis = {
  517. .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
  518. .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
  519. },
  520. .fs = {
  521. .addr = ST_ACCEL_5_FS_ADDR,
  522. .mask = ST_ACCEL_5_FS_MASK,
  523. .fs_avl = {
  524. [0] = {
  525. .num = ST_ACCEL_FS_AVL_2G,
  526. .value = ST_ACCEL_5_FS_AVL_2_VAL,
  527. .gain = ST_ACCEL_5_FS_AVL_2_GAIN,
  528. },
  529. [1] = {
  530. .num = ST_ACCEL_FS_AVL_8G,
  531. .value = ST_ACCEL_5_FS_AVL_8_VAL,
  532. .gain = ST_ACCEL_5_FS_AVL_8_GAIN,
  533. },
  534. },
  535. },
  536. .drdy_irq = {
  537. .addr = ST_ACCEL_5_DRDY_IRQ_ADDR,
  538. .mask_int1 = ST_ACCEL_5_DRDY_IRQ_INT1_MASK,
  539. .mask_int2 = ST_ACCEL_5_DRDY_IRQ_INT2_MASK,
  540. .addr_ihl = ST_ACCEL_5_IHL_IRQ_ADDR,
  541. .mask_ihl = ST_ACCEL_5_IHL_IRQ_MASK,
  542. },
  543. .multi_read_bit = ST_ACCEL_5_MULTIREAD_BIT,
  544. .bootime = 2, /* guess */
  545. },
  546. };
  547. static int st_accel_read_raw(struct iio_dev *indio_dev,
  548. struct iio_chan_spec const *ch, int *val,
  549. int *val2, long mask)
  550. {
  551. int err;
  552. struct st_sensor_data *adata = iio_priv(indio_dev);
  553. switch (mask) {
  554. case IIO_CHAN_INFO_RAW:
  555. err = st_sensors_read_info_raw(indio_dev, ch, val);
  556. if (err < 0)
  557. goto read_error;
  558. return IIO_VAL_INT;
  559. case IIO_CHAN_INFO_SCALE:
  560. *val = 0;
  561. *val2 = adata->current_fullscale->gain;
  562. return IIO_VAL_INT_PLUS_MICRO;
  563. case IIO_CHAN_INFO_SAMP_FREQ:
  564. *val = adata->odr;
  565. return IIO_VAL_INT;
  566. default:
  567. return -EINVAL;
  568. }
  569. read_error:
  570. return err;
  571. }
  572. static int st_accel_write_raw(struct iio_dev *indio_dev,
  573. struct iio_chan_spec const *chan, int val, int val2, long mask)
  574. {
  575. int err;
  576. switch (mask) {
  577. case IIO_CHAN_INFO_SCALE:
  578. err = st_sensors_set_fullscale_by_gain(indio_dev, val2);
  579. break;
  580. case IIO_CHAN_INFO_SAMP_FREQ:
  581. if (val2)
  582. return -EINVAL;
  583. mutex_lock(&indio_dev->mlock);
  584. err = st_sensors_set_odr(indio_dev, val);
  585. mutex_unlock(&indio_dev->mlock);
  586. return err;
  587. default:
  588. return -EINVAL;
  589. }
  590. return err;
  591. }
  592. static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL();
  593. static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_accel_scale_available);
  594. static struct attribute *st_accel_attributes[] = {
  595. &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
  596. &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
  597. NULL,
  598. };
  599. static const struct attribute_group st_accel_attribute_group = {
  600. .attrs = st_accel_attributes,
  601. };
  602. static const struct iio_info accel_info = {
  603. .driver_module = THIS_MODULE,
  604. .attrs = &st_accel_attribute_group,
  605. .read_raw = &st_accel_read_raw,
  606. .write_raw = &st_accel_write_raw,
  607. .debugfs_reg_access = &st_sensors_debugfs_reg_access,
  608. };
  609. #ifdef CONFIG_IIO_TRIGGER
  610. static const struct iio_trigger_ops st_accel_trigger_ops = {
  611. .owner = THIS_MODULE,
  612. .set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE,
  613. };
  614. #define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops)
  615. #else
  616. #define ST_ACCEL_TRIGGER_OPS NULL
  617. #endif
  618. int st_accel_common_probe(struct iio_dev *indio_dev)
  619. {
  620. struct st_sensor_data *adata = iio_priv(indio_dev);
  621. int irq = adata->get_irq_data_ready(indio_dev);
  622. int err;
  623. indio_dev->modes = INDIO_DIRECT_MODE;
  624. indio_dev->info = &accel_info;
  625. mutex_init(&adata->tb.buf_lock);
  626. st_sensors_power_enable(indio_dev);
  627. err = st_sensors_check_device_support(indio_dev,
  628. ARRAY_SIZE(st_accel_sensors_settings),
  629. st_accel_sensors_settings);
  630. if (err < 0)
  631. return err;
  632. adata->num_data_channels = ST_ACCEL_NUMBER_DATA_CHANNELS;
  633. adata->multiread_bit = adata->sensor_settings->multi_read_bit;
  634. indio_dev->channels = adata->sensor_settings->ch;
  635. indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS;
  636. adata->current_fullscale = (struct st_sensor_fullscale_avl *)
  637. &adata->sensor_settings->fs.fs_avl[0];
  638. adata->odr = adata->sensor_settings->odr.odr_avl[0].hz;
  639. if (!adata->dev->platform_data)
  640. adata->dev->platform_data =
  641. (struct st_sensors_platform_data *)&default_accel_pdata;
  642. err = st_sensors_init_sensor(indio_dev, adata->dev->platform_data);
  643. if (err < 0)
  644. return err;
  645. err = st_accel_allocate_ring(indio_dev);
  646. if (err < 0)
  647. return err;
  648. if (irq > 0) {
  649. err = st_sensors_allocate_trigger(indio_dev,
  650. ST_ACCEL_TRIGGER_OPS);
  651. if (err < 0)
  652. goto st_accel_probe_trigger_error;
  653. }
  654. err = iio_device_register(indio_dev);
  655. if (err)
  656. goto st_accel_device_register_error;
  657. dev_info(&indio_dev->dev, "registered accelerometer %s\n",
  658. indio_dev->name);
  659. return 0;
  660. st_accel_device_register_error:
  661. if (irq > 0)
  662. st_sensors_deallocate_trigger(indio_dev);
  663. st_accel_probe_trigger_error:
  664. st_accel_deallocate_ring(indio_dev);
  665. return err;
  666. }
  667. EXPORT_SYMBOL(st_accel_common_probe);
  668. void st_accel_common_remove(struct iio_dev *indio_dev)
  669. {
  670. struct st_sensor_data *adata = iio_priv(indio_dev);
  671. st_sensors_power_disable(indio_dev);
  672. iio_device_unregister(indio_dev);
  673. if (adata->get_irq_data_ready(indio_dev) > 0)
  674. st_sensors_deallocate_trigger(indio_dev);
  675. st_accel_deallocate_ring(indio_dev);
  676. }
  677. EXPORT_SYMBOL(st_accel_common_remove);
  678. MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
  679. MODULE_DESCRIPTION("STMicroelectronics accelerometers driver");
  680. MODULE_LICENSE("GPL v2");