mcdi.c 61 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare network controllers and boards
  3. * Copyright 2008-2013 Solarflare Communications Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published
  7. * by the Free Software Foundation, incorporated herein by reference.
  8. */
  9. #include <linux/delay.h>
  10. #include <linux/moduleparam.h>
  11. #include <linux/atomic.h>
  12. #include "net_driver.h"
  13. #include "nic.h"
  14. #include "io.h"
  15. #include "farch_regs.h"
  16. #include "mcdi_pcol.h"
  17. #include "phy.h"
  18. /**************************************************************************
  19. *
  20. * Management-Controller-to-Driver Interface
  21. *
  22. **************************************************************************
  23. */
  24. #define MCDI_RPC_TIMEOUT (10 * HZ)
  25. /* A reboot/assertion causes the MCDI status word to be set after the
  26. * command word is set or a REBOOT event is sent. If we notice a reboot
  27. * via these mechanisms then wait 250ms for the status word to be set.
  28. */
  29. #define MCDI_STATUS_DELAY_US 100
  30. #define MCDI_STATUS_DELAY_COUNT 2500
  31. #define MCDI_STATUS_SLEEP_MS \
  32. (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
  33. #define SEQ_MASK \
  34. EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
  35. struct efx_mcdi_async_param {
  36. struct list_head list;
  37. unsigned int cmd;
  38. size_t inlen;
  39. size_t outlen;
  40. bool quiet;
  41. efx_mcdi_async_completer *complete;
  42. unsigned long cookie;
  43. /* followed by request/response buffer */
  44. };
  45. static void efx_mcdi_timeout_async(unsigned long context);
  46. static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
  47. bool *was_attached_out);
  48. static bool efx_mcdi_poll_once(struct efx_nic *efx);
  49. static void efx_mcdi_abandon(struct efx_nic *efx);
  50. #ifdef CONFIG_SFC_MCDI_LOGGING
  51. static bool mcdi_logging_default;
  52. module_param(mcdi_logging_default, bool, 0644);
  53. MODULE_PARM_DESC(mcdi_logging_default,
  54. "Enable MCDI logging on newly-probed functions");
  55. #endif
  56. int efx_mcdi_init(struct efx_nic *efx)
  57. {
  58. struct efx_mcdi_iface *mcdi;
  59. bool already_attached;
  60. int rc = -ENOMEM;
  61. efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
  62. if (!efx->mcdi)
  63. goto fail;
  64. mcdi = efx_mcdi(efx);
  65. mcdi->efx = efx;
  66. #ifdef CONFIG_SFC_MCDI_LOGGING
  67. /* consuming code assumes buffer is page-sized */
  68. mcdi->logging_buffer = (char *)__get_free_page(GFP_KERNEL);
  69. if (!mcdi->logging_buffer)
  70. goto fail1;
  71. mcdi->logging_enabled = mcdi_logging_default;
  72. #endif
  73. init_waitqueue_head(&mcdi->wq);
  74. init_waitqueue_head(&mcdi->proxy_rx_wq);
  75. spin_lock_init(&mcdi->iface_lock);
  76. mcdi->state = MCDI_STATE_QUIESCENT;
  77. mcdi->mode = MCDI_MODE_POLL;
  78. spin_lock_init(&mcdi->async_lock);
  79. INIT_LIST_HEAD(&mcdi->async_list);
  80. setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async,
  81. (unsigned long)mcdi);
  82. (void) efx_mcdi_poll_reboot(efx);
  83. mcdi->new_epoch = true;
  84. /* Recover from a failed assertion before probing */
  85. rc = efx_mcdi_handle_assertion(efx);
  86. if (rc)
  87. goto fail2;
  88. /* Let the MC (and BMC, if this is a LOM) know that the driver
  89. * is loaded. We should do this before we reset the NIC.
  90. */
  91. rc = efx_mcdi_drv_attach(efx, true, &already_attached);
  92. if (rc) {
  93. netif_err(efx, probe, efx->net_dev,
  94. "Unable to register driver with MCPU\n");
  95. goto fail2;
  96. }
  97. if (already_attached)
  98. /* Not a fatal error */
  99. netif_err(efx, probe, efx->net_dev,
  100. "Host already registered with MCPU\n");
  101. if (efx->mcdi->fn_flags &
  102. (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY))
  103. efx->primary = efx;
  104. return 0;
  105. fail2:
  106. #ifdef CONFIG_SFC_MCDI_LOGGING
  107. free_page((unsigned long)mcdi->logging_buffer);
  108. fail1:
  109. #endif
  110. kfree(efx->mcdi);
  111. efx->mcdi = NULL;
  112. fail:
  113. return rc;
  114. }
  115. void efx_mcdi_fini(struct efx_nic *efx)
  116. {
  117. if (!efx->mcdi)
  118. return;
  119. BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
  120. /* Relinquish the device (back to the BMC, if this is a LOM) */
  121. efx_mcdi_drv_attach(efx, false, NULL);
  122. #ifdef CONFIG_SFC_MCDI_LOGGING
  123. free_page((unsigned long)efx->mcdi->iface.logging_buffer);
  124. #endif
  125. kfree(efx->mcdi);
  126. }
  127. static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
  128. const efx_dword_t *inbuf, size_t inlen)
  129. {
  130. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  131. #ifdef CONFIG_SFC_MCDI_LOGGING
  132. char *buf = mcdi->logging_buffer; /* page-sized */
  133. #endif
  134. efx_dword_t hdr[2];
  135. size_t hdr_len;
  136. u32 xflags, seqno;
  137. BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
  138. /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
  139. spin_lock_bh(&mcdi->iface_lock);
  140. ++mcdi->seqno;
  141. spin_unlock_bh(&mcdi->iface_lock);
  142. seqno = mcdi->seqno & SEQ_MASK;
  143. xflags = 0;
  144. if (mcdi->mode == MCDI_MODE_EVENTS)
  145. xflags |= MCDI_HEADER_XFLAGS_EVREQ;
  146. if (efx->type->mcdi_max_ver == 1) {
  147. /* MCDI v1 */
  148. EFX_POPULATE_DWORD_7(hdr[0],
  149. MCDI_HEADER_RESPONSE, 0,
  150. MCDI_HEADER_RESYNC, 1,
  151. MCDI_HEADER_CODE, cmd,
  152. MCDI_HEADER_DATALEN, inlen,
  153. MCDI_HEADER_SEQ, seqno,
  154. MCDI_HEADER_XFLAGS, xflags,
  155. MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
  156. hdr_len = 4;
  157. } else {
  158. /* MCDI v2 */
  159. BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
  160. EFX_POPULATE_DWORD_7(hdr[0],
  161. MCDI_HEADER_RESPONSE, 0,
  162. MCDI_HEADER_RESYNC, 1,
  163. MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
  164. MCDI_HEADER_DATALEN, 0,
  165. MCDI_HEADER_SEQ, seqno,
  166. MCDI_HEADER_XFLAGS, xflags,
  167. MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
  168. EFX_POPULATE_DWORD_2(hdr[1],
  169. MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
  170. MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
  171. hdr_len = 8;
  172. }
  173. #ifdef CONFIG_SFC_MCDI_LOGGING
  174. if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
  175. int bytes = 0;
  176. int i;
  177. /* Lengths should always be a whole number of dwords, so scream
  178. * if they're not.
  179. */
  180. WARN_ON_ONCE(hdr_len % 4);
  181. WARN_ON_ONCE(inlen % 4);
  182. /* We own the logging buffer, as only one MCDI can be in
  183. * progress on a NIC at any one time. So no need for locking.
  184. */
  185. for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++)
  186. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  187. " %08x", le32_to_cpu(hdr[i].u32[0]));
  188. for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++)
  189. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  190. " %08x", le32_to_cpu(inbuf[i].u32[0]));
  191. netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf);
  192. }
  193. #endif
  194. efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
  195. mcdi->new_epoch = false;
  196. }
  197. static int efx_mcdi_errno(unsigned int mcdi_err)
  198. {
  199. switch (mcdi_err) {
  200. case 0:
  201. return 0;
  202. #define TRANSLATE_ERROR(name) \
  203. case MC_CMD_ERR_ ## name: \
  204. return -name;
  205. TRANSLATE_ERROR(EPERM);
  206. TRANSLATE_ERROR(ENOENT);
  207. TRANSLATE_ERROR(EINTR);
  208. TRANSLATE_ERROR(EAGAIN);
  209. TRANSLATE_ERROR(EACCES);
  210. TRANSLATE_ERROR(EBUSY);
  211. TRANSLATE_ERROR(EINVAL);
  212. TRANSLATE_ERROR(EDEADLK);
  213. TRANSLATE_ERROR(ENOSYS);
  214. TRANSLATE_ERROR(ETIME);
  215. TRANSLATE_ERROR(EALREADY);
  216. TRANSLATE_ERROR(ENOSPC);
  217. #undef TRANSLATE_ERROR
  218. case MC_CMD_ERR_ENOTSUP:
  219. return -EOPNOTSUPP;
  220. case MC_CMD_ERR_ALLOC_FAIL:
  221. return -ENOBUFS;
  222. case MC_CMD_ERR_MAC_EXIST:
  223. return -EADDRINUSE;
  224. default:
  225. return -EPROTO;
  226. }
  227. }
  228. static void efx_mcdi_read_response_header(struct efx_nic *efx)
  229. {
  230. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  231. unsigned int respseq, respcmd, error;
  232. #ifdef CONFIG_SFC_MCDI_LOGGING
  233. char *buf = mcdi->logging_buffer; /* page-sized */
  234. #endif
  235. efx_dword_t hdr;
  236. efx->type->mcdi_read_response(efx, &hdr, 0, 4);
  237. respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
  238. respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
  239. error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
  240. if (respcmd != MC_CMD_V2_EXTN) {
  241. mcdi->resp_hdr_len = 4;
  242. mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
  243. } else {
  244. efx->type->mcdi_read_response(efx, &hdr, 4, 4);
  245. mcdi->resp_hdr_len = 8;
  246. mcdi->resp_data_len =
  247. EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
  248. }
  249. #ifdef CONFIG_SFC_MCDI_LOGGING
  250. if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
  251. size_t hdr_len, data_len;
  252. int bytes = 0;
  253. int i;
  254. WARN_ON_ONCE(mcdi->resp_hdr_len % 4);
  255. hdr_len = mcdi->resp_hdr_len / 4;
  256. /* MCDI_DECLARE_BUF ensures that underlying buffer is padded
  257. * to dword size, and the MCDI buffer is always dword size
  258. */
  259. data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4);
  260. /* We own the logging buffer, as only one MCDI can be in
  261. * progress on a NIC at any one time. So no need for locking.
  262. */
  263. for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) {
  264. efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4);
  265. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  266. " %08x", le32_to_cpu(hdr.u32[0]));
  267. }
  268. for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) {
  269. efx->type->mcdi_read_response(efx, &hdr,
  270. mcdi->resp_hdr_len + (i * 4), 4);
  271. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  272. " %08x", le32_to_cpu(hdr.u32[0]));
  273. }
  274. netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf);
  275. }
  276. #endif
  277. mcdi->resprc_raw = 0;
  278. if (error && mcdi->resp_data_len == 0) {
  279. netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
  280. mcdi->resprc = -EIO;
  281. } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
  282. netif_err(efx, hw, efx->net_dev,
  283. "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
  284. respseq, mcdi->seqno);
  285. mcdi->resprc = -EIO;
  286. } else if (error) {
  287. efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
  288. mcdi->resprc_raw = EFX_DWORD_FIELD(hdr, EFX_DWORD_0);
  289. mcdi->resprc = efx_mcdi_errno(mcdi->resprc_raw);
  290. } else {
  291. mcdi->resprc = 0;
  292. }
  293. }
  294. static bool efx_mcdi_poll_once(struct efx_nic *efx)
  295. {
  296. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  297. rmb();
  298. if (!efx->type->mcdi_poll_response(efx))
  299. return false;
  300. spin_lock_bh(&mcdi->iface_lock);
  301. efx_mcdi_read_response_header(efx);
  302. spin_unlock_bh(&mcdi->iface_lock);
  303. return true;
  304. }
  305. static int efx_mcdi_poll(struct efx_nic *efx)
  306. {
  307. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  308. unsigned long time, finish;
  309. unsigned int spins;
  310. int rc;
  311. /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
  312. rc = efx_mcdi_poll_reboot(efx);
  313. if (rc) {
  314. spin_lock_bh(&mcdi->iface_lock);
  315. mcdi->resprc = rc;
  316. mcdi->resp_hdr_len = 0;
  317. mcdi->resp_data_len = 0;
  318. spin_unlock_bh(&mcdi->iface_lock);
  319. return 0;
  320. }
  321. /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
  322. * because generally mcdi responses are fast. After that, back off
  323. * and poll once a jiffy (approximately)
  324. */
  325. spins = TICK_USEC;
  326. finish = jiffies + MCDI_RPC_TIMEOUT;
  327. while (1) {
  328. if (spins != 0) {
  329. --spins;
  330. udelay(1);
  331. } else {
  332. schedule_timeout_uninterruptible(1);
  333. }
  334. time = jiffies;
  335. if (efx_mcdi_poll_once(efx))
  336. break;
  337. if (time_after(time, finish))
  338. return -ETIMEDOUT;
  339. }
  340. /* Return rc=0 like wait_event_timeout() */
  341. return 0;
  342. }
  343. /* Test and clear MC-rebooted flag for this port/function; reset
  344. * software state as necessary.
  345. */
  346. int efx_mcdi_poll_reboot(struct efx_nic *efx)
  347. {
  348. if (!efx->mcdi)
  349. return 0;
  350. return efx->type->mcdi_poll_reboot(efx);
  351. }
  352. static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
  353. {
  354. return cmpxchg(&mcdi->state,
  355. MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
  356. MCDI_STATE_QUIESCENT;
  357. }
  358. static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
  359. {
  360. /* Wait until the interface becomes QUIESCENT and we win the race
  361. * to mark it RUNNING_SYNC.
  362. */
  363. wait_event(mcdi->wq,
  364. cmpxchg(&mcdi->state,
  365. MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
  366. MCDI_STATE_QUIESCENT);
  367. }
  368. static int efx_mcdi_await_completion(struct efx_nic *efx)
  369. {
  370. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  371. if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
  372. MCDI_RPC_TIMEOUT) == 0)
  373. return -ETIMEDOUT;
  374. /* Check if efx_mcdi_set_mode() switched us back to polled completions.
  375. * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
  376. * completed the request first, then we'll just end up completing the
  377. * request again, which is safe.
  378. *
  379. * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
  380. * wait_event_timeout() implicitly provides.
  381. */
  382. if (mcdi->mode == MCDI_MODE_POLL)
  383. return efx_mcdi_poll(efx);
  384. return 0;
  385. }
  386. /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the
  387. * requester. Return whether this was done. Does not take any locks.
  388. */
  389. static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
  390. {
  391. if (cmpxchg(&mcdi->state,
  392. MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
  393. MCDI_STATE_RUNNING_SYNC) {
  394. wake_up(&mcdi->wq);
  395. return true;
  396. }
  397. return false;
  398. }
  399. static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
  400. {
  401. if (mcdi->mode == MCDI_MODE_EVENTS) {
  402. struct efx_mcdi_async_param *async;
  403. struct efx_nic *efx = mcdi->efx;
  404. /* Process the asynchronous request queue */
  405. spin_lock_bh(&mcdi->async_lock);
  406. async = list_first_entry_or_null(
  407. &mcdi->async_list, struct efx_mcdi_async_param, list);
  408. if (async) {
  409. mcdi->state = MCDI_STATE_RUNNING_ASYNC;
  410. efx_mcdi_send_request(efx, async->cmd,
  411. (const efx_dword_t *)(async + 1),
  412. async->inlen);
  413. mod_timer(&mcdi->async_timer,
  414. jiffies + MCDI_RPC_TIMEOUT);
  415. }
  416. spin_unlock_bh(&mcdi->async_lock);
  417. if (async)
  418. return;
  419. }
  420. mcdi->state = MCDI_STATE_QUIESCENT;
  421. wake_up(&mcdi->wq);
  422. }
  423. /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the
  424. * asynchronous completion function, and release the interface.
  425. * Return whether this was done. Must be called in bh-disabled
  426. * context. Will take iface_lock and async_lock.
  427. */
  428. static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
  429. {
  430. struct efx_nic *efx = mcdi->efx;
  431. struct efx_mcdi_async_param *async;
  432. size_t hdr_len, data_len, err_len;
  433. efx_dword_t *outbuf;
  434. MCDI_DECLARE_BUF_ERR(errbuf);
  435. int rc;
  436. if (cmpxchg(&mcdi->state,
  437. MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
  438. MCDI_STATE_RUNNING_ASYNC)
  439. return false;
  440. spin_lock(&mcdi->iface_lock);
  441. if (timeout) {
  442. /* Ensure that if the completion event arrives later,
  443. * the seqno check in efx_mcdi_ev_cpl() will fail
  444. */
  445. ++mcdi->seqno;
  446. ++mcdi->credits;
  447. rc = -ETIMEDOUT;
  448. hdr_len = 0;
  449. data_len = 0;
  450. } else {
  451. rc = mcdi->resprc;
  452. hdr_len = mcdi->resp_hdr_len;
  453. data_len = mcdi->resp_data_len;
  454. }
  455. spin_unlock(&mcdi->iface_lock);
  456. /* Stop the timer. In case the timer function is running, we
  457. * must wait for it to return so that there is no possibility
  458. * of it aborting the next request.
  459. */
  460. if (!timeout)
  461. del_timer_sync(&mcdi->async_timer);
  462. spin_lock(&mcdi->async_lock);
  463. async = list_first_entry(&mcdi->async_list,
  464. struct efx_mcdi_async_param, list);
  465. list_del(&async->list);
  466. spin_unlock(&mcdi->async_lock);
  467. outbuf = (efx_dword_t *)(async + 1);
  468. efx->type->mcdi_read_response(efx, outbuf, hdr_len,
  469. min(async->outlen, data_len));
  470. if (!timeout && rc && !async->quiet) {
  471. err_len = min(sizeof(errbuf), data_len);
  472. efx->type->mcdi_read_response(efx, errbuf, hdr_len,
  473. sizeof(errbuf));
  474. efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf,
  475. err_len, rc);
  476. }
  477. if (async->complete)
  478. async->complete(efx, async->cookie, rc, outbuf,
  479. min(async->outlen, data_len));
  480. kfree(async);
  481. efx_mcdi_release(mcdi);
  482. return true;
  483. }
  484. static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
  485. unsigned int datalen, unsigned int mcdi_err)
  486. {
  487. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  488. bool wake = false;
  489. spin_lock(&mcdi->iface_lock);
  490. if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
  491. if (mcdi->credits)
  492. /* The request has been cancelled */
  493. --mcdi->credits;
  494. else
  495. netif_err(efx, hw, efx->net_dev,
  496. "MC response mismatch tx seq 0x%x rx "
  497. "seq 0x%x\n", seqno, mcdi->seqno);
  498. } else {
  499. if (efx->type->mcdi_max_ver >= 2) {
  500. /* MCDI v2 responses don't fit in an event */
  501. efx_mcdi_read_response_header(efx);
  502. } else {
  503. mcdi->resprc = efx_mcdi_errno(mcdi_err);
  504. mcdi->resp_hdr_len = 4;
  505. mcdi->resp_data_len = datalen;
  506. }
  507. wake = true;
  508. }
  509. spin_unlock(&mcdi->iface_lock);
  510. if (wake) {
  511. if (!efx_mcdi_complete_async(mcdi, false))
  512. (void) efx_mcdi_complete_sync(mcdi);
  513. /* If the interface isn't RUNNING_ASYNC or
  514. * RUNNING_SYNC then we've received a duplicate
  515. * completion after we've already transitioned back to
  516. * QUIESCENT. [A subsequent invocation would increment
  517. * seqno, so would have failed the seqno check].
  518. */
  519. }
  520. }
  521. static void efx_mcdi_timeout_async(unsigned long context)
  522. {
  523. struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context;
  524. efx_mcdi_complete_async(mcdi, true);
  525. }
  526. static int
  527. efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
  528. {
  529. if (efx->type->mcdi_max_ver < 0 ||
  530. (efx->type->mcdi_max_ver < 2 &&
  531. cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
  532. return -EINVAL;
  533. if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
  534. (efx->type->mcdi_max_ver < 2 &&
  535. inlen > MCDI_CTL_SDU_LEN_MAX_V1))
  536. return -EMSGSIZE;
  537. return 0;
  538. }
  539. static bool efx_mcdi_get_proxy_handle(struct efx_nic *efx,
  540. size_t hdr_len, size_t data_len,
  541. u32 *proxy_handle)
  542. {
  543. MCDI_DECLARE_BUF_ERR(testbuf);
  544. const size_t buflen = sizeof(testbuf);
  545. if (!proxy_handle || data_len < buflen)
  546. return false;
  547. efx->type->mcdi_read_response(efx, testbuf, hdr_len, buflen);
  548. if (MCDI_DWORD(testbuf, ERR_CODE) == MC_CMD_ERR_PROXY_PENDING) {
  549. *proxy_handle = MCDI_DWORD(testbuf, ERR_PROXY_PENDING_HANDLE);
  550. return true;
  551. }
  552. return false;
  553. }
  554. static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned int cmd,
  555. size_t inlen,
  556. efx_dword_t *outbuf, size_t outlen,
  557. size_t *outlen_actual, bool quiet,
  558. u32 *proxy_handle, int *raw_rc)
  559. {
  560. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  561. MCDI_DECLARE_BUF_ERR(errbuf);
  562. int rc;
  563. if (mcdi->mode == MCDI_MODE_POLL)
  564. rc = efx_mcdi_poll(efx);
  565. else
  566. rc = efx_mcdi_await_completion(efx);
  567. if (rc != 0) {
  568. netif_err(efx, hw, efx->net_dev,
  569. "MC command 0x%x inlen %d mode %d timed out\n",
  570. cmd, (int)inlen, mcdi->mode);
  571. if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
  572. netif_err(efx, hw, efx->net_dev,
  573. "MCDI request was completed without an event\n");
  574. rc = 0;
  575. }
  576. efx_mcdi_abandon(efx);
  577. /* Close the race with efx_mcdi_ev_cpl() executing just too late
  578. * and completing a request we've just cancelled, by ensuring
  579. * that the seqno check therein fails.
  580. */
  581. spin_lock_bh(&mcdi->iface_lock);
  582. ++mcdi->seqno;
  583. ++mcdi->credits;
  584. spin_unlock_bh(&mcdi->iface_lock);
  585. }
  586. if (proxy_handle)
  587. *proxy_handle = 0;
  588. if (rc != 0) {
  589. if (outlen_actual)
  590. *outlen_actual = 0;
  591. } else {
  592. size_t hdr_len, data_len, err_len;
  593. /* At the very least we need a memory barrier here to ensure
  594. * we pick up changes from efx_mcdi_ev_cpl(). Protect against
  595. * a spurious efx_mcdi_ev_cpl() running concurrently by
  596. * acquiring the iface_lock. */
  597. spin_lock_bh(&mcdi->iface_lock);
  598. rc = mcdi->resprc;
  599. if (raw_rc)
  600. *raw_rc = mcdi->resprc_raw;
  601. hdr_len = mcdi->resp_hdr_len;
  602. data_len = mcdi->resp_data_len;
  603. err_len = min(sizeof(errbuf), data_len);
  604. spin_unlock_bh(&mcdi->iface_lock);
  605. BUG_ON(rc > 0);
  606. efx->type->mcdi_read_response(efx, outbuf, hdr_len,
  607. min(outlen, data_len));
  608. if (outlen_actual)
  609. *outlen_actual = data_len;
  610. efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len);
  611. if (cmd == MC_CMD_REBOOT && rc == -EIO) {
  612. /* Don't reset if MC_CMD_REBOOT returns EIO */
  613. } else if (rc == -EIO || rc == -EINTR) {
  614. netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
  615. -rc);
  616. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  617. } else if (proxy_handle && (rc == -EPROTO) &&
  618. efx_mcdi_get_proxy_handle(efx, hdr_len, data_len,
  619. proxy_handle)) {
  620. mcdi->proxy_rx_status = 0;
  621. mcdi->proxy_rx_handle = 0;
  622. mcdi->state = MCDI_STATE_PROXY_WAIT;
  623. } else if (rc && !quiet) {
  624. efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len,
  625. rc);
  626. }
  627. if (rc == -EIO || rc == -EINTR) {
  628. msleep(MCDI_STATUS_SLEEP_MS);
  629. efx_mcdi_poll_reboot(efx);
  630. mcdi->new_epoch = true;
  631. }
  632. }
  633. if (!proxy_handle || !*proxy_handle)
  634. efx_mcdi_release(mcdi);
  635. return rc;
  636. }
  637. static void efx_mcdi_proxy_abort(struct efx_mcdi_iface *mcdi)
  638. {
  639. if (mcdi->state == MCDI_STATE_PROXY_WAIT) {
  640. /* Interrupt the proxy wait. */
  641. mcdi->proxy_rx_status = -EINTR;
  642. wake_up(&mcdi->proxy_rx_wq);
  643. }
  644. }
  645. static void efx_mcdi_ev_proxy_response(struct efx_nic *efx,
  646. u32 handle, int status)
  647. {
  648. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  649. WARN_ON(mcdi->state != MCDI_STATE_PROXY_WAIT);
  650. mcdi->proxy_rx_status = efx_mcdi_errno(status);
  651. /* Ensure the status is written before we update the handle, since the
  652. * latter is used to check if we've finished.
  653. */
  654. wmb();
  655. mcdi->proxy_rx_handle = handle;
  656. wake_up(&mcdi->proxy_rx_wq);
  657. }
  658. static int efx_mcdi_proxy_wait(struct efx_nic *efx, u32 handle, bool quiet)
  659. {
  660. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  661. int rc;
  662. /* Wait for a proxy event, or timeout. */
  663. rc = wait_event_timeout(mcdi->proxy_rx_wq,
  664. mcdi->proxy_rx_handle != 0 ||
  665. mcdi->proxy_rx_status == -EINTR,
  666. MCDI_RPC_TIMEOUT);
  667. if (rc <= 0) {
  668. netif_dbg(efx, hw, efx->net_dev,
  669. "MCDI proxy timeout %d\n", handle);
  670. return -ETIMEDOUT;
  671. } else if (mcdi->proxy_rx_handle != handle) {
  672. netif_warn(efx, hw, efx->net_dev,
  673. "MCDI proxy unexpected handle %d (expected %d)\n",
  674. mcdi->proxy_rx_handle, handle);
  675. return -EINVAL;
  676. }
  677. return mcdi->proxy_rx_status;
  678. }
  679. static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned int cmd,
  680. const efx_dword_t *inbuf, size_t inlen,
  681. efx_dword_t *outbuf, size_t outlen,
  682. size_t *outlen_actual, bool quiet, int *raw_rc)
  683. {
  684. u32 proxy_handle = 0; /* Zero is an invalid proxy handle. */
  685. int rc;
  686. if (inbuf && inlen && (inbuf == outbuf)) {
  687. /* The input buffer can't be aliased with the output. */
  688. WARN_ON(1);
  689. return -EINVAL;
  690. }
  691. rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
  692. if (rc)
  693. return rc;
  694. rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
  695. outlen_actual, quiet, &proxy_handle, raw_rc);
  696. if (proxy_handle) {
  697. /* Handle proxy authorisation. This allows approval of MCDI
  698. * operations to be delegated to the admin function, allowing
  699. * fine control over (eg) multicast subscriptions.
  700. */
  701. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  702. netif_dbg(efx, hw, efx->net_dev,
  703. "MCDI waiting for proxy auth %d\n",
  704. proxy_handle);
  705. rc = efx_mcdi_proxy_wait(efx, proxy_handle, quiet);
  706. if (rc == 0) {
  707. netif_dbg(efx, hw, efx->net_dev,
  708. "MCDI proxy retry %d\n", proxy_handle);
  709. /* We now retry the original request. */
  710. mcdi->state = MCDI_STATE_RUNNING_SYNC;
  711. efx_mcdi_send_request(efx, cmd, inbuf, inlen);
  712. rc = _efx_mcdi_rpc_finish(efx, cmd, inlen,
  713. outbuf, outlen, outlen_actual,
  714. quiet, NULL, raw_rc);
  715. } else {
  716. netif_printk(efx, hw,
  717. rc == -EPERM ? KERN_DEBUG : KERN_ERR,
  718. efx->net_dev,
  719. "MC command 0x%x failed after proxy auth rc=%d\n",
  720. cmd, rc);
  721. if (rc == -EINTR || rc == -EIO)
  722. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  723. efx_mcdi_release(mcdi);
  724. }
  725. }
  726. return rc;
  727. }
  728. static int _efx_mcdi_rpc_evb_retry(struct efx_nic *efx, unsigned cmd,
  729. const efx_dword_t *inbuf, size_t inlen,
  730. efx_dword_t *outbuf, size_t outlen,
  731. size_t *outlen_actual, bool quiet)
  732. {
  733. int raw_rc = 0;
  734. int rc;
  735. rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen,
  736. outbuf, outlen, outlen_actual, true, &raw_rc);
  737. if ((rc == -EPROTO) && (raw_rc == MC_CMD_ERR_NO_EVB_PORT) &&
  738. efx->type->is_vf) {
  739. /* If the EVB port isn't available within a VF this may
  740. * mean the PF is still bringing the switch up. We should
  741. * retry our request shortly.
  742. */
  743. unsigned long abort_time = jiffies + MCDI_RPC_TIMEOUT;
  744. unsigned int delay_us = 10000;
  745. netif_dbg(efx, hw, efx->net_dev,
  746. "%s: NO_EVB_PORT; will retry request\n",
  747. __func__);
  748. do {
  749. usleep_range(delay_us, delay_us + 10000);
  750. rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen,
  751. outbuf, outlen, outlen_actual,
  752. true, &raw_rc);
  753. if (delay_us < 100000)
  754. delay_us <<= 1;
  755. } while ((rc == -EPROTO) &&
  756. (raw_rc == MC_CMD_ERR_NO_EVB_PORT) &&
  757. time_before(jiffies, abort_time));
  758. }
  759. if (rc && !quiet && !(cmd == MC_CMD_REBOOT && rc == -EIO))
  760. efx_mcdi_display_error(efx, cmd, inlen,
  761. outbuf, outlen, rc);
  762. return rc;
  763. }
  764. /**
  765. * efx_mcdi_rpc - Issue an MCDI command and wait for completion
  766. * @efx: NIC through which to issue the command
  767. * @cmd: Command type number
  768. * @inbuf: Command parameters
  769. * @inlen: Length of command parameters, in bytes. Must be a multiple
  770. * of 4 and no greater than %MCDI_CTL_SDU_LEN_MAX_V1.
  771. * @outbuf: Response buffer. May be %NULL if @outlen is 0.
  772. * @outlen: Length of response buffer, in bytes. If the actual
  773. * response is longer than @outlen & ~3, it will be truncated
  774. * to that length.
  775. * @outlen_actual: Pointer through which to return the actual response
  776. * length. May be %NULL if this is not needed.
  777. *
  778. * This function may sleep and therefore must be called in an appropriate
  779. * context.
  780. *
  781. * Return: A negative error code, or zero if successful. The error
  782. * code may come from the MCDI response or may indicate a failure
  783. * to communicate with the MC. In the former case, the response
  784. * will still be copied to @outbuf and *@outlen_actual will be
  785. * set accordingly. In the latter case, *@outlen_actual will be
  786. * set to zero.
  787. */
  788. int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
  789. const efx_dword_t *inbuf, size_t inlen,
  790. efx_dword_t *outbuf, size_t outlen,
  791. size_t *outlen_actual)
  792. {
  793. return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen,
  794. outlen_actual, false);
  795. }
  796. /* Normally, on receiving an error code in the MCDI response,
  797. * efx_mcdi_rpc will log an error message containing (among other
  798. * things) the raw error code, by means of efx_mcdi_display_error.
  799. * This _quiet version suppresses that; if the caller wishes to log
  800. * the error conditionally on the return code, it should call this
  801. * function and is then responsible for calling efx_mcdi_display_error
  802. * as needed.
  803. */
  804. int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd,
  805. const efx_dword_t *inbuf, size_t inlen,
  806. efx_dword_t *outbuf, size_t outlen,
  807. size_t *outlen_actual)
  808. {
  809. return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen,
  810. outlen_actual, true);
  811. }
  812. int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
  813. const efx_dword_t *inbuf, size_t inlen)
  814. {
  815. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  816. int rc;
  817. rc = efx_mcdi_check_supported(efx, cmd, inlen);
  818. if (rc)
  819. return rc;
  820. if (efx->mc_bist_for_other_fn)
  821. return -ENETDOWN;
  822. if (mcdi->mode == MCDI_MODE_FAIL)
  823. return -ENETDOWN;
  824. efx_mcdi_acquire_sync(mcdi);
  825. efx_mcdi_send_request(efx, cmd, inbuf, inlen);
  826. return 0;
  827. }
  828. static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
  829. const efx_dword_t *inbuf, size_t inlen,
  830. size_t outlen,
  831. efx_mcdi_async_completer *complete,
  832. unsigned long cookie, bool quiet)
  833. {
  834. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  835. struct efx_mcdi_async_param *async;
  836. int rc;
  837. rc = efx_mcdi_check_supported(efx, cmd, inlen);
  838. if (rc)
  839. return rc;
  840. if (efx->mc_bist_for_other_fn)
  841. return -ENETDOWN;
  842. async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
  843. GFP_ATOMIC);
  844. if (!async)
  845. return -ENOMEM;
  846. async->cmd = cmd;
  847. async->inlen = inlen;
  848. async->outlen = outlen;
  849. async->quiet = quiet;
  850. async->complete = complete;
  851. async->cookie = cookie;
  852. memcpy(async + 1, inbuf, inlen);
  853. spin_lock_bh(&mcdi->async_lock);
  854. if (mcdi->mode == MCDI_MODE_EVENTS) {
  855. list_add_tail(&async->list, &mcdi->async_list);
  856. /* If this is at the front of the queue, try to start it
  857. * immediately
  858. */
  859. if (mcdi->async_list.next == &async->list &&
  860. efx_mcdi_acquire_async(mcdi)) {
  861. efx_mcdi_send_request(efx, cmd, inbuf, inlen);
  862. mod_timer(&mcdi->async_timer,
  863. jiffies + MCDI_RPC_TIMEOUT);
  864. }
  865. } else {
  866. kfree(async);
  867. rc = -ENETDOWN;
  868. }
  869. spin_unlock_bh(&mcdi->async_lock);
  870. return rc;
  871. }
  872. /**
  873. * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously
  874. * @efx: NIC through which to issue the command
  875. * @cmd: Command type number
  876. * @inbuf: Command parameters
  877. * @inlen: Length of command parameters, in bytes
  878. * @outlen: Length to allocate for response buffer, in bytes
  879. * @complete: Function to be called on completion or cancellation.
  880. * @cookie: Arbitrary value to be passed to @complete.
  881. *
  882. * This function does not sleep and therefore may be called in atomic
  883. * context. It will fail if event queues are disabled or if MCDI
  884. * event completions have been disabled due to an error.
  885. *
  886. * If it succeeds, the @complete function will be called exactly once
  887. * in atomic context, when one of the following occurs:
  888. * (a) the completion event is received (in NAPI context)
  889. * (b) event queues are disabled (in the process that disables them)
  890. * (c) the request times-out (in timer context)
  891. */
  892. int
  893. efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
  894. const efx_dword_t *inbuf, size_t inlen, size_t outlen,
  895. efx_mcdi_async_completer *complete, unsigned long cookie)
  896. {
  897. return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
  898. cookie, false);
  899. }
  900. int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,
  901. const efx_dword_t *inbuf, size_t inlen,
  902. size_t outlen, efx_mcdi_async_completer *complete,
  903. unsigned long cookie)
  904. {
  905. return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
  906. cookie, true);
  907. }
  908. int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
  909. efx_dword_t *outbuf, size_t outlen,
  910. size_t *outlen_actual)
  911. {
  912. return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
  913. outlen_actual, false, NULL, NULL);
  914. }
  915. int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen,
  916. efx_dword_t *outbuf, size_t outlen,
  917. size_t *outlen_actual)
  918. {
  919. return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
  920. outlen_actual, true, NULL, NULL);
  921. }
  922. void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,
  923. size_t inlen, efx_dword_t *outbuf,
  924. size_t outlen, int rc)
  925. {
  926. int code = 0, err_arg = 0;
  927. if (outlen >= MC_CMD_ERR_CODE_OFST + 4)
  928. code = MCDI_DWORD(outbuf, ERR_CODE);
  929. if (outlen >= MC_CMD_ERR_ARG_OFST + 4)
  930. err_arg = MCDI_DWORD(outbuf, ERR_ARG);
  931. netif_printk(efx, hw, rc == -EPERM ? KERN_DEBUG : KERN_ERR,
  932. efx->net_dev,
  933. "MC command 0x%x inlen %zu failed rc=%d (raw=%d) arg=%d\n",
  934. cmd, inlen, rc, code, err_arg);
  935. }
  936. /* Switch to polled MCDI completions. This can be called in various
  937. * error conditions with various locks held, so it must be lockless.
  938. * Caller is responsible for flushing asynchronous requests later.
  939. */
  940. void efx_mcdi_mode_poll(struct efx_nic *efx)
  941. {
  942. struct efx_mcdi_iface *mcdi;
  943. if (!efx->mcdi)
  944. return;
  945. mcdi = efx_mcdi(efx);
  946. /* If already in polling mode, nothing to do.
  947. * If in fail-fast state, don't switch to polled completion.
  948. * FLR recovery will do that later.
  949. */
  950. if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL)
  951. return;
  952. /* We can switch from event completion to polled completion, because
  953. * mcdi requests are always completed in shared memory. We do this by
  954. * switching the mode to POLL'd then completing the request.
  955. * efx_mcdi_await_completion() will then call efx_mcdi_poll().
  956. *
  957. * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
  958. * which efx_mcdi_complete_sync() provides for us.
  959. */
  960. mcdi->mode = MCDI_MODE_POLL;
  961. efx_mcdi_complete_sync(mcdi);
  962. }
  963. /* Flush any running or queued asynchronous requests, after event processing
  964. * is stopped
  965. */
  966. void efx_mcdi_flush_async(struct efx_nic *efx)
  967. {
  968. struct efx_mcdi_async_param *async, *next;
  969. struct efx_mcdi_iface *mcdi;
  970. if (!efx->mcdi)
  971. return;
  972. mcdi = efx_mcdi(efx);
  973. /* We must be in poll or fail mode so no more requests can be queued */
  974. BUG_ON(mcdi->mode == MCDI_MODE_EVENTS);
  975. del_timer_sync(&mcdi->async_timer);
  976. /* If a request is still running, make sure we give the MC
  977. * time to complete it so that the response won't overwrite our
  978. * next request.
  979. */
  980. if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
  981. efx_mcdi_poll(efx);
  982. mcdi->state = MCDI_STATE_QUIESCENT;
  983. }
  984. /* Nothing else will access the async list now, so it is safe
  985. * to walk it without holding async_lock. If we hold it while
  986. * calling a completer then lockdep may warn that we have
  987. * acquired locks in the wrong order.
  988. */
  989. list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
  990. async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
  991. list_del(&async->list);
  992. kfree(async);
  993. }
  994. }
  995. void efx_mcdi_mode_event(struct efx_nic *efx)
  996. {
  997. struct efx_mcdi_iface *mcdi;
  998. if (!efx->mcdi)
  999. return;
  1000. mcdi = efx_mcdi(efx);
  1001. /* If already in event completion mode, nothing to do.
  1002. * If in fail-fast state, don't switch to event completion. FLR
  1003. * recovery will do that later.
  1004. */
  1005. if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL)
  1006. return;
  1007. /* We can't switch from polled to event completion in the middle of a
  1008. * request, because the completion method is specified in the request.
  1009. * So acquire the interface to serialise the requestors. We don't need
  1010. * to acquire the iface_lock to change the mode here, but we do need a
  1011. * write memory barrier ensure that efx_mcdi_rpc() sees it, which
  1012. * efx_mcdi_acquire() provides.
  1013. */
  1014. efx_mcdi_acquire_sync(mcdi);
  1015. mcdi->mode = MCDI_MODE_EVENTS;
  1016. efx_mcdi_release(mcdi);
  1017. }
  1018. static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
  1019. {
  1020. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  1021. /* If there is an outstanding MCDI request, it has been terminated
  1022. * either by a BADASSERT or REBOOT event. If the mcdi interface is
  1023. * in polled mode, then do nothing because the MC reboot handler will
  1024. * set the header correctly. However, if the mcdi interface is waiting
  1025. * for a CMDDONE event it won't receive it [and since all MCDI events
  1026. * are sent to the same queue, we can't be racing with
  1027. * efx_mcdi_ev_cpl()]
  1028. *
  1029. * If there is an outstanding asynchronous request, we can't
  1030. * complete it now (efx_mcdi_complete() would deadlock). The
  1031. * reset process will take care of this.
  1032. *
  1033. * There's a race here with efx_mcdi_send_request(), because
  1034. * we might receive a REBOOT event *before* the request has
  1035. * been copied out. In polled mode (during startup) this is
  1036. * irrelevant, because efx_mcdi_complete_sync() is ignored. In
  1037. * event mode, this condition is just an edge-case of
  1038. * receiving a REBOOT event after posting the MCDI
  1039. * request. Did the mc reboot before or after the copyout? The
  1040. * best we can do always is just return failure.
  1041. *
  1042. * If there is an outstanding proxy response expected it is not going
  1043. * to arrive. We should thus abort it.
  1044. */
  1045. spin_lock(&mcdi->iface_lock);
  1046. efx_mcdi_proxy_abort(mcdi);
  1047. if (efx_mcdi_complete_sync(mcdi)) {
  1048. if (mcdi->mode == MCDI_MODE_EVENTS) {
  1049. mcdi->resprc = rc;
  1050. mcdi->resp_hdr_len = 0;
  1051. mcdi->resp_data_len = 0;
  1052. ++mcdi->credits;
  1053. }
  1054. } else {
  1055. int count;
  1056. /* Consume the status word since efx_mcdi_rpc_finish() won't */
  1057. for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
  1058. rc = efx_mcdi_poll_reboot(efx);
  1059. if (rc)
  1060. break;
  1061. udelay(MCDI_STATUS_DELAY_US);
  1062. }
  1063. /* On EF10, a CODE_MC_REBOOT event can be received without the
  1064. * reboot detection in efx_mcdi_poll_reboot() being triggered.
  1065. * If zero was returned from the final call to
  1066. * efx_mcdi_poll_reboot(), the MC reboot wasn't noticed but the
  1067. * MC has definitely rebooted so prepare for the reset.
  1068. */
  1069. if (!rc && efx->type->mcdi_reboot_detected)
  1070. efx->type->mcdi_reboot_detected(efx);
  1071. mcdi->new_epoch = true;
  1072. /* Nobody was waiting for an MCDI request, so trigger a reset */
  1073. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  1074. }
  1075. spin_unlock(&mcdi->iface_lock);
  1076. }
  1077. /* The MC is going down in to BIST mode. set the BIST flag to block
  1078. * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset
  1079. * (which doesn't actually execute a reset, it waits for the controlling
  1080. * function to reset it).
  1081. */
  1082. static void efx_mcdi_ev_bist(struct efx_nic *efx)
  1083. {
  1084. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  1085. spin_lock(&mcdi->iface_lock);
  1086. efx->mc_bist_for_other_fn = true;
  1087. efx_mcdi_proxy_abort(mcdi);
  1088. if (efx_mcdi_complete_sync(mcdi)) {
  1089. if (mcdi->mode == MCDI_MODE_EVENTS) {
  1090. mcdi->resprc = -EIO;
  1091. mcdi->resp_hdr_len = 0;
  1092. mcdi->resp_data_len = 0;
  1093. ++mcdi->credits;
  1094. }
  1095. }
  1096. mcdi->new_epoch = true;
  1097. efx_schedule_reset(efx, RESET_TYPE_MC_BIST);
  1098. spin_unlock(&mcdi->iface_lock);
  1099. }
  1100. /* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try
  1101. * to recover.
  1102. */
  1103. static void efx_mcdi_abandon(struct efx_nic *efx)
  1104. {
  1105. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  1106. if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL)
  1107. return; /* it had already been done */
  1108. netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n");
  1109. efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT);
  1110. }
  1111. /* Called from falcon_process_eventq for MCDI events */
  1112. void efx_mcdi_process_event(struct efx_channel *channel,
  1113. efx_qword_t *event)
  1114. {
  1115. struct efx_nic *efx = channel->efx;
  1116. int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
  1117. u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
  1118. switch (code) {
  1119. case MCDI_EVENT_CODE_BADSSERT:
  1120. netif_err(efx, hw, efx->net_dev,
  1121. "MC watchdog or assertion failure at 0x%x\n", data);
  1122. efx_mcdi_ev_death(efx, -EINTR);
  1123. break;
  1124. case MCDI_EVENT_CODE_PMNOTICE:
  1125. netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
  1126. break;
  1127. case MCDI_EVENT_CODE_CMDDONE:
  1128. efx_mcdi_ev_cpl(efx,
  1129. MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
  1130. MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
  1131. MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
  1132. break;
  1133. case MCDI_EVENT_CODE_LINKCHANGE:
  1134. efx_mcdi_process_link_change(efx, event);
  1135. break;
  1136. case MCDI_EVENT_CODE_SENSOREVT:
  1137. efx_mcdi_sensor_event(efx, event);
  1138. break;
  1139. case MCDI_EVENT_CODE_SCHEDERR:
  1140. netif_dbg(efx, hw, efx->net_dev,
  1141. "MC Scheduler alert (0x%x)\n", data);
  1142. break;
  1143. case MCDI_EVENT_CODE_REBOOT:
  1144. case MCDI_EVENT_CODE_MC_REBOOT:
  1145. netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
  1146. efx_mcdi_ev_death(efx, -EIO);
  1147. break;
  1148. case MCDI_EVENT_CODE_MC_BIST:
  1149. netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
  1150. efx_mcdi_ev_bist(efx);
  1151. break;
  1152. case MCDI_EVENT_CODE_MAC_STATS_DMA:
  1153. /* MAC stats are gather lazily. We can ignore this. */
  1154. break;
  1155. case MCDI_EVENT_CODE_FLR:
  1156. if (efx->type->sriov_flr)
  1157. efx->type->sriov_flr(efx,
  1158. MCDI_EVENT_FIELD(*event, FLR_VF));
  1159. break;
  1160. case MCDI_EVENT_CODE_PTP_RX:
  1161. case MCDI_EVENT_CODE_PTP_FAULT:
  1162. case MCDI_EVENT_CODE_PTP_PPS:
  1163. efx_ptp_event(efx, event);
  1164. break;
  1165. case MCDI_EVENT_CODE_PTP_TIME:
  1166. efx_time_sync_event(channel, event);
  1167. break;
  1168. case MCDI_EVENT_CODE_TX_FLUSH:
  1169. case MCDI_EVENT_CODE_RX_FLUSH:
  1170. /* Two flush events will be sent: one to the same event
  1171. * queue as completions, and one to event queue 0.
  1172. * In the latter case the {RX,TX}_FLUSH_TO_DRIVER
  1173. * flag will be set, and we should ignore the event
  1174. * because we want to wait for all completions.
  1175. */
  1176. BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
  1177. MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
  1178. if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
  1179. efx_ef10_handle_drain_event(efx);
  1180. break;
  1181. case MCDI_EVENT_CODE_TX_ERR:
  1182. case MCDI_EVENT_CODE_RX_ERR:
  1183. netif_err(efx, hw, efx->net_dev,
  1184. "%s DMA error (event: "EFX_QWORD_FMT")\n",
  1185. code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
  1186. EFX_QWORD_VAL(*event));
  1187. efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
  1188. break;
  1189. case MCDI_EVENT_CODE_PROXY_RESPONSE:
  1190. efx_mcdi_ev_proxy_response(efx,
  1191. MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_HANDLE),
  1192. MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_RC));
  1193. break;
  1194. default:
  1195. netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
  1196. code);
  1197. }
  1198. }
  1199. /**************************************************************************
  1200. *
  1201. * Specific request functions
  1202. *
  1203. **************************************************************************
  1204. */
  1205. void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
  1206. {
  1207. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN);
  1208. size_t outlength;
  1209. const __le16 *ver_words;
  1210. size_t offset;
  1211. int rc;
  1212. BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
  1213. rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
  1214. outbuf, sizeof(outbuf), &outlength);
  1215. if (rc)
  1216. goto fail;
  1217. if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
  1218. rc = -EIO;
  1219. goto fail;
  1220. }
  1221. ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
  1222. offset = snprintf(buf, len, "%u.%u.%u.%u",
  1223. le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
  1224. le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
  1225. /* EF10 may have multiple datapath firmware variants within a
  1226. * single version. Report which variants are running.
  1227. */
  1228. if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
  1229. struct efx_ef10_nic_data *nic_data = efx->nic_data;
  1230. offset += snprintf(buf + offset, len - offset, " rx%x tx%x",
  1231. nic_data->rx_dpcpu_fw_id,
  1232. nic_data->tx_dpcpu_fw_id);
  1233. /* It's theoretically possible for the string to exceed 31
  1234. * characters, though in practice the first three version
  1235. * components are short enough that this doesn't happen.
  1236. */
  1237. if (WARN_ON(offset >= len))
  1238. buf[0] = 0;
  1239. }
  1240. return;
  1241. fail:
  1242. netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1243. buf[0] = 0;
  1244. }
  1245. static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
  1246. bool *was_attached)
  1247. {
  1248. MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
  1249. MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
  1250. size_t outlen;
  1251. int rc;
  1252. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
  1253. driver_operating ? 1 : 0);
  1254. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
  1255. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
  1256. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
  1257. outbuf, sizeof(outbuf), &outlen);
  1258. /* If we're not the primary PF, trying to ATTACH with a FIRMWARE_ID
  1259. * specified will fail with EPERM, and we have to tell the MC we don't
  1260. * care what firmware we get.
  1261. */
  1262. if (rc == -EPERM) {
  1263. netif_dbg(efx, probe, efx->net_dev,
  1264. "efx_mcdi_drv_attach with fw-variant setting failed EPERM, trying without it\n");
  1265. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID,
  1266. MC_CMD_FW_DONT_CARE);
  1267. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf,
  1268. sizeof(inbuf), outbuf, sizeof(outbuf),
  1269. &outlen);
  1270. }
  1271. if (rc) {
  1272. efx_mcdi_display_error(efx, MC_CMD_DRV_ATTACH, sizeof(inbuf),
  1273. outbuf, outlen, rc);
  1274. goto fail;
  1275. }
  1276. if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
  1277. rc = -EIO;
  1278. goto fail;
  1279. }
  1280. if (driver_operating) {
  1281. if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) {
  1282. efx->mcdi->fn_flags =
  1283. MCDI_DWORD(outbuf,
  1284. DRV_ATTACH_EXT_OUT_FUNC_FLAGS);
  1285. } else {
  1286. /* Synthesise flags for Siena */
  1287. efx->mcdi->fn_flags =
  1288. 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
  1289. 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED |
  1290. (efx_port_num(efx) == 0) <<
  1291. MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY;
  1292. }
  1293. }
  1294. /* We currently assume we have control of the external link
  1295. * and are completely trusted by firmware. Abort probing
  1296. * if that's not true for this function.
  1297. */
  1298. if (was_attached != NULL)
  1299. *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
  1300. return 0;
  1301. fail:
  1302. netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1303. return rc;
  1304. }
  1305. int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
  1306. u16 *fw_subtype_list, u32 *capabilities)
  1307. {
  1308. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
  1309. size_t outlen, i;
  1310. int port_num = efx_port_num(efx);
  1311. int rc;
  1312. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
  1313. /* we need __aligned(2) for ether_addr_copy */
  1314. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1);
  1315. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1);
  1316. rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
  1317. outbuf, sizeof(outbuf), &outlen);
  1318. if (rc)
  1319. goto fail;
  1320. if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
  1321. rc = -EIO;
  1322. goto fail;
  1323. }
  1324. if (mac_address)
  1325. ether_addr_copy(mac_address,
  1326. port_num ?
  1327. MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
  1328. MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0));
  1329. if (fw_subtype_list) {
  1330. for (i = 0;
  1331. i < MCDI_VAR_ARRAY_LEN(outlen,
  1332. GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
  1333. i++)
  1334. fw_subtype_list[i] = MCDI_ARRAY_WORD(
  1335. outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
  1336. for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
  1337. fw_subtype_list[i] = 0;
  1338. }
  1339. if (capabilities) {
  1340. if (port_num)
  1341. *capabilities = MCDI_DWORD(outbuf,
  1342. GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
  1343. else
  1344. *capabilities = MCDI_DWORD(outbuf,
  1345. GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
  1346. }
  1347. return 0;
  1348. fail:
  1349. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
  1350. __func__, rc, (int)outlen);
  1351. return rc;
  1352. }
  1353. int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
  1354. {
  1355. MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
  1356. u32 dest = 0;
  1357. int rc;
  1358. if (uart)
  1359. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
  1360. if (evq)
  1361. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
  1362. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
  1363. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
  1364. BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
  1365. rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
  1366. NULL, 0, NULL);
  1367. return rc;
  1368. }
  1369. int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
  1370. {
  1371. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
  1372. size_t outlen;
  1373. int rc;
  1374. BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
  1375. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
  1376. outbuf, sizeof(outbuf), &outlen);
  1377. if (rc)
  1378. goto fail;
  1379. if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
  1380. rc = -EIO;
  1381. goto fail;
  1382. }
  1383. *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
  1384. return 0;
  1385. fail:
  1386. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
  1387. __func__, rc);
  1388. return rc;
  1389. }
  1390. int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
  1391. size_t *size_out, size_t *erase_size_out,
  1392. bool *protected_out)
  1393. {
  1394. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
  1395. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
  1396. size_t outlen;
  1397. int rc;
  1398. MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
  1399. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
  1400. outbuf, sizeof(outbuf), &outlen);
  1401. if (rc)
  1402. goto fail;
  1403. if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
  1404. rc = -EIO;
  1405. goto fail;
  1406. }
  1407. *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
  1408. *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
  1409. *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
  1410. (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
  1411. return 0;
  1412. fail:
  1413. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1414. return rc;
  1415. }
  1416. static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
  1417. {
  1418. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
  1419. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
  1420. int rc;
  1421. MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
  1422. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
  1423. outbuf, sizeof(outbuf), NULL);
  1424. if (rc)
  1425. return rc;
  1426. switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
  1427. case MC_CMD_NVRAM_TEST_PASS:
  1428. case MC_CMD_NVRAM_TEST_NOTSUPP:
  1429. return 0;
  1430. default:
  1431. return -EIO;
  1432. }
  1433. }
  1434. int efx_mcdi_nvram_test_all(struct efx_nic *efx)
  1435. {
  1436. u32 nvram_types;
  1437. unsigned int type;
  1438. int rc;
  1439. rc = efx_mcdi_nvram_types(efx, &nvram_types);
  1440. if (rc)
  1441. goto fail1;
  1442. type = 0;
  1443. while (nvram_types != 0) {
  1444. if (nvram_types & 1) {
  1445. rc = efx_mcdi_nvram_test(efx, type);
  1446. if (rc)
  1447. goto fail2;
  1448. }
  1449. type++;
  1450. nvram_types >>= 1;
  1451. }
  1452. return 0;
  1453. fail2:
  1454. netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
  1455. __func__, type);
  1456. fail1:
  1457. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1458. return rc;
  1459. }
  1460. /* Returns 1 if an assertion was read, 0 if no assertion had fired,
  1461. * negative on error.
  1462. */
  1463. static int efx_mcdi_read_assertion(struct efx_nic *efx)
  1464. {
  1465. MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
  1466. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
  1467. unsigned int flags, index;
  1468. const char *reason;
  1469. size_t outlen;
  1470. int retry;
  1471. int rc;
  1472. /* Attempt to read any stored assertion state before we reboot
  1473. * the mcfw out of the assertion handler. Retry twice, once
  1474. * because a boot-time assertion might cause this command to fail
  1475. * with EINTR. And once again because GET_ASSERTS can race with
  1476. * MC_CMD_REBOOT running on the other port. */
  1477. retry = 2;
  1478. do {
  1479. MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
  1480. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS,
  1481. inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
  1482. outbuf, sizeof(outbuf), &outlen);
  1483. if (rc == -EPERM)
  1484. return 0;
  1485. } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
  1486. if (rc) {
  1487. efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS,
  1488. MC_CMD_GET_ASSERTS_IN_LEN, outbuf,
  1489. outlen, rc);
  1490. return rc;
  1491. }
  1492. if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
  1493. return -EIO;
  1494. /* Print out any recorded assertion state */
  1495. flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
  1496. if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
  1497. return 0;
  1498. reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
  1499. ? "system-level assertion"
  1500. : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
  1501. ? "thread-level assertion"
  1502. : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
  1503. ? "watchdog reset"
  1504. : "unknown assertion";
  1505. netif_err(efx, hw, efx->net_dev,
  1506. "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
  1507. MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
  1508. MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
  1509. /* Print out the registers */
  1510. for (index = 0;
  1511. index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
  1512. index++)
  1513. netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
  1514. 1 + index,
  1515. MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
  1516. index));
  1517. return 1;
  1518. }
  1519. static int efx_mcdi_exit_assertion(struct efx_nic *efx)
  1520. {
  1521. MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
  1522. int rc;
  1523. /* If the MC is running debug firmware, it might now be
  1524. * waiting for a debugger to attach, but we just want it to
  1525. * reboot. We set a flag that makes the command a no-op if it
  1526. * has already done so.
  1527. * The MCDI will thus return either 0 or -EIO.
  1528. */
  1529. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  1530. MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
  1531. MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
  1532. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
  1533. NULL, 0, NULL);
  1534. if (rc == -EIO)
  1535. rc = 0;
  1536. if (rc)
  1537. efx_mcdi_display_error(efx, MC_CMD_REBOOT, MC_CMD_REBOOT_IN_LEN,
  1538. NULL, 0, rc);
  1539. return rc;
  1540. }
  1541. int efx_mcdi_handle_assertion(struct efx_nic *efx)
  1542. {
  1543. int rc;
  1544. rc = efx_mcdi_read_assertion(efx);
  1545. if (rc <= 0)
  1546. return rc;
  1547. return efx_mcdi_exit_assertion(efx);
  1548. }
  1549. void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
  1550. {
  1551. MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
  1552. int rc;
  1553. BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
  1554. BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
  1555. BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
  1556. BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
  1557. MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
  1558. rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
  1559. NULL, 0, NULL);
  1560. }
  1561. static int efx_mcdi_reset_func(struct efx_nic *efx)
  1562. {
  1563. MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN);
  1564. int rc;
  1565. BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0);
  1566. MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG,
  1567. ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1);
  1568. rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf),
  1569. NULL, 0, NULL);
  1570. return rc;
  1571. }
  1572. static int efx_mcdi_reset_mc(struct efx_nic *efx)
  1573. {
  1574. MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
  1575. int rc;
  1576. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  1577. MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
  1578. rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
  1579. NULL, 0, NULL);
  1580. /* White is black, and up is down */
  1581. if (rc == -EIO)
  1582. return 0;
  1583. if (rc == 0)
  1584. rc = -EIO;
  1585. return rc;
  1586. }
  1587. enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
  1588. {
  1589. return RESET_TYPE_RECOVER_OR_ALL;
  1590. }
  1591. int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
  1592. {
  1593. int rc;
  1594. /* If MCDI is down, we can't handle_assertion */
  1595. if (method == RESET_TYPE_MCDI_TIMEOUT) {
  1596. rc = pci_reset_function(efx->pci_dev);
  1597. if (rc)
  1598. return rc;
  1599. /* Re-enable polled MCDI completion */
  1600. if (efx->mcdi) {
  1601. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  1602. mcdi->mode = MCDI_MODE_POLL;
  1603. }
  1604. return 0;
  1605. }
  1606. /* Recover from a failed assertion pre-reset */
  1607. rc = efx_mcdi_handle_assertion(efx);
  1608. if (rc)
  1609. return rc;
  1610. if (method == RESET_TYPE_DATAPATH)
  1611. return 0;
  1612. else if (method == RESET_TYPE_WORLD)
  1613. return efx_mcdi_reset_mc(efx);
  1614. else
  1615. return efx_mcdi_reset_func(efx);
  1616. }
  1617. static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
  1618. const u8 *mac, int *id_out)
  1619. {
  1620. MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
  1621. MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
  1622. size_t outlen;
  1623. int rc;
  1624. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
  1625. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
  1626. MC_CMD_FILTER_MODE_SIMPLE);
  1627. ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac);
  1628. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
  1629. outbuf, sizeof(outbuf), &outlen);
  1630. if (rc)
  1631. goto fail;
  1632. if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
  1633. rc = -EIO;
  1634. goto fail;
  1635. }
  1636. *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
  1637. return 0;
  1638. fail:
  1639. *id_out = -1;
  1640. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1641. return rc;
  1642. }
  1643. int
  1644. efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
  1645. {
  1646. return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
  1647. }
  1648. int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
  1649. {
  1650. MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
  1651. size_t outlen;
  1652. int rc;
  1653. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
  1654. outbuf, sizeof(outbuf), &outlen);
  1655. if (rc)
  1656. goto fail;
  1657. if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
  1658. rc = -EIO;
  1659. goto fail;
  1660. }
  1661. *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
  1662. return 0;
  1663. fail:
  1664. *id_out = -1;
  1665. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1666. return rc;
  1667. }
  1668. int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
  1669. {
  1670. MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
  1671. int rc;
  1672. MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
  1673. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
  1674. NULL, 0, NULL);
  1675. return rc;
  1676. }
  1677. int efx_mcdi_flush_rxqs(struct efx_nic *efx)
  1678. {
  1679. struct efx_channel *channel;
  1680. struct efx_rx_queue *rx_queue;
  1681. MCDI_DECLARE_BUF(inbuf,
  1682. MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
  1683. int rc, count;
  1684. BUILD_BUG_ON(EFX_MAX_CHANNELS >
  1685. MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
  1686. count = 0;
  1687. efx_for_each_channel(channel, efx) {
  1688. efx_for_each_channel_rx_queue(rx_queue, channel) {
  1689. if (rx_queue->flush_pending) {
  1690. rx_queue->flush_pending = false;
  1691. atomic_dec(&efx->rxq_flush_pending);
  1692. MCDI_SET_ARRAY_DWORD(
  1693. inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
  1694. count, efx_rx_queue_index(rx_queue));
  1695. count++;
  1696. }
  1697. }
  1698. }
  1699. rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
  1700. MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
  1701. WARN_ON(rc < 0);
  1702. return rc;
  1703. }
  1704. int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
  1705. {
  1706. int rc;
  1707. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
  1708. return rc;
  1709. }
  1710. int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled,
  1711. unsigned int *flags)
  1712. {
  1713. MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
  1714. MCDI_DECLARE_BUF(outbuf, MC_CMD_WORKAROUND_EXT_OUT_LEN);
  1715. size_t outlen;
  1716. int rc;
  1717. BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
  1718. MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
  1719. MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
  1720. rc = efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
  1721. outbuf, sizeof(outbuf), &outlen);
  1722. if (rc)
  1723. return rc;
  1724. if (!flags)
  1725. return 0;
  1726. if (outlen >= MC_CMD_WORKAROUND_EXT_OUT_LEN)
  1727. *flags = MCDI_DWORD(outbuf, WORKAROUND_EXT_OUT_FLAGS);
  1728. else
  1729. *flags = 0;
  1730. return 0;
  1731. }
  1732. int efx_mcdi_get_workarounds(struct efx_nic *efx, unsigned int *impl_out,
  1733. unsigned int *enabled_out)
  1734. {
  1735. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_WORKAROUNDS_OUT_LEN);
  1736. size_t outlen;
  1737. int rc;
  1738. rc = efx_mcdi_rpc(efx, MC_CMD_GET_WORKAROUNDS, NULL, 0,
  1739. outbuf, sizeof(outbuf), &outlen);
  1740. if (rc)
  1741. goto fail;
  1742. if (outlen < MC_CMD_GET_WORKAROUNDS_OUT_LEN) {
  1743. rc = -EIO;
  1744. goto fail;
  1745. }
  1746. if (impl_out)
  1747. *impl_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_IMPLEMENTED);
  1748. if (enabled_out)
  1749. *enabled_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_ENABLED);
  1750. return 0;
  1751. fail:
  1752. /* Older firmware lacks GET_WORKAROUNDS and this isn't especially
  1753. * terrifying. The call site will have to deal with it though.
  1754. */
  1755. netif_printk(efx, hw, rc == -ENOSYS ? KERN_DEBUG : KERN_ERR,
  1756. efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1757. return rc;
  1758. }
  1759. #ifdef CONFIG_SFC_MTD
  1760. #define EFX_MCDI_NVRAM_LEN_MAX 128
  1761. static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
  1762. {
  1763. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN);
  1764. int rc;
  1765. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
  1766. BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
  1767. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
  1768. NULL, 0, NULL);
  1769. return rc;
  1770. }
  1771. static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
  1772. loff_t offset, u8 *buffer, size_t length)
  1773. {
  1774. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN);
  1775. MCDI_DECLARE_BUF(outbuf,
  1776. MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
  1777. size_t outlen;
  1778. int rc;
  1779. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
  1780. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
  1781. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
  1782. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
  1783. outbuf, sizeof(outbuf), &outlen);
  1784. if (rc)
  1785. return rc;
  1786. memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
  1787. return 0;
  1788. }
  1789. static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
  1790. loff_t offset, const u8 *buffer, size_t length)
  1791. {
  1792. MCDI_DECLARE_BUF(inbuf,
  1793. MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
  1794. int rc;
  1795. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
  1796. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
  1797. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
  1798. memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
  1799. BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
  1800. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
  1801. ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
  1802. NULL, 0, NULL);
  1803. return rc;
  1804. }
  1805. static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
  1806. loff_t offset, size_t length)
  1807. {
  1808. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
  1809. int rc;
  1810. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
  1811. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
  1812. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
  1813. BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
  1814. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
  1815. NULL, 0, NULL);
  1816. return rc;
  1817. }
  1818. static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
  1819. {
  1820. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN);
  1821. int rc;
  1822. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
  1823. BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
  1824. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
  1825. NULL, 0, NULL);
  1826. return rc;
  1827. }
  1828. int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
  1829. size_t len, size_t *retlen, u8 *buffer)
  1830. {
  1831. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1832. struct efx_nic *efx = mtd->priv;
  1833. loff_t offset = start;
  1834. loff_t end = min_t(loff_t, start + len, mtd->size);
  1835. size_t chunk;
  1836. int rc = 0;
  1837. while (offset < end) {
  1838. chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
  1839. rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
  1840. buffer, chunk);
  1841. if (rc)
  1842. goto out;
  1843. offset += chunk;
  1844. buffer += chunk;
  1845. }
  1846. out:
  1847. *retlen = offset - start;
  1848. return rc;
  1849. }
  1850. int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
  1851. {
  1852. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1853. struct efx_nic *efx = mtd->priv;
  1854. loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
  1855. loff_t end = min_t(loff_t, start + len, mtd->size);
  1856. size_t chunk = part->common.mtd.erasesize;
  1857. int rc = 0;
  1858. if (!part->updating) {
  1859. rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
  1860. if (rc)
  1861. goto out;
  1862. part->updating = true;
  1863. }
  1864. /* The MCDI interface can in fact do multiple erase blocks at once;
  1865. * but erasing may be slow, so we make multiple calls here to avoid
  1866. * tripping the MCDI RPC timeout. */
  1867. while (offset < end) {
  1868. rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
  1869. chunk);
  1870. if (rc)
  1871. goto out;
  1872. offset += chunk;
  1873. }
  1874. out:
  1875. return rc;
  1876. }
  1877. int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
  1878. size_t len, size_t *retlen, const u8 *buffer)
  1879. {
  1880. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1881. struct efx_nic *efx = mtd->priv;
  1882. loff_t offset = start;
  1883. loff_t end = min_t(loff_t, start + len, mtd->size);
  1884. size_t chunk;
  1885. int rc = 0;
  1886. if (!part->updating) {
  1887. rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
  1888. if (rc)
  1889. goto out;
  1890. part->updating = true;
  1891. }
  1892. while (offset < end) {
  1893. chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
  1894. rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
  1895. buffer, chunk);
  1896. if (rc)
  1897. goto out;
  1898. offset += chunk;
  1899. buffer += chunk;
  1900. }
  1901. out:
  1902. *retlen = offset - start;
  1903. return rc;
  1904. }
  1905. int efx_mcdi_mtd_sync(struct mtd_info *mtd)
  1906. {
  1907. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1908. struct efx_nic *efx = mtd->priv;
  1909. int rc = 0;
  1910. if (part->updating) {
  1911. part->updating = false;
  1912. rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
  1913. }
  1914. return rc;
  1915. }
  1916. void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
  1917. {
  1918. struct efx_mcdi_mtd_partition *mcdi_part =
  1919. container_of(part, struct efx_mcdi_mtd_partition, common);
  1920. struct efx_nic *efx = part->mtd.priv;
  1921. snprintf(part->name, sizeof(part->name), "%s %s:%02x",
  1922. efx->name, part->type_name, mcdi_part->fw_subtype);
  1923. }
  1924. #endif /* CONFIG_SFC_MTD */