qede_ethtool.c 41 KB

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  1. /* QLogic qede NIC Driver
  2. * Copyright (c) 2015 QLogic Corporation
  3. *
  4. * This software is available under the terms of the GNU General Public License
  5. * (GPL) Version 2, available from the file COPYING in the main directory of
  6. * this source tree.
  7. */
  8. #include <linux/version.h>
  9. #include <linux/types.h>
  10. #include <linux/netdevice.h>
  11. #include <linux/etherdevice.h>
  12. #include <linux/ethtool.h>
  13. #include <linux/string.h>
  14. #include <linux/pci.h>
  15. #include <linux/capability.h>
  16. #include "qede.h"
  17. #define QEDE_STAT_OFFSET(stat_name) (offsetof(struct qede_stats, stat_name))
  18. #define QEDE_STAT_STRING(stat_name) (#stat_name)
  19. #define _QEDE_STAT(stat_name, pf_only) \
  20. {QEDE_STAT_OFFSET(stat_name), QEDE_STAT_STRING(stat_name), pf_only}
  21. #define QEDE_PF_STAT(stat_name) _QEDE_STAT(stat_name, true)
  22. #define QEDE_STAT(stat_name) _QEDE_STAT(stat_name, false)
  23. #define QEDE_RQSTAT_OFFSET(stat_name) \
  24. (offsetof(struct qede_rx_queue, stat_name))
  25. #define QEDE_RQSTAT_STRING(stat_name) (#stat_name)
  26. #define QEDE_RQSTAT(stat_name) \
  27. {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)}
  28. #define QEDE_SELFTEST_POLL_COUNT 100
  29. static const struct {
  30. u64 offset;
  31. char string[ETH_GSTRING_LEN];
  32. } qede_rqstats_arr[] = {
  33. QEDE_RQSTAT(rcv_pkts),
  34. QEDE_RQSTAT(rx_hw_errors),
  35. QEDE_RQSTAT(rx_alloc_errors),
  36. QEDE_RQSTAT(rx_ip_frags),
  37. };
  38. #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr)
  39. #define QEDE_RQSTATS_DATA(dev, sindex, rqindex) \
  40. (*((u64 *)(((char *)(dev->fp_array[(rqindex)].rxq)) +\
  41. qede_rqstats_arr[(sindex)].offset)))
  42. #define QEDE_TQSTAT_OFFSET(stat_name) \
  43. (offsetof(struct qede_tx_queue, stat_name))
  44. #define QEDE_TQSTAT_STRING(stat_name) (#stat_name)
  45. #define QEDE_TQSTAT(stat_name) \
  46. {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)}
  47. #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr)
  48. static const struct {
  49. u64 offset;
  50. char string[ETH_GSTRING_LEN];
  51. } qede_tqstats_arr[] = {
  52. QEDE_TQSTAT(xmit_pkts),
  53. QEDE_TQSTAT(stopped_cnt),
  54. };
  55. #define QEDE_TQSTATS_DATA(dev, sindex, tssid, tcid) \
  56. (*((u64 *)(((void *)(&dev->fp_array[tssid].txqs[tcid])) +\
  57. qede_tqstats_arr[(sindex)].offset)))
  58. static const struct {
  59. u64 offset;
  60. char string[ETH_GSTRING_LEN];
  61. bool pf_only;
  62. } qede_stats_arr[] = {
  63. QEDE_STAT(rx_ucast_bytes),
  64. QEDE_STAT(rx_mcast_bytes),
  65. QEDE_STAT(rx_bcast_bytes),
  66. QEDE_STAT(rx_ucast_pkts),
  67. QEDE_STAT(rx_mcast_pkts),
  68. QEDE_STAT(rx_bcast_pkts),
  69. QEDE_STAT(tx_ucast_bytes),
  70. QEDE_STAT(tx_mcast_bytes),
  71. QEDE_STAT(tx_bcast_bytes),
  72. QEDE_STAT(tx_ucast_pkts),
  73. QEDE_STAT(tx_mcast_pkts),
  74. QEDE_STAT(tx_bcast_pkts),
  75. QEDE_PF_STAT(rx_64_byte_packets),
  76. QEDE_PF_STAT(rx_65_to_127_byte_packets),
  77. QEDE_PF_STAT(rx_128_to_255_byte_packets),
  78. QEDE_PF_STAT(rx_256_to_511_byte_packets),
  79. QEDE_PF_STAT(rx_512_to_1023_byte_packets),
  80. QEDE_PF_STAT(rx_1024_to_1518_byte_packets),
  81. QEDE_PF_STAT(rx_1519_to_1522_byte_packets),
  82. QEDE_PF_STAT(rx_1519_to_2047_byte_packets),
  83. QEDE_PF_STAT(rx_2048_to_4095_byte_packets),
  84. QEDE_PF_STAT(rx_4096_to_9216_byte_packets),
  85. QEDE_PF_STAT(rx_9217_to_16383_byte_packets),
  86. QEDE_PF_STAT(tx_64_byte_packets),
  87. QEDE_PF_STAT(tx_65_to_127_byte_packets),
  88. QEDE_PF_STAT(tx_128_to_255_byte_packets),
  89. QEDE_PF_STAT(tx_256_to_511_byte_packets),
  90. QEDE_PF_STAT(tx_512_to_1023_byte_packets),
  91. QEDE_PF_STAT(tx_1024_to_1518_byte_packets),
  92. QEDE_PF_STAT(tx_1519_to_2047_byte_packets),
  93. QEDE_PF_STAT(tx_2048_to_4095_byte_packets),
  94. QEDE_PF_STAT(tx_4096_to_9216_byte_packets),
  95. QEDE_PF_STAT(tx_9217_to_16383_byte_packets),
  96. QEDE_PF_STAT(rx_mac_crtl_frames),
  97. QEDE_PF_STAT(tx_mac_ctrl_frames),
  98. QEDE_PF_STAT(rx_pause_frames),
  99. QEDE_PF_STAT(tx_pause_frames),
  100. QEDE_PF_STAT(rx_pfc_frames),
  101. QEDE_PF_STAT(tx_pfc_frames),
  102. QEDE_PF_STAT(rx_crc_errors),
  103. QEDE_PF_STAT(rx_align_errors),
  104. QEDE_PF_STAT(rx_carrier_errors),
  105. QEDE_PF_STAT(rx_oversize_packets),
  106. QEDE_PF_STAT(rx_jabbers),
  107. QEDE_PF_STAT(rx_undersize_packets),
  108. QEDE_PF_STAT(rx_fragments),
  109. QEDE_PF_STAT(tx_lpi_entry_count),
  110. QEDE_PF_STAT(tx_total_collisions),
  111. QEDE_PF_STAT(brb_truncates),
  112. QEDE_PF_STAT(brb_discards),
  113. QEDE_STAT(no_buff_discards),
  114. QEDE_PF_STAT(mftag_filter_discards),
  115. QEDE_PF_STAT(mac_filter_discards),
  116. QEDE_STAT(tx_err_drop_pkts),
  117. QEDE_STAT(ttl0_discard),
  118. QEDE_STAT(packet_too_big_discard),
  119. QEDE_STAT(coalesced_pkts),
  120. QEDE_STAT(coalesced_events),
  121. QEDE_STAT(coalesced_aborts_num),
  122. QEDE_STAT(non_coalesced_pkts),
  123. QEDE_STAT(coalesced_bytes),
  124. };
  125. #define QEDE_STATS_DATA(dev, index) \
  126. (*((u64 *)(((char *)(dev)) + offsetof(struct qede_dev, stats) \
  127. + qede_stats_arr[(index)].offset)))
  128. #define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr)
  129. enum {
  130. QEDE_PRI_FLAG_CMT,
  131. QEDE_PRI_FLAG_LEN,
  132. };
  133. static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = {
  134. "Coupled-Function",
  135. };
  136. enum qede_ethtool_tests {
  137. QEDE_ETHTOOL_INT_LOOPBACK,
  138. QEDE_ETHTOOL_INTERRUPT_TEST,
  139. QEDE_ETHTOOL_MEMORY_TEST,
  140. QEDE_ETHTOOL_REGISTER_TEST,
  141. QEDE_ETHTOOL_CLOCK_TEST,
  142. QEDE_ETHTOOL_TEST_MAX
  143. };
  144. static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
  145. "Internal loopback (offline)",
  146. "Interrupt (online)\t",
  147. "Memory (online)\t\t",
  148. "Register (online)\t",
  149. "Clock (online)\t\t",
  150. };
  151. static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
  152. {
  153. int i, j, k;
  154. for (i = 0, k = 0; i < QEDE_QUEUE_CNT(edev); i++) {
  155. int tc;
  156. for (j = 0; j < QEDE_NUM_RQSTATS; j++)
  157. sprintf(buf + (k + j) * ETH_GSTRING_LEN,
  158. "%d: %s", i, qede_rqstats_arr[j].string);
  159. k += QEDE_NUM_RQSTATS;
  160. for (tc = 0; tc < edev->num_tc; tc++) {
  161. for (j = 0; j < QEDE_NUM_TQSTATS; j++)
  162. sprintf(buf + (k + j) * ETH_GSTRING_LEN,
  163. "%d.%d: %s", i, tc,
  164. qede_tqstats_arr[j].string);
  165. k += QEDE_NUM_TQSTATS;
  166. }
  167. }
  168. for (i = 0, j = 0; i < QEDE_NUM_STATS; i++) {
  169. if (IS_VF(edev) && qede_stats_arr[i].pf_only)
  170. continue;
  171. strcpy(buf + (k + j) * ETH_GSTRING_LEN,
  172. qede_stats_arr[i].string);
  173. j++;
  174. }
  175. }
  176. static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
  177. {
  178. struct qede_dev *edev = netdev_priv(dev);
  179. switch (stringset) {
  180. case ETH_SS_STATS:
  181. qede_get_strings_stats(edev, buf);
  182. break;
  183. case ETH_SS_PRIV_FLAGS:
  184. memcpy(buf, qede_private_arr,
  185. ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN);
  186. break;
  187. case ETH_SS_TEST:
  188. memcpy(buf, qede_tests_str_arr,
  189. ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX);
  190. break;
  191. default:
  192. DP_VERBOSE(edev, QED_MSG_DEBUG,
  193. "Unsupported stringset 0x%08x\n", stringset);
  194. }
  195. }
  196. static void qede_get_ethtool_stats(struct net_device *dev,
  197. struct ethtool_stats *stats, u64 *buf)
  198. {
  199. struct qede_dev *edev = netdev_priv(dev);
  200. int sidx, cnt = 0;
  201. int qid;
  202. qede_fill_by_demand_stats(edev);
  203. mutex_lock(&edev->qede_lock);
  204. for (qid = 0; qid < QEDE_QUEUE_CNT(edev); qid++) {
  205. int tc;
  206. if (edev->fp_array[qid].type & QEDE_FASTPATH_RX) {
  207. for (sidx = 0; sidx < QEDE_NUM_RQSTATS; sidx++)
  208. buf[cnt++] = QEDE_RQSTATS_DATA(edev, sidx, qid);
  209. }
  210. if (edev->fp_array[qid].type & QEDE_FASTPATH_TX) {
  211. for (tc = 0; tc < edev->num_tc; tc++) {
  212. for (sidx = 0; sidx < QEDE_NUM_TQSTATS; sidx++)
  213. buf[cnt++] = QEDE_TQSTATS_DATA(edev,
  214. sidx,
  215. qid, tc);
  216. }
  217. }
  218. }
  219. for (sidx = 0; sidx < QEDE_NUM_STATS; sidx++) {
  220. if (IS_VF(edev) && qede_stats_arr[sidx].pf_only)
  221. continue;
  222. buf[cnt++] = QEDE_STATS_DATA(edev, sidx);
  223. }
  224. mutex_unlock(&edev->qede_lock);
  225. }
  226. static int qede_get_sset_count(struct net_device *dev, int stringset)
  227. {
  228. struct qede_dev *edev = netdev_priv(dev);
  229. int num_stats = QEDE_NUM_STATS;
  230. switch (stringset) {
  231. case ETH_SS_STATS:
  232. if (IS_VF(edev)) {
  233. int i;
  234. for (i = 0; i < QEDE_NUM_STATS; i++)
  235. if (qede_stats_arr[i].pf_only)
  236. num_stats--;
  237. }
  238. return num_stats + QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS +
  239. QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS * edev->num_tc;
  240. case ETH_SS_PRIV_FLAGS:
  241. return QEDE_PRI_FLAG_LEN;
  242. case ETH_SS_TEST:
  243. if (!IS_VF(edev))
  244. return QEDE_ETHTOOL_TEST_MAX;
  245. else
  246. return 0;
  247. default:
  248. DP_VERBOSE(edev, QED_MSG_DEBUG,
  249. "Unsupported stringset 0x%08x\n", stringset);
  250. return -EINVAL;
  251. }
  252. }
  253. static u32 qede_get_priv_flags(struct net_device *dev)
  254. {
  255. struct qede_dev *edev = netdev_priv(dev);
  256. return (!!(edev->dev_info.common.num_hwfns > 1)) << QEDE_PRI_FLAG_CMT;
  257. }
  258. struct qede_link_mode_mapping {
  259. u32 qed_link_mode;
  260. u32 ethtool_link_mode;
  261. };
  262. static const struct qede_link_mode_mapping qed_lm_map[] = {
  263. {QED_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT},
  264. {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT},
  265. {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT},
  266. {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT},
  267. {QED_LM_1000baseT_Half_BIT, ETHTOOL_LINK_MODE_1000baseT_Half_BIT},
  268. {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT},
  269. {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
  270. {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT},
  271. {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT},
  272. {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT},
  273. {QED_LM_100000baseKR4_Full_BIT,
  274. ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT},
  275. };
  276. #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \
  277. { \
  278. int i; \
  279. \
  280. for (i = 0; i < QED_LM_COUNT; i++) { \
  281. if ((caps) & (qed_lm_map[i].qed_link_mode)) \
  282. __set_bit(qed_lm_map[i].ethtool_link_mode,\
  283. lk_ksettings->link_modes.name); \
  284. } \
  285. }
  286. #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \
  287. { \
  288. int i; \
  289. \
  290. for (i = 0; i < QED_LM_COUNT; i++) { \
  291. if (test_bit(qed_lm_map[i].ethtool_link_mode, \
  292. lk_ksettings->link_modes.name)) \
  293. caps |= qed_lm_map[i].qed_link_mode; \
  294. } \
  295. }
  296. static int qede_get_link_ksettings(struct net_device *dev,
  297. struct ethtool_link_ksettings *cmd)
  298. {
  299. struct ethtool_link_settings *base = &cmd->base;
  300. struct qede_dev *edev = netdev_priv(dev);
  301. struct qed_link_output current_link;
  302. memset(&current_link, 0, sizeof(current_link));
  303. edev->ops->common->get_link(edev->cdev, &current_link);
  304. ethtool_link_ksettings_zero_link_mode(cmd, supported);
  305. QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported)
  306. ethtool_link_ksettings_zero_link_mode(cmd, advertising);
  307. QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising)
  308. ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
  309. QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising)
  310. if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
  311. base->speed = current_link.speed;
  312. base->duplex = current_link.duplex;
  313. } else {
  314. base->speed = SPEED_UNKNOWN;
  315. base->duplex = DUPLEX_UNKNOWN;
  316. }
  317. base->port = current_link.port;
  318. base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
  319. AUTONEG_DISABLE;
  320. return 0;
  321. }
  322. static int qede_set_link_ksettings(struct net_device *dev,
  323. const struct ethtool_link_ksettings *cmd)
  324. {
  325. const struct ethtool_link_settings *base = &cmd->base;
  326. struct qede_dev *edev = netdev_priv(dev);
  327. struct qed_link_output current_link;
  328. struct qed_link_params params;
  329. if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
  330. DP_INFO(edev, "Link settings are not allowed to be changed\n");
  331. return -EOPNOTSUPP;
  332. }
  333. memset(&current_link, 0, sizeof(current_link));
  334. memset(&params, 0, sizeof(params));
  335. edev->ops->common->get_link(edev->cdev, &current_link);
  336. params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
  337. params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
  338. if (base->autoneg == AUTONEG_ENABLE) {
  339. params.autoneg = true;
  340. params.forced_speed = 0;
  341. QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising)
  342. } else { /* forced speed */
  343. params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
  344. params.autoneg = false;
  345. params.forced_speed = base->speed;
  346. switch (base->speed) {
  347. case SPEED_10000:
  348. if (!(current_link.supported_caps &
  349. QED_LM_10000baseKR_Full_BIT)) {
  350. DP_INFO(edev, "10G speed not supported\n");
  351. return -EINVAL;
  352. }
  353. params.adv_speeds = QED_LM_10000baseKR_Full_BIT;
  354. break;
  355. case SPEED_25000:
  356. if (!(current_link.supported_caps &
  357. QED_LM_25000baseKR_Full_BIT)) {
  358. DP_INFO(edev, "25G speed not supported\n");
  359. return -EINVAL;
  360. }
  361. params.adv_speeds = QED_LM_25000baseKR_Full_BIT;
  362. break;
  363. case SPEED_40000:
  364. if (!(current_link.supported_caps &
  365. QED_LM_40000baseLR4_Full_BIT)) {
  366. DP_INFO(edev, "40G speed not supported\n");
  367. return -EINVAL;
  368. }
  369. params.adv_speeds = QED_LM_40000baseLR4_Full_BIT;
  370. break;
  371. case SPEED_50000:
  372. if (!(current_link.supported_caps &
  373. QED_LM_50000baseKR2_Full_BIT)) {
  374. DP_INFO(edev, "50G speed not supported\n");
  375. return -EINVAL;
  376. }
  377. params.adv_speeds = QED_LM_50000baseKR2_Full_BIT;
  378. break;
  379. case SPEED_100000:
  380. if (!(current_link.supported_caps &
  381. QED_LM_100000baseKR4_Full_BIT)) {
  382. DP_INFO(edev, "100G speed not supported\n");
  383. return -EINVAL;
  384. }
  385. params.adv_speeds = QED_LM_100000baseKR4_Full_BIT;
  386. break;
  387. default:
  388. DP_INFO(edev, "Unsupported speed %u\n", base->speed);
  389. return -EINVAL;
  390. }
  391. }
  392. params.link_up = true;
  393. edev->ops->common->set_link(edev->cdev, &params);
  394. return 0;
  395. }
  396. static void qede_get_drvinfo(struct net_device *ndev,
  397. struct ethtool_drvinfo *info)
  398. {
  399. char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN];
  400. struct qede_dev *edev = netdev_priv(ndev);
  401. strlcpy(info->driver, "qede", sizeof(info->driver));
  402. strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
  403. snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
  404. edev->dev_info.common.fw_major,
  405. edev->dev_info.common.fw_minor,
  406. edev->dev_info.common.fw_rev,
  407. edev->dev_info.common.fw_eng);
  408. snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
  409. (edev->dev_info.common.mfw_rev >> 24) & 0xFF,
  410. (edev->dev_info.common.mfw_rev >> 16) & 0xFF,
  411. (edev->dev_info.common.mfw_rev >> 8) & 0xFF,
  412. edev->dev_info.common.mfw_rev & 0xFF);
  413. if ((strlen(storm) + strlen(mfw) + strlen("mfw storm ")) <
  414. sizeof(info->fw_version)) {
  415. snprintf(info->fw_version, sizeof(info->fw_version),
  416. "mfw %s storm %s", mfw, storm);
  417. } else {
  418. snprintf(info->fw_version, sizeof(info->fw_version),
  419. "%s %s", mfw, storm);
  420. }
  421. strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info));
  422. }
  423. static u32 qede_get_msglevel(struct net_device *ndev)
  424. {
  425. struct qede_dev *edev = netdev_priv(ndev);
  426. return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module;
  427. }
  428. static void qede_set_msglevel(struct net_device *ndev, u32 level)
  429. {
  430. struct qede_dev *edev = netdev_priv(ndev);
  431. u32 dp_module = 0;
  432. u8 dp_level = 0;
  433. qede_config_debug(level, &dp_module, &dp_level);
  434. edev->dp_level = dp_level;
  435. edev->dp_module = dp_module;
  436. edev->ops->common->update_msglvl(edev->cdev,
  437. dp_module, dp_level);
  438. }
  439. static int qede_nway_reset(struct net_device *dev)
  440. {
  441. struct qede_dev *edev = netdev_priv(dev);
  442. struct qed_link_output current_link;
  443. struct qed_link_params link_params;
  444. if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
  445. DP_INFO(edev, "Link settings are not allowed to be changed\n");
  446. return -EOPNOTSUPP;
  447. }
  448. if (!netif_running(dev))
  449. return 0;
  450. memset(&current_link, 0, sizeof(current_link));
  451. edev->ops->common->get_link(edev->cdev, &current_link);
  452. if (!current_link.link_up)
  453. return 0;
  454. /* Toggle the link */
  455. memset(&link_params, 0, sizeof(link_params));
  456. link_params.link_up = false;
  457. edev->ops->common->set_link(edev->cdev, &link_params);
  458. link_params.link_up = true;
  459. edev->ops->common->set_link(edev->cdev, &link_params);
  460. return 0;
  461. }
  462. static u32 qede_get_link(struct net_device *dev)
  463. {
  464. struct qede_dev *edev = netdev_priv(dev);
  465. struct qed_link_output current_link;
  466. memset(&current_link, 0, sizeof(current_link));
  467. edev->ops->common->get_link(edev->cdev, &current_link);
  468. return current_link.link_up;
  469. }
  470. static int qede_get_coalesce(struct net_device *dev,
  471. struct ethtool_coalesce *coal)
  472. {
  473. struct qede_dev *edev = netdev_priv(dev);
  474. u16 rxc, txc;
  475. memset(coal, 0, sizeof(struct ethtool_coalesce));
  476. edev->ops->common->get_coalesce(edev->cdev, &rxc, &txc);
  477. coal->rx_coalesce_usecs = rxc;
  478. coal->tx_coalesce_usecs = txc;
  479. return 0;
  480. }
  481. static int qede_set_coalesce(struct net_device *dev,
  482. struct ethtool_coalesce *coal)
  483. {
  484. struct qede_dev *edev = netdev_priv(dev);
  485. int i, rc = 0;
  486. u16 rxc, txc;
  487. u8 sb_id;
  488. if (!netif_running(dev)) {
  489. DP_INFO(edev, "Interface is down\n");
  490. return -EINVAL;
  491. }
  492. if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
  493. coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
  494. DP_INFO(edev,
  495. "Can't support requested %s coalesce value [max supported value %d]\n",
  496. coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx"
  497. : "tx",
  498. QED_COALESCE_MAX);
  499. return -EINVAL;
  500. }
  501. rxc = (u16)coal->rx_coalesce_usecs;
  502. txc = (u16)coal->tx_coalesce_usecs;
  503. for_each_queue(i) {
  504. sb_id = edev->fp_array[i].sb_info->igu_sb_id;
  505. rc = edev->ops->common->set_coalesce(edev->cdev, rxc, txc,
  506. (u8)i, sb_id);
  507. if (rc) {
  508. DP_INFO(edev, "Set coalesce error, rc = %d\n", rc);
  509. return rc;
  510. }
  511. }
  512. return rc;
  513. }
  514. static void qede_get_ringparam(struct net_device *dev,
  515. struct ethtool_ringparam *ering)
  516. {
  517. struct qede_dev *edev = netdev_priv(dev);
  518. ering->rx_max_pending = NUM_RX_BDS_MAX;
  519. ering->rx_pending = edev->q_num_rx_buffers;
  520. ering->tx_max_pending = NUM_TX_BDS_MAX;
  521. ering->tx_pending = edev->q_num_tx_buffers;
  522. }
  523. static int qede_set_ringparam(struct net_device *dev,
  524. struct ethtool_ringparam *ering)
  525. {
  526. struct qede_dev *edev = netdev_priv(dev);
  527. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  528. "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n",
  529. ering->rx_pending, ering->tx_pending);
  530. /* Validate legality of configuration */
  531. if (ering->rx_pending > NUM_RX_BDS_MAX ||
  532. ering->rx_pending < NUM_RX_BDS_MIN ||
  533. ering->tx_pending > NUM_TX_BDS_MAX ||
  534. ering->tx_pending < NUM_TX_BDS_MIN) {
  535. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  536. "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n",
  537. NUM_RX_BDS_MIN, NUM_RX_BDS_MAX,
  538. NUM_TX_BDS_MIN, NUM_TX_BDS_MAX);
  539. return -EINVAL;
  540. }
  541. /* Change ring size and re-load */
  542. edev->q_num_rx_buffers = ering->rx_pending;
  543. edev->q_num_tx_buffers = ering->tx_pending;
  544. if (netif_running(edev->ndev))
  545. qede_reload(edev, NULL, NULL);
  546. return 0;
  547. }
  548. static void qede_get_pauseparam(struct net_device *dev,
  549. struct ethtool_pauseparam *epause)
  550. {
  551. struct qede_dev *edev = netdev_priv(dev);
  552. struct qed_link_output current_link;
  553. memset(&current_link, 0, sizeof(current_link));
  554. edev->ops->common->get_link(edev->cdev, &current_link);
  555. if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
  556. epause->autoneg = true;
  557. if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
  558. epause->rx_pause = true;
  559. if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
  560. epause->tx_pause = true;
  561. DP_VERBOSE(edev, QED_MSG_DEBUG,
  562. "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n",
  563. epause->cmd, epause->autoneg, epause->rx_pause,
  564. epause->tx_pause);
  565. }
  566. static int qede_set_pauseparam(struct net_device *dev,
  567. struct ethtool_pauseparam *epause)
  568. {
  569. struct qede_dev *edev = netdev_priv(dev);
  570. struct qed_link_params params;
  571. struct qed_link_output current_link;
  572. if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
  573. DP_INFO(edev,
  574. "Pause settings are not allowed to be changed\n");
  575. return -EOPNOTSUPP;
  576. }
  577. memset(&current_link, 0, sizeof(current_link));
  578. edev->ops->common->get_link(edev->cdev, &current_link);
  579. memset(&params, 0, sizeof(params));
  580. params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
  581. if (epause->autoneg) {
  582. if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
  583. DP_INFO(edev, "autoneg not supported\n");
  584. return -EINVAL;
  585. }
  586. params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
  587. }
  588. if (epause->rx_pause)
  589. params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
  590. if (epause->tx_pause)
  591. params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
  592. params.link_up = true;
  593. edev->ops->common->set_link(edev->cdev, &params);
  594. return 0;
  595. }
  596. static void qede_get_regs(struct net_device *ndev,
  597. struct ethtool_regs *regs, void *buffer)
  598. {
  599. struct qede_dev *edev = netdev_priv(ndev);
  600. regs->version = 0;
  601. memset(buffer, 0, regs->len);
  602. if (edev->ops && edev->ops->common)
  603. edev->ops->common->dbg_all_data(edev->cdev, buffer);
  604. }
  605. static int qede_get_regs_len(struct net_device *ndev)
  606. {
  607. struct qede_dev *edev = netdev_priv(ndev);
  608. if (edev->ops && edev->ops->common)
  609. return edev->ops->common->dbg_all_data_size(edev->cdev);
  610. else
  611. return -EINVAL;
  612. }
  613. static void qede_update_mtu(struct qede_dev *edev, union qede_reload_args *args)
  614. {
  615. edev->ndev->mtu = args->mtu;
  616. }
  617. /* Netdevice NDOs */
  618. #define ETH_MAX_JUMBO_PACKET_SIZE 9600
  619. #define ETH_MIN_PACKET_SIZE 60
  620. int qede_change_mtu(struct net_device *ndev, int new_mtu)
  621. {
  622. struct qede_dev *edev = netdev_priv(ndev);
  623. union qede_reload_args args;
  624. if ((new_mtu > ETH_MAX_JUMBO_PACKET_SIZE) ||
  625. ((new_mtu + ETH_HLEN) < ETH_MIN_PACKET_SIZE)) {
  626. DP_ERR(edev, "Can't support requested MTU size\n");
  627. return -EINVAL;
  628. }
  629. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  630. "Configuring MTU size of %d\n", new_mtu);
  631. /* Set the mtu field and re-start the interface if needed*/
  632. args.mtu = new_mtu;
  633. if (netif_running(edev->ndev))
  634. qede_reload(edev, &qede_update_mtu, &args);
  635. qede_update_mtu(edev, &args);
  636. return 0;
  637. }
  638. static void qede_get_channels(struct net_device *dev,
  639. struct ethtool_channels *channels)
  640. {
  641. struct qede_dev *edev = netdev_priv(dev);
  642. channels->max_combined = QEDE_MAX_RSS_CNT(edev);
  643. channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx -
  644. edev->fp_num_rx;
  645. channels->tx_count = edev->fp_num_tx;
  646. channels->rx_count = edev->fp_num_rx;
  647. }
  648. static int qede_set_channels(struct net_device *dev,
  649. struct ethtool_channels *channels)
  650. {
  651. struct qede_dev *edev = netdev_priv(dev);
  652. u32 count;
  653. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  654. "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n",
  655. channels->rx_count, channels->tx_count,
  656. channels->other_count, channels->combined_count);
  657. count = channels->rx_count + channels->tx_count +
  658. channels->combined_count;
  659. /* We don't support `other' channels */
  660. if (channels->other_count) {
  661. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  662. "command parameters not supported\n");
  663. return -EINVAL;
  664. }
  665. if (!(channels->combined_count || (channels->rx_count &&
  666. channels->tx_count))) {
  667. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  668. "need to request at least one transmit and one receive channel\n");
  669. return -EINVAL;
  670. }
  671. if (count > QEDE_MAX_RSS_CNT(edev)) {
  672. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  673. "requested channels = %d max supported channels = %d\n",
  674. count, QEDE_MAX_RSS_CNT(edev));
  675. return -EINVAL;
  676. }
  677. /* Check if there was a change in the active parameters */
  678. if ((count == QEDE_QUEUE_CNT(edev)) &&
  679. (channels->tx_count == edev->fp_num_tx) &&
  680. (channels->rx_count == edev->fp_num_rx)) {
  681. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  682. "No change in active parameters\n");
  683. return 0;
  684. }
  685. /* We need the number of queues to be divisible between the hwfns */
  686. if ((count % edev->dev_info.common.num_hwfns) ||
  687. (channels->tx_count % edev->dev_info.common.num_hwfns) ||
  688. (channels->rx_count % edev->dev_info.common.num_hwfns)) {
  689. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  690. "Number of channels must be divisible by %04x\n",
  691. edev->dev_info.common.num_hwfns);
  692. return -EINVAL;
  693. }
  694. /* Set number of queues and reload if necessary */
  695. edev->req_queues = count;
  696. edev->req_num_tx = channels->tx_count;
  697. edev->req_num_rx = channels->rx_count;
  698. if (netif_running(dev))
  699. qede_reload(edev, NULL, NULL);
  700. return 0;
  701. }
  702. static int qede_set_phys_id(struct net_device *dev,
  703. enum ethtool_phys_id_state state)
  704. {
  705. struct qede_dev *edev = netdev_priv(dev);
  706. u8 led_state = 0;
  707. switch (state) {
  708. case ETHTOOL_ID_ACTIVE:
  709. return 1; /* cycle on/off once per second */
  710. case ETHTOOL_ID_ON:
  711. led_state = QED_LED_MODE_ON;
  712. break;
  713. case ETHTOOL_ID_OFF:
  714. led_state = QED_LED_MODE_OFF;
  715. break;
  716. case ETHTOOL_ID_INACTIVE:
  717. led_state = QED_LED_MODE_RESTORE;
  718. break;
  719. }
  720. edev->ops->common->set_led(edev->cdev, led_state);
  721. return 0;
  722. }
  723. static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
  724. {
  725. info->data = RXH_IP_SRC | RXH_IP_DST;
  726. switch (info->flow_type) {
  727. case TCP_V4_FLOW:
  728. case TCP_V6_FLOW:
  729. info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
  730. break;
  731. case UDP_V4_FLOW:
  732. if (edev->rss_params.rss_caps & QED_RSS_IPV4_UDP)
  733. info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
  734. break;
  735. case UDP_V6_FLOW:
  736. if (edev->rss_params.rss_caps & QED_RSS_IPV6_UDP)
  737. info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
  738. break;
  739. case IPV4_FLOW:
  740. case IPV6_FLOW:
  741. break;
  742. default:
  743. info->data = 0;
  744. break;
  745. }
  746. return 0;
  747. }
  748. static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
  749. u32 *rules __always_unused)
  750. {
  751. struct qede_dev *edev = netdev_priv(dev);
  752. switch (info->cmd) {
  753. case ETHTOOL_GRXRINGS:
  754. info->data = QEDE_RSS_COUNT(edev);
  755. return 0;
  756. case ETHTOOL_GRXFH:
  757. return qede_get_rss_flags(edev, info);
  758. default:
  759. DP_ERR(edev, "Command parameters not supported\n");
  760. return -EOPNOTSUPP;
  761. }
  762. }
  763. static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
  764. {
  765. struct qed_update_vport_params vport_update_params;
  766. u8 set_caps = 0, clr_caps = 0;
  767. DP_VERBOSE(edev, QED_MSG_DEBUG,
  768. "Set rss flags command parameters: flow type = %d, data = %llu\n",
  769. info->flow_type, info->data);
  770. switch (info->flow_type) {
  771. case TCP_V4_FLOW:
  772. case TCP_V6_FLOW:
  773. /* For TCP only 4-tuple hash is supported */
  774. if (info->data ^ (RXH_IP_SRC | RXH_IP_DST |
  775. RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
  776. DP_INFO(edev, "Command parameters not supported\n");
  777. return -EINVAL;
  778. }
  779. return 0;
  780. case UDP_V4_FLOW:
  781. /* For UDP either 2-tuple hash or 4-tuple hash is supported */
  782. if (info->data == (RXH_IP_SRC | RXH_IP_DST |
  783. RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
  784. set_caps = QED_RSS_IPV4_UDP;
  785. DP_VERBOSE(edev, QED_MSG_DEBUG,
  786. "UDP 4-tuple enabled\n");
  787. } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
  788. clr_caps = QED_RSS_IPV4_UDP;
  789. DP_VERBOSE(edev, QED_MSG_DEBUG,
  790. "UDP 4-tuple disabled\n");
  791. } else {
  792. return -EINVAL;
  793. }
  794. break;
  795. case UDP_V6_FLOW:
  796. /* For UDP either 2-tuple hash or 4-tuple hash is supported */
  797. if (info->data == (RXH_IP_SRC | RXH_IP_DST |
  798. RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
  799. set_caps = QED_RSS_IPV6_UDP;
  800. DP_VERBOSE(edev, QED_MSG_DEBUG,
  801. "UDP 4-tuple enabled\n");
  802. } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
  803. clr_caps = QED_RSS_IPV6_UDP;
  804. DP_VERBOSE(edev, QED_MSG_DEBUG,
  805. "UDP 4-tuple disabled\n");
  806. } else {
  807. return -EINVAL;
  808. }
  809. break;
  810. case IPV4_FLOW:
  811. case IPV6_FLOW:
  812. /* For IP only 2-tuple hash is supported */
  813. if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) {
  814. DP_INFO(edev, "Command parameters not supported\n");
  815. return -EINVAL;
  816. }
  817. return 0;
  818. case SCTP_V4_FLOW:
  819. case AH_ESP_V4_FLOW:
  820. case AH_V4_FLOW:
  821. case ESP_V4_FLOW:
  822. case SCTP_V6_FLOW:
  823. case AH_ESP_V6_FLOW:
  824. case AH_V6_FLOW:
  825. case ESP_V6_FLOW:
  826. case IP_USER_FLOW:
  827. case ETHER_FLOW:
  828. /* RSS is not supported for these protocols */
  829. if (info->data) {
  830. DP_INFO(edev, "Command parameters not supported\n");
  831. return -EINVAL;
  832. }
  833. return 0;
  834. default:
  835. return -EINVAL;
  836. }
  837. /* No action is needed if there is no change in the rss capability */
  838. if (edev->rss_params.rss_caps == ((edev->rss_params.rss_caps &
  839. ~clr_caps) | set_caps))
  840. return 0;
  841. /* Update internal configuration */
  842. edev->rss_params.rss_caps = (edev->rss_params.rss_caps & ~clr_caps) |
  843. set_caps;
  844. edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
  845. /* Re-configure if possible */
  846. if (netif_running(edev->ndev)) {
  847. memset(&vport_update_params, 0, sizeof(vport_update_params));
  848. vport_update_params.update_rss_flg = 1;
  849. vport_update_params.vport_id = 0;
  850. memcpy(&vport_update_params.rss_params, &edev->rss_params,
  851. sizeof(vport_update_params.rss_params));
  852. return edev->ops->vport_update(edev->cdev,
  853. &vport_update_params);
  854. }
  855. return 0;
  856. }
  857. static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
  858. {
  859. struct qede_dev *edev = netdev_priv(dev);
  860. switch (info->cmd) {
  861. case ETHTOOL_SRXFH:
  862. return qede_set_rss_flags(edev, info);
  863. default:
  864. DP_INFO(edev, "Command parameters not supported\n");
  865. return -EOPNOTSUPP;
  866. }
  867. }
  868. static u32 qede_get_rxfh_indir_size(struct net_device *dev)
  869. {
  870. return QED_RSS_IND_TABLE_SIZE;
  871. }
  872. static u32 qede_get_rxfh_key_size(struct net_device *dev)
  873. {
  874. struct qede_dev *edev = netdev_priv(dev);
  875. return sizeof(edev->rss_params.rss_key);
  876. }
  877. static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc)
  878. {
  879. struct qede_dev *edev = netdev_priv(dev);
  880. int i;
  881. if (hfunc)
  882. *hfunc = ETH_RSS_HASH_TOP;
  883. if (!indir)
  884. return 0;
  885. for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
  886. indir[i] = edev->rss_params.rss_ind_table[i];
  887. if (key)
  888. memcpy(key, edev->rss_params.rss_key,
  889. qede_get_rxfh_key_size(dev));
  890. return 0;
  891. }
  892. static int qede_set_rxfh(struct net_device *dev, const u32 *indir,
  893. const u8 *key, const u8 hfunc)
  894. {
  895. struct qed_update_vport_params vport_update_params;
  896. struct qede_dev *edev = netdev_priv(dev);
  897. int i;
  898. if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
  899. return -EOPNOTSUPP;
  900. if (!indir && !key)
  901. return 0;
  902. if (indir) {
  903. for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
  904. edev->rss_params.rss_ind_table[i] = indir[i];
  905. edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
  906. }
  907. if (key) {
  908. memcpy(&edev->rss_params.rss_key, key,
  909. qede_get_rxfh_key_size(dev));
  910. edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
  911. }
  912. if (netif_running(edev->ndev)) {
  913. memset(&vport_update_params, 0, sizeof(vport_update_params));
  914. vport_update_params.update_rss_flg = 1;
  915. vport_update_params.vport_id = 0;
  916. memcpy(&vport_update_params.rss_params, &edev->rss_params,
  917. sizeof(vport_update_params.rss_params));
  918. return edev->ops->vport_update(edev->cdev,
  919. &vport_update_params);
  920. }
  921. return 0;
  922. }
  923. /* This function enables the interrupt generation and the NAPI on the device */
  924. static void qede_netif_start(struct qede_dev *edev)
  925. {
  926. int i;
  927. if (!netif_running(edev->ndev))
  928. return;
  929. for_each_queue(i) {
  930. /* Update and reenable interrupts */
  931. qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1);
  932. napi_enable(&edev->fp_array[i].napi);
  933. }
  934. }
  935. /* This function disables the NAPI and the interrupt generation on the device */
  936. static void qede_netif_stop(struct qede_dev *edev)
  937. {
  938. int i;
  939. for_each_queue(i) {
  940. napi_disable(&edev->fp_array[i].napi);
  941. /* Disable interrupts */
  942. qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0);
  943. }
  944. }
  945. static int qede_selftest_transmit_traffic(struct qede_dev *edev,
  946. struct sk_buff *skb)
  947. {
  948. struct qede_tx_queue *txq = NULL;
  949. struct eth_tx_1st_bd *first_bd;
  950. dma_addr_t mapping;
  951. int i, idx, val;
  952. for_each_queue(i) {
  953. if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
  954. txq = edev->fp_array[i].txqs;
  955. break;
  956. }
  957. }
  958. if (!txq) {
  959. DP_NOTICE(edev, "Tx path is not available\n");
  960. return -1;
  961. }
  962. /* Fill the entry in the SW ring and the BDs in the FW ring */
  963. idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
  964. txq->sw_tx_ring[idx].skb = skb;
  965. first_bd = qed_chain_produce(&txq->tx_pbl);
  966. memset(first_bd, 0, sizeof(*first_bd));
  967. val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
  968. first_bd->data.bd_flags.bitfields = val;
  969. val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK;
  970. first_bd->data.bitfields |= (val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT);
  971. /* Map skb linear data for DMA and set in the first BD */
  972. mapping = dma_map_single(&edev->pdev->dev, skb->data,
  973. skb_headlen(skb), DMA_TO_DEVICE);
  974. if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
  975. DP_NOTICE(edev, "SKB mapping failed\n");
  976. return -ENOMEM;
  977. }
  978. BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
  979. /* update the first BD with the actual num BDs */
  980. first_bd->data.nbds = 1;
  981. txq->sw_tx_prod++;
  982. /* 'next page' entries are counted in the producer value */
  983. val = cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
  984. txq->tx_db.data.bd_prod = val;
  985. /* wmb makes sure that the BDs data is updated before updating the
  986. * producer, otherwise FW may read old data from the BDs.
  987. */
  988. wmb();
  989. barrier();
  990. writel(txq->tx_db.raw, txq->doorbell_addr);
  991. /* mmiowb is needed to synchronize doorbell writes from more than one
  992. * processor. It guarantees that the write arrives to the device before
  993. * the queue lock is released and another start_xmit is called (possibly
  994. * on another CPU). Without this barrier, the next doorbell can bypass
  995. * this doorbell. This is applicable to IA64/Altix systems.
  996. */
  997. mmiowb();
  998. for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
  999. if (qede_txq_has_work(txq))
  1000. break;
  1001. usleep_range(100, 200);
  1002. }
  1003. if (!qede_txq_has_work(txq)) {
  1004. DP_NOTICE(edev, "Tx completion didn't happen\n");
  1005. return -1;
  1006. }
  1007. first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
  1008. dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
  1009. BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE);
  1010. txq->sw_tx_cons++;
  1011. txq->sw_tx_ring[idx].skb = NULL;
  1012. return 0;
  1013. }
  1014. static int qede_selftest_receive_traffic(struct qede_dev *edev)
  1015. {
  1016. u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len;
  1017. struct eth_fast_path_rx_reg_cqe *fp_cqe;
  1018. struct qede_rx_queue *rxq = NULL;
  1019. struct sw_rx_data *sw_rx_data;
  1020. union eth_rx_cqe *cqe;
  1021. u8 *data_ptr;
  1022. int i;
  1023. for_each_queue(i) {
  1024. if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
  1025. rxq = edev->fp_array[i].rxq;
  1026. break;
  1027. }
  1028. }
  1029. if (!rxq) {
  1030. DP_NOTICE(edev, "Rx path is not available\n");
  1031. return -1;
  1032. }
  1033. /* The packet is expected to receive on rx-queue 0 even though RSS is
  1034. * enabled. This is because the queue 0 is configured as the default
  1035. * queue and that the loopback traffic is not IP.
  1036. */
  1037. for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
  1038. if (qede_has_rx_work(rxq))
  1039. break;
  1040. usleep_range(100, 200);
  1041. }
  1042. if (!qede_has_rx_work(rxq)) {
  1043. DP_NOTICE(edev, "Failed to receive the traffic\n");
  1044. return -1;
  1045. }
  1046. hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
  1047. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  1048. /* Memory barrier to prevent the CPU from doing speculative reads of CQE
  1049. * / BD before reading hw_comp_cons. If the CQE is read before it is
  1050. * written by FW, then FW writes CQE and SB, and then the CPU reads the
  1051. * hw_comp_cons, it will use an old CQE.
  1052. */
  1053. rmb();
  1054. /* Get the CQE from the completion ring */
  1055. cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
  1056. /* Get the data from the SW ring */
  1057. sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
  1058. sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
  1059. fp_cqe = &cqe->fast_path_regular;
  1060. len = le16_to_cpu(fp_cqe->len_on_first_bd);
  1061. data_ptr = (u8 *)(page_address(sw_rx_data->data) +
  1062. fp_cqe->placement_offset + sw_rx_data->page_offset);
  1063. for (i = ETH_HLEN; i < len; i++)
  1064. if (data_ptr[i] != (unsigned char)(i & 0xff)) {
  1065. DP_NOTICE(edev, "Loopback test failed\n");
  1066. qede_recycle_rx_bd_ring(rxq, edev, 1);
  1067. return -1;
  1068. }
  1069. qede_recycle_rx_bd_ring(rxq, edev, 1);
  1070. return 0;
  1071. }
  1072. static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode)
  1073. {
  1074. struct qed_link_params link_params;
  1075. struct sk_buff *skb = NULL;
  1076. int rc = 0, i;
  1077. u32 pkt_size;
  1078. u8 *packet;
  1079. if (!netif_running(edev->ndev)) {
  1080. DP_NOTICE(edev, "Interface is down\n");
  1081. return -EINVAL;
  1082. }
  1083. qede_netif_stop(edev);
  1084. /* Bring up the link in Loopback mode */
  1085. memset(&link_params, 0, sizeof(link_params));
  1086. link_params.link_up = true;
  1087. link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
  1088. link_params.loopback_mode = loopback_mode;
  1089. edev->ops->common->set_link(edev->cdev, &link_params);
  1090. /* Wait for loopback configuration to apply */
  1091. msleep_interruptible(500);
  1092. /* prepare the loopback packet */
  1093. pkt_size = edev->ndev->mtu + ETH_HLEN;
  1094. skb = netdev_alloc_skb(edev->ndev, pkt_size);
  1095. if (!skb) {
  1096. DP_INFO(edev, "Can't allocate skb\n");
  1097. rc = -ENOMEM;
  1098. goto test_loopback_exit;
  1099. }
  1100. packet = skb_put(skb, pkt_size);
  1101. ether_addr_copy(packet, edev->ndev->dev_addr);
  1102. ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr);
  1103. memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN)));
  1104. for (i = ETH_HLEN; i < pkt_size; i++)
  1105. packet[i] = (unsigned char)(i & 0xff);
  1106. rc = qede_selftest_transmit_traffic(edev, skb);
  1107. if (rc)
  1108. goto test_loopback_exit;
  1109. rc = qede_selftest_receive_traffic(edev);
  1110. if (rc)
  1111. goto test_loopback_exit;
  1112. DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n");
  1113. test_loopback_exit:
  1114. dev_kfree_skb(skb);
  1115. /* Bring up the link in Normal mode */
  1116. memset(&link_params, 0, sizeof(link_params));
  1117. link_params.link_up = true;
  1118. link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
  1119. link_params.loopback_mode = QED_LINK_LOOPBACK_NONE;
  1120. edev->ops->common->set_link(edev->cdev, &link_params);
  1121. /* Wait for loopback configuration to apply */
  1122. msleep_interruptible(500);
  1123. qede_netif_start(edev);
  1124. return rc;
  1125. }
  1126. static void qede_self_test(struct net_device *dev,
  1127. struct ethtool_test *etest, u64 *buf)
  1128. {
  1129. struct qede_dev *edev = netdev_priv(dev);
  1130. DP_VERBOSE(edev, QED_MSG_DEBUG,
  1131. "Self-test command parameters: offline = %d, external_lb = %d\n",
  1132. (etest->flags & ETH_TEST_FL_OFFLINE),
  1133. (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2);
  1134. memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX);
  1135. if (etest->flags & ETH_TEST_FL_OFFLINE) {
  1136. if (qede_selftest_run_loopback(edev,
  1137. QED_LINK_LOOPBACK_INT_PHY)) {
  1138. buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1;
  1139. etest->flags |= ETH_TEST_FL_FAILED;
  1140. }
  1141. }
  1142. if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) {
  1143. buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1;
  1144. etest->flags |= ETH_TEST_FL_FAILED;
  1145. }
  1146. if (edev->ops->common->selftest->selftest_memory(edev->cdev)) {
  1147. buf[QEDE_ETHTOOL_MEMORY_TEST] = 1;
  1148. etest->flags |= ETH_TEST_FL_FAILED;
  1149. }
  1150. if (edev->ops->common->selftest->selftest_register(edev->cdev)) {
  1151. buf[QEDE_ETHTOOL_REGISTER_TEST] = 1;
  1152. etest->flags |= ETH_TEST_FL_FAILED;
  1153. }
  1154. if (edev->ops->common->selftest->selftest_clock(edev->cdev)) {
  1155. buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
  1156. etest->flags |= ETH_TEST_FL_FAILED;
  1157. }
  1158. }
  1159. static int qede_set_tunable(struct net_device *dev,
  1160. const struct ethtool_tunable *tuna,
  1161. const void *data)
  1162. {
  1163. struct qede_dev *edev = netdev_priv(dev);
  1164. u32 val;
  1165. switch (tuna->id) {
  1166. case ETHTOOL_RX_COPYBREAK:
  1167. val = *(u32 *)data;
  1168. if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) {
  1169. DP_VERBOSE(edev, QED_MSG_DEBUG,
  1170. "Invalid rx copy break value, range is [%u, %u]",
  1171. QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE);
  1172. return -EINVAL;
  1173. }
  1174. edev->rx_copybreak = *(u32 *)data;
  1175. break;
  1176. default:
  1177. return -EOPNOTSUPP;
  1178. }
  1179. return 0;
  1180. }
  1181. static int qede_get_tunable(struct net_device *dev,
  1182. const struct ethtool_tunable *tuna, void *data)
  1183. {
  1184. struct qede_dev *edev = netdev_priv(dev);
  1185. switch (tuna->id) {
  1186. case ETHTOOL_RX_COPYBREAK:
  1187. *(u32 *)data = edev->rx_copybreak;
  1188. break;
  1189. default:
  1190. return -EOPNOTSUPP;
  1191. }
  1192. return 0;
  1193. }
  1194. static const struct ethtool_ops qede_ethtool_ops = {
  1195. .get_link_ksettings = qede_get_link_ksettings,
  1196. .set_link_ksettings = qede_set_link_ksettings,
  1197. .get_drvinfo = qede_get_drvinfo,
  1198. .get_regs_len = qede_get_regs_len,
  1199. .get_regs = qede_get_regs,
  1200. .get_msglevel = qede_get_msglevel,
  1201. .set_msglevel = qede_set_msglevel,
  1202. .nway_reset = qede_nway_reset,
  1203. .get_link = qede_get_link,
  1204. .get_coalesce = qede_get_coalesce,
  1205. .set_coalesce = qede_set_coalesce,
  1206. .get_ringparam = qede_get_ringparam,
  1207. .set_ringparam = qede_set_ringparam,
  1208. .get_pauseparam = qede_get_pauseparam,
  1209. .set_pauseparam = qede_set_pauseparam,
  1210. .get_strings = qede_get_strings,
  1211. .set_phys_id = qede_set_phys_id,
  1212. .get_ethtool_stats = qede_get_ethtool_stats,
  1213. .get_priv_flags = qede_get_priv_flags,
  1214. .get_sset_count = qede_get_sset_count,
  1215. .get_rxnfc = qede_get_rxnfc,
  1216. .set_rxnfc = qede_set_rxnfc,
  1217. .get_rxfh_indir_size = qede_get_rxfh_indir_size,
  1218. .get_rxfh_key_size = qede_get_rxfh_key_size,
  1219. .get_rxfh = qede_get_rxfh,
  1220. .set_rxfh = qede_set_rxfh,
  1221. .get_channels = qede_get_channels,
  1222. .set_channels = qede_set_channels,
  1223. .self_test = qede_self_test,
  1224. .get_tunable = qede_get_tunable,
  1225. .set_tunable = qede_set_tunable,
  1226. };
  1227. static const struct ethtool_ops qede_vf_ethtool_ops = {
  1228. .get_link_ksettings = qede_get_link_ksettings,
  1229. .get_drvinfo = qede_get_drvinfo,
  1230. .get_msglevel = qede_get_msglevel,
  1231. .set_msglevel = qede_set_msglevel,
  1232. .get_link = qede_get_link,
  1233. .get_ringparam = qede_get_ringparam,
  1234. .set_ringparam = qede_set_ringparam,
  1235. .get_strings = qede_get_strings,
  1236. .get_ethtool_stats = qede_get_ethtool_stats,
  1237. .get_priv_flags = qede_get_priv_flags,
  1238. .get_sset_count = qede_get_sset_count,
  1239. .get_rxnfc = qede_get_rxnfc,
  1240. .set_rxnfc = qede_set_rxnfc,
  1241. .get_rxfh_indir_size = qede_get_rxfh_indir_size,
  1242. .get_rxfh_key_size = qede_get_rxfh_key_size,
  1243. .get_rxfh = qede_get_rxfh,
  1244. .set_rxfh = qede_set_rxfh,
  1245. .get_channels = qede_get_channels,
  1246. .set_channels = qede_set_channels,
  1247. .get_tunable = qede_get_tunable,
  1248. .set_tunable = qede_set_tunable,
  1249. };
  1250. void qede_set_ethtool_ops(struct net_device *dev)
  1251. {
  1252. struct qede_dev *edev = netdev_priv(dev);
  1253. if (IS_VF(edev))
  1254. dev->ethtool_ops = &qede_vf_ethtool_ops;
  1255. else
  1256. dev->ethtool_ops = &qede_ethtool_ops;
  1257. }