ice_main.c 109 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright (c) 2018, Intel Corporation. */
  3. /* Intel(R) Ethernet Connection E800 Series Linux Driver */
  4. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  5. #include "ice.h"
  6. #define DRV_VERSION "ice-0.0.1-k"
  7. #define DRV_SUMMARY "Intel(R) Ethernet Connection E800 Series Linux Driver"
  8. const char ice_drv_ver[] = DRV_VERSION;
  9. static const char ice_driver_string[] = DRV_SUMMARY;
  10. static const char ice_copyright[] = "Copyright (c) 2018, Intel Corporation.";
  11. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  12. MODULE_DESCRIPTION(DRV_SUMMARY);
  13. MODULE_LICENSE("GPL");
  14. MODULE_VERSION(DRV_VERSION);
  15. static int debug = -1;
  16. module_param(debug, int, 0644);
  17. #ifndef CONFIG_DYNAMIC_DEBUG
  18. MODULE_PARM_DESC(debug, "netif level (0=none,...,16=all), hw debug_mask (0x8XXXXXXX)");
  19. #else
  20. MODULE_PARM_DESC(debug, "netif level (0=none,...,16=all)");
  21. #endif /* !CONFIG_DYNAMIC_DEBUG */
  22. static struct workqueue_struct *ice_wq;
  23. static const struct net_device_ops ice_netdev_ops;
  24. static int ice_vsi_release(struct ice_vsi *vsi);
  25. static void ice_update_vsi_stats(struct ice_vsi *vsi);
  26. static void ice_update_pf_stats(struct ice_pf *pf);
  27. /**
  28. * ice_get_free_slot - get the next non-NULL location index in array
  29. * @array: array to search
  30. * @size: size of the array
  31. * @curr: last known occupied index to be used as a search hint
  32. *
  33. * void * is being used to keep the functionality generic. This lets us use this
  34. * function on any array of pointers.
  35. */
  36. static int ice_get_free_slot(void *array, int size, int curr)
  37. {
  38. int **tmp_array = (int **)array;
  39. int next;
  40. if (curr < (size - 1) && !tmp_array[curr + 1]) {
  41. next = curr + 1;
  42. } else {
  43. int i = 0;
  44. while ((i < size) && (tmp_array[i]))
  45. i++;
  46. if (i == size)
  47. next = ICE_NO_VSI;
  48. else
  49. next = i;
  50. }
  51. return next;
  52. }
  53. /**
  54. * ice_search_res - Search the tracker for a block of resources
  55. * @res: pointer to the resource
  56. * @needed: size of the block needed
  57. * @id: identifier to track owner
  58. * Returns the base item index of the block, or -ENOMEM for error
  59. */
  60. static int ice_search_res(struct ice_res_tracker *res, u16 needed, u16 id)
  61. {
  62. int start = res->search_hint;
  63. int end = start;
  64. id |= ICE_RES_VALID_BIT;
  65. do {
  66. /* skip already allocated entries */
  67. if (res->list[end++] & ICE_RES_VALID_BIT) {
  68. start = end;
  69. if ((start + needed) > res->num_entries)
  70. break;
  71. }
  72. if (end == (start + needed)) {
  73. int i = start;
  74. /* there was enough, so assign it to the requestor */
  75. while (i != end)
  76. res->list[i++] = id;
  77. if (end == res->num_entries)
  78. end = 0;
  79. res->search_hint = end;
  80. return start;
  81. }
  82. } while (1);
  83. return -ENOMEM;
  84. }
  85. /**
  86. * ice_get_res - get a block of resources
  87. * @pf: board private structure
  88. * @res: pointer to the resource
  89. * @needed: size of the block needed
  90. * @id: identifier to track owner
  91. *
  92. * Returns the base item index of the block, or -ENOMEM for error
  93. * The search_hint trick and lack of advanced fit-finding only works
  94. * because we're highly likely to have all the same sized requests.
  95. * Linear search time and any fragmentation should be minimal.
  96. */
  97. static int
  98. ice_get_res(struct ice_pf *pf, struct ice_res_tracker *res, u16 needed, u16 id)
  99. {
  100. int ret;
  101. if (!res || !pf)
  102. return -EINVAL;
  103. if (!needed || needed > res->num_entries || id >= ICE_RES_VALID_BIT) {
  104. dev_err(&pf->pdev->dev,
  105. "param err: needed=%d, num_entries = %d id=0x%04x\n",
  106. needed, res->num_entries, id);
  107. return -EINVAL;
  108. }
  109. /* search based on search_hint */
  110. ret = ice_search_res(res, needed, id);
  111. if (ret < 0) {
  112. /* previous search failed. Reset search hint and try again */
  113. res->search_hint = 0;
  114. ret = ice_search_res(res, needed, id);
  115. }
  116. return ret;
  117. }
  118. /**
  119. * ice_free_res - free a block of resources
  120. * @res: pointer to the resource
  121. * @index: starting index previously returned by ice_get_res
  122. * @id: identifier to track owner
  123. * Returns number of resources freed
  124. */
  125. static int ice_free_res(struct ice_res_tracker *res, u16 index, u16 id)
  126. {
  127. int count = 0;
  128. int i;
  129. if (!res || index >= res->num_entries)
  130. return -EINVAL;
  131. id |= ICE_RES_VALID_BIT;
  132. for (i = index; i < res->num_entries && res->list[i] == id; i++) {
  133. res->list[i] = 0;
  134. count++;
  135. }
  136. return count;
  137. }
  138. /**
  139. * ice_add_mac_to_list - Add a mac address filter entry to the list
  140. * @vsi: the VSI to be forwarded to
  141. * @add_list: pointer to the list which contains MAC filter entries
  142. * @macaddr: the MAC address to be added.
  143. *
  144. * Adds mac address filter entry to the temp list
  145. *
  146. * Returns 0 on success or ENOMEM on failure.
  147. */
  148. static int ice_add_mac_to_list(struct ice_vsi *vsi, struct list_head *add_list,
  149. const u8 *macaddr)
  150. {
  151. struct ice_fltr_list_entry *tmp;
  152. struct ice_pf *pf = vsi->back;
  153. tmp = devm_kzalloc(&pf->pdev->dev, sizeof(*tmp), GFP_ATOMIC);
  154. if (!tmp)
  155. return -ENOMEM;
  156. tmp->fltr_info.flag = ICE_FLTR_TX;
  157. tmp->fltr_info.src = vsi->vsi_num;
  158. tmp->fltr_info.lkup_type = ICE_SW_LKUP_MAC;
  159. tmp->fltr_info.fltr_act = ICE_FWD_TO_VSI;
  160. tmp->fltr_info.fwd_id.vsi_id = vsi->vsi_num;
  161. ether_addr_copy(tmp->fltr_info.l_data.mac.mac_addr, macaddr);
  162. INIT_LIST_HEAD(&tmp->list_entry);
  163. list_add(&tmp->list_entry, add_list);
  164. return 0;
  165. }
  166. /**
  167. * ice_free_fltr_list - free filter lists helper
  168. * @dev: pointer to the device struct
  169. * @h: pointer to the list head to be freed
  170. *
  171. * Helper function to free filter lists previously created using
  172. * ice_add_mac_to_list
  173. */
  174. static void ice_free_fltr_list(struct device *dev, struct list_head *h)
  175. {
  176. struct ice_fltr_list_entry *e, *tmp;
  177. list_for_each_entry_safe(e, tmp, h, list_entry) {
  178. list_del(&e->list_entry);
  179. devm_kfree(dev, e);
  180. }
  181. }
  182. /**
  183. * ice_watchdog_subtask - periodic tasks not using event driven scheduling
  184. * @pf: board private structure
  185. */
  186. static void ice_watchdog_subtask(struct ice_pf *pf)
  187. {
  188. int i;
  189. /* if interface is down do nothing */
  190. if (test_bit(__ICE_DOWN, pf->state) ||
  191. test_bit(__ICE_CFG_BUSY, pf->state))
  192. return;
  193. /* make sure we don't do these things too often */
  194. if (time_before(jiffies,
  195. pf->serv_tmr_prev + pf->serv_tmr_period))
  196. return;
  197. pf->serv_tmr_prev = jiffies;
  198. /* Update the stats for active netdevs so the network stack
  199. * can look at updated numbers whenever it cares to
  200. */
  201. ice_update_pf_stats(pf);
  202. for (i = 0; i < pf->num_alloc_vsi; i++)
  203. if (pf->vsi[i] && pf->vsi[i]->netdev)
  204. ice_update_vsi_stats(pf->vsi[i]);
  205. }
  206. /**
  207. * ice_print_link_msg - print link up or down message
  208. * @vsi: the VSI whose link status is being queried
  209. * @isup: boolean for if the link is now up or down
  210. */
  211. void ice_print_link_msg(struct ice_vsi *vsi, bool isup)
  212. {
  213. const char *speed;
  214. const char *fc;
  215. if (vsi->current_isup == isup)
  216. return;
  217. vsi->current_isup = isup;
  218. if (!isup) {
  219. netdev_info(vsi->netdev, "NIC Link is Down\n");
  220. return;
  221. }
  222. switch (vsi->port_info->phy.link_info.link_speed) {
  223. case ICE_AQ_LINK_SPEED_40GB:
  224. speed = "40 G";
  225. break;
  226. case ICE_AQ_LINK_SPEED_25GB:
  227. speed = "25 G";
  228. break;
  229. case ICE_AQ_LINK_SPEED_20GB:
  230. speed = "20 G";
  231. break;
  232. case ICE_AQ_LINK_SPEED_10GB:
  233. speed = "10 G";
  234. break;
  235. case ICE_AQ_LINK_SPEED_5GB:
  236. speed = "5 G";
  237. break;
  238. case ICE_AQ_LINK_SPEED_2500MB:
  239. speed = "2.5 G";
  240. break;
  241. case ICE_AQ_LINK_SPEED_1000MB:
  242. speed = "1 G";
  243. break;
  244. case ICE_AQ_LINK_SPEED_100MB:
  245. speed = "100 M";
  246. break;
  247. default:
  248. speed = "Unknown";
  249. break;
  250. }
  251. switch (vsi->port_info->fc.current_mode) {
  252. case ICE_FC_FULL:
  253. fc = "RX/TX";
  254. break;
  255. case ICE_FC_TX_PAUSE:
  256. fc = "TX";
  257. break;
  258. case ICE_FC_RX_PAUSE:
  259. fc = "RX";
  260. break;
  261. default:
  262. fc = "Unknown";
  263. break;
  264. }
  265. netdev_info(vsi->netdev, "NIC Link is up %sbps, Flow Control: %s\n",
  266. speed, fc);
  267. }
  268. /**
  269. * __ice_clean_ctrlq - helper function to clean controlq rings
  270. * @pf: ptr to struct ice_pf
  271. * @q_type: specific Control queue type
  272. */
  273. static int __ice_clean_ctrlq(struct ice_pf *pf, enum ice_ctl_q q_type)
  274. {
  275. struct ice_rq_event_info event;
  276. struct ice_hw *hw = &pf->hw;
  277. struct ice_ctl_q_info *cq;
  278. u16 pending, i = 0;
  279. const char *qtype;
  280. u32 oldval, val;
  281. switch (q_type) {
  282. case ICE_CTL_Q_ADMIN:
  283. cq = &hw->adminq;
  284. qtype = "Admin";
  285. break;
  286. default:
  287. dev_warn(&pf->pdev->dev, "Unknown control queue type 0x%x\n",
  288. q_type);
  289. return 0;
  290. }
  291. /* check for error indications - PF_xx_AxQLEN register layout for
  292. * FW/MBX/SB are identical so just use defines for PF_FW_AxQLEN.
  293. */
  294. val = rd32(hw, cq->rq.len);
  295. if (val & (PF_FW_ARQLEN_ARQVFE_M | PF_FW_ARQLEN_ARQOVFL_M |
  296. PF_FW_ARQLEN_ARQCRIT_M)) {
  297. oldval = val;
  298. if (val & PF_FW_ARQLEN_ARQVFE_M)
  299. dev_dbg(&pf->pdev->dev,
  300. "%s Receive Queue VF Error detected\n", qtype);
  301. if (val & PF_FW_ARQLEN_ARQOVFL_M) {
  302. dev_dbg(&pf->pdev->dev,
  303. "%s Receive Queue Overflow Error detected\n",
  304. qtype);
  305. }
  306. if (val & PF_FW_ARQLEN_ARQCRIT_M)
  307. dev_dbg(&pf->pdev->dev,
  308. "%s Receive Queue Critical Error detected\n",
  309. qtype);
  310. val &= ~(PF_FW_ARQLEN_ARQVFE_M | PF_FW_ARQLEN_ARQOVFL_M |
  311. PF_FW_ARQLEN_ARQCRIT_M);
  312. if (oldval != val)
  313. wr32(hw, cq->rq.len, val);
  314. }
  315. val = rd32(hw, cq->sq.len);
  316. if (val & (PF_FW_ATQLEN_ATQVFE_M | PF_FW_ATQLEN_ATQOVFL_M |
  317. PF_FW_ATQLEN_ATQCRIT_M)) {
  318. oldval = val;
  319. if (val & PF_FW_ATQLEN_ATQVFE_M)
  320. dev_dbg(&pf->pdev->dev,
  321. "%s Send Queue VF Error detected\n", qtype);
  322. if (val & PF_FW_ATQLEN_ATQOVFL_M) {
  323. dev_dbg(&pf->pdev->dev,
  324. "%s Send Queue Overflow Error detected\n",
  325. qtype);
  326. }
  327. if (val & PF_FW_ATQLEN_ATQCRIT_M)
  328. dev_dbg(&pf->pdev->dev,
  329. "%s Send Queue Critical Error detected\n",
  330. qtype);
  331. val &= ~(PF_FW_ATQLEN_ATQVFE_M | PF_FW_ATQLEN_ATQOVFL_M |
  332. PF_FW_ATQLEN_ATQCRIT_M);
  333. if (oldval != val)
  334. wr32(hw, cq->sq.len, val);
  335. }
  336. event.buf_len = cq->rq_buf_size;
  337. event.msg_buf = devm_kzalloc(&pf->pdev->dev, event.buf_len,
  338. GFP_KERNEL);
  339. if (!event.msg_buf)
  340. return 0;
  341. do {
  342. enum ice_status ret;
  343. ret = ice_clean_rq_elem(hw, cq, &event, &pending);
  344. if (ret == ICE_ERR_AQ_NO_WORK)
  345. break;
  346. if (ret) {
  347. dev_err(&pf->pdev->dev,
  348. "%s Receive Queue event error %d\n", qtype,
  349. ret);
  350. break;
  351. }
  352. } while (pending && (i++ < ICE_DFLT_IRQ_WORK));
  353. devm_kfree(&pf->pdev->dev, event.msg_buf);
  354. return pending && (i == ICE_DFLT_IRQ_WORK);
  355. }
  356. /**
  357. * ice_clean_adminq_subtask - clean the AdminQ rings
  358. * @pf: board private structure
  359. */
  360. static void ice_clean_adminq_subtask(struct ice_pf *pf)
  361. {
  362. struct ice_hw *hw = &pf->hw;
  363. u32 val;
  364. if (!test_bit(__ICE_ADMINQ_EVENT_PENDING, pf->state))
  365. return;
  366. if (__ice_clean_ctrlq(pf, ICE_CTL_Q_ADMIN))
  367. return;
  368. clear_bit(__ICE_ADMINQ_EVENT_PENDING, pf->state);
  369. /* re-enable Admin queue interrupt causes */
  370. val = rd32(hw, PFINT_FW_CTL);
  371. wr32(hw, PFINT_FW_CTL, (val | PFINT_FW_CTL_CAUSE_ENA_M));
  372. ice_flush(hw);
  373. }
  374. /**
  375. * ice_service_task_schedule - schedule the service task to wake up
  376. * @pf: board private structure
  377. *
  378. * If not already scheduled, this puts the task into the work queue.
  379. */
  380. static void ice_service_task_schedule(struct ice_pf *pf)
  381. {
  382. if (!test_bit(__ICE_DOWN, pf->state) &&
  383. !test_and_set_bit(__ICE_SERVICE_SCHED, pf->state))
  384. queue_work(ice_wq, &pf->serv_task);
  385. }
  386. /**
  387. * ice_service_task_complete - finish up the service task
  388. * @pf: board private structure
  389. */
  390. static void ice_service_task_complete(struct ice_pf *pf)
  391. {
  392. WARN_ON(!test_bit(__ICE_SERVICE_SCHED, pf->state));
  393. /* force memory (pf->state) to sync before next service task */
  394. smp_mb__before_atomic();
  395. clear_bit(__ICE_SERVICE_SCHED, pf->state);
  396. }
  397. /**
  398. * ice_service_timer - timer callback to schedule service task
  399. * @t: pointer to timer_list
  400. */
  401. static void ice_service_timer(struct timer_list *t)
  402. {
  403. struct ice_pf *pf = from_timer(pf, t, serv_tmr);
  404. mod_timer(&pf->serv_tmr, round_jiffies(pf->serv_tmr_period + jiffies));
  405. ice_service_task_schedule(pf);
  406. }
  407. /**
  408. * ice_service_task - manage and run subtasks
  409. * @work: pointer to work_struct contained by the PF struct
  410. */
  411. static void ice_service_task(struct work_struct *work)
  412. {
  413. struct ice_pf *pf = container_of(work, struct ice_pf, serv_task);
  414. unsigned long start_time = jiffies;
  415. /* subtasks */
  416. ice_watchdog_subtask(pf);
  417. ice_clean_adminq_subtask(pf);
  418. /* Clear __ICE_SERVICE_SCHED flag to allow scheduling next event */
  419. ice_service_task_complete(pf);
  420. /* If the tasks have taken longer than one service timer period
  421. * or there is more work to be done, reset the service timer to
  422. * schedule the service task now.
  423. */
  424. if (time_after(jiffies, (start_time + pf->serv_tmr_period)) ||
  425. test_bit(__ICE_ADMINQ_EVENT_PENDING, pf->state))
  426. mod_timer(&pf->serv_tmr, jiffies);
  427. }
  428. /**
  429. * ice_set_ctrlq_len - helper function to set controlq length
  430. * @hw: pointer to the hw instance
  431. */
  432. static void ice_set_ctrlq_len(struct ice_hw *hw)
  433. {
  434. hw->adminq.num_rq_entries = ICE_AQ_LEN;
  435. hw->adminq.num_sq_entries = ICE_AQ_LEN;
  436. hw->adminq.rq_buf_size = ICE_AQ_MAX_BUF_LEN;
  437. hw->adminq.sq_buf_size = ICE_AQ_MAX_BUF_LEN;
  438. }
  439. /**
  440. * ice_irq_affinity_notify - Callback for affinity changes
  441. * @notify: context as to what irq was changed
  442. * @mask: the new affinity mask
  443. *
  444. * This is a callback function used by the irq_set_affinity_notifier function
  445. * so that we may register to receive changes to the irq affinity masks.
  446. */
  447. static void ice_irq_affinity_notify(struct irq_affinity_notify *notify,
  448. const cpumask_t *mask)
  449. {
  450. struct ice_q_vector *q_vector =
  451. container_of(notify, struct ice_q_vector, affinity_notify);
  452. cpumask_copy(&q_vector->affinity_mask, mask);
  453. }
  454. /**
  455. * ice_irq_affinity_release - Callback for affinity notifier release
  456. * @ref: internal core kernel usage
  457. *
  458. * This is a callback function used by the irq_set_affinity_notifier function
  459. * to inform the current notification subscriber that they will no longer
  460. * receive notifications.
  461. */
  462. static void ice_irq_affinity_release(struct kref __always_unused *ref) {}
  463. /**
  464. * ice_vsi_dis_irq - Mask off queue interrupt generation on the VSI
  465. * @vsi: the VSI being un-configured
  466. */
  467. static void ice_vsi_dis_irq(struct ice_vsi *vsi)
  468. {
  469. struct ice_pf *pf = vsi->back;
  470. struct ice_hw *hw = &pf->hw;
  471. int base = vsi->base_vector;
  472. u32 val;
  473. int i;
  474. /* disable interrupt causation from each queue */
  475. if (vsi->tx_rings) {
  476. ice_for_each_txq(vsi, i) {
  477. if (vsi->tx_rings[i]) {
  478. u16 reg;
  479. reg = vsi->tx_rings[i]->reg_idx;
  480. val = rd32(hw, QINT_TQCTL(reg));
  481. val &= ~QINT_TQCTL_CAUSE_ENA_M;
  482. wr32(hw, QINT_TQCTL(reg), val);
  483. }
  484. }
  485. }
  486. if (vsi->rx_rings) {
  487. ice_for_each_rxq(vsi, i) {
  488. if (vsi->rx_rings[i]) {
  489. u16 reg;
  490. reg = vsi->rx_rings[i]->reg_idx;
  491. val = rd32(hw, QINT_RQCTL(reg));
  492. val &= ~QINT_RQCTL_CAUSE_ENA_M;
  493. wr32(hw, QINT_RQCTL(reg), val);
  494. }
  495. }
  496. }
  497. /* disable each interrupt */
  498. if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags)) {
  499. for (i = vsi->base_vector;
  500. i < (vsi->num_q_vectors + vsi->base_vector); i++)
  501. wr32(hw, GLINT_DYN_CTL(i), 0);
  502. ice_flush(hw);
  503. for (i = 0; i < vsi->num_q_vectors; i++)
  504. synchronize_irq(pf->msix_entries[i + base].vector);
  505. }
  506. }
  507. /**
  508. * ice_vsi_ena_irq - Enable IRQ for the given VSI
  509. * @vsi: the VSI being configured
  510. */
  511. static int ice_vsi_ena_irq(struct ice_vsi *vsi)
  512. {
  513. struct ice_pf *pf = vsi->back;
  514. struct ice_hw *hw = &pf->hw;
  515. if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags)) {
  516. int i;
  517. for (i = 0; i < vsi->num_q_vectors; i++)
  518. ice_irq_dynamic_ena(hw, vsi, vsi->q_vectors[i]);
  519. }
  520. ice_flush(hw);
  521. return 0;
  522. }
  523. /**
  524. * ice_vsi_delete - delete a VSI from the switch
  525. * @vsi: pointer to VSI being removed
  526. */
  527. static void ice_vsi_delete(struct ice_vsi *vsi)
  528. {
  529. struct ice_pf *pf = vsi->back;
  530. struct ice_vsi_ctx ctxt;
  531. enum ice_status status;
  532. ctxt.vsi_num = vsi->vsi_num;
  533. memcpy(&ctxt.info, &vsi->info, sizeof(struct ice_aqc_vsi_props));
  534. status = ice_aq_free_vsi(&pf->hw, &ctxt, false, NULL);
  535. if (status)
  536. dev_err(&pf->pdev->dev, "Failed to delete VSI %i in FW\n",
  537. vsi->vsi_num);
  538. }
  539. /**
  540. * ice_vsi_req_irq_msix - get MSI-X vectors from the OS for the VSI
  541. * @vsi: the VSI being configured
  542. * @basename: name for the vector
  543. */
  544. static int ice_vsi_req_irq_msix(struct ice_vsi *vsi, char *basename)
  545. {
  546. int q_vectors = vsi->num_q_vectors;
  547. struct ice_pf *pf = vsi->back;
  548. int base = vsi->base_vector;
  549. int rx_int_idx = 0;
  550. int tx_int_idx = 0;
  551. int vector, err;
  552. int irq_num;
  553. for (vector = 0; vector < q_vectors; vector++) {
  554. struct ice_q_vector *q_vector = vsi->q_vectors[vector];
  555. irq_num = pf->msix_entries[base + vector].vector;
  556. if (q_vector->tx.ring && q_vector->rx.ring) {
  557. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  558. "%s-%s-%d", basename, "TxRx", rx_int_idx++);
  559. tx_int_idx++;
  560. } else if (q_vector->rx.ring) {
  561. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  562. "%s-%s-%d", basename, "rx", rx_int_idx++);
  563. } else if (q_vector->tx.ring) {
  564. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  565. "%s-%s-%d", basename, "tx", tx_int_idx++);
  566. } else {
  567. /* skip this unused q_vector */
  568. continue;
  569. }
  570. err = devm_request_irq(&pf->pdev->dev,
  571. pf->msix_entries[base + vector].vector,
  572. vsi->irq_handler, 0, q_vector->name,
  573. q_vector);
  574. if (err) {
  575. netdev_err(vsi->netdev,
  576. "MSIX request_irq failed, error: %d\n", err);
  577. goto free_q_irqs;
  578. }
  579. /* register for affinity change notifications */
  580. q_vector->affinity_notify.notify = ice_irq_affinity_notify;
  581. q_vector->affinity_notify.release = ice_irq_affinity_release;
  582. irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
  583. /* assign the mask for this irq */
  584. irq_set_affinity_hint(irq_num, &q_vector->affinity_mask);
  585. }
  586. vsi->irqs_ready = true;
  587. return 0;
  588. free_q_irqs:
  589. while (vector) {
  590. vector--;
  591. irq_num = pf->msix_entries[base + vector].vector,
  592. irq_set_affinity_notifier(irq_num, NULL);
  593. irq_set_affinity_hint(irq_num, NULL);
  594. devm_free_irq(&pf->pdev->dev, irq_num, &vsi->q_vectors[vector]);
  595. }
  596. return err;
  597. }
  598. /**
  599. * ice_vsi_set_rss_params - Setup RSS capabilities per VSI type
  600. * @vsi: the VSI being configured
  601. */
  602. static void ice_vsi_set_rss_params(struct ice_vsi *vsi)
  603. {
  604. struct ice_hw_common_caps *cap;
  605. struct ice_pf *pf = vsi->back;
  606. if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
  607. vsi->rss_size = 1;
  608. return;
  609. }
  610. cap = &pf->hw.func_caps.common_cap;
  611. switch (vsi->type) {
  612. case ICE_VSI_PF:
  613. /* PF VSI will inherit RSS instance of PF */
  614. vsi->rss_table_size = cap->rss_table_size;
  615. vsi->rss_size = min_t(int, num_online_cpus(),
  616. BIT(cap->rss_table_entry_width));
  617. vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF;
  618. break;
  619. default:
  620. dev_warn(&pf->pdev->dev, "Unknown VSI type %d\n", vsi->type);
  621. break;
  622. }
  623. }
  624. /**
  625. * ice_vsi_setup_q_map - Setup a VSI queue map
  626. * @vsi: the VSI being configured
  627. * @ctxt: VSI context structure
  628. */
  629. static void ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
  630. {
  631. u16 offset = 0, qmap = 0, numq_tc;
  632. u16 pow = 0, max_rss = 0, qcount;
  633. u16 qcount_tx = vsi->alloc_txq;
  634. u16 qcount_rx = vsi->alloc_rxq;
  635. bool ena_tc0 = false;
  636. int i;
  637. /* at least TC0 should be enabled by default */
  638. if (vsi->tc_cfg.numtc) {
  639. if (!(vsi->tc_cfg.ena_tc & BIT(0)))
  640. ena_tc0 = true;
  641. } else {
  642. ena_tc0 = true;
  643. }
  644. if (ena_tc0) {
  645. vsi->tc_cfg.numtc++;
  646. vsi->tc_cfg.ena_tc |= 1;
  647. }
  648. numq_tc = qcount_rx / vsi->tc_cfg.numtc;
  649. /* TC mapping is a function of the number of Rx queues assigned to the
  650. * VSI for each traffic class and the offset of these queues.
  651. * The first 10 bits are for queue offset for TC0, next 4 bits for no:of
  652. * queues allocated to TC0. No:of queues is a power-of-2.
  653. *
  654. * If TC is not enabled, the queue offset is set to 0, and allocate one
  655. * queue, this way, traffic for the given TC will be sent to the default
  656. * queue.
  657. *
  658. * Setup number and offset of Rx queues for all TCs for the VSI
  659. */
  660. /* qcount will change if RSS is enabled */
  661. if (test_bit(ICE_FLAG_RSS_ENA, vsi->back->flags)) {
  662. if (vsi->type == ICE_VSI_PF)
  663. max_rss = ICE_MAX_LG_RSS_QS;
  664. else
  665. max_rss = ICE_MAX_SMALL_RSS_QS;
  666. qcount = min_t(int, numq_tc, max_rss);
  667. qcount = min_t(int, qcount, vsi->rss_size);
  668. } else {
  669. qcount = numq_tc;
  670. }
  671. /* find higher power-of-2 of qcount */
  672. pow = ilog2(qcount);
  673. if (!is_power_of_2(qcount))
  674. pow++;
  675. for (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {
  676. if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
  677. /* TC is not enabled */
  678. vsi->tc_cfg.tc_info[i].qoffset = 0;
  679. vsi->tc_cfg.tc_info[i].qcount = 1;
  680. ctxt->info.tc_mapping[i] = 0;
  681. continue;
  682. }
  683. /* TC is enabled */
  684. vsi->tc_cfg.tc_info[i].qoffset = offset;
  685. vsi->tc_cfg.tc_info[i].qcount = qcount;
  686. qmap = ((offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
  687. ICE_AQ_VSI_TC_Q_OFFSET_M) |
  688. ((pow << ICE_AQ_VSI_TC_Q_NUM_S) &
  689. ICE_AQ_VSI_TC_Q_NUM_M);
  690. offset += qcount;
  691. ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
  692. }
  693. vsi->num_txq = qcount_tx;
  694. vsi->num_rxq = offset;
  695. /* Rx queue mapping */
  696. ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
  697. /* q_mapping buffer holds the info for the first queue allocated for
  698. * this VSI in the PF space and also the number of queues associated
  699. * with this VSI.
  700. */
  701. ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
  702. ctxt->info.q_mapping[1] = cpu_to_le16(vsi->num_rxq);
  703. }
  704. /**
  705. * ice_set_dflt_vsi_ctx - Set default VSI context before adding a VSI
  706. * @ctxt: the VSI context being set
  707. *
  708. * This initializes a default VSI context for all sections except the Queues.
  709. */
  710. static void ice_set_dflt_vsi_ctx(struct ice_vsi_ctx *ctxt)
  711. {
  712. u32 table = 0;
  713. memset(&ctxt->info, 0, sizeof(ctxt->info));
  714. /* VSI's should be allocated from shared pool */
  715. ctxt->alloc_from_pool = true;
  716. /* Src pruning enabled by default */
  717. ctxt->info.sw_flags = ICE_AQ_VSI_SW_FLAG_SRC_PRUNE;
  718. /* Traffic from VSI can be sent to LAN */
  719. ctxt->info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA;
  720. /* Allow all packets untagged/tagged */
  721. ctxt->info.port_vlan_flags = ((ICE_AQ_VSI_PVLAN_MODE_ALL &
  722. ICE_AQ_VSI_PVLAN_MODE_M) >>
  723. ICE_AQ_VSI_PVLAN_MODE_S);
  724. /* Show VLAN/UP from packets in Rx descriptors */
  725. ctxt->info.port_vlan_flags |= ((ICE_AQ_VSI_PVLAN_EMOD_STR_BOTH &
  726. ICE_AQ_VSI_PVLAN_EMOD_M) >>
  727. ICE_AQ_VSI_PVLAN_EMOD_S);
  728. /* Have 1:1 UP mapping for both ingress/egress tables */
  729. table |= ICE_UP_TABLE_TRANSLATE(0, 0);
  730. table |= ICE_UP_TABLE_TRANSLATE(1, 1);
  731. table |= ICE_UP_TABLE_TRANSLATE(2, 2);
  732. table |= ICE_UP_TABLE_TRANSLATE(3, 3);
  733. table |= ICE_UP_TABLE_TRANSLATE(4, 4);
  734. table |= ICE_UP_TABLE_TRANSLATE(5, 5);
  735. table |= ICE_UP_TABLE_TRANSLATE(6, 6);
  736. table |= ICE_UP_TABLE_TRANSLATE(7, 7);
  737. ctxt->info.ingress_table = cpu_to_le32(table);
  738. ctxt->info.egress_table = cpu_to_le32(table);
  739. /* Have 1:1 UP mapping for outer to inner UP table */
  740. ctxt->info.outer_up_table = cpu_to_le32(table);
  741. /* No Outer tag support outer_tag_flags remains to zero */
  742. }
  743. /**
  744. * ice_set_rss_vsi_ctx - Set RSS VSI context before adding a VSI
  745. * @ctxt: the VSI context being set
  746. * @vsi: the VSI being configured
  747. */
  748. static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
  749. {
  750. u8 lut_type, hash_type;
  751. switch (vsi->type) {
  752. case ICE_VSI_PF:
  753. /* PF VSI will inherit RSS instance of PF */
  754. lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF;
  755. hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
  756. break;
  757. default:
  758. dev_warn(&vsi->back->pdev->dev, "Unknown VSI type %d\n",
  759. vsi->type);
  760. return;
  761. }
  762. ctxt->info.q_opt_rss = ((lut_type << ICE_AQ_VSI_Q_OPT_RSS_LUT_S) &
  763. ICE_AQ_VSI_Q_OPT_RSS_LUT_M) |
  764. ((hash_type << ICE_AQ_VSI_Q_OPT_RSS_HASH_S) &
  765. ICE_AQ_VSI_Q_OPT_RSS_HASH_M);
  766. }
  767. /**
  768. * ice_vsi_add - Create a new VSI or fetch preallocated VSI
  769. * @vsi: the VSI being configured
  770. *
  771. * This initializes a VSI context depending on the VSI type to be added and
  772. * passes it down to the add_vsi aq command to create a new VSI.
  773. */
  774. static int ice_vsi_add(struct ice_vsi *vsi)
  775. {
  776. struct ice_vsi_ctx ctxt = { 0 };
  777. struct ice_pf *pf = vsi->back;
  778. struct ice_hw *hw = &pf->hw;
  779. int ret = 0;
  780. switch (vsi->type) {
  781. case ICE_VSI_PF:
  782. ctxt.flags = ICE_AQ_VSI_TYPE_PF;
  783. break;
  784. default:
  785. return -ENODEV;
  786. }
  787. ice_set_dflt_vsi_ctx(&ctxt);
  788. /* if the switch is in VEB mode, allow VSI loopback */
  789. if (vsi->vsw->bridge_mode == BRIDGE_MODE_VEB)
  790. ctxt.info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
  791. /* Set LUT type and HASH type if RSS is enabled */
  792. if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
  793. ice_set_rss_vsi_ctx(&ctxt, vsi);
  794. ctxt.info.sw_id = vsi->port_info->sw_id;
  795. ice_vsi_setup_q_map(vsi, &ctxt);
  796. ret = ice_aq_add_vsi(hw, &ctxt, NULL);
  797. if (ret) {
  798. dev_err(&vsi->back->pdev->dev,
  799. "Add VSI AQ call failed, err %d\n", ret);
  800. return -EIO;
  801. }
  802. vsi->info = ctxt.info;
  803. vsi->vsi_num = ctxt.vsi_num;
  804. return ret;
  805. }
  806. /**
  807. * ice_vsi_release_msix - Clear the queue to Interrupt mapping in HW
  808. * @vsi: the VSI being cleaned up
  809. */
  810. static void ice_vsi_release_msix(struct ice_vsi *vsi)
  811. {
  812. struct ice_pf *pf = vsi->back;
  813. u16 vector = vsi->base_vector;
  814. struct ice_hw *hw = &pf->hw;
  815. u32 txq = 0;
  816. u32 rxq = 0;
  817. int i, q;
  818. for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
  819. struct ice_q_vector *q_vector = vsi->q_vectors[i];
  820. wr32(hw, GLINT_ITR(ICE_RX_ITR, vector), 0);
  821. wr32(hw, GLINT_ITR(ICE_TX_ITR, vector), 0);
  822. for (q = 0; q < q_vector->num_ring_tx; q++) {
  823. wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0);
  824. txq++;
  825. }
  826. for (q = 0; q < q_vector->num_ring_rx; q++) {
  827. wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), 0);
  828. rxq++;
  829. }
  830. }
  831. ice_flush(hw);
  832. }
  833. /**
  834. * ice_vsi_clear_rings - Deallocates the Tx and Rx rings for VSI
  835. * @vsi: the VSI having rings deallocated
  836. */
  837. static void ice_vsi_clear_rings(struct ice_vsi *vsi)
  838. {
  839. int i;
  840. if (vsi->tx_rings) {
  841. for (i = 0; i < vsi->alloc_txq; i++) {
  842. if (vsi->tx_rings[i]) {
  843. kfree_rcu(vsi->tx_rings[i], rcu);
  844. vsi->tx_rings[i] = NULL;
  845. }
  846. }
  847. }
  848. if (vsi->rx_rings) {
  849. for (i = 0; i < vsi->alloc_rxq; i++) {
  850. if (vsi->rx_rings[i]) {
  851. kfree_rcu(vsi->rx_rings[i], rcu);
  852. vsi->rx_rings[i] = NULL;
  853. }
  854. }
  855. }
  856. }
  857. /**
  858. * ice_vsi_alloc_rings - Allocates Tx and Rx rings for the VSI
  859. * @vsi: VSI which is having rings allocated
  860. */
  861. static int ice_vsi_alloc_rings(struct ice_vsi *vsi)
  862. {
  863. struct ice_pf *pf = vsi->back;
  864. int i;
  865. /* Allocate tx_rings */
  866. for (i = 0; i < vsi->alloc_txq; i++) {
  867. struct ice_ring *ring;
  868. /* allocate with kzalloc(), free with kfree_rcu() */
  869. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  870. if (!ring)
  871. goto err_out;
  872. ring->q_index = i;
  873. ring->reg_idx = vsi->txq_map[i];
  874. ring->ring_active = false;
  875. ring->vsi = vsi;
  876. ring->netdev = vsi->netdev;
  877. ring->dev = &pf->pdev->dev;
  878. ring->count = vsi->num_desc;
  879. vsi->tx_rings[i] = ring;
  880. }
  881. /* Allocate rx_rings */
  882. for (i = 0; i < vsi->alloc_rxq; i++) {
  883. struct ice_ring *ring;
  884. /* allocate with kzalloc(), free with kfree_rcu() */
  885. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  886. if (!ring)
  887. goto err_out;
  888. ring->q_index = i;
  889. ring->reg_idx = vsi->rxq_map[i];
  890. ring->ring_active = false;
  891. ring->vsi = vsi;
  892. ring->netdev = vsi->netdev;
  893. ring->dev = &pf->pdev->dev;
  894. ring->count = vsi->num_desc;
  895. vsi->rx_rings[i] = ring;
  896. }
  897. return 0;
  898. err_out:
  899. ice_vsi_clear_rings(vsi);
  900. return -ENOMEM;
  901. }
  902. /**
  903. * ice_vsi_free_irq - Free the irq association with the OS
  904. * @vsi: the VSI being configured
  905. */
  906. static void ice_vsi_free_irq(struct ice_vsi *vsi)
  907. {
  908. struct ice_pf *pf = vsi->back;
  909. int base = vsi->base_vector;
  910. if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags)) {
  911. int i;
  912. if (!vsi->q_vectors || !vsi->irqs_ready)
  913. return;
  914. vsi->irqs_ready = false;
  915. for (i = 0; i < vsi->num_q_vectors; i++) {
  916. u16 vector = i + base;
  917. int irq_num;
  918. irq_num = pf->msix_entries[vector].vector;
  919. /* free only the irqs that were actually requested */
  920. if (!vsi->q_vectors[i] ||
  921. !(vsi->q_vectors[i]->num_ring_tx ||
  922. vsi->q_vectors[i]->num_ring_rx))
  923. continue;
  924. /* clear the affinity notifier in the IRQ descriptor */
  925. irq_set_affinity_notifier(irq_num, NULL);
  926. /* clear the affinity_mask in the IRQ descriptor */
  927. irq_set_affinity_hint(irq_num, NULL);
  928. synchronize_irq(irq_num);
  929. devm_free_irq(&pf->pdev->dev, irq_num,
  930. vsi->q_vectors[i]);
  931. }
  932. ice_vsi_release_msix(vsi);
  933. }
  934. }
  935. /**
  936. * ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW
  937. * @vsi: the VSI being configured
  938. */
  939. static void ice_vsi_cfg_msix(struct ice_vsi *vsi)
  940. {
  941. struct ice_pf *pf = vsi->back;
  942. u16 vector = vsi->base_vector;
  943. struct ice_hw *hw = &pf->hw;
  944. u32 txq = 0, rxq = 0;
  945. int i, q, itr;
  946. u8 itr_gran;
  947. for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
  948. struct ice_q_vector *q_vector = vsi->q_vectors[i];
  949. itr_gran = hw->itr_gran_200;
  950. if (q_vector->num_ring_rx) {
  951. q_vector->rx.itr =
  952. ITR_TO_REG(vsi->rx_rings[rxq]->rx_itr_setting,
  953. itr_gran);
  954. q_vector->rx.latency_range = ICE_LOW_LATENCY;
  955. }
  956. if (q_vector->num_ring_tx) {
  957. q_vector->tx.itr =
  958. ITR_TO_REG(vsi->tx_rings[txq]->tx_itr_setting,
  959. itr_gran);
  960. q_vector->tx.latency_range = ICE_LOW_LATENCY;
  961. }
  962. wr32(hw, GLINT_ITR(ICE_RX_ITR, vector), q_vector->rx.itr);
  963. wr32(hw, GLINT_ITR(ICE_TX_ITR, vector), q_vector->tx.itr);
  964. /* Both Transmit Queue Interrupt Cause Control register
  965. * and Receive Queue Interrupt Cause control register
  966. * expects MSIX_INDX field to be the vector index
  967. * within the function space and not the absolute
  968. * vector index across PF or across device.
  969. * For SR-IOV VF VSIs queue vector index always starts
  970. * with 1 since first vector index(0) is used for OICR
  971. * in VF space. Since VMDq and other PF VSIs are withtin
  972. * the PF function space, use the vector index thats
  973. * tracked for this PF.
  974. */
  975. for (q = 0; q < q_vector->num_ring_tx; q++) {
  976. u32 val;
  977. itr = ICE_TX_ITR;
  978. val = QINT_TQCTL_CAUSE_ENA_M |
  979. (itr << QINT_TQCTL_ITR_INDX_S) |
  980. (vector << QINT_TQCTL_MSIX_INDX_S);
  981. wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), val);
  982. txq++;
  983. }
  984. for (q = 0; q < q_vector->num_ring_rx; q++) {
  985. u32 val;
  986. itr = ICE_RX_ITR;
  987. val = QINT_RQCTL_CAUSE_ENA_M |
  988. (itr << QINT_RQCTL_ITR_INDX_S) |
  989. (vector << QINT_RQCTL_MSIX_INDX_S);
  990. wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), val);
  991. rxq++;
  992. }
  993. }
  994. ice_flush(hw);
  995. }
  996. /**
  997. * ice_ena_misc_vector - enable the non-queue interrupts
  998. * @pf: board private structure
  999. */
  1000. static void ice_ena_misc_vector(struct ice_pf *pf)
  1001. {
  1002. struct ice_hw *hw = &pf->hw;
  1003. u32 val;
  1004. /* clear things first */
  1005. wr32(hw, PFINT_OICR_ENA, 0); /* disable all */
  1006. rd32(hw, PFINT_OICR); /* read to clear */
  1007. val = (PFINT_OICR_HLP_RDY_M |
  1008. PFINT_OICR_CPM_RDY_M |
  1009. PFINT_OICR_ECC_ERR_M |
  1010. PFINT_OICR_MAL_DETECT_M |
  1011. PFINT_OICR_GRST_M |
  1012. PFINT_OICR_PCI_EXCEPTION_M |
  1013. PFINT_OICR_GPIO_M |
  1014. PFINT_OICR_STORM_DETECT_M |
  1015. PFINT_OICR_HMC_ERR_M);
  1016. wr32(hw, PFINT_OICR_ENA, val);
  1017. /* SW_ITR_IDX = 0, but don't change INTENA */
  1018. wr32(hw, GLINT_DYN_CTL(pf->oicr_idx),
  1019. GLINT_DYN_CTL_SW_ITR_INDX_M | GLINT_DYN_CTL_INTENA_MSK_M);
  1020. }
  1021. /**
  1022. * ice_misc_intr - misc interrupt handler
  1023. * @irq: interrupt number
  1024. * @data: pointer to a q_vector
  1025. */
  1026. static irqreturn_t ice_misc_intr(int __always_unused irq, void *data)
  1027. {
  1028. struct ice_pf *pf = (struct ice_pf *)data;
  1029. struct ice_hw *hw = &pf->hw;
  1030. irqreturn_t ret = IRQ_NONE;
  1031. u32 oicr, ena_mask;
  1032. set_bit(__ICE_ADMINQ_EVENT_PENDING, pf->state);
  1033. oicr = rd32(hw, PFINT_OICR);
  1034. ena_mask = rd32(hw, PFINT_OICR_ENA);
  1035. if (!(oicr & PFINT_OICR_INTEVENT_M))
  1036. goto ena_intr;
  1037. if (oicr & PFINT_OICR_HMC_ERR_M) {
  1038. ena_mask &= ~PFINT_OICR_HMC_ERR_M;
  1039. dev_dbg(&pf->pdev->dev,
  1040. "HMC Error interrupt - info 0x%x, data 0x%x\n",
  1041. rd32(hw, PFHMC_ERRORINFO),
  1042. rd32(hw, PFHMC_ERRORDATA));
  1043. }
  1044. /* Report and mask off any remaining unexpected interrupts */
  1045. oicr &= ena_mask;
  1046. if (oicr) {
  1047. dev_dbg(&pf->pdev->dev, "unhandled interrupt oicr=0x%08x\n",
  1048. oicr);
  1049. /* If a critical error is pending there is no choice but to
  1050. * reset the device.
  1051. */
  1052. if (oicr & (PFINT_OICR_PE_CRITERR_M |
  1053. PFINT_OICR_PCI_EXCEPTION_M |
  1054. PFINT_OICR_ECC_ERR_M))
  1055. set_bit(__ICE_PFR_REQ, pf->state);
  1056. ena_mask &= ~oicr;
  1057. }
  1058. ret = IRQ_HANDLED;
  1059. ena_intr:
  1060. /* re-enable interrupt causes that are not handled during this pass */
  1061. wr32(hw, PFINT_OICR_ENA, ena_mask);
  1062. if (!test_bit(__ICE_DOWN, pf->state)) {
  1063. ice_service_task_schedule(pf);
  1064. ice_irq_dynamic_ena(hw, NULL, NULL);
  1065. }
  1066. return ret;
  1067. }
  1068. /**
  1069. * ice_vsi_map_rings_to_vectors - Map VSI rings to interrupt vectors
  1070. * @vsi: the VSI being configured
  1071. *
  1072. * This function maps descriptor rings to the queue-specific vectors allotted
  1073. * through the MSI-X enabling code. On a constrained vector budget, we map Tx
  1074. * and Rx rings to the vector as "efficiently" as possible.
  1075. */
  1076. static void ice_vsi_map_rings_to_vectors(struct ice_vsi *vsi)
  1077. {
  1078. int q_vectors = vsi->num_q_vectors;
  1079. int tx_rings_rem, rx_rings_rem;
  1080. int v_id;
  1081. /* initially assigning remaining rings count to VSIs num queue value */
  1082. tx_rings_rem = vsi->num_txq;
  1083. rx_rings_rem = vsi->num_rxq;
  1084. for (v_id = 0; v_id < q_vectors; v_id++) {
  1085. struct ice_q_vector *q_vector = vsi->q_vectors[v_id];
  1086. int tx_rings_per_v, rx_rings_per_v, q_id, q_base;
  1087. /* Tx rings mapping to vector */
  1088. tx_rings_per_v = DIV_ROUND_UP(tx_rings_rem, q_vectors - v_id);
  1089. q_vector->num_ring_tx = tx_rings_per_v;
  1090. q_vector->tx.ring = NULL;
  1091. q_base = vsi->num_txq - tx_rings_rem;
  1092. for (q_id = q_base; q_id < (q_base + tx_rings_per_v); q_id++) {
  1093. struct ice_ring *tx_ring = vsi->tx_rings[q_id];
  1094. tx_ring->q_vector = q_vector;
  1095. tx_ring->next = q_vector->tx.ring;
  1096. q_vector->tx.ring = tx_ring;
  1097. }
  1098. tx_rings_rem -= tx_rings_per_v;
  1099. /* Rx rings mapping to vector */
  1100. rx_rings_per_v = DIV_ROUND_UP(rx_rings_rem, q_vectors - v_id);
  1101. q_vector->num_ring_rx = rx_rings_per_v;
  1102. q_vector->rx.ring = NULL;
  1103. q_base = vsi->num_rxq - rx_rings_rem;
  1104. for (q_id = q_base; q_id < (q_base + rx_rings_per_v); q_id++) {
  1105. struct ice_ring *rx_ring = vsi->rx_rings[q_id];
  1106. rx_ring->q_vector = q_vector;
  1107. rx_ring->next = q_vector->rx.ring;
  1108. q_vector->rx.ring = rx_ring;
  1109. }
  1110. rx_rings_rem -= rx_rings_per_v;
  1111. }
  1112. }
  1113. /**
  1114. * ice_vsi_set_num_qs - Set num queues, descriptors and vectors for a VSI
  1115. * @vsi: the VSI being configured
  1116. *
  1117. * Return 0 on success and a negative value on error
  1118. */
  1119. static void ice_vsi_set_num_qs(struct ice_vsi *vsi)
  1120. {
  1121. struct ice_pf *pf = vsi->back;
  1122. switch (vsi->type) {
  1123. case ICE_VSI_PF:
  1124. vsi->alloc_txq = pf->num_lan_tx;
  1125. vsi->alloc_rxq = pf->num_lan_rx;
  1126. vsi->num_desc = ALIGN(ICE_DFLT_NUM_DESC, ICE_REQ_DESC_MULTIPLE);
  1127. vsi->num_q_vectors = max_t(int, pf->num_lan_rx, pf->num_lan_tx);
  1128. break;
  1129. default:
  1130. dev_warn(&vsi->back->pdev->dev, "Unknown VSI type %d\n",
  1131. vsi->type);
  1132. break;
  1133. }
  1134. }
  1135. /**
  1136. * ice_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
  1137. * @vsi: VSI pointer
  1138. * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
  1139. *
  1140. * On error: returns error code (negative)
  1141. * On success: returns 0
  1142. */
  1143. static int ice_vsi_alloc_arrays(struct ice_vsi *vsi, bool alloc_qvectors)
  1144. {
  1145. struct ice_pf *pf = vsi->back;
  1146. /* allocate memory for both Tx and Rx ring pointers */
  1147. vsi->tx_rings = devm_kcalloc(&pf->pdev->dev, vsi->alloc_txq,
  1148. sizeof(struct ice_ring *), GFP_KERNEL);
  1149. if (!vsi->tx_rings)
  1150. goto err_txrings;
  1151. vsi->rx_rings = devm_kcalloc(&pf->pdev->dev, vsi->alloc_rxq,
  1152. sizeof(struct ice_ring *), GFP_KERNEL);
  1153. if (!vsi->rx_rings)
  1154. goto err_rxrings;
  1155. if (alloc_qvectors) {
  1156. /* allocate memory for q_vector pointers */
  1157. vsi->q_vectors = devm_kcalloc(&pf->pdev->dev,
  1158. vsi->num_q_vectors,
  1159. sizeof(struct ice_q_vector *),
  1160. GFP_KERNEL);
  1161. if (!vsi->q_vectors)
  1162. goto err_vectors;
  1163. }
  1164. return 0;
  1165. err_vectors:
  1166. devm_kfree(&pf->pdev->dev, vsi->rx_rings);
  1167. err_rxrings:
  1168. devm_kfree(&pf->pdev->dev, vsi->tx_rings);
  1169. err_txrings:
  1170. return -ENOMEM;
  1171. }
  1172. /**
  1173. * ice_msix_clean_rings - MSIX mode Interrupt Handler
  1174. * @irq: interrupt number
  1175. * @data: pointer to a q_vector
  1176. */
  1177. static irqreturn_t ice_msix_clean_rings(int __always_unused irq, void *data)
  1178. {
  1179. struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
  1180. if (!q_vector->tx.ring && !q_vector->rx.ring)
  1181. return IRQ_HANDLED;
  1182. napi_schedule(&q_vector->napi);
  1183. return IRQ_HANDLED;
  1184. }
  1185. /**
  1186. * ice_vsi_alloc - Allocates the next available struct vsi in the PF
  1187. * @pf: board private structure
  1188. * @type: type of VSI
  1189. *
  1190. * returns a pointer to a VSI on success, NULL on failure.
  1191. */
  1192. static struct ice_vsi *ice_vsi_alloc(struct ice_pf *pf, enum ice_vsi_type type)
  1193. {
  1194. struct ice_vsi *vsi = NULL;
  1195. /* Need to protect the allocation of the VSIs at the PF level */
  1196. mutex_lock(&pf->sw_mutex);
  1197. /* If we have already allocated our maximum number of VSIs,
  1198. * pf->next_vsi will be ICE_NO_VSI. If not, pf->next_vsi index
  1199. * is available to be populated
  1200. */
  1201. if (pf->next_vsi == ICE_NO_VSI) {
  1202. dev_dbg(&pf->pdev->dev, "out of VSI slots!\n");
  1203. goto unlock_pf;
  1204. }
  1205. vsi = devm_kzalloc(&pf->pdev->dev, sizeof(*vsi), GFP_KERNEL);
  1206. if (!vsi)
  1207. goto unlock_pf;
  1208. vsi->type = type;
  1209. vsi->back = pf;
  1210. set_bit(__ICE_DOWN, vsi->state);
  1211. vsi->idx = pf->next_vsi;
  1212. vsi->work_lmt = ICE_DFLT_IRQ_WORK;
  1213. ice_vsi_set_num_qs(vsi);
  1214. switch (vsi->type) {
  1215. case ICE_VSI_PF:
  1216. if (ice_vsi_alloc_arrays(vsi, true))
  1217. goto err_rings;
  1218. /* Setup default MSIX irq handler for VSI */
  1219. vsi->irq_handler = ice_msix_clean_rings;
  1220. break;
  1221. default:
  1222. dev_warn(&pf->pdev->dev, "Unknown VSI type %d\n", vsi->type);
  1223. goto unlock_pf;
  1224. }
  1225. /* fill VSI slot in the PF struct */
  1226. pf->vsi[pf->next_vsi] = vsi;
  1227. /* prepare pf->next_vsi for next use */
  1228. pf->next_vsi = ice_get_free_slot(pf->vsi, pf->num_alloc_vsi,
  1229. pf->next_vsi);
  1230. goto unlock_pf;
  1231. err_rings:
  1232. devm_kfree(&pf->pdev->dev, vsi);
  1233. vsi = NULL;
  1234. unlock_pf:
  1235. mutex_unlock(&pf->sw_mutex);
  1236. return vsi;
  1237. }
  1238. /**
  1239. * ice_free_irq_msix_misc - Unroll misc vector setup
  1240. * @pf: board private structure
  1241. */
  1242. static void ice_free_irq_msix_misc(struct ice_pf *pf)
  1243. {
  1244. /* disable OICR interrupt */
  1245. wr32(&pf->hw, PFINT_OICR_ENA, 0);
  1246. ice_flush(&pf->hw);
  1247. if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags) && pf->msix_entries) {
  1248. synchronize_irq(pf->msix_entries[pf->oicr_idx].vector);
  1249. devm_free_irq(&pf->pdev->dev,
  1250. pf->msix_entries[pf->oicr_idx].vector, pf);
  1251. }
  1252. ice_free_res(pf->irq_tracker, pf->oicr_idx, ICE_RES_MISC_VEC_ID);
  1253. }
  1254. /**
  1255. * ice_req_irq_msix_misc - Setup the misc vector to handle non queue events
  1256. * @pf: board private structure
  1257. *
  1258. * This sets up the handler for MSIX 0, which is used to manage the
  1259. * non-queue interrupts, e.g. AdminQ and errors. This is not used
  1260. * when in MSI or Legacy interrupt mode.
  1261. */
  1262. static int ice_req_irq_msix_misc(struct ice_pf *pf)
  1263. {
  1264. struct ice_hw *hw = &pf->hw;
  1265. int oicr_idx, err = 0;
  1266. u8 itr_gran;
  1267. u32 val;
  1268. if (!pf->int_name[0])
  1269. snprintf(pf->int_name, sizeof(pf->int_name) - 1, "%s-%s:misc",
  1270. dev_driver_string(&pf->pdev->dev),
  1271. dev_name(&pf->pdev->dev));
  1272. /* reserve one vector in irq_tracker for misc interrupts */
  1273. oicr_idx = ice_get_res(pf, pf->irq_tracker, 1, ICE_RES_MISC_VEC_ID);
  1274. if (oicr_idx < 0)
  1275. return oicr_idx;
  1276. pf->oicr_idx = oicr_idx;
  1277. err = devm_request_irq(&pf->pdev->dev,
  1278. pf->msix_entries[pf->oicr_idx].vector,
  1279. ice_misc_intr, 0, pf->int_name, pf);
  1280. if (err) {
  1281. dev_err(&pf->pdev->dev,
  1282. "devm_request_irq for %s failed: %d\n",
  1283. pf->int_name, err);
  1284. ice_free_res(pf->irq_tracker, 1, ICE_RES_MISC_VEC_ID);
  1285. return err;
  1286. }
  1287. ice_ena_misc_vector(pf);
  1288. val = (pf->oicr_idx & PFINT_OICR_CTL_MSIX_INDX_M) |
  1289. (ICE_RX_ITR & PFINT_OICR_CTL_ITR_INDX_M) |
  1290. PFINT_OICR_CTL_CAUSE_ENA_M;
  1291. wr32(hw, PFINT_OICR_CTL, val);
  1292. /* This enables Admin queue Interrupt causes */
  1293. val = (pf->oicr_idx & PFINT_FW_CTL_MSIX_INDX_M) |
  1294. (ICE_RX_ITR & PFINT_FW_CTL_ITR_INDX_M) |
  1295. PFINT_FW_CTL_CAUSE_ENA_M;
  1296. wr32(hw, PFINT_FW_CTL, val);
  1297. itr_gran = hw->itr_gran_200;
  1298. wr32(hw, GLINT_ITR(ICE_RX_ITR, pf->oicr_idx),
  1299. ITR_TO_REG(ICE_ITR_8K, itr_gran));
  1300. ice_flush(hw);
  1301. ice_irq_dynamic_ena(hw, NULL, NULL);
  1302. return 0;
  1303. }
  1304. /**
  1305. * ice_vsi_get_qs_contig - Assign a contiguous chunk of queues to VSI
  1306. * @vsi: the VSI getting queues
  1307. *
  1308. * Return 0 on success and a negative value on error
  1309. */
  1310. static int ice_vsi_get_qs_contig(struct ice_vsi *vsi)
  1311. {
  1312. struct ice_pf *pf = vsi->back;
  1313. int offset, ret = 0;
  1314. mutex_lock(&pf->avail_q_mutex);
  1315. /* look for contiguous block of queues for tx */
  1316. offset = bitmap_find_next_zero_area(pf->avail_txqs, ICE_MAX_TXQS,
  1317. 0, vsi->alloc_txq, 0);
  1318. if (offset < ICE_MAX_TXQS) {
  1319. int i;
  1320. bitmap_set(pf->avail_txqs, offset, vsi->alloc_txq);
  1321. for (i = 0; i < vsi->alloc_txq; i++)
  1322. vsi->txq_map[i] = i + offset;
  1323. } else {
  1324. ret = -ENOMEM;
  1325. vsi->tx_mapping_mode = ICE_VSI_MAP_SCATTER;
  1326. }
  1327. /* look for contiguous block of queues for rx */
  1328. offset = bitmap_find_next_zero_area(pf->avail_rxqs, ICE_MAX_RXQS,
  1329. 0, vsi->alloc_rxq, 0);
  1330. if (offset < ICE_MAX_RXQS) {
  1331. int i;
  1332. bitmap_set(pf->avail_rxqs, offset, vsi->alloc_rxq);
  1333. for (i = 0; i < vsi->alloc_rxq; i++)
  1334. vsi->rxq_map[i] = i + offset;
  1335. } else {
  1336. ret = -ENOMEM;
  1337. vsi->rx_mapping_mode = ICE_VSI_MAP_SCATTER;
  1338. }
  1339. mutex_unlock(&pf->avail_q_mutex);
  1340. return ret;
  1341. }
  1342. /**
  1343. * ice_vsi_get_qs_scatter - Assign a scattered queues to VSI
  1344. * @vsi: the VSI getting queues
  1345. *
  1346. * Return 0 on success and a negative value on error
  1347. */
  1348. static int ice_vsi_get_qs_scatter(struct ice_vsi *vsi)
  1349. {
  1350. struct ice_pf *pf = vsi->back;
  1351. int i, index = 0;
  1352. mutex_lock(&pf->avail_q_mutex);
  1353. if (vsi->tx_mapping_mode == ICE_VSI_MAP_SCATTER) {
  1354. for (i = 0; i < vsi->alloc_txq; i++) {
  1355. index = find_next_zero_bit(pf->avail_txqs,
  1356. ICE_MAX_TXQS, index);
  1357. if (index < ICE_MAX_TXQS) {
  1358. set_bit(index, pf->avail_txqs);
  1359. vsi->txq_map[i] = index;
  1360. } else {
  1361. goto err_scatter_tx;
  1362. }
  1363. }
  1364. }
  1365. if (vsi->rx_mapping_mode == ICE_VSI_MAP_SCATTER) {
  1366. for (i = 0; i < vsi->alloc_rxq; i++) {
  1367. index = find_next_zero_bit(pf->avail_rxqs,
  1368. ICE_MAX_RXQS, index);
  1369. if (index < ICE_MAX_RXQS) {
  1370. set_bit(index, pf->avail_rxqs);
  1371. vsi->rxq_map[i] = index;
  1372. } else {
  1373. goto err_scatter_rx;
  1374. }
  1375. }
  1376. }
  1377. mutex_unlock(&pf->avail_q_mutex);
  1378. return 0;
  1379. err_scatter_rx:
  1380. /* unflag any queues we have grabbed (i is failed position) */
  1381. for (index = 0; index < i; index++) {
  1382. clear_bit(vsi->rxq_map[index], pf->avail_rxqs);
  1383. vsi->rxq_map[index] = 0;
  1384. }
  1385. i = vsi->alloc_txq;
  1386. err_scatter_tx:
  1387. /* i is either position of failed attempt or vsi->alloc_txq */
  1388. for (index = 0; index < i; index++) {
  1389. clear_bit(vsi->txq_map[index], pf->avail_txqs);
  1390. vsi->txq_map[index] = 0;
  1391. }
  1392. mutex_unlock(&pf->avail_q_mutex);
  1393. return -ENOMEM;
  1394. }
  1395. /**
  1396. * ice_vsi_get_qs - Assign queues from PF to VSI
  1397. * @vsi: the VSI to assign queues to
  1398. *
  1399. * Returns 0 on success and a negative value on error
  1400. */
  1401. static int ice_vsi_get_qs(struct ice_vsi *vsi)
  1402. {
  1403. int ret = 0;
  1404. vsi->tx_mapping_mode = ICE_VSI_MAP_CONTIG;
  1405. vsi->rx_mapping_mode = ICE_VSI_MAP_CONTIG;
  1406. /* NOTE: ice_vsi_get_qs_contig() will set the rx/tx mapping
  1407. * modes individually to scatter if assigning contiguous queues
  1408. * to rx or tx fails
  1409. */
  1410. ret = ice_vsi_get_qs_contig(vsi);
  1411. if (ret < 0) {
  1412. if (vsi->tx_mapping_mode == ICE_VSI_MAP_SCATTER)
  1413. vsi->alloc_txq = max_t(u16, vsi->alloc_txq,
  1414. ICE_MAX_SCATTER_TXQS);
  1415. if (vsi->rx_mapping_mode == ICE_VSI_MAP_SCATTER)
  1416. vsi->alloc_rxq = max_t(u16, vsi->alloc_rxq,
  1417. ICE_MAX_SCATTER_RXQS);
  1418. ret = ice_vsi_get_qs_scatter(vsi);
  1419. }
  1420. return ret;
  1421. }
  1422. /**
  1423. * ice_vsi_put_qs - Release queues from VSI to PF
  1424. * @vsi: the VSI thats going to release queues
  1425. */
  1426. static void ice_vsi_put_qs(struct ice_vsi *vsi)
  1427. {
  1428. struct ice_pf *pf = vsi->back;
  1429. int i;
  1430. mutex_lock(&pf->avail_q_mutex);
  1431. for (i = 0; i < vsi->alloc_txq; i++) {
  1432. clear_bit(vsi->txq_map[i], pf->avail_txqs);
  1433. vsi->txq_map[i] = ICE_INVAL_Q_INDEX;
  1434. }
  1435. for (i = 0; i < vsi->alloc_rxq; i++) {
  1436. clear_bit(vsi->rxq_map[i], pf->avail_rxqs);
  1437. vsi->rxq_map[i] = ICE_INVAL_Q_INDEX;
  1438. }
  1439. mutex_unlock(&pf->avail_q_mutex);
  1440. }
  1441. /**
  1442. * ice_free_q_vector - Free memory allocated for a specific interrupt vector
  1443. * @vsi: VSI having the memory freed
  1444. * @v_idx: index of the vector to be freed
  1445. */
  1446. static void ice_free_q_vector(struct ice_vsi *vsi, int v_idx)
  1447. {
  1448. struct ice_q_vector *q_vector;
  1449. struct ice_ring *ring;
  1450. if (!vsi->q_vectors[v_idx]) {
  1451. dev_dbg(&vsi->back->pdev->dev, "Queue vector at index %d not found\n",
  1452. v_idx);
  1453. return;
  1454. }
  1455. q_vector = vsi->q_vectors[v_idx];
  1456. ice_for_each_ring(ring, q_vector->tx)
  1457. ring->q_vector = NULL;
  1458. ice_for_each_ring(ring, q_vector->rx)
  1459. ring->q_vector = NULL;
  1460. /* only VSI with an associated netdev is set up with NAPI */
  1461. if (vsi->netdev)
  1462. netif_napi_del(&q_vector->napi);
  1463. devm_kfree(&vsi->back->pdev->dev, q_vector);
  1464. vsi->q_vectors[v_idx] = NULL;
  1465. }
  1466. /**
  1467. * ice_vsi_free_q_vectors - Free memory allocated for interrupt vectors
  1468. * @vsi: the VSI having memory freed
  1469. */
  1470. static void ice_vsi_free_q_vectors(struct ice_vsi *vsi)
  1471. {
  1472. int v_idx;
  1473. for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
  1474. ice_free_q_vector(vsi, v_idx);
  1475. }
  1476. /**
  1477. * ice_cfg_netdev - Setup the netdev flags
  1478. * @vsi: the VSI being configured
  1479. *
  1480. * Returns 0 on success, negative value on failure
  1481. */
  1482. static int ice_cfg_netdev(struct ice_vsi *vsi)
  1483. {
  1484. netdev_features_t csumo_features;
  1485. netdev_features_t vlano_features;
  1486. netdev_features_t dflt_features;
  1487. netdev_features_t tso_features;
  1488. struct ice_netdev_priv *np;
  1489. struct net_device *netdev;
  1490. u8 mac_addr[ETH_ALEN];
  1491. netdev = alloc_etherdev_mqs(sizeof(struct ice_netdev_priv),
  1492. vsi->alloc_txq, vsi->alloc_rxq);
  1493. if (!netdev)
  1494. return -ENOMEM;
  1495. vsi->netdev = netdev;
  1496. np = netdev_priv(netdev);
  1497. np->vsi = vsi;
  1498. dflt_features = NETIF_F_SG |
  1499. NETIF_F_HIGHDMA |
  1500. NETIF_F_RXHASH;
  1501. csumo_features = NETIF_F_RXCSUM |
  1502. NETIF_F_IP_CSUM |
  1503. NETIF_F_IPV6_CSUM;
  1504. vlano_features = NETIF_F_HW_VLAN_CTAG_FILTER |
  1505. NETIF_F_HW_VLAN_CTAG_TX |
  1506. NETIF_F_HW_VLAN_CTAG_RX;
  1507. tso_features = NETIF_F_TSO;
  1508. /* set features that user can change */
  1509. netdev->hw_features = dflt_features | csumo_features |
  1510. vlano_features | tso_features;
  1511. /* enable features */
  1512. netdev->features |= netdev->hw_features;
  1513. /* encap and VLAN devices inherit default, csumo and tso features */
  1514. netdev->hw_enc_features |= dflt_features | csumo_features |
  1515. tso_features;
  1516. netdev->vlan_features |= dflt_features | csumo_features |
  1517. tso_features;
  1518. if (vsi->type == ICE_VSI_PF) {
  1519. SET_NETDEV_DEV(netdev, &vsi->back->pdev->dev);
  1520. ether_addr_copy(mac_addr, vsi->port_info->mac.perm_addr);
  1521. ether_addr_copy(netdev->dev_addr, mac_addr);
  1522. ether_addr_copy(netdev->perm_addr, mac_addr);
  1523. }
  1524. netdev->priv_flags |= IFF_UNICAST_FLT;
  1525. /* assign netdev_ops */
  1526. netdev->netdev_ops = &ice_netdev_ops;
  1527. /* setup watchdog timeout value to be 5 second */
  1528. netdev->watchdog_timeo = 5 * HZ;
  1529. ice_set_ethtool_ops(netdev);
  1530. netdev->min_mtu = ETH_MIN_MTU;
  1531. netdev->max_mtu = ICE_MAX_MTU;
  1532. return 0;
  1533. }
  1534. /**
  1535. * ice_vsi_free_arrays - clean up vsi resources
  1536. * @vsi: pointer to VSI being cleared
  1537. * @free_qvectors: bool to specify if q_vectors should be deallocated
  1538. */
  1539. static void ice_vsi_free_arrays(struct ice_vsi *vsi, bool free_qvectors)
  1540. {
  1541. struct ice_pf *pf = vsi->back;
  1542. /* free the ring and vector containers */
  1543. if (free_qvectors && vsi->q_vectors) {
  1544. devm_kfree(&pf->pdev->dev, vsi->q_vectors);
  1545. vsi->q_vectors = NULL;
  1546. }
  1547. if (vsi->tx_rings) {
  1548. devm_kfree(&pf->pdev->dev, vsi->tx_rings);
  1549. vsi->tx_rings = NULL;
  1550. }
  1551. if (vsi->rx_rings) {
  1552. devm_kfree(&pf->pdev->dev, vsi->rx_rings);
  1553. vsi->rx_rings = NULL;
  1554. }
  1555. }
  1556. /**
  1557. * ice_vsi_clear - clean up and deallocate the provided vsi
  1558. * @vsi: pointer to VSI being cleared
  1559. *
  1560. * This deallocates the vsi's queue resources, removes it from the PF's
  1561. * VSI array if necessary, and deallocates the VSI
  1562. *
  1563. * Returns 0 on success, negative on failure
  1564. */
  1565. static int ice_vsi_clear(struct ice_vsi *vsi)
  1566. {
  1567. struct ice_pf *pf = NULL;
  1568. if (!vsi)
  1569. return 0;
  1570. if (!vsi->back)
  1571. return -EINVAL;
  1572. pf = vsi->back;
  1573. if (!pf->vsi[vsi->idx] || pf->vsi[vsi->idx] != vsi) {
  1574. dev_dbg(&pf->pdev->dev, "vsi does not exist at pf->vsi[%d]\n",
  1575. vsi->idx);
  1576. return -EINVAL;
  1577. }
  1578. mutex_lock(&pf->sw_mutex);
  1579. /* updates the PF for this cleared vsi */
  1580. pf->vsi[vsi->idx] = NULL;
  1581. if (vsi->idx < pf->next_vsi)
  1582. pf->next_vsi = vsi->idx;
  1583. ice_vsi_free_arrays(vsi, true);
  1584. mutex_unlock(&pf->sw_mutex);
  1585. devm_kfree(&pf->pdev->dev, vsi);
  1586. return 0;
  1587. }
  1588. /**
  1589. * ice_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
  1590. * @vsi: the VSI being configured
  1591. * @v_idx: index of the vector in the vsi struct
  1592. *
  1593. * We allocate one q_vector. If allocation fails we return -ENOMEM.
  1594. */
  1595. static int ice_vsi_alloc_q_vector(struct ice_vsi *vsi, int v_idx)
  1596. {
  1597. struct ice_pf *pf = vsi->back;
  1598. struct ice_q_vector *q_vector;
  1599. /* allocate q_vector */
  1600. q_vector = devm_kzalloc(&pf->pdev->dev, sizeof(*q_vector), GFP_KERNEL);
  1601. if (!q_vector)
  1602. return -ENOMEM;
  1603. q_vector->vsi = vsi;
  1604. q_vector->v_idx = v_idx;
  1605. /* only set affinity_mask if the CPU is online */
  1606. if (cpu_online(v_idx))
  1607. cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
  1608. if (vsi->netdev)
  1609. netif_napi_add(vsi->netdev, &q_vector->napi, ice_napi_poll,
  1610. NAPI_POLL_WEIGHT);
  1611. /* tie q_vector and vsi together */
  1612. vsi->q_vectors[v_idx] = q_vector;
  1613. return 0;
  1614. }
  1615. /**
  1616. * ice_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
  1617. * @vsi: the VSI being configured
  1618. *
  1619. * We allocate one q_vector per queue interrupt. If allocation fails we
  1620. * return -ENOMEM.
  1621. */
  1622. static int ice_vsi_alloc_q_vectors(struct ice_vsi *vsi)
  1623. {
  1624. struct ice_pf *pf = vsi->back;
  1625. int v_idx = 0, num_q_vectors;
  1626. int err;
  1627. if (vsi->q_vectors[0]) {
  1628. dev_dbg(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
  1629. vsi->vsi_num);
  1630. return -EEXIST;
  1631. }
  1632. if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags)) {
  1633. num_q_vectors = vsi->num_q_vectors;
  1634. } else {
  1635. err = -EINVAL;
  1636. goto err_out;
  1637. }
  1638. for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
  1639. err = ice_vsi_alloc_q_vector(vsi, v_idx);
  1640. if (err)
  1641. goto err_out;
  1642. }
  1643. return 0;
  1644. err_out:
  1645. while (v_idx--)
  1646. ice_free_q_vector(vsi, v_idx);
  1647. dev_err(&pf->pdev->dev,
  1648. "Failed to allocate %d q_vector for VSI %d, ret=%d\n",
  1649. vsi->num_q_vectors, vsi->vsi_num, err);
  1650. vsi->num_q_vectors = 0;
  1651. return err;
  1652. }
  1653. /**
  1654. * ice_vsi_setup_vector_base - Set up the base vector for the given VSI
  1655. * @vsi: ptr to the VSI
  1656. *
  1657. * This should only be called after ice_vsi_alloc() which allocates the
  1658. * corresponding SW VSI structure and initializes num_queue_pairs for the
  1659. * newly allocated VSI.
  1660. *
  1661. * Returns 0 on success or negative on failure
  1662. */
  1663. static int ice_vsi_setup_vector_base(struct ice_vsi *vsi)
  1664. {
  1665. struct ice_pf *pf = vsi->back;
  1666. int num_q_vectors = 0;
  1667. if (vsi->base_vector) {
  1668. dev_dbg(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
  1669. vsi->vsi_num, vsi->base_vector);
  1670. return -EEXIST;
  1671. }
  1672. if (!test_bit(ICE_FLAG_MSIX_ENA, pf->flags))
  1673. return -ENOENT;
  1674. switch (vsi->type) {
  1675. case ICE_VSI_PF:
  1676. num_q_vectors = vsi->num_q_vectors;
  1677. break;
  1678. default:
  1679. dev_warn(&vsi->back->pdev->dev, "Unknown VSI type %d\n",
  1680. vsi->type);
  1681. break;
  1682. }
  1683. if (num_q_vectors)
  1684. vsi->base_vector = ice_get_res(pf, pf->irq_tracker,
  1685. num_q_vectors, vsi->idx);
  1686. if (vsi->base_vector < 0) {
  1687. dev_err(&pf->pdev->dev,
  1688. "Failed to get tracking for %d vectors for VSI %d, err=%d\n",
  1689. num_q_vectors, vsi->vsi_num, vsi->base_vector);
  1690. return -ENOENT;
  1691. }
  1692. return 0;
  1693. }
  1694. /**
  1695. * ice_fill_rss_lut - Fill the RSS lookup table with default values
  1696. * @lut: Lookup table
  1697. * @rss_table_size: Lookup table size
  1698. * @rss_size: Range of queue number for hashing
  1699. */
  1700. void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size)
  1701. {
  1702. u16 i;
  1703. for (i = 0; i < rss_table_size; i++)
  1704. lut[i] = i % rss_size;
  1705. }
  1706. /**
  1707. * ice_vsi_cfg_rss - Configure RSS params for a VSI
  1708. * @vsi: VSI to be configured
  1709. */
  1710. static int ice_vsi_cfg_rss(struct ice_vsi *vsi)
  1711. {
  1712. u8 seed[ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE];
  1713. struct ice_aqc_get_set_rss_keys *key;
  1714. struct ice_pf *pf = vsi->back;
  1715. enum ice_status status;
  1716. int err = 0;
  1717. u8 *lut;
  1718. vsi->rss_size = min_t(int, vsi->rss_size, vsi->num_rxq);
  1719. lut = devm_kzalloc(&pf->pdev->dev, vsi->rss_table_size, GFP_KERNEL);
  1720. if (!lut)
  1721. return -ENOMEM;
  1722. if (vsi->rss_lut_user)
  1723. memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
  1724. else
  1725. ice_fill_rss_lut(lut, vsi->rss_table_size, vsi->rss_size);
  1726. status = ice_aq_set_rss_lut(&pf->hw, vsi->vsi_num, vsi->rss_lut_type,
  1727. lut, vsi->rss_table_size);
  1728. if (status) {
  1729. dev_err(&vsi->back->pdev->dev,
  1730. "set_rss_lut failed, error %d\n", status);
  1731. err = -EIO;
  1732. goto ice_vsi_cfg_rss_exit;
  1733. }
  1734. key = devm_kzalloc(&vsi->back->pdev->dev, sizeof(*key), GFP_KERNEL);
  1735. if (!key) {
  1736. err = -ENOMEM;
  1737. goto ice_vsi_cfg_rss_exit;
  1738. }
  1739. if (vsi->rss_hkey_user)
  1740. memcpy(seed, vsi->rss_hkey_user,
  1741. ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE);
  1742. else
  1743. netdev_rss_key_fill((void *)seed,
  1744. ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE);
  1745. memcpy(&key->standard_rss_key, seed,
  1746. ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE);
  1747. status = ice_aq_set_rss_key(&pf->hw, vsi->vsi_num, key);
  1748. if (status) {
  1749. dev_err(&vsi->back->pdev->dev, "set_rss_key failed, error %d\n",
  1750. status);
  1751. err = -EIO;
  1752. }
  1753. devm_kfree(&pf->pdev->dev, key);
  1754. ice_vsi_cfg_rss_exit:
  1755. devm_kfree(&pf->pdev->dev, lut);
  1756. return err;
  1757. }
  1758. /**
  1759. * ice_vsi_setup - Set up a VSI by a given type
  1760. * @pf: board private structure
  1761. * @type: VSI type
  1762. * @pi: pointer to the port_info instance
  1763. *
  1764. * This allocates the sw VSI structure and its queue resources.
  1765. *
  1766. * Returns pointer to the successfully allocated and configure VSI sw struct on
  1767. * success, otherwise returns NULL on failure.
  1768. */
  1769. static struct ice_vsi *
  1770. ice_vsi_setup(struct ice_pf *pf, enum ice_vsi_type type,
  1771. struct ice_port_info *pi)
  1772. {
  1773. struct device *dev = &pf->pdev->dev;
  1774. struct ice_vsi_ctx ctxt = { 0 };
  1775. struct ice_vsi *vsi;
  1776. int ret;
  1777. vsi = ice_vsi_alloc(pf, type);
  1778. if (!vsi) {
  1779. dev_err(dev, "could not allocate VSI\n");
  1780. return NULL;
  1781. }
  1782. vsi->port_info = pi;
  1783. vsi->vsw = pf->first_sw;
  1784. if (ice_vsi_get_qs(vsi)) {
  1785. dev_err(dev, "Failed to allocate queues. vsi->idx = %d\n",
  1786. vsi->idx);
  1787. goto err_get_qs;
  1788. }
  1789. /* set RSS capabilities */
  1790. ice_vsi_set_rss_params(vsi);
  1791. /* create the VSI */
  1792. ret = ice_vsi_add(vsi);
  1793. if (ret)
  1794. goto err_vsi;
  1795. ctxt.vsi_num = vsi->vsi_num;
  1796. switch (vsi->type) {
  1797. case ICE_VSI_PF:
  1798. ret = ice_cfg_netdev(vsi);
  1799. if (ret)
  1800. goto err_cfg_netdev;
  1801. ret = register_netdev(vsi->netdev);
  1802. if (ret)
  1803. goto err_register_netdev;
  1804. netif_carrier_off(vsi->netdev);
  1805. /* make sure transmit queues start off as stopped */
  1806. netif_tx_stop_all_queues(vsi->netdev);
  1807. ret = ice_vsi_alloc_q_vectors(vsi);
  1808. if (ret)
  1809. goto err_msix;
  1810. ret = ice_vsi_setup_vector_base(vsi);
  1811. if (ret)
  1812. goto err_rings;
  1813. ret = ice_vsi_alloc_rings(vsi);
  1814. if (ret)
  1815. goto err_rings;
  1816. ice_vsi_map_rings_to_vectors(vsi);
  1817. /* Do not exit if configuring RSS had an issue, at least
  1818. * receive traffic on first queue. Hence no need to capture
  1819. * return value
  1820. */
  1821. if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
  1822. ice_vsi_cfg_rss(vsi);
  1823. break;
  1824. default:
  1825. /* if vsi type is not recognized, clean up the resources and
  1826. * exit
  1827. */
  1828. goto err_rings;
  1829. }
  1830. return vsi;
  1831. err_rings:
  1832. ice_vsi_free_q_vectors(vsi);
  1833. err_msix:
  1834. if (vsi->netdev && vsi->netdev->reg_state == NETREG_REGISTERED)
  1835. unregister_netdev(vsi->netdev);
  1836. err_register_netdev:
  1837. if (vsi->netdev) {
  1838. free_netdev(vsi->netdev);
  1839. vsi->netdev = NULL;
  1840. }
  1841. err_cfg_netdev:
  1842. ret = ice_aq_free_vsi(&pf->hw, &ctxt, false, NULL);
  1843. if (ret)
  1844. dev_err(&vsi->back->pdev->dev,
  1845. "Free VSI AQ call failed, err %d\n", ret);
  1846. err_vsi:
  1847. ice_vsi_put_qs(vsi);
  1848. err_get_qs:
  1849. pf->q_left_tx += vsi->alloc_txq;
  1850. pf->q_left_rx += vsi->alloc_rxq;
  1851. ice_vsi_clear(vsi);
  1852. return NULL;
  1853. }
  1854. /**
  1855. * ice_vsi_add_vlan - Add vsi membership for given vlan
  1856. * @vsi: the vsi being configured
  1857. * @vid: vlan id to be added
  1858. */
  1859. static int ice_vsi_add_vlan(struct ice_vsi *vsi, u16 vid)
  1860. {
  1861. struct ice_fltr_list_entry *tmp;
  1862. struct ice_pf *pf = vsi->back;
  1863. LIST_HEAD(tmp_add_list);
  1864. enum ice_status status;
  1865. int err = 0;
  1866. tmp = devm_kzalloc(&pf->pdev->dev, sizeof(*tmp), GFP_KERNEL);
  1867. if (!tmp)
  1868. return -ENOMEM;
  1869. tmp->fltr_info.lkup_type = ICE_SW_LKUP_VLAN;
  1870. tmp->fltr_info.fltr_act = ICE_FWD_TO_VSI;
  1871. tmp->fltr_info.flag = ICE_FLTR_TX;
  1872. tmp->fltr_info.src = vsi->vsi_num;
  1873. tmp->fltr_info.fwd_id.vsi_id = vsi->vsi_num;
  1874. tmp->fltr_info.l_data.vlan.vlan_id = vid;
  1875. INIT_LIST_HEAD(&tmp->list_entry);
  1876. list_add(&tmp->list_entry, &tmp_add_list);
  1877. status = ice_add_vlan(&pf->hw, &tmp_add_list);
  1878. if (status) {
  1879. err = -ENODEV;
  1880. dev_err(&pf->pdev->dev, "Failure Adding VLAN %d on VSI %i\n",
  1881. vid, vsi->vsi_num);
  1882. }
  1883. ice_free_fltr_list(&pf->pdev->dev, &tmp_add_list);
  1884. return err;
  1885. }
  1886. /**
  1887. * ice_vlan_rx_add_vid - Add a vlan id filter to HW offload
  1888. * @netdev: network interface to be adjusted
  1889. * @proto: unused protocol
  1890. * @vid: vlan id to be added
  1891. *
  1892. * net_device_ops implementation for adding vlan ids
  1893. */
  1894. static int ice_vlan_rx_add_vid(struct net_device *netdev,
  1895. __always_unused __be16 proto, u16 vid)
  1896. {
  1897. struct ice_netdev_priv *np = netdev_priv(netdev);
  1898. struct ice_vsi *vsi = np->vsi;
  1899. int ret = 0;
  1900. if (vid >= VLAN_N_VID) {
  1901. netdev_err(netdev, "VLAN id requested %d is out of range %d\n",
  1902. vid, VLAN_N_VID);
  1903. return -EINVAL;
  1904. }
  1905. if (vsi->info.pvid)
  1906. return -EINVAL;
  1907. /* Add all VLAN ids including 0 to the switch filter. VLAN id 0 is
  1908. * needed to continue allowing all untagged packets since VLAN prune
  1909. * list is applied to all packets by the switch
  1910. */
  1911. ret = ice_vsi_add_vlan(vsi, vid);
  1912. if (!ret)
  1913. set_bit(vid, vsi->active_vlans);
  1914. return ret;
  1915. }
  1916. /**
  1917. * ice_vsi_kill_vlan - Remove VSI membership for a given VLAN
  1918. * @vsi: the VSI being configured
  1919. * @vid: VLAN id to be removed
  1920. */
  1921. static void ice_vsi_kill_vlan(struct ice_vsi *vsi, u16 vid)
  1922. {
  1923. struct ice_fltr_list_entry *list;
  1924. struct ice_pf *pf = vsi->back;
  1925. LIST_HEAD(tmp_add_list);
  1926. list = devm_kzalloc(&pf->pdev->dev, sizeof(*list), GFP_KERNEL);
  1927. if (!list)
  1928. return;
  1929. list->fltr_info.lkup_type = ICE_SW_LKUP_VLAN;
  1930. list->fltr_info.fwd_id.vsi_id = vsi->vsi_num;
  1931. list->fltr_info.fltr_act = ICE_FWD_TO_VSI;
  1932. list->fltr_info.l_data.vlan.vlan_id = vid;
  1933. list->fltr_info.flag = ICE_FLTR_TX;
  1934. list->fltr_info.src = vsi->vsi_num;
  1935. INIT_LIST_HEAD(&list->list_entry);
  1936. list_add(&list->list_entry, &tmp_add_list);
  1937. if (ice_remove_vlan(&pf->hw, &tmp_add_list))
  1938. dev_err(&pf->pdev->dev, "Error removing VLAN %d on vsi %i\n",
  1939. vid, vsi->vsi_num);
  1940. ice_free_fltr_list(&pf->pdev->dev, &tmp_add_list);
  1941. }
  1942. /**
  1943. * ice_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
  1944. * @netdev: network interface to be adjusted
  1945. * @proto: unused protocol
  1946. * @vid: vlan id to be removed
  1947. *
  1948. * net_device_ops implementation for removing vlan ids
  1949. */
  1950. static int ice_vlan_rx_kill_vid(struct net_device *netdev,
  1951. __always_unused __be16 proto, u16 vid)
  1952. {
  1953. struct ice_netdev_priv *np = netdev_priv(netdev);
  1954. struct ice_vsi *vsi = np->vsi;
  1955. if (vsi->info.pvid)
  1956. return -EINVAL;
  1957. /* return code is ignored as there is nothing a user
  1958. * can do about failure to remove and a log message was
  1959. * already printed from the other function
  1960. */
  1961. ice_vsi_kill_vlan(vsi, vid);
  1962. clear_bit(vid, vsi->active_vlans);
  1963. return 0;
  1964. }
  1965. /**
  1966. * ice_setup_pf_sw - Setup the HW switch on startup or after reset
  1967. * @pf: board private structure
  1968. *
  1969. * Returns 0 on success, negative value on failure
  1970. */
  1971. static int ice_setup_pf_sw(struct ice_pf *pf)
  1972. {
  1973. LIST_HEAD(tmp_add_list);
  1974. u8 broadcast[ETH_ALEN];
  1975. struct ice_vsi *vsi;
  1976. int status = 0;
  1977. vsi = ice_vsi_setup(pf, ICE_VSI_PF, pf->hw.port_info);
  1978. if (!vsi) {
  1979. status = -ENOMEM;
  1980. goto error_exit;
  1981. }
  1982. /* tmp_add_list contains a list of MAC addresses for which MAC
  1983. * filters need to be programmed. Add the VSI's unicast MAC to
  1984. * this list
  1985. */
  1986. status = ice_add_mac_to_list(vsi, &tmp_add_list,
  1987. vsi->port_info->mac.perm_addr);
  1988. if (status)
  1989. goto error_exit;
  1990. /* VSI needs to receive broadcast traffic, so add the broadcast
  1991. * MAC address to the list.
  1992. */
  1993. eth_broadcast_addr(broadcast);
  1994. status = ice_add_mac_to_list(vsi, &tmp_add_list, broadcast);
  1995. if (status)
  1996. goto error_exit;
  1997. /* program MAC filters for entries in tmp_add_list */
  1998. status = ice_add_mac(&pf->hw, &tmp_add_list);
  1999. if (status) {
  2000. dev_err(&pf->pdev->dev, "Could not add MAC filters\n");
  2001. status = -ENOMEM;
  2002. goto error_exit;
  2003. }
  2004. ice_free_fltr_list(&pf->pdev->dev, &tmp_add_list);
  2005. return status;
  2006. error_exit:
  2007. ice_free_fltr_list(&pf->pdev->dev, &tmp_add_list);
  2008. if (vsi) {
  2009. ice_vsi_free_q_vectors(vsi);
  2010. if (vsi->netdev && vsi->netdev->reg_state == NETREG_REGISTERED)
  2011. unregister_netdev(vsi->netdev);
  2012. if (vsi->netdev) {
  2013. free_netdev(vsi->netdev);
  2014. vsi->netdev = NULL;
  2015. }
  2016. ice_vsi_delete(vsi);
  2017. ice_vsi_put_qs(vsi);
  2018. pf->q_left_tx += vsi->alloc_txq;
  2019. pf->q_left_rx += vsi->alloc_rxq;
  2020. ice_vsi_clear(vsi);
  2021. }
  2022. return status;
  2023. }
  2024. /**
  2025. * ice_determine_q_usage - Calculate queue distribution
  2026. * @pf: board private structure
  2027. *
  2028. * Return -ENOMEM if we don't get enough queues for all ports
  2029. */
  2030. static void ice_determine_q_usage(struct ice_pf *pf)
  2031. {
  2032. u16 q_left_tx, q_left_rx;
  2033. q_left_tx = pf->hw.func_caps.common_cap.num_txq;
  2034. q_left_rx = pf->hw.func_caps.common_cap.num_rxq;
  2035. /* initial support for only 1 tx queue */
  2036. pf->num_lan_tx = 1;
  2037. /* only 1 rx queue unless RSS is enabled */
  2038. if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags))
  2039. pf->num_lan_rx = 1;
  2040. else
  2041. pf->num_lan_rx = min_t(int, q_left_rx, num_online_cpus());
  2042. pf->q_left_tx = q_left_tx - pf->num_lan_tx;
  2043. pf->q_left_rx = q_left_rx - pf->num_lan_rx;
  2044. }
  2045. /**
  2046. * ice_deinit_pf - Unrolls initialziations done by ice_init_pf
  2047. * @pf: board private structure to initialize
  2048. */
  2049. static void ice_deinit_pf(struct ice_pf *pf)
  2050. {
  2051. if (pf->serv_tmr.function)
  2052. del_timer_sync(&pf->serv_tmr);
  2053. if (pf->serv_task.func)
  2054. cancel_work_sync(&pf->serv_task);
  2055. mutex_destroy(&pf->sw_mutex);
  2056. mutex_destroy(&pf->avail_q_mutex);
  2057. }
  2058. /**
  2059. * ice_init_pf - Initialize general software structures (struct ice_pf)
  2060. * @pf: board private structure to initialize
  2061. */
  2062. static void ice_init_pf(struct ice_pf *pf)
  2063. {
  2064. bitmap_zero(pf->flags, ICE_PF_FLAGS_NBITS);
  2065. set_bit(ICE_FLAG_MSIX_ENA, pf->flags);
  2066. mutex_init(&pf->sw_mutex);
  2067. mutex_init(&pf->avail_q_mutex);
  2068. /* Clear avail_[t|r]x_qs bitmaps (set all to avail) */
  2069. mutex_lock(&pf->avail_q_mutex);
  2070. bitmap_zero(pf->avail_txqs, ICE_MAX_TXQS);
  2071. bitmap_zero(pf->avail_rxqs, ICE_MAX_RXQS);
  2072. mutex_unlock(&pf->avail_q_mutex);
  2073. if (pf->hw.func_caps.common_cap.rss_table_size)
  2074. set_bit(ICE_FLAG_RSS_ENA, pf->flags);
  2075. /* setup service timer and periodic service task */
  2076. timer_setup(&pf->serv_tmr, ice_service_timer, 0);
  2077. pf->serv_tmr_period = HZ;
  2078. INIT_WORK(&pf->serv_task, ice_service_task);
  2079. clear_bit(__ICE_SERVICE_SCHED, pf->state);
  2080. }
  2081. /**
  2082. * ice_ena_msix_range - Request a range of MSIX vectors from the OS
  2083. * @pf: board private structure
  2084. *
  2085. * compute the number of MSIX vectors required (v_budget) and request from
  2086. * the OS. Return the number of vectors reserved or negative on failure
  2087. */
  2088. static int ice_ena_msix_range(struct ice_pf *pf)
  2089. {
  2090. int v_left, v_actual, v_budget = 0;
  2091. int needed, err, i;
  2092. v_left = pf->hw.func_caps.common_cap.num_msix_vectors;
  2093. /* reserve one vector for miscellaneous handler */
  2094. needed = 1;
  2095. v_budget += needed;
  2096. v_left -= needed;
  2097. /* reserve vectors for LAN traffic */
  2098. pf->num_lan_msix = min_t(int, num_online_cpus(), v_left);
  2099. v_budget += pf->num_lan_msix;
  2100. pf->msix_entries = devm_kcalloc(&pf->pdev->dev, v_budget,
  2101. sizeof(struct msix_entry), GFP_KERNEL);
  2102. if (!pf->msix_entries) {
  2103. err = -ENOMEM;
  2104. goto exit_err;
  2105. }
  2106. for (i = 0; i < v_budget; i++)
  2107. pf->msix_entries[i].entry = i;
  2108. /* actually reserve the vectors */
  2109. v_actual = pci_enable_msix_range(pf->pdev, pf->msix_entries,
  2110. ICE_MIN_MSIX, v_budget);
  2111. if (v_actual < 0) {
  2112. dev_err(&pf->pdev->dev, "unable to reserve MSI-X vectors\n");
  2113. err = v_actual;
  2114. goto msix_err;
  2115. }
  2116. if (v_actual < v_budget) {
  2117. dev_warn(&pf->pdev->dev,
  2118. "not enough vectors. requested = %d, obtained = %d\n",
  2119. v_budget, v_actual);
  2120. if (v_actual >= (pf->num_lan_msix + 1)) {
  2121. pf->num_avail_msix = v_actual - (pf->num_lan_msix + 1);
  2122. } else if (v_actual >= 2) {
  2123. pf->num_lan_msix = 1;
  2124. pf->num_avail_msix = v_actual - 2;
  2125. } else {
  2126. pci_disable_msix(pf->pdev);
  2127. err = -ERANGE;
  2128. goto msix_err;
  2129. }
  2130. }
  2131. return v_actual;
  2132. msix_err:
  2133. devm_kfree(&pf->pdev->dev, pf->msix_entries);
  2134. goto exit_err;
  2135. exit_err:
  2136. pf->num_lan_msix = 0;
  2137. clear_bit(ICE_FLAG_MSIX_ENA, pf->flags);
  2138. return err;
  2139. }
  2140. /**
  2141. * ice_dis_msix - Disable MSI-X interrupt setup in OS
  2142. * @pf: board private structure
  2143. */
  2144. static void ice_dis_msix(struct ice_pf *pf)
  2145. {
  2146. pci_disable_msix(pf->pdev);
  2147. devm_kfree(&pf->pdev->dev, pf->msix_entries);
  2148. pf->msix_entries = NULL;
  2149. clear_bit(ICE_FLAG_MSIX_ENA, pf->flags);
  2150. }
  2151. /**
  2152. * ice_init_interrupt_scheme - Determine proper interrupt scheme
  2153. * @pf: board private structure to initialize
  2154. */
  2155. static int ice_init_interrupt_scheme(struct ice_pf *pf)
  2156. {
  2157. int vectors = 0;
  2158. ssize_t size;
  2159. if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags))
  2160. vectors = ice_ena_msix_range(pf);
  2161. else
  2162. return -ENODEV;
  2163. if (vectors < 0)
  2164. return vectors;
  2165. /* set up vector assignment tracking */
  2166. size = sizeof(struct ice_res_tracker) + (sizeof(u16) * vectors);
  2167. pf->irq_tracker = devm_kzalloc(&pf->pdev->dev, size, GFP_KERNEL);
  2168. if (!pf->irq_tracker) {
  2169. ice_dis_msix(pf);
  2170. return -ENOMEM;
  2171. }
  2172. pf->irq_tracker->num_entries = vectors;
  2173. return 0;
  2174. }
  2175. /**
  2176. * ice_clear_interrupt_scheme - Undo things done by ice_init_interrupt_scheme
  2177. * @pf: board private structure
  2178. */
  2179. static void ice_clear_interrupt_scheme(struct ice_pf *pf)
  2180. {
  2181. if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags))
  2182. ice_dis_msix(pf);
  2183. devm_kfree(&pf->pdev->dev, pf->irq_tracker);
  2184. pf->irq_tracker = NULL;
  2185. }
  2186. /**
  2187. * ice_probe - Device initialization routine
  2188. * @pdev: PCI device information struct
  2189. * @ent: entry in ice_pci_tbl
  2190. *
  2191. * Returns 0 on success, negative on failure
  2192. */
  2193. static int ice_probe(struct pci_dev *pdev,
  2194. const struct pci_device_id __always_unused *ent)
  2195. {
  2196. struct ice_pf *pf;
  2197. struct ice_hw *hw;
  2198. int err;
  2199. /* this driver uses devres, see Documentation/driver-model/devres.txt */
  2200. err = pcim_enable_device(pdev);
  2201. if (err)
  2202. return err;
  2203. err = pcim_iomap_regions(pdev, BIT(ICE_BAR0), pci_name(pdev));
  2204. if (err) {
  2205. dev_err(&pdev->dev, "I/O map error %d\n", err);
  2206. return err;
  2207. }
  2208. pf = devm_kzalloc(&pdev->dev, sizeof(*pf), GFP_KERNEL);
  2209. if (!pf)
  2210. return -ENOMEM;
  2211. /* set up for high or low dma */
  2212. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
  2213. if (err)
  2214. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  2215. if (err) {
  2216. dev_err(&pdev->dev, "DMA configuration failed: 0x%x\n", err);
  2217. return err;
  2218. }
  2219. pci_enable_pcie_error_reporting(pdev);
  2220. pci_set_master(pdev);
  2221. pf->pdev = pdev;
  2222. pci_set_drvdata(pdev, pf);
  2223. set_bit(__ICE_DOWN, pf->state);
  2224. hw = &pf->hw;
  2225. hw->hw_addr = pcim_iomap_table(pdev)[ICE_BAR0];
  2226. hw->back = pf;
  2227. hw->vendor_id = pdev->vendor;
  2228. hw->device_id = pdev->device;
  2229. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  2230. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  2231. hw->subsystem_device_id = pdev->subsystem_device;
  2232. hw->bus.device = PCI_SLOT(pdev->devfn);
  2233. hw->bus.func = PCI_FUNC(pdev->devfn);
  2234. ice_set_ctrlq_len(hw);
  2235. pf->msg_enable = netif_msg_init(debug, ICE_DFLT_NETIF_M);
  2236. #ifndef CONFIG_DYNAMIC_DEBUG
  2237. if (debug < -1)
  2238. hw->debug_mask = debug;
  2239. #endif
  2240. err = ice_init_hw(hw);
  2241. if (err) {
  2242. dev_err(&pdev->dev, "ice_init_hw failed: %d\n", err);
  2243. err = -EIO;
  2244. goto err_exit_unroll;
  2245. }
  2246. dev_info(&pdev->dev, "firmware %d.%d.%05d api %d.%d\n",
  2247. hw->fw_maj_ver, hw->fw_min_ver, hw->fw_build,
  2248. hw->api_maj_ver, hw->api_min_ver);
  2249. ice_init_pf(pf);
  2250. ice_determine_q_usage(pf);
  2251. pf->num_alloc_vsi = min_t(u16, ICE_MAX_VSI_ALLOC,
  2252. hw->func_caps.guaranteed_num_vsi);
  2253. if (!pf->num_alloc_vsi) {
  2254. err = -EIO;
  2255. goto err_init_pf_unroll;
  2256. }
  2257. pf->vsi = devm_kcalloc(&pdev->dev, pf->num_alloc_vsi,
  2258. sizeof(struct ice_vsi *), GFP_KERNEL);
  2259. if (!pf->vsi) {
  2260. err = -ENOMEM;
  2261. goto err_init_pf_unroll;
  2262. }
  2263. err = ice_init_interrupt_scheme(pf);
  2264. if (err) {
  2265. dev_err(&pdev->dev,
  2266. "ice_init_interrupt_scheme failed: %d\n", err);
  2267. err = -EIO;
  2268. goto err_init_interrupt_unroll;
  2269. }
  2270. /* In case of MSIX we are going to setup the misc vector right here
  2271. * to handle admin queue events etc. In case of legacy and MSI
  2272. * the misc functionality and queue processing is combined in
  2273. * the same vector and that gets setup at open.
  2274. */
  2275. if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags)) {
  2276. err = ice_req_irq_msix_misc(pf);
  2277. if (err) {
  2278. dev_err(&pdev->dev,
  2279. "setup of misc vector failed: %d\n", err);
  2280. goto err_init_interrupt_unroll;
  2281. }
  2282. }
  2283. /* create switch struct for the switch element created by FW on boot */
  2284. pf->first_sw = devm_kzalloc(&pdev->dev, sizeof(struct ice_sw),
  2285. GFP_KERNEL);
  2286. if (!pf->first_sw) {
  2287. err = -ENOMEM;
  2288. goto err_msix_misc_unroll;
  2289. }
  2290. pf->first_sw->bridge_mode = BRIDGE_MODE_VEB;
  2291. pf->first_sw->pf = pf;
  2292. /* record the sw_id available for later use */
  2293. pf->first_sw->sw_id = hw->port_info->sw_id;
  2294. err = ice_setup_pf_sw(pf);
  2295. if (err) {
  2296. dev_err(&pdev->dev,
  2297. "probe failed due to setup pf switch:%d\n", err);
  2298. goto err_alloc_sw_unroll;
  2299. }
  2300. /* Driver is mostly up */
  2301. clear_bit(__ICE_DOWN, pf->state);
  2302. /* since everything is good, start the service timer */
  2303. mod_timer(&pf->serv_tmr, round_jiffies(jiffies + pf->serv_tmr_period));
  2304. return 0;
  2305. err_alloc_sw_unroll:
  2306. set_bit(__ICE_DOWN, pf->state);
  2307. devm_kfree(&pf->pdev->dev, pf->first_sw);
  2308. err_msix_misc_unroll:
  2309. ice_free_irq_msix_misc(pf);
  2310. err_init_interrupt_unroll:
  2311. ice_clear_interrupt_scheme(pf);
  2312. devm_kfree(&pdev->dev, pf->vsi);
  2313. err_init_pf_unroll:
  2314. ice_deinit_pf(pf);
  2315. ice_deinit_hw(hw);
  2316. err_exit_unroll:
  2317. pci_disable_pcie_error_reporting(pdev);
  2318. return err;
  2319. }
  2320. /**
  2321. * ice_remove - Device removal routine
  2322. * @pdev: PCI device information struct
  2323. */
  2324. static void ice_remove(struct pci_dev *pdev)
  2325. {
  2326. struct ice_pf *pf = pci_get_drvdata(pdev);
  2327. int i = 0;
  2328. int err;
  2329. if (!pf)
  2330. return;
  2331. set_bit(__ICE_DOWN, pf->state);
  2332. for (i = 0; i < pf->num_alloc_vsi; i++) {
  2333. if (!pf->vsi[i])
  2334. continue;
  2335. err = ice_vsi_release(pf->vsi[i]);
  2336. if (err)
  2337. dev_dbg(&pf->pdev->dev, "Failed to release VSI index %d (err %d)\n",
  2338. i, err);
  2339. }
  2340. ice_free_irq_msix_misc(pf);
  2341. ice_clear_interrupt_scheme(pf);
  2342. ice_deinit_pf(pf);
  2343. ice_deinit_hw(&pf->hw);
  2344. pci_disable_pcie_error_reporting(pdev);
  2345. }
  2346. /* ice_pci_tbl - PCI Device ID Table
  2347. *
  2348. * Wildcard entries (PCI_ANY_ID) should come last
  2349. * Last entry must be all 0s
  2350. *
  2351. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  2352. * Class, Class Mask, private data (not used) }
  2353. */
  2354. static const struct pci_device_id ice_pci_tbl[] = {
  2355. { PCI_VDEVICE(INTEL, ICE_DEV_ID_C810_BACKPLANE), 0 },
  2356. { PCI_VDEVICE(INTEL, ICE_DEV_ID_C810_QSFP), 0 },
  2357. { PCI_VDEVICE(INTEL, ICE_DEV_ID_C810_SFP), 0 },
  2358. { PCI_VDEVICE(INTEL, ICE_DEV_ID_C810_10G_BASE_T), 0 },
  2359. { PCI_VDEVICE(INTEL, ICE_DEV_ID_C810_SGMII), 0 },
  2360. /* required last entry */
  2361. { 0, }
  2362. };
  2363. MODULE_DEVICE_TABLE(pci, ice_pci_tbl);
  2364. static struct pci_driver ice_driver = {
  2365. .name = KBUILD_MODNAME,
  2366. .id_table = ice_pci_tbl,
  2367. .probe = ice_probe,
  2368. .remove = ice_remove,
  2369. };
  2370. /**
  2371. * ice_module_init - Driver registration routine
  2372. *
  2373. * ice_module_init is the first routine called when the driver is
  2374. * loaded. All it does is register with the PCI subsystem.
  2375. */
  2376. static int __init ice_module_init(void)
  2377. {
  2378. int status;
  2379. pr_info("%s - version %s\n", ice_driver_string, ice_drv_ver);
  2380. pr_info("%s\n", ice_copyright);
  2381. ice_wq = alloc_ordered_workqueue("%s", WQ_MEM_RECLAIM, KBUILD_MODNAME);
  2382. if (!ice_wq) {
  2383. pr_err("Failed to create workqueue\n");
  2384. return -ENOMEM;
  2385. }
  2386. status = pci_register_driver(&ice_driver);
  2387. if (status) {
  2388. pr_err("failed to register pci driver, err %d\n", status);
  2389. destroy_workqueue(ice_wq);
  2390. }
  2391. return status;
  2392. }
  2393. module_init(ice_module_init);
  2394. /**
  2395. * ice_module_exit - Driver exit cleanup routine
  2396. *
  2397. * ice_module_exit is called just before the driver is removed
  2398. * from memory.
  2399. */
  2400. static void __exit ice_module_exit(void)
  2401. {
  2402. pci_unregister_driver(&ice_driver);
  2403. destroy_workqueue(ice_wq);
  2404. pr_info("module unloaded\n");
  2405. }
  2406. module_exit(ice_module_exit);
  2407. /**
  2408. * ice_vsi_manage_vlan_insertion - Manage VLAN insertion for the VSI for Tx
  2409. * @vsi: the vsi being changed
  2410. */
  2411. static int ice_vsi_manage_vlan_insertion(struct ice_vsi *vsi)
  2412. {
  2413. struct device *dev = &vsi->back->pdev->dev;
  2414. struct ice_hw *hw = &vsi->back->hw;
  2415. struct ice_vsi_ctx ctxt = { 0 };
  2416. enum ice_status status;
  2417. /* Here we are configuring the VSI to let the driver add VLAN tags by
  2418. * setting port_vlan_flags to ICE_AQ_VSI_PVLAN_MODE_ALL. The actual VLAN
  2419. * tag insertion happens in the Tx hot path, in ice_tx_map.
  2420. */
  2421. ctxt.info.port_vlan_flags = ICE_AQ_VSI_PVLAN_MODE_ALL;
  2422. ctxt.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_VLAN_VALID);
  2423. ctxt.vsi_num = vsi->vsi_num;
  2424. status = ice_aq_update_vsi(hw, &ctxt, NULL);
  2425. if (status) {
  2426. dev_err(dev, "update VSI for VLAN insert failed, err %d aq_err %d\n",
  2427. status, hw->adminq.sq_last_status);
  2428. return -EIO;
  2429. }
  2430. vsi->info.port_vlan_flags = ctxt.info.port_vlan_flags;
  2431. return 0;
  2432. }
  2433. /**
  2434. * ice_vsi_manage_vlan_stripping - Manage VLAN stripping for the VSI for Rx
  2435. * @vsi: the vsi being changed
  2436. * @ena: boolean value indicating if this is a enable or disable request
  2437. */
  2438. static int ice_vsi_manage_vlan_stripping(struct ice_vsi *vsi, bool ena)
  2439. {
  2440. struct device *dev = &vsi->back->pdev->dev;
  2441. struct ice_hw *hw = &vsi->back->hw;
  2442. struct ice_vsi_ctx ctxt = { 0 };
  2443. enum ice_status status;
  2444. /* Here we are configuring what the VSI should do with the VLAN tag in
  2445. * the Rx packet. We can either leave the tag in the packet or put it in
  2446. * the Rx descriptor.
  2447. */
  2448. if (ena) {
  2449. /* Strip VLAN tag from Rx packet and put it in the desc */
  2450. ctxt.info.port_vlan_flags = ICE_AQ_VSI_PVLAN_EMOD_STR_BOTH;
  2451. } else {
  2452. /* Disable stripping. Leave tag in packet */
  2453. ctxt.info.port_vlan_flags = ICE_AQ_VSI_PVLAN_EMOD_NOTHING;
  2454. }
  2455. ctxt.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_VLAN_VALID);
  2456. ctxt.vsi_num = vsi->vsi_num;
  2457. status = ice_aq_update_vsi(hw, &ctxt, NULL);
  2458. if (status) {
  2459. dev_err(dev, "update VSI for VALN strip failed, ena = %d err %d aq_err %d\n",
  2460. ena, status, hw->adminq.sq_last_status);
  2461. return -EIO;
  2462. }
  2463. vsi->info.port_vlan_flags = ctxt.info.port_vlan_flags;
  2464. return 0;
  2465. }
  2466. /**
  2467. * ice_set_features - set the netdev feature flags
  2468. * @netdev: ptr to the netdev being adjusted
  2469. * @features: the feature set that the stack is suggesting
  2470. */
  2471. static int ice_set_features(struct net_device *netdev,
  2472. netdev_features_t features)
  2473. {
  2474. struct ice_netdev_priv *np = netdev_priv(netdev);
  2475. struct ice_vsi *vsi = np->vsi;
  2476. int ret = 0;
  2477. if ((features & NETIF_F_HW_VLAN_CTAG_RX) &&
  2478. !(netdev->features & NETIF_F_HW_VLAN_CTAG_RX))
  2479. ret = ice_vsi_manage_vlan_stripping(vsi, true);
  2480. else if (!(features & NETIF_F_HW_VLAN_CTAG_RX) &&
  2481. (netdev->features & NETIF_F_HW_VLAN_CTAG_RX))
  2482. ret = ice_vsi_manage_vlan_stripping(vsi, false);
  2483. else if ((features & NETIF_F_HW_VLAN_CTAG_TX) &&
  2484. !(netdev->features & NETIF_F_HW_VLAN_CTAG_TX))
  2485. ret = ice_vsi_manage_vlan_insertion(vsi);
  2486. else if (!(features & NETIF_F_HW_VLAN_CTAG_TX) &&
  2487. (netdev->features & NETIF_F_HW_VLAN_CTAG_TX))
  2488. ret = ice_vsi_manage_vlan_insertion(vsi);
  2489. return ret;
  2490. }
  2491. /**
  2492. * ice_vsi_vlan_setup - Setup vlan offload properties on a VSI
  2493. * @vsi: VSI to setup vlan properties for
  2494. */
  2495. static int ice_vsi_vlan_setup(struct ice_vsi *vsi)
  2496. {
  2497. int ret = 0;
  2498. if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
  2499. ret = ice_vsi_manage_vlan_stripping(vsi, true);
  2500. if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_TX)
  2501. ret = ice_vsi_manage_vlan_insertion(vsi);
  2502. return ret;
  2503. }
  2504. /**
  2505. * ice_restore_vlan - Reinstate VLANs when vsi/netdev comes back up
  2506. * @vsi: the VSI being brought back up
  2507. */
  2508. static int ice_restore_vlan(struct ice_vsi *vsi)
  2509. {
  2510. int err;
  2511. u16 vid;
  2512. if (!vsi->netdev)
  2513. return -EINVAL;
  2514. err = ice_vsi_vlan_setup(vsi);
  2515. if (err)
  2516. return err;
  2517. for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID) {
  2518. err = ice_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q), vid);
  2519. if (err)
  2520. break;
  2521. }
  2522. return err;
  2523. }
  2524. /**
  2525. * ice_setup_tx_ctx - setup a struct ice_tlan_ctx instance
  2526. * @ring: The Tx ring to configure
  2527. * @tlan_ctx: Pointer to the Tx LAN queue context structure to be initialized
  2528. * @pf_q: queue index in the PF space
  2529. *
  2530. * Configure the Tx descriptor ring in TLAN context.
  2531. */
  2532. static void
  2533. ice_setup_tx_ctx(struct ice_ring *ring, struct ice_tlan_ctx *tlan_ctx, u16 pf_q)
  2534. {
  2535. struct ice_vsi *vsi = ring->vsi;
  2536. struct ice_hw *hw = &vsi->back->hw;
  2537. tlan_ctx->base = ring->dma >> ICE_TLAN_CTX_BASE_S;
  2538. tlan_ctx->port_num = vsi->port_info->lport;
  2539. /* Transmit Queue Length */
  2540. tlan_ctx->qlen = ring->count;
  2541. /* PF number */
  2542. tlan_ctx->pf_num = hw->pf_id;
  2543. /* queue belongs to a specific VSI type
  2544. * VF / VM index should be programmed per vmvf_type setting:
  2545. * for vmvf_type = VF, it is VF number between 0-256
  2546. * for vmvf_type = VM, it is VM number between 0-767
  2547. * for PF or EMP this field should be set to zero
  2548. */
  2549. switch (vsi->type) {
  2550. case ICE_VSI_PF:
  2551. tlan_ctx->vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_PF;
  2552. break;
  2553. default:
  2554. return;
  2555. }
  2556. /* make sure the context is associated with the right VSI */
  2557. tlan_ctx->src_vsi = vsi->vsi_num;
  2558. tlan_ctx->tso_ena = ICE_TX_LEGACY;
  2559. tlan_ctx->tso_qnum = pf_q;
  2560. /* Legacy or Advanced Host Interface:
  2561. * 0: Advanced Host Interface
  2562. * 1: Legacy Host Interface
  2563. */
  2564. tlan_ctx->legacy_int = ICE_TX_LEGACY;
  2565. }
  2566. /**
  2567. * ice_vsi_cfg_txqs - Configure the VSI for Tx
  2568. * @vsi: the VSI being configured
  2569. *
  2570. * Return 0 on success and a negative value on error
  2571. * Configure the Tx VSI for operation.
  2572. */
  2573. static int ice_vsi_cfg_txqs(struct ice_vsi *vsi)
  2574. {
  2575. struct ice_aqc_add_tx_qgrp *qg_buf;
  2576. struct ice_aqc_add_txqs_perq *txq;
  2577. struct ice_pf *pf = vsi->back;
  2578. enum ice_status status;
  2579. u16 buf_len, i, pf_q;
  2580. int err = 0, tc = 0;
  2581. u8 num_q_grps;
  2582. buf_len = sizeof(struct ice_aqc_add_tx_qgrp);
  2583. qg_buf = devm_kzalloc(&pf->pdev->dev, buf_len, GFP_KERNEL);
  2584. if (!qg_buf)
  2585. return -ENOMEM;
  2586. if (vsi->num_txq > ICE_MAX_TXQ_PER_TXQG) {
  2587. err = -EINVAL;
  2588. goto err_cfg_txqs;
  2589. }
  2590. qg_buf->num_txqs = 1;
  2591. num_q_grps = 1;
  2592. /* set up and configure the tx queues */
  2593. ice_for_each_txq(vsi, i) {
  2594. struct ice_tlan_ctx tlan_ctx = { 0 };
  2595. pf_q = vsi->txq_map[i];
  2596. ice_setup_tx_ctx(vsi->tx_rings[i], &tlan_ctx, pf_q);
  2597. /* copy context contents into the qg_buf */
  2598. qg_buf->txqs[0].txq_id = cpu_to_le16(pf_q);
  2599. ice_set_ctx((u8 *)&tlan_ctx, qg_buf->txqs[0].txq_ctx,
  2600. ice_tlan_ctx_info);
  2601. /* init queue specific tail reg. It is referred as transmit
  2602. * comm scheduler queue doorbell.
  2603. */
  2604. vsi->tx_rings[i]->tail = pf->hw.hw_addr + QTX_COMM_DBELL(pf_q);
  2605. status = ice_ena_vsi_txq(vsi->port_info, vsi->vsi_num, tc,
  2606. num_q_grps, qg_buf, buf_len, NULL);
  2607. if (status) {
  2608. dev_err(&vsi->back->pdev->dev,
  2609. "Failed to set LAN Tx queue context, error: %d\n",
  2610. status);
  2611. err = -ENODEV;
  2612. goto err_cfg_txqs;
  2613. }
  2614. /* Add Tx Queue TEID into the VSI tx ring from the response
  2615. * This will complete configuring and enabling the queue.
  2616. */
  2617. txq = &qg_buf->txqs[0];
  2618. if (pf_q == le16_to_cpu(txq->txq_id))
  2619. vsi->tx_rings[i]->txq_teid =
  2620. le32_to_cpu(txq->q_teid);
  2621. }
  2622. err_cfg_txqs:
  2623. devm_kfree(&pf->pdev->dev, qg_buf);
  2624. return err;
  2625. }
  2626. /**
  2627. * ice_setup_rx_ctx - Configure a receive ring context
  2628. * @ring: The Rx ring to configure
  2629. *
  2630. * Configure the Rx descriptor ring in RLAN context.
  2631. */
  2632. static int ice_setup_rx_ctx(struct ice_ring *ring)
  2633. {
  2634. struct ice_vsi *vsi = ring->vsi;
  2635. struct ice_hw *hw = &vsi->back->hw;
  2636. u32 rxdid = ICE_RXDID_FLEX_NIC;
  2637. struct ice_rlan_ctx rlan_ctx;
  2638. u32 regval;
  2639. u16 pf_q;
  2640. int err;
  2641. /* what is RX queue number in global space of 2K rx queues */
  2642. pf_q = vsi->rxq_map[ring->q_index];
  2643. /* clear the context structure first */
  2644. memset(&rlan_ctx, 0, sizeof(rlan_ctx));
  2645. rlan_ctx.base = ring->dma >> 7;
  2646. rlan_ctx.qlen = ring->count;
  2647. /* Receive Packet Data Buffer Size.
  2648. * The Packet Data Buffer Size is defined in 128 byte units.
  2649. */
  2650. rlan_ctx.dbuf = vsi->rx_buf_len >> ICE_RLAN_CTX_DBUF_S;
  2651. /* use 32 byte descriptors */
  2652. rlan_ctx.dsize = 1;
  2653. /* Strip the Ethernet CRC bytes before the packet is posted to host
  2654. * memory.
  2655. */
  2656. rlan_ctx.crcstrip = 1;
  2657. /* L2TSEL flag defines the reported L2 Tags in the receive descriptor */
  2658. rlan_ctx.l2tsel = 1;
  2659. rlan_ctx.dtype = ICE_RX_DTYPE_NO_SPLIT;
  2660. rlan_ctx.hsplit_0 = ICE_RLAN_RX_HSPLIT_0_NO_SPLIT;
  2661. rlan_ctx.hsplit_1 = ICE_RLAN_RX_HSPLIT_1_NO_SPLIT;
  2662. /* This controls whether VLAN is stripped from inner headers
  2663. * The VLAN in the inner L2 header is stripped to the receive
  2664. * descriptor if enabled by this flag.
  2665. */
  2666. rlan_ctx.showiv = 0;
  2667. /* Max packet size for this queue - must not be set to a larger value
  2668. * than 5 x DBUF
  2669. */
  2670. rlan_ctx.rxmax = min_t(u16, vsi->max_frame,
  2671. ICE_MAX_CHAINED_RX_BUFS * vsi->rx_buf_len);
  2672. /* Rx queue threshold in units of 64 */
  2673. rlan_ctx.lrxqthresh = 1;
  2674. /* Enable Flexible Descriptors in the queue context which
  2675. * allows this driver to select a specific receive descriptor format
  2676. */
  2677. regval = rd32(hw, QRXFLXP_CNTXT(pf_q));
  2678. regval |= (rxdid << QRXFLXP_CNTXT_RXDID_IDX_S) &
  2679. QRXFLXP_CNTXT_RXDID_IDX_M;
  2680. /* increasing context priority to pick up profile id;
  2681. * default is 0x01; setting to 0x03 to ensure profile
  2682. * is programming if prev context is of same priority
  2683. */
  2684. regval |= (0x03 << QRXFLXP_CNTXT_RXDID_PRIO_S) &
  2685. QRXFLXP_CNTXT_RXDID_PRIO_M;
  2686. wr32(hw, QRXFLXP_CNTXT(pf_q), regval);
  2687. /* Absolute queue number out of 2K needs to be passed */
  2688. err = ice_write_rxq_ctx(hw, &rlan_ctx, pf_q);
  2689. if (err) {
  2690. dev_err(&vsi->back->pdev->dev,
  2691. "Failed to set LAN Rx queue context for absolute Rx queue %d error: %d\n",
  2692. pf_q, err);
  2693. return -EIO;
  2694. }
  2695. /* init queue specific tail register */
  2696. ring->tail = hw->hw_addr + QRX_TAIL(pf_q);
  2697. writel(0, ring->tail);
  2698. ice_alloc_rx_bufs(ring, ICE_DESC_UNUSED(ring));
  2699. return 0;
  2700. }
  2701. /**
  2702. * ice_vsi_cfg_rxqs - Configure the VSI for Rx
  2703. * @vsi: the VSI being configured
  2704. *
  2705. * Return 0 on success and a negative value on error
  2706. * Configure the Rx VSI for operation.
  2707. */
  2708. static int ice_vsi_cfg_rxqs(struct ice_vsi *vsi)
  2709. {
  2710. int err = 0;
  2711. u16 i;
  2712. if (vsi->netdev && vsi->netdev->mtu > ETH_DATA_LEN)
  2713. vsi->max_frame = vsi->netdev->mtu +
  2714. ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
  2715. else
  2716. vsi->max_frame = ICE_RXBUF_2048;
  2717. vsi->rx_buf_len = ICE_RXBUF_2048;
  2718. /* set up individual rings */
  2719. for (i = 0; i < vsi->num_rxq && !err; i++)
  2720. err = ice_setup_rx_ctx(vsi->rx_rings[i]);
  2721. if (err) {
  2722. dev_err(&vsi->back->pdev->dev, "ice_setup_rx_ctx failed\n");
  2723. return -EIO;
  2724. }
  2725. return err;
  2726. }
  2727. /**
  2728. * ice_vsi_cfg - Setup the VSI
  2729. * @vsi: the VSI being configured
  2730. *
  2731. * Return 0 on success and negative value on error
  2732. */
  2733. static int ice_vsi_cfg(struct ice_vsi *vsi)
  2734. {
  2735. int err;
  2736. err = ice_restore_vlan(vsi);
  2737. if (err)
  2738. return err;
  2739. err = ice_vsi_cfg_txqs(vsi);
  2740. if (!err)
  2741. err = ice_vsi_cfg_rxqs(vsi);
  2742. return err;
  2743. }
  2744. /**
  2745. * ice_vsi_stop_tx_rings - Disable Tx rings
  2746. * @vsi: the VSI being configured
  2747. */
  2748. static int ice_vsi_stop_tx_rings(struct ice_vsi *vsi)
  2749. {
  2750. struct ice_pf *pf = vsi->back;
  2751. struct ice_hw *hw = &pf->hw;
  2752. enum ice_status status;
  2753. u32 *q_teids, val;
  2754. u16 *q_ids, i;
  2755. int err = 0;
  2756. if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS)
  2757. return -EINVAL;
  2758. q_teids = devm_kcalloc(&pf->pdev->dev, vsi->num_txq, sizeof(*q_teids),
  2759. GFP_KERNEL);
  2760. if (!q_teids)
  2761. return -ENOMEM;
  2762. q_ids = devm_kcalloc(&pf->pdev->dev, vsi->num_txq, sizeof(*q_ids),
  2763. GFP_KERNEL);
  2764. if (!q_ids) {
  2765. err = -ENOMEM;
  2766. goto err_alloc_q_ids;
  2767. }
  2768. /* set up the tx queue list to be disabled */
  2769. ice_for_each_txq(vsi, i) {
  2770. u16 v_idx;
  2771. if (!vsi->tx_rings || !vsi->tx_rings[i]) {
  2772. err = -EINVAL;
  2773. goto err_out;
  2774. }
  2775. q_ids[i] = vsi->txq_map[i];
  2776. q_teids[i] = vsi->tx_rings[i]->txq_teid;
  2777. /* clear cause_ena bit for disabled queues */
  2778. val = rd32(hw, QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
  2779. val &= ~QINT_TQCTL_CAUSE_ENA_M;
  2780. wr32(hw, QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
  2781. /* software is expected to wait for 100 ns */
  2782. ndelay(100);
  2783. /* trigger a software interrupt for the vector associated to
  2784. * the queue to schedule napi handler
  2785. */
  2786. v_idx = vsi->tx_rings[i]->q_vector->v_idx;
  2787. wr32(hw, GLINT_DYN_CTL(vsi->base_vector + v_idx),
  2788. GLINT_DYN_CTL_SWINT_TRIG_M | GLINT_DYN_CTL_INTENA_MSK_M);
  2789. }
  2790. status = ice_dis_vsi_txq(vsi->port_info, vsi->num_txq, q_ids, q_teids,
  2791. NULL);
  2792. if (status) {
  2793. dev_err(&pf->pdev->dev,
  2794. "Failed to disable LAN Tx queues, error: %d\n",
  2795. status);
  2796. err = -ENODEV;
  2797. }
  2798. err_out:
  2799. devm_kfree(&pf->pdev->dev, q_ids);
  2800. err_alloc_q_ids:
  2801. devm_kfree(&pf->pdev->dev, q_teids);
  2802. return err;
  2803. }
  2804. /**
  2805. * ice_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
  2806. * @pf: the PF being configured
  2807. * @pf_q: the PF queue
  2808. * @ena: enable or disable state of the queue
  2809. *
  2810. * This routine will wait for the given Rx queue of the PF to reach the
  2811. * enabled or disabled state.
  2812. * Returns -ETIMEDOUT in case of failing to reach the requested state after
  2813. * multiple retries; else will return 0 in case of success.
  2814. */
  2815. static int ice_pf_rxq_wait(struct ice_pf *pf, int pf_q, bool ena)
  2816. {
  2817. int i;
  2818. for (i = 0; i < ICE_Q_WAIT_RETRY_LIMIT; i++) {
  2819. u32 rx_reg = rd32(&pf->hw, QRX_CTRL(pf_q));
  2820. if (ena == !!(rx_reg & QRX_CTRL_QENA_STAT_M))
  2821. break;
  2822. usleep_range(10, 20);
  2823. }
  2824. if (i >= ICE_Q_WAIT_RETRY_LIMIT)
  2825. return -ETIMEDOUT;
  2826. return 0;
  2827. }
  2828. /**
  2829. * ice_vsi_ctrl_rx_rings - Start or stop a VSI's rx rings
  2830. * @vsi: the VSI being configured
  2831. * @ena: start or stop the rx rings
  2832. */
  2833. static int ice_vsi_ctrl_rx_rings(struct ice_vsi *vsi, bool ena)
  2834. {
  2835. struct ice_pf *pf = vsi->back;
  2836. struct ice_hw *hw = &pf->hw;
  2837. int i, j, ret = 0;
  2838. for (i = 0; i < vsi->num_rxq; i++) {
  2839. int pf_q = vsi->rxq_map[i];
  2840. u32 rx_reg;
  2841. for (j = 0; j < ICE_Q_WAIT_MAX_RETRY; j++) {
  2842. rx_reg = rd32(hw, QRX_CTRL(pf_q));
  2843. if (((rx_reg >> QRX_CTRL_QENA_REQ_S) & 1) ==
  2844. ((rx_reg >> QRX_CTRL_QENA_STAT_S) & 1))
  2845. break;
  2846. usleep_range(1000, 2000);
  2847. }
  2848. /* Skip if the queue is already in the requested state */
  2849. if (ena == !!(rx_reg & QRX_CTRL_QENA_STAT_M))
  2850. continue;
  2851. /* turn on/off the queue */
  2852. if (ena)
  2853. rx_reg |= QRX_CTRL_QENA_REQ_M;
  2854. else
  2855. rx_reg &= ~QRX_CTRL_QENA_REQ_M;
  2856. wr32(hw, QRX_CTRL(pf_q), rx_reg);
  2857. /* wait for the change to finish */
  2858. ret = ice_pf_rxq_wait(pf, pf_q, ena);
  2859. if (ret) {
  2860. dev_err(&pf->pdev->dev,
  2861. "VSI idx %d Rx ring %d %sable timeout\n",
  2862. vsi->idx, pf_q, (ena ? "en" : "dis"));
  2863. break;
  2864. }
  2865. }
  2866. return ret;
  2867. }
  2868. /**
  2869. * ice_vsi_start_rx_rings - start VSI's rx rings
  2870. * @vsi: the VSI whose rings are to be started
  2871. *
  2872. * Returns 0 on success and a negative value on error
  2873. */
  2874. static int ice_vsi_start_rx_rings(struct ice_vsi *vsi)
  2875. {
  2876. return ice_vsi_ctrl_rx_rings(vsi, true);
  2877. }
  2878. /**
  2879. * ice_vsi_stop_rx_rings - stop VSI's rx rings
  2880. * @vsi: the VSI
  2881. *
  2882. * Returns 0 on success and a negative value on error
  2883. */
  2884. static int ice_vsi_stop_rx_rings(struct ice_vsi *vsi)
  2885. {
  2886. return ice_vsi_ctrl_rx_rings(vsi, false);
  2887. }
  2888. /**
  2889. * ice_vsi_stop_tx_rx_rings - stop VSI's tx and rx rings
  2890. * @vsi: the VSI
  2891. * Returns 0 on success and a negative value on error
  2892. */
  2893. static int ice_vsi_stop_tx_rx_rings(struct ice_vsi *vsi)
  2894. {
  2895. int err_tx, err_rx;
  2896. err_tx = ice_vsi_stop_tx_rings(vsi);
  2897. if (err_tx)
  2898. dev_dbg(&vsi->back->pdev->dev, "Failed to disable Tx rings\n");
  2899. err_rx = ice_vsi_stop_rx_rings(vsi);
  2900. if (err_rx)
  2901. dev_dbg(&vsi->back->pdev->dev, "Failed to disable Rx rings\n");
  2902. if (err_tx || err_rx)
  2903. return -EIO;
  2904. return 0;
  2905. }
  2906. /**
  2907. * ice_napi_enable_all - Enable NAPI for all q_vectors in the VSI
  2908. * @vsi: the VSI being configured
  2909. */
  2910. static void ice_napi_enable_all(struct ice_vsi *vsi)
  2911. {
  2912. int q_idx;
  2913. if (!vsi->netdev)
  2914. return;
  2915. for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
  2916. napi_enable(&vsi->q_vectors[q_idx]->napi);
  2917. }
  2918. /**
  2919. * ice_up_complete - Finish the last steps of bringing up a connection
  2920. * @vsi: The VSI being configured
  2921. *
  2922. * Return 0 on success and negative value on error
  2923. */
  2924. static int ice_up_complete(struct ice_vsi *vsi)
  2925. {
  2926. struct ice_pf *pf = vsi->back;
  2927. int err;
  2928. if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags))
  2929. ice_vsi_cfg_msix(vsi);
  2930. else
  2931. return -ENOTSUPP;
  2932. /* Enable only Rx rings, Tx rings were enabled by the FW when the
  2933. * Tx queue group list was configured and the context bits were
  2934. * programmed using ice_vsi_cfg_txqs
  2935. */
  2936. err = ice_vsi_start_rx_rings(vsi);
  2937. if (err)
  2938. return err;
  2939. clear_bit(__ICE_DOWN, vsi->state);
  2940. ice_napi_enable_all(vsi);
  2941. ice_vsi_ena_irq(vsi);
  2942. if (vsi->port_info &&
  2943. (vsi->port_info->phy.link_info.link_info & ICE_AQ_LINK_UP) &&
  2944. vsi->netdev) {
  2945. ice_print_link_msg(vsi, true);
  2946. netif_tx_start_all_queues(vsi->netdev);
  2947. netif_carrier_on(vsi->netdev);
  2948. }
  2949. ice_service_task_schedule(pf);
  2950. return err;
  2951. }
  2952. /**
  2953. * ice_up - Bring the connection back up after being down
  2954. * @vsi: VSI being configured
  2955. */
  2956. int ice_up(struct ice_vsi *vsi)
  2957. {
  2958. int err;
  2959. err = ice_vsi_cfg(vsi);
  2960. if (!err)
  2961. err = ice_up_complete(vsi);
  2962. return err;
  2963. }
  2964. /**
  2965. * ice_fetch_u64_stats_per_ring - get packets and bytes stats per ring
  2966. * @ring: Tx or Rx ring to read stats from
  2967. * @pkts: packets stats counter
  2968. * @bytes: bytes stats counter
  2969. *
  2970. * This function fetches stats from the ring considering the atomic operations
  2971. * that needs to be performed to read u64 values in 32 bit machine.
  2972. */
  2973. static void ice_fetch_u64_stats_per_ring(struct ice_ring *ring, u64 *pkts,
  2974. u64 *bytes)
  2975. {
  2976. unsigned int start;
  2977. *pkts = 0;
  2978. *bytes = 0;
  2979. if (!ring)
  2980. return;
  2981. do {
  2982. start = u64_stats_fetch_begin_irq(&ring->syncp);
  2983. *pkts = ring->stats.pkts;
  2984. *bytes = ring->stats.bytes;
  2985. } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
  2986. }
  2987. /**
  2988. * ice_stat_update40 - read 40 bit stat from the chip and update stat values
  2989. * @hw: ptr to the hardware info
  2990. * @hireg: high 32 bit HW register to read from
  2991. * @loreg: low 32 bit HW register to read from
  2992. * @prev_stat_loaded: bool to specify if previous stats are loaded
  2993. * @prev_stat: ptr to previous loaded stat value
  2994. * @cur_stat: ptr to current stat value
  2995. */
  2996. static void ice_stat_update40(struct ice_hw *hw, u32 hireg, u32 loreg,
  2997. bool prev_stat_loaded, u64 *prev_stat,
  2998. u64 *cur_stat)
  2999. {
  3000. u64 new_data;
  3001. new_data = rd32(hw, loreg);
  3002. new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
  3003. /* device stats are not reset at PFR, they likely will not be zeroed
  3004. * when the driver starts. So save the first values read and use them as
  3005. * offsets to be subtracted from the raw values in order to report stats
  3006. * that count from zero.
  3007. */
  3008. if (!prev_stat_loaded)
  3009. *prev_stat = new_data;
  3010. if (likely(new_data >= *prev_stat))
  3011. *cur_stat = new_data - *prev_stat;
  3012. else
  3013. /* to manage the potential roll-over */
  3014. *cur_stat = (new_data + BIT_ULL(40)) - *prev_stat;
  3015. *cur_stat &= 0xFFFFFFFFFFULL;
  3016. }
  3017. /**
  3018. * ice_stat_update32 - read 32 bit stat from the chip and update stat values
  3019. * @hw: ptr to the hardware info
  3020. * @reg: HW register to read from
  3021. * @prev_stat_loaded: bool to specify if previous stats are loaded
  3022. * @prev_stat: ptr to previous loaded stat value
  3023. * @cur_stat: ptr to current stat value
  3024. */
  3025. static void ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
  3026. u64 *prev_stat, u64 *cur_stat)
  3027. {
  3028. u32 new_data;
  3029. new_data = rd32(hw, reg);
  3030. /* device stats are not reset at PFR, they likely will not be zeroed
  3031. * when the driver starts. So save the first values read and use them as
  3032. * offsets to be subtracted from the raw values in order to report stats
  3033. * that count from zero.
  3034. */
  3035. if (!prev_stat_loaded)
  3036. *prev_stat = new_data;
  3037. if (likely(new_data >= *prev_stat))
  3038. *cur_stat = new_data - *prev_stat;
  3039. else
  3040. /* to manage the potential roll-over */
  3041. *cur_stat = (new_data + BIT_ULL(32)) - *prev_stat;
  3042. }
  3043. /**
  3044. * ice_update_eth_stats - Update VSI-specific ethernet statistics counters
  3045. * @vsi: the VSI to be updated
  3046. */
  3047. static void ice_update_eth_stats(struct ice_vsi *vsi)
  3048. {
  3049. struct ice_eth_stats *prev_es, *cur_es;
  3050. struct ice_hw *hw = &vsi->back->hw;
  3051. u16 vsi_num = vsi->vsi_num; /* HW absolute index of a VSI */
  3052. prev_es = &vsi->eth_stats_prev;
  3053. cur_es = &vsi->eth_stats;
  3054. ice_stat_update40(hw, GLV_GORCH(vsi_num), GLV_GORCL(vsi_num),
  3055. vsi->stat_offsets_loaded, &prev_es->rx_bytes,
  3056. &cur_es->rx_bytes);
  3057. ice_stat_update40(hw, GLV_UPRCH(vsi_num), GLV_UPRCL(vsi_num),
  3058. vsi->stat_offsets_loaded, &prev_es->rx_unicast,
  3059. &cur_es->rx_unicast);
  3060. ice_stat_update40(hw, GLV_MPRCH(vsi_num), GLV_MPRCL(vsi_num),
  3061. vsi->stat_offsets_loaded, &prev_es->rx_multicast,
  3062. &cur_es->rx_multicast);
  3063. ice_stat_update40(hw, GLV_BPRCH(vsi_num), GLV_BPRCL(vsi_num),
  3064. vsi->stat_offsets_loaded, &prev_es->rx_broadcast,
  3065. &cur_es->rx_broadcast);
  3066. ice_stat_update32(hw, GLV_RDPC(vsi_num), vsi->stat_offsets_loaded,
  3067. &prev_es->rx_discards, &cur_es->rx_discards);
  3068. ice_stat_update40(hw, GLV_GOTCH(vsi_num), GLV_GOTCL(vsi_num),
  3069. vsi->stat_offsets_loaded, &prev_es->tx_bytes,
  3070. &cur_es->tx_bytes);
  3071. ice_stat_update40(hw, GLV_UPTCH(vsi_num), GLV_UPTCL(vsi_num),
  3072. vsi->stat_offsets_loaded, &prev_es->tx_unicast,
  3073. &cur_es->tx_unicast);
  3074. ice_stat_update40(hw, GLV_MPTCH(vsi_num), GLV_MPTCL(vsi_num),
  3075. vsi->stat_offsets_loaded, &prev_es->tx_multicast,
  3076. &cur_es->tx_multicast);
  3077. ice_stat_update40(hw, GLV_BPTCH(vsi_num), GLV_BPTCL(vsi_num),
  3078. vsi->stat_offsets_loaded, &prev_es->tx_broadcast,
  3079. &cur_es->tx_broadcast);
  3080. ice_stat_update32(hw, GLV_TEPC(vsi_num), vsi->stat_offsets_loaded,
  3081. &prev_es->tx_errors, &cur_es->tx_errors);
  3082. vsi->stat_offsets_loaded = true;
  3083. }
  3084. /**
  3085. * ice_update_vsi_ring_stats - Update VSI stats counters
  3086. * @vsi: the VSI to be updated
  3087. */
  3088. static void ice_update_vsi_ring_stats(struct ice_vsi *vsi)
  3089. {
  3090. struct rtnl_link_stats64 *vsi_stats = &vsi->net_stats;
  3091. struct ice_ring *ring;
  3092. u64 pkts, bytes;
  3093. int i;
  3094. /* reset netdev stats */
  3095. vsi_stats->tx_packets = 0;
  3096. vsi_stats->tx_bytes = 0;
  3097. vsi_stats->rx_packets = 0;
  3098. vsi_stats->rx_bytes = 0;
  3099. /* reset non-netdev (extended) stats */
  3100. vsi->tx_restart = 0;
  3101. vsi->tx_busy = 0;
  3102. vsi->tx_linearize = 0;
  3103. vsi->rx_buf_failed = 0;
  3104. vsi->rx_page_failed = 0;
  3105. rcu_read_lock();
  3106. /* update Tx rings counters */
  3107. ice_for_each_txq(vsi, i) {
  3108. ring = READ_ONCE(vsi->tx_rings[i]);
  3109. ice_fetch_u64_stats_per_ring(ring, &pkts, &bytes);
  3110. vsi_stats->tx_packets += pkts;
  3111. vsi_stats->tx_bytes += bytes;
  3112. vsi->tx_restart += ring->tx_stats.restart_q;
  3113. vsi->tx_busy += ring->tx_stats.tx_busy;
  3114. vsi->tx_linearize += ring->tx_stats.tx_linearize;
  3115. }
  3116. /* update Rx rings counters */
  3117. ice_for_each_rxq(vsi, i) {
  3118. ring = READ_ONCE(vsi->rx_rings[i]);
  3119. ice_fetch_u64_stats_per_ring(ring, &pkts, &bytes);
  3120. vsi_stats->rx_packets += pkts;
  3121. vsi_stats->rx_bytes += bytes;
  3122. vsi->rx_buf_failed += ring->rx_stats.alloc_buf_failed;
  3123. vsi->rx_page_failed += ring->rx_stats.alloc_page_failed;
  3124. }
  3125. rcu_read_unlock();
  3126. }
  3127. /**
  3128. * ice_update_vsi_stats - Update VSI stats counters
  3129. * @vsi: the VSI to be updated
  3130. */
  3131. static void ice_update_vsi_stats(struct ice_vsi *vsi)
  3132. {
  3133. struct rtnl_link_stats64 *cur_ns = &vsi->net_stats;
  3134. struct ice_eth_stats *cur_es = &vsi->eth_stats;
  3135. struct ice_pf *pf = vsi->back;
  3136. if (test_bit(__ICE_DOWN, vsi->state) ||
  3137. test_bit(__ICE_CFG_BUSY, pf->state))
  3138. return;
  3139. /* get stats as recorded by Tx/Rx rings */
  3140. ice_update_vsi_ring_stats(vsi);
  3141. /* get VSI stats as recorded by the hardware */
  3142. ice_update_eth_stats(vsi);
  3143. cur_ns->tx_errors = cur_es->tx_errors;
  3144. cur_ns->rx_dropped = cur_es->rx_discards;
  3145. cur_ns->tx_dropped = cur_es->tx_discards;
  3146. cur_ns->multicast = cur_es->rx_multicast;
  3147. /* update some more netdev stats if this is main VSI */
  3148. if (vsi->type == ICE_VSI_PF) {
  3149. cur_ns->rx_crc_errors = pf->stats.crc_errors;
  3150. cur_ns->rx_errors = pf->stats.crc_errors +
  3151. pf->stats.illegal_bytes;
  3152. cur_ns->rx_length_errors = pf->stats.rx_len_errors;
  3153. }
  3154. }
  3155. /**
  3156. * ice_update_pf_stats - Update PF port stats counters
  3157. * @pf: PF whose stats needs to be updated
  3158. */
  3159. static void ice_update_pf_stats(struct ice_pf *pf)
  3160. {
  3161. struct ice_hw_port_stats *prev_ps, *cur_ps;
  3162. struct ice_hw *hw = &pf->hw;
  3163. u8 pf_id;
  3164. prev_ps = &pf->stats_prev;
  3165. cur_ps = &pf->stats;
  3166. pf_id = hw->pf_id;
  3167. ice_stat_update40(hw, GLPRT_GORCH(pf_id), GLPRT_GORCL(pf_id),
  3168. pf->stat_prev_loaded, &prev_ps->eth.rx_bytes,
  3169. &cur_ps->eth.rx_bytes);
  3170. ice_stat_update40(hw, GLPRT_UPRCH(pf_id), GLPRT_UPRCL(pf_id),
  3171. pf->stat_prev_loaded, &prev_ps->eth.rx_unicast,
  3172. &cur_ps->eth.rx_unicast);
  3173. ice_stat_update40(hw, GLPRT_MPRCH(pf_id), GLPRT_MPRCL(pf_id),
  3174. pf->stat_prev_loaded, &prev_ps->eth.rx_multicast,
  3175. &cur_ps->eth.rx_multicast);
  3176. ice_stat_update40(hw, GLPRT_BPRCH(pf_id), GLPRT_BPRCL(pf_id),
  3177. pf->stat_prev_loaded, &prev_ps->eth.rx_broadcast,
  3178. &cur_ps->eth.rx_broadcast);
  3179. ice_stat_update40(hw, GLPRT_GOTCH(pf_id), GLPRT_GOTCL(pf_id),
  3180. pf->stat_prev_loaded, &prev_ps->eth.tx_bytes,
  3181. &cur_ps->eth.tx_bytes);
  3182. ice_stat_update40(hw, GLPRT_UPTCH(pf_id), GLPRT_UPTCL(pf_id),
  3183. pf->stat_prev_loaded, &prev_ps->eth.tx_unicast,
  3184. &cur_ps->eth.tx_unicast);
  3185. ice_stat_update40(hw, GLPRT_MPTCH(pf_id), GLPRT_MPTCL(pf_id),
  3186. pf->stat_prev_loaded, &prev_ps->eth.tx_multicast,
  3187. &cur_ps->eth.tx_multicast);
  3188. ice_stat_update40(hw, GLPRT_BPTCH(pf_id), GLPRT_BPTCL(pf_id),
  3189. pf->stat_prev_loaded, &prev_ps->eth.tx_broadcast,
  3190. &cur_ps->eth.tx_broadcast);
  3191. ice_stat_update32(hw, GLPRT_TDOLD(pf_id), pf->stat_prev_loaded,
  3192. &prev_ps->tx_dropped_link_down,
  3193. &cur_ps->tx_dropped_link_down);
  3194. ice_stat_update40(hw, GLPRT_PRC64H(pf_id), GLPRT_PRC64L(pf_id),
  3195. pf->stat_prev_loaded, &prev_ps->rx_size_64,
  3196. &cur_ps->rx_size_64);
  3197. ice_stat_update40(hw, GLPRT_PRC127H(pf_id), GLPRT_PRC127L(pf_id),
  3198. pf->stat_prev_loaded, &prev_ps->rx_size_127,
  3199. &cur_ps->rx_size_127);
  3200. ice_stat_update40(hw, GLPRT_PRC255H(pf_id), GLPRT_PRC255L(pf_id),
  3201. pf->stat_prev_loaded, &prev_ps->rx_size_255,
  3202. &cur_ps->rx_size_255);
  3203. ice_stat_update40(hw, GLPRT_PRC511H(pf_id), GLPRT_PRC511L(pf_id),
  3204. pf->stat_prev_loaded, &prev_ps->rx_size_511,
  3205. &cur_ps->rx_size_511);
  3206. ice_stat_update40(hw, GLPRT_PRC1023H(pf_id),
  3207. GLPRT_PRC1023L(pf_id), pf->stat_prev_loaded,
  3208. &prev_ps->rx_size_1023, &cur_ps->rx_size_1023);
  3209. ice_stat_update40(hw, GLPRT_PRC1522H(pf_id),
  3210. GLPRT_PRC1522L(pf_id), pf->stat_prev_loaded,
  3211. &prev_ps->rx_size_1522, &cur_ps->rx_size_1522);
  3212. ice_stat_update40(hw, GLPRT_PRC9522H(pf_id),
  3213. GLPRT_PRC9522L(pf_id), pf->stat_prev_loaded,
  3214. &prev_ps->rx_size_big, &cur_ps->rx_size_big);
  3215. ice_stat_update40(hw, GLPRT_PTC64H(pf_id), GLPRT_PTC64L(pf_id),
  3216. pf->stat_prev_loaded, &prev_ps->tx_size_64,
  3217. &cur_ps->tx_size_64);
  3218. ice_stat_update40(hw, GLPRT_PTC127H(pf_id), GLPRT_PTC127L(pf_id),
  3219. pf->stat_prev_loaded, &prev_ps->tx_size_127,
  3220. &cur_ps->tx_size_127);
  3221. ice_stat_update40(hw, GLPRT_PTC255H(pf_id), GLPRT_PTC255L(pf_id),
  3222. pf->stat_prev_loaded, &prev_ps->tx_size_255,
  3223. &cur_ps->tx_size_255);
  3224. ice_stat_update40(hw, GLPRT_PTC511H(pf_id), GLPRT_PTC511L(pf_id),
  3225. pf->stat_prev_loaded, &prev_ps->tx_size_511,
  3226. &cur_ps->tx_size_511);
  3227. ice_stat_update40(hw, GLPRT_PTC1023H(pf_id),
  3228. GLPRT_PTC1023L(pf_id), pf->stat_prev_loaded,
  3229. &prev_ps->tx_size_1023, &cur_ps->tx_size_1023);
  3230. ice_stat_update40(hw, GLPRT_PTC1522H(pf_id),
  3231. GLPRT_PTC1522L(pf_id), pf->stat_prev_loaded,
  3232. &prev_ps->tx_size_1522, &cur_ps->tx_size_1522);
  3233. ice_stat_update40(hw, GLPRT_PTC9522H(pf_id),
  3234. GLPRT_PTC9522L(pf_id), pf->stat_prev_loaded,
  3235. &prev_ps->tx_size_big, &cur_ps->tx_size_big);
  3236. ice_stat_update32(hw, GLPRT_LXONRXC(pf_id), pf->stat_prev_loaded,
  3237. &prev_ps->link_xon_rx, &cur_ps->link_xon_rx);
  3238. ice_stat_update32(hw, GLPRT_LXOFFRXC(pf_id), pf->stat_prev_loaded,
  3239. &prev_ps->link_xoff_rx, &cur_ps->link_xoff_rx);
  3240. ice_stat_update32(hw, GLPRT_LXONTXC(pf_id), pf->stat_prev_loaded,
  3241. &prev_ps->link_xon_tx, &cur_ps->link_xon_tx);
  3242. ice_stat_update32(hw, GLPRT_LXOFFTXC(pf_id), pf->stat_prev_loaded,
  3243. &prev_ps->link_xoff_tx, &cur_ps->link_xoff_tx);
  3244. ice_stat_update32(hw, GLPRT_CRCERRS(pf_id), pf->stat_prev_loaded,
  3245. &prev_ps->crc_errors, &cur_ps->crc_errors);
  3246. ice_stat_update32(hw, GLPRT_ILLERRC(pf_id), pf->stat_prev_loaded,
  3247. &prev_ps->illegal_bytes, &cur_ps->illegal_bytes);
  3248. ice_stat_update32(hw, GLPRT_MLFC(pf_id), pf->stat_prev_loaded,
  3249. &prev_ps->mac_local_faults,
  3250. &cur_ps->mac_local_faults);
  3251. ice_stat_update32(hw, GLPRT_MRFC(pf_id), pf->stat_prev_loaded,
  3252. &prev_ps->mac_remote_faults,
  3253. &cur_ps->mac_remote_faults);
  3254. ice_stat_update32(hw, GLPRT_RLEC(pf_id), pf->stat_prev_loaded,
  3255. &prev_ps->rx_len_errors, &cur_ps->rx_len_errors);
  3256. ice_stat_update32(hw, GLPRT_RUC(pf_id), pf->stat_prev_loaded,
  3257. &prev_ps->rx_undersize, &cur_ps->rx_undersize);
  3258. ice_stat_update32(hw, GLPRT_RFC(pf_id), pf->stat_prev_loaded,
  3259. &prev_ps->rx_fragments, &cur_ps->rx_fragments);
  3260. ice_stat_update32(hw, GLPRT_ROC(pf_id), pf->stat_prev_loaded,
  3261. &prev_ps->rx_oversize, &cur_ps->rx_oversize);
  3262. ice_stat_update32(hw, GLPRT_RJC(pf_id), pf->stat_prev_loaded,
  3263. &prev_ps->rx_jabber, &cur_ps->rx_jabber);
  3264. pf->stat_prev_loaded = true;
  3265. }
  3266. /**
  3267. * ice_get_stats64 - get statistics for network device structure
  3268. * @netdev: network interface device structure
  3269. * @stats: main device statistics structure
  3270. */
  3271. static
  3272. void ice_get_stats64(struct net_device *netdev, struct rtnl_link_stats64 *stats)
  3273. {
  3274. struct ice_netdev_priv *np = netdev_priv(netdev);
  3275. struct rtnl_link_stats64 *vsi_stats;
  3276. struct ice_vsi *vsi = np->vsi;
  3277. vsi_stats = &vsi->net_stats;
  3278. if (test_bit(__ICE_DOWN, vsi->state) || !vsi->num_txq || !vsi->num_rxq)
  3279. return;
  3280. /* netdev packet/byte stats come from ring counter. These are obtained
  3281. * by summing up ring counters (done by ice_update_vsi_ring_stats).
  3282. */
  3283. ice_update_vsi_ring_stats(vsi);
  3284. stats->tx_packets = vsi_stats->tx_packets;
  3285. stats->tx_bytes = vsi_stats->tx_bytes;
  3286. stats->rx_packets = vsi_stats->rx_packets;
  3287. stats->rx_bytes = vsi_stats->rx_bytes;
  3288. /* The rest of the stats can be read from the hardware but instead we
  3289. * just return values that the watchdog task has already obtained from
  3290. * the hardware.
  3291. */
  3292. stats->multicast = vsi_stats->multicast;
  3293. stats->tx_errors = vsi_stats->tx_errors;
  3294. stats->tx_dropped = vsi_stats->tx_dropped;
  3295. stats->rx_errors = vsi_stats->rx_errors;
  3296. stats->rx_dropped = vsi_stats->rx_dropped;
  3297. stats->rx_crc_errors = vsi_stats->rx_crc_errors;
  3298. stats->rx_length_errors = vsi_stats->rx_length_errors;
  3299. }
  3300. /**
  3301. * ice_napi_disable_all - Disable NAPI for all q_vectors in the VSI
  3302. * @vsi: VSI having NAPI disabled
  3303. */
  3304. static void ice_napi_disable_all(struct ice_vsi *vsi)
  3305. {
  3306. int q_idx;
  3307. if (!vsi->netdev)
  3308. return;
  3309. for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
  3310. napi_disable(&vsi->q_vectors[q_idx]->napi);
  3311. }
  3312. /**
  3313. * ice_down - Shutdown the connection
  3314. * @vsi: The VSI being stopped
  3315. */
  3316. int ice_down(struct ice_vsi *vsi)
  3317. {
  3318. int i, err;
  3319. /* Caller of this function is expected to set the
  3320. * vsi->state __ICE_DOWN bit
  3321. */
  3322. if (vsi->netdev) {
  3323. netif_carrier_off(vsi->netdev);
  3324. netif_tx_disable(vsi->netdev);
  3325. }
  3326. ice_vsi_dis_irq(vsi);
  3327. err = ice_vsi_stop_tx_rx_rings(vsi);
  3328. ice_napi_disable_all(vsi);
  3329. ice_for_each_txq(vsi, i)
  3330. ice_clean_tx_ring(vsi->tx_rings[i]);
  3331. ice_for_each_rxq(vsi, i)
  3332. ice_clean_rx_ring(vsi->rx_rings[i]);
  3333. if (err)
  3334. netdev_err(vsi->netdev, "Failed to close VSI 0x%04X on switch 0x%04X\n",
  3335. vsi->vsi_num, vsi->vsw->sw_id);
  3336. return err;
  3337. }
  3338. /**
  3339. * ice_vsi_setup_tx_rings - Allocate VSI Tx queue resources
  3340. * @vsi: VSI having resources allocated
  3341. *
  3342. * Return 0 on success, negative on failure
  3343. */
  3344. static int ice_vsi_setup_tx_rings(struct ice_vsi *vsi)
  3345. {
  3346. int i, err;
  3347. if (!vsi->num_txq) {
  3348. dev_err(&vsi->back->pdev->dev, "VSI %d has 0 Tx queues\n",
  3349. vsi->vsi_num);
  3350. return -EINVAL;
  3351. }
  3352. ice_for_each_txq(vsi, i) {
  3353. err = ice_setup_tx_ring(vsi->tx_rings[i]);
  3354. if (err)
  3355. break;
  3356. }
  3357. return err;
  3358. }
  3359. /**
  3360. * ice_vsi_setup_rx_rings - Allocate VSI Rx queue resources
  3361. * @vsi: VSI having resources allocated
  3362. *
  3363. * Return 0 on success, negative on failure
  3364. */
  3365. static int ice_vsi_setup_rx_rings(struct ice_vsi *vsi)
  3366. {
  3367. int i, err;
  3368. if (!vsi->num_rxq) {
  3369. dev_err(&vsi->back->pdev->dev, "VSI %d has 0 Rx queues\n",
  3370. vsi->vsi_num);
  3371. return -EINVAL;
  3372. }
  3373. ice_for_each_rxq(vsi, i) {
  3374. err = ice_setup_rx_ring(vsi->rx_rings[i]);
  3375. if (err)
  3376. break;
  3377. }
  3378. return err;
  3379. }
  3380. /**
  3381. * ice_vsi_req_irq - Request IRQ from the OS
  3382. * @vsi: The VSI IRQ is being requested for
  3383. * @basename: name for the vector
  3384. *
  3385. * Return 0 on success and a negative value on error
  3386. */
  3387. static int ice_vsi_req_irq(struct ice_vsi *vsi, char *basename)
  3388. {
  3389. struct ice_pf *pf = vsi->back;
  3390. int err = -EINVAL;
  3391. if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags))
  3392. err = ice_vsi_req_irq_msix(vsi, basename);
  3393. return err;
  3394. }
  3395. /**
  3396. * ice_vsi_free_tx_rings - Free Tx resources for VSI queues
  3397. * @vsi: the VSI having resources freed
  3398. */
  3399. static void ice_vsi_free_tx_rings(struct ice_vsi *vsi)
  3400. {
  3401. int i;
  3402. if (!vsi->tx_rings)
  3403. return;
  3404. ice_for_each_txq(vsi, i)
  3405. if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
  3406. ice_free_tx_ring(vsi->tx_rings[i]);
  3407. }
  3408. /**
  3409. * ice_vsi_free_rx_rings - Free Rx resources for VSI queues
  3410. * @vsi: the VSI having resources freed
  3411. */
  3412. static void ice_vsi_free_rx_rings(struct ice_vsi *vsi)
  3413. {
  3414. int i;
  3415. if (!vsi->rx_rings)
  3416. return;
  3417. ice_for_each_rxq(vsi, i)
  3418. if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
  3419. ice_free_rx_ring(vsi->rx_rings[i]);
  3420. }
  3421. /**
  3422. * ice_vsi_open - Called when a network interface is made active
  3423. * @vsi: the VSI to open
  3424. *
  3425. * Initialization of the VSI
  3426. *
  3427. * Returns 0 on success, negative value on error
  3428. */
  3429. static int ice_vsi_open(struct ice_vsi *vsi)
  3430. {
  3431. char int_name[ICE_INT_NAME_STR_LEN];
  3432. struct ice_pf *pf = vsi->back;
  3433. int err;
  3434. /* allocate descriptors */
  3435. err = ice_vsi_setup_tx_rings(vsi);
  3436. if (err)
  3437. goto err_setup_tx;
  3438. err = ice_vsi_setup_rx_rings(vsi);
  3439. if (err)
  3440. goto err_setup_rx;
  3441. err = ice_vsi_cfg(vsi);
  3442. if (err)
  3443. goto err_setup_rx;
  3444. snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
  3445. dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
  3446. err = ice_vsi_req_irq(vsi, int_name);
  3447. if (err)
  3448. goto err_setup_rx;
  3449. /* Notify the stack of the actual queue counts. */
  3450. err = netif_set_real_num_tx_queues(vsi->netdev, vsi->num_txq);
  3451. if (err)
  3452. goto err_set_qs;
  3453. err = netif_set_real_num_rx_queues(vsi->netdev, vsi->num_rxq);
  3454. if (err)
  3455. goto err_set_qs;
  3456. err = ice_up_complete(vsi);
  3457. if (err)
  3458. goto err_up_complete;
  3459. return 0;
  3460. err_up_complete:
  3461. ice_down(vsi);
  3462. err_set_qs:
  3463. ice_vsi_free_irq(vsi);
  3464. err_setup_rx:
  3465. ice_vsi_free_rx_rings(vsi);
  3466. err_setup_tx:
  3467. ice_vsi_free_tx_rings(vsi);
  3468. return err;
  3469. }
  3470. /**
  3471. * ice_vsi_close - Shut down a VSI
  3472. * @vsi: the VSI being shut down
  3473. */
  3474. static void ice_vsi_close(struct ice_vsi *vsi)
  3475. {
  3476. if (!test_and_set_bit(__ICE_DOWN, vsi->state))
  3477. ice_down(vsi);
  3478. ice_vsi_free_irq(vsi);
  3479. ice_vsi_free_tx_rings(vsi);
  3480. ice_vsi_free_rx_rings(vsi);
  3481. }
  3482. /**
  3483. * ice_rss_clean - Delete RSS related VSI structures that hold user inputs
  3484. * @vsi: the VSI being removed
  3485. */
  3486. static void ice_rss_clean(struct ice_vsi *vsi)
  3487. {
  3488. struct ice_pf *pf;
  3489. pf = vsi->back;
  3490. if (vsi->rss_hkey_user)
  3491. devm_kfree(&pf->pdev->dev, vsi->rss_hkey_user);
  3492. if (vsi->rss_lut_user)
  3493. devm_kfree(&pf->pdev->dev, vsi->rss_lut_user);
  3494. }
  3495. /**
  3496. * ice_vsi_release - Delete a VSI and free its resources
  3497. * @vsi: the VSI being removed
  3498. *
  3499. * Returns 0 on success or < 0 on error
  3500. */
  3501. static int ice_vsi_release(struct ice_vsi *vsi)
  3502. {
  3503. struct ice_pf *pf;
  3504. if (!vsi->back)
  3505. return -ENODEV;
  3506. pf = vsi->back;
  3507. if (vsi->netdev) {
  3508. unregister_netdev(vsi->netdev);
  3509. free_netdev(vsi->netdev);
  3510. vsi->netdev = NULL;
  3511. }
  3512. if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
  3513. ice_rss_clean(vsi);
  3514. /* Disable VSI and free resources */
  3515. ice_vsi_dis_irq(vsi);
  3516. ice_vsi_close(vsi);
  3517. /* reclaim interrupt vectors back to PF */
  3518. ice_free_res(vsi->back->irq_tracker, vsi->base_vector, vsi->idx);
  3519. pf->num_avail_msix += vsi->num_q_vectors;
  3520. ice_remove_vsi_fltr(&pf->hw, vsi->vsi_num);
  3521. ice_vsi_delete(vsi);
  3522. ice_vsi_free_q_vectors(vsi);
  3523. ice_vsi_clear_rings(vsi);
  3524. ice_vsi_put_qs(vsi);
  3525. pf->q_left_tx += vsi->alloc_txq;
  3526. pf->q_left_rx += vsi->alloc_rxq;
  3527. ice_vsi_clear(vsi);
  3528. return 0;
  3529. }
  3530. /**
  3531. * ice_set_rss - Set RSS keys and lut
  3532. * @vsi: Pointer to VSI structure
  3533. * @seed: RSS hash seed
  3534. * @lut: Lookup table
  3535. * @lut_size: Lookup table size
  3536. *
  3537. * Returns 0 on success, negative on failure
  3538. */
  3539. int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
  3540. {
  3541. struct ice_pf *pf = vsi->back;
  3542. struct ice_hw *hw = &pf->hw;
  3543. enum ice_status status;
  3544. if (seed) {
  3545. struct ice_aqc_get_set_rss_keys *buf =
  3546. (struct ice_aqc_get_set_rss_keys *)seed;
  3547. status = ice_aq_set_rss_key(hw, vsi->vsi_num, buf);
  3548. if (status) {
  3549. dev_err(&pf->pdev->dev,
  3550. "Cannot set RSS key, err %d aq_err %d\n",
  3551. status, hw->adminq.rq_last_status);
  3552. return -EIO;
  3553. }
  3554. }
  3555. if (lut) {
  3556. status = ice_aq_set_rss_lut(hw, vsi->vsi_num,
  3557. vsi->rss_lut_type, lut, lut_size);
  3558. if (status) {
  3559. dev_err(&pf->pdev->dev,
  3560. "Cannot set RSS lut, err %d aq_err %d\n",
  3561. status, hw->adminq.rq_last_status);
  3562. return -EIO;
  3563. }
  3564. }
  3565. return 0;
  3566. }
  3567. /**
  3568. * ice_get_rss - Get RSS keys and lut
  3569. * @vsi: Pointer to VSI structure
  3570. * @seed: Buffer to store the keys
  3571. * @lut: Buffer to store the lookup table entries
  3572. * @lut_size: Size of buffer to store the lookup table entries
  3573. *
  3574. * Returns 0 on success, negative on failure
  3575. */
  3576. int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
  3577. {
  3578. struct ice_pf *pf = vsi->back;
  3579. struct ice_hw *hw = &pf->hw;
  3580. enum ice_status status;
  3581. if (seed) {
  3582. struct ice_aqc_get_set_rss_keys *buf =
  3583. (struct ice_aqc_get_set_rss_keys *)seed;
  3584. status = ice_aq_get_rss_key(hw, vsi->vsi_num, buf);
  3585. if (status) {
  3586. dev_err(&pf->pdev->dev,
  3587. "Cannot get RSS key, err %d aq_err %d\n",
  3588. status, hw->adminq.rq_last_status);
  3589. return -EIO;
  3590. }
  3591. }
  3592. if (lut) {
  3593. status = ice_aq_get_rss_lut(hw, vsi->vsi_num,
  3594. vsi->rss_lut_type, lut, lut_size);
  3595. if (status) {
  3596. dev_err(&pf->pdev->dev,
  3597. "Cannot get RSS lut, err %d aq_err %d\n",
  3598. status, hw->adminq.rq_last_status);
  3599. return -EIO;
  3600. }
  3601. }
  3602. return 0;
  3603. }
  3604. /**
  3605. * ice_open - Called when a network interface becomes active
  3606. * @netdev: network interface device structure
  3607. *
  3608. * The open entry point is called when a network interface is made
  3609. * active by the system (IFF_UP). At this point all resources needed
  3610. * for transmit and receive operations are allocated, the interrupt
  3611. * handler is registered with the OS, the netdev watchdog is enabled,
  3612. * and the stack is notified that the interface is ready.
  3613. *
  3614. * Returns 0 on success, negative value on failure
  3615. */
  3616. static int ice_open(struct net_device *netdev)
  3617. {
  3618. struct ice_netdev_priv *np = netdev_priv(netdev);
  3619. struct ice_vsi *vsi = np->vsi;
  3620. int err;
  3621. netif_carrier_off(netdev);
  3622. err = ice_vsi_open(vsi);
  3623. if (err)
  3624. netdev_err(netdev, "Failed to open VSI 0x%04X on switch 0x%04X\n",
  3625. vsi->vsi_num, vsi->vsw->sw_id);
  3626. return err;
  3627. }
  3628. /**
  3629. * ice_stop - Disables a network interface
  3630. * @netdev: network interface device structure
  3631. *
  3632. * The stop entry point is called when an interface is de-activated by the OS,
  3633. * and the netdevice enters the DOWN state. The hardware is still under the
  3634. * driver's control, but the netdev interface is disabled.
  3635. *
  3636. * Returns success only - not allowed to fail
  3637. */
  3638. static int ice_stop(struct net_device *netdev)
  3639. {
  3640. struct ice_netdev_priv *np = netdev_priv(netdev);
  3641. struct ice_vsi *vsi = np->vsi;
  3642. ice_vsi_close(vsi);
  3643. return 0;
  3644. }
  3645. static const struct net_device_ops ice_netdev_ops = {
  3646. .ndo_open = ice_open,
  3647. .ndo_stop = ice_stop,
  3648. .ndo_start_xmit = ice_start_xmit,
  3649. .ndo_get_stats64 = ice_get_stats64,
  3650. .ndo_vlan_rx_add_vid = ice_vlan_rx_add_vid,
  3651. .ndo_vlan_rx_kill_vid = ice_vlan_rx_kill_vid,
  3652. .ndo_set_features = ice_set_features,
  3653. };