drm.c 27 KB

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  1. /*
  2. * Copyright (C) 2012 Avionic Design GmbH
  3. * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/host1x.h>
  10. #include <linux/iommu.h>
  11. #include <drm/drm_atomic.h>
  12. #include <drm/drm_atomic_helper.h>
  13. #include "drm.h"
  14. #include "gem.h"
  15. #define DRIVER_NAME "tegra"
  16. #define DRIVER_DESC "NVIDIA Tegra graphics"
  17. #define DRIVER_DATE "20120330"
  18. #define DRIVER_MAJOR 0
  19. #define DRIVER_MINOR 0
  20. #define DRIVER_PATCHLEVEL 0
  21. struct tegra_drm_file {
  22. struct list_head contexts;
  23. };
  24. static void tegra_atomic_schedule(struct tegra_drm *tegra,
  25. struct drm_atomic_state *state)
  26. {
  27. tegra->commit.state = state;
  28. schedule_work(&tegra->commit.work);
  29. }
  30. static void tegra_atomic_complete(struct tegra_drm *tegra,
  31. struct drm_atomic_state *state)
  32. {
  33. struct drm_device *drm = tegra->drm;
  34. /*
  35. * Everything below can be run asynchronously without the need to grab
  36. * any modeset locks at all under one condition: It must be guaranteed
  37. * that the asynchronous work has either been cancelled (if the driver
  38. * supports it, which at least requires that the framebuffers get
  39. * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
  40. * before the new state gets committed on the software side with
  41. * drm_atomic_helper_swap_state().
  42. *
  43. * This scheme allows new atomic state updates to be prepared and
  44. * checked in parallel to the asynchronous completion of the previous
  45. * update. Which is important since compositors need to figure out the
  46. * composition of the next frame right after having submitted the
  47. * current layout.
  48. */
  49. drm_atomic_helper_commit_modeset_disables(drm, state);
  50. drm_atomic_helper_commit_planes(drm, state);
  51. drm_atomic_helper_commit_modeset_enables(drm, state);
  52. drm_atomic_helper_wait_for_vblanks(drm, state);
  53. drm_atomic_helper_cleanup_planes(drm, state);
  54. drm_atomic_state_free(state);
  55. }
  56. static void tegra_atomic_work(struct work_struct *work)
  57. {
  58. struct tegra_drm *tegra = container_of(work, struct tegra_drm,
  59. commit.work);
  60. tegra_atomic_complete(tegra, tegra->commit.state);
  61. }
  62. static int tegra_atomic_commit(struct drm_device *drm,
  63. struct drm_atomic_state *state, bool async)
  64. {
  65. struct tegra_drm *tegra = drm->dev_private;
  66. int err;
  67. err = drm_atomic_helper_prepare_planes(drm, state);
  68. if (err)
  69. return err;
  70. /* serialize outstanding asynchronous commits */
  71. mutex_lock(&tegra->commit.lock);
  72. flush_work(&tegra->commit.work);
  73. /*
  74. * This is the point of no return - everything below never fails except
  75. * when the hw goes bonghits. Which means we can commit the new state on
  76. * the software side now.
  77. */
  78. drm_atomic_helper_swap_state(drm, state);
  79. if (async)
  80. tegra_atomic_schedule(tegra, state);
  81. else
  82. tegra_atomic_complete(tegra, state);
  83. mutex_unlock(&tegra->commit.lock);
  84. return 0;
  85. }
  86. static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
  87. .fb_create = tegra_fb_create,
  88. #ifdef CONFIG_DRM_TEGRA_FBDEV
  89. .output_poll_changed = tegra_fb_output_poll_changed,
  90. #endif
  91. .atomic_check = drm_atomic_helper_check,
  92. .atomic_commit = tegra_atomic_commit,
  93. };
  94. static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
  95. {
  96. struct host1x_device *device = to_host1x_device(drm->dev);
  97. struct tegra_drm *tegra;
  98. int err;
  99. tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
  100. if (!tegra)
  101. return -ENOMEM;
  102. if (iommu_present(&platform_bus_type)) {
  103. struct iommu_domain_geometry *geometry;
  104. u64 start, end;
  105. tegra->domain = iommu_domain_alloc(&platform_bus_type);
  106. if (!tegra->domain) {
  107. err = -ENOMEM;
  108. goto free;
  109. }
  110. geometry = &tegra->domain->geometry;
  111. start = geometry->aperture_start;
  112. end = geometry->aperture_end;
  113. DRM_DEBUG("IOMMU context initialized (aperture: %#llx-%#llx)\n",
  114. start, end);
  115. drm_mm_init(&tegra->mm, start, end - start + 1);
  116. }
  117. mutex_init(&tegra->clients_lock);
  118. INIT_LIST_HEAD(&tegra->clients);
  119. mutex_init(&tegra->commit.lock);
  120. INIT_WORK(&tegra->commit.work, tegra_atomic_work);
  121. drm->dev_private = tegra;
  122. tegra->drm = drm;
  123. drm_mode_config_init(drm);
  124. drm->mode_config.min_width = 0;
  125. drm->mode_config.min_height = 0;
  126. drm->mode_config.max_width = 4096;
  127. drm->mode_config.max_height = 4096;
  128. drm->mode_config.funcs = &tegra_drm_mode_funcs;
  129. err = tegra_drm_fb_prepare(drm);
  130. if (err < 0)
  131. goto config;
  132. drm_kms_helper_poll_init(drm);
  133. err = host1x_device_init(device);
  134. if (err < 0)
  135. goto fbdev;
  136. drm_mode_config_reset(drm);
  137. /*
  138. * We don't use the drm_irq_install() helpers provided by the DRM
  139. * core, so we need to set this manually in order to allow the
  140. * DRM_IOCTL_WAIT_VBLANK to operate correctly.
  141. */
  142. drm->irq_enabled = true;
  143. /* syncpoints are used for full 32-bit hardware VBLANK counters */
  144. drm->max_vblank_count = 0xffffffff;
  145. err = drm_vblank_init(drm, drm->mode_config.num_crtc);
  146. if (err < 0)
  147. goto device;
  148. err = tegra_drm_fb_init(drm);
  149. if (err < 0)
  150. goto vblank;
  151. return 0;
  152. vblank:
  153. drm_vblank_cleanup(drm);
  154. device:
  155. host1x_device_exit(device);
  156. fbdev:
  157. drm_kms_helper_poll_fini(drm);
  158. tegra_drm_fb_free(drm);
  159. config:
  160. drm_mode_config_cleanup(drm);
  161. if (tegra->domain) {
  162. iommu_domain_free(tegra->domain);
  163. drm_mm_takedown(&tegra->mm);
  164. }
  165. free:
  166. kfree(tegra);
  167. return err;
  168. }
  169. static int tegra_drm_unload(struct drm_device *drm)
  170. {
  171. struct host1x_device *device = to_host1x_device(drm->dev);
  172. struct tegra_drm *tegra = drm->dev_private;
  173. int err;
  174. drm_kms_helper_poll_fini(drm);
  175. tegra_drm_fb_exit(drm);
  176. drm_mode_config_cleanup(drm);
  177. drm_vblank_cleanup(drm);
  178. err = host1x_device_exit(device);
  179. if (err < 0)
  180. return err;
  181. if (tegra->domain) {
  182. iommu_domain_free(tegra->domain);
  183. drm_mm_takedown(&tegra->mm);
  184. }
  185. kfree(tegra);
  186. return 0;
  187. }
  188. static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
  189. {
  190. struct tegra_drm_file *fpriv;
  191. fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
  192. if (!fpriv)
  193. return -ENOMEM;
  194. INIT_LIST_HEAD(&fpriv->contexts);
  195. filp->driver_priv = fpriv;
  196. return 0;
  197. }
  198. static void tegra_drm_context_free(struct tegra_drm_context *context)
  199. {
  200. context->client->ops->close_channel(context);
  201. kfree(context);
  202. }
  203. static void tegra_drm_lastclose(struct drm_device *drm)
  204. {
  205. #ifdef CONFIG_DRM_TEGRA_FBDEV
  206. struct tegra_drm *tegra = drm->dev_private;
  207. tegra_fbdev_restore_mode(tegra->fbdev);
  208. #endif
  209. }
  210. static struct host1x_bo *
  211. host1x_bo_lookup(struct drm_device *drm, struct drm_file *file, u32 handle)
  212. {
  213. struct drm_gem_object *gem;
  214. struct tegra_bo *bo;
  215. gem = drm_gem_object_lookup(drm, file, handle);
  216. if (!gem)
  217. return NULL;
  218. mutex_lock(&drm->struct_mutex);
  219. drm_gem_object_unreference(gem);
  220. mutex_unlock(&drm->struct_mutex);
  221. bo = to_tegra_bo(gem);
  222. return &bo->base;
  223. }
  224. static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
  225. struct drm_tegra_reloc __user *src,
  226. struct drm_device *drm,
  227. struct drm_file *file)
  228. {
  229. u32 cmdbuf, target;
  230. int err;
  231. err = get_user(cmdbuf, &src->cmdbuf.handle);
  232. if (err < 0)
  233. return err;
  234. err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
  235. if (err < 0)
  236. return err;
  237. err = get_user(target, &src->target.handle);
  238. if (err < 0)
  239. return err;
  240. err = get_user(dest->target.offset, &src->target.offset);
  241. if (err < 0)
  242. return err;
  243. err = get_user(dest->shift, &src->shift);
  244. if (err < 0)
  245. return err;
  246. dest->cmdbuf.bo = host1x_bo_lookup(drm, file, cmdbuf);
  247. if (!dest->cmdbuf.bo)
  248. return -ENOENT;
  249. dest->target.bo = host1x_bo_lookup(drm, file, target);
  250. if (!dest->target.bo)
  251. return -ENOENT;
  252. return 0;
  253. }
  254. int tegra_drm_submit(struct tegra_drm_context *context,
  255. struct drm_tegra_submit *args, struct drm_device *drm,
  256. struct drm_file *file)
  257. {
  258. unsigned int num_cmdbufs = args->num_cmdbufs;
  259. unsigned int num_relocs = args->num_relocs;
  260. unsigned int num_waitchks = args->num_waitchks;
  261. struct drm_tegra_cmdbuf __user *cmdbufs =
  262. (void __user *)(uintptr_t)args->cmdbufs;
  263. struct drm_tegra_reloc __user *relocs =
  264. (void __user *)(uintptr_t)args->relocs;
  265. struct drm_tegra_waitchk __user *waitchks =
  266. (void __user *)(uintptr_t)args->waitchks;
  267. struct drm_tegra_syncpt syncpt;
  268. struct host1x_job *job;
  269. int err;
  270. /* We don't yet support other than one syncpt_incr struct per submit */
  271. if (args->num_syncpts != 1)
  272. return -EINVAL;
  273. job = host1x_job_alloc(context->channel, args->num_cmdbufs,
  274. args->num_relocs, args->num_waitchks);
  275. if (!job)
  276. return -ENOMEM;
  277. job->num_relocs = args->num_relocs;
  278. job->num_waitchk = args->num_waitchks;
  279. job->client = (u32)args->context;
  280. job->class = context->client->base.class;
  281. job->serialize = true;
  282. while (num_cmdbufs) {
  283. struct drm_tegra_cmdbuf cmdbuf;
  284. struct host1x_bo *bo;
  285. if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) {
  286. err = -EFAULT;
  287. goto fail;
  288. }
  289. bo = host1x_bo_lookup(drm, file, cmdbuf.handle);
  290. if (!bo) {
  291. err = -ENOENT;
  292. goto fail;
  293. }
  294. host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
  295. num_cmdbufs--;
  296. cmdbufs++;
  297. }
  298. /* copy and resolve relocations from submit */
  299. while (num_relocs--) {
  300. err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
  301. &relocs[num_relocs], drm,
  302. file);
  303. if (err < 0)
  304. goto fail;
  305. }
  306. if (copy_from_user(job->waitchk, waitchks,
  307. sizeof(*waitchks) * num_waitchks)) {
  308. err = -EFAULT;
  309. goto fail;
  310. }
  311. if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts,
  312. sizeof(syncpt))) {
  313. err = -EFAULT;
  314. goto fail;
  315. }
  316. job->is_addr_reg = context->client->ops->is_addr_reg;
  317. job->syncpt_incrs = syncpt.incrs;
  318. job->syncpt_id = syncpt.id;
  319. job->timeout = 10000;
  320. if (args->timeout && args->timeout < 10000)
  321. job->timeout = args->timeout;
  322. err = host1x_job_pin(job, context->client->base.dev);
  323. if (err)
  324. goto fail;
  325. err = host1x_job_submit(job);
  326. if (err)
  327. goto fail_submit;
  328. args->fence = job->syncpt_end;
  329. host1x_job_put(job);
  330. return 0;
  331. fail_submit:
  332. host1x_job_unpin(job);
  333. fail:
  334. host1x_job_put(job);
  335. return err;
  336. }
  337. #ifdef CONFIG_DRM_TEGRA_STAGING
  338. static struct tegra_drm_context *tegra_drm_get_context(__u64 context)
  339. {
  340. return (struct tegra_drm_context *)(uintptr_t)context;
  341. }
  342. static bool tegra_drm_file_owns_context(struct tegra_drm_file *file,
  343. struct tegra_drm_context *context)
  344. {
  345. struct tegra_drm_context *ctx;
  346. list_for_each_entry(ctx, &file->contexts, list)
  347. if (ctx == context)
  348. return true;
  349. return false;
  350. }
  351. static int tegra_gem_create(struct drm_device *drm, void *data,
  352. struct drm_file *file)
  353. {
  354. struct drm_tegra_gem_create *args = data;
  355. struct tegra_bo *bo;
  356. bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
  357. &args->handle);
  358. if (IS_ERR(bo))
  359. return PTR_ERR(bo);
  360. return 0;
  361. }
  362. static int tegra_gem_mmap(struct drm_device *drm, void *data,
  363. struct drm_file *file)
  364. {
  365. struct drm_tegra_gem_mmap *args = data;
  366. struct drm_gem_object *gem;
  367. struct tegra_bo *bo;
  368. gem = drm_gem_object_lookup(drm, file, args->handle);
  369. if (!gem)
  370. return -EINVAL;
  371. bo = to_tegra_bo(gem);
  372. args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
  373. drm_gem_object_unreference(gem);
  374. return 0;
  375. }
  376. static int tegra_syncpt_read(struct drm_device *drm, void *data,
  377. struct drm_file *file)
  378. {
  379. struct host1x *host = dev_get_drvdata(drm->dev->parent);
  380. struct drm_tegra_syncpt_read *args = data;
  381. struct host1x_syncpt *sp;
  382. sp = host1x_syncpt_get(host, args->id);
  383. if (!sp)
  384. return -EINVAL;
  385. args->value = host1x_syncpt_read_min(sp);
  386. return 0;
  387. }
  388. static int tegra_syncpt_incr(struct drm_device *drm, void *data,
  389. struct drm_file *file)
  390. {
  391. struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
  392. struct drm_tegra_syncpt_incr *args = data;
  393. struct host1x_syncpt *sp;
  394. sp = host1x_syncpt_get(host1x, args->id);
  395. if (!sp)
  396. return -EINVAL;
  397. return host1x_syncpt_incr(sp);
  398. }
  399. static int tegra_syncpt_wait(struct drm_device *drm, void *data,
  400. struct drm_file *file)
  401. {
  402. struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
  403. struct drm_tegra_syncpt_wait *args = data;
  404. struct host1x_syncpt *sp;
  405. sp = host1x_syncpt_get(host1x, args->id);
  406. if (!sp)
  407. return -EINVAL;
  408. return host1x_syncpt_wait(sp, args->thresh, args->timeout,
  409. &args->value);
  410. }
  411. static int tegra_open_channel(struct drm_device *drm, void *data,
  412. struct drm_file *file)
  413. {
  414. struct tegra_drm_file *fpriv = file->driver_priv;
  415. struct tegra_drm *tegra = drm->dev_private;
  416. struct drm_tegra_open_channel *args = data;
  417. struct tegra_drm_context *context;
  418. struct tegra_drm_client *client;
  419. int err = -ENODEV;
  420. context = kzalloc(sizeof(*context), GFP_KERNEL);
  421. if (!context)
  422. return -ENOMEM;
  423. list_for_each_entry(client, &tegra->clients, list)
  424. if (client->base.class == args->client) {
  425. err = client->ops->open_channel(client, context);
  426. if (err)
  427. break;
  428. list_add(&context->list, &fpriv->contexts);
  429. args->context = (uintptr_t)context;
  430. context->client = client;
  431. return 0;
  432. }
  433. kfree(context);
  434. return err;
  435. }
  436. static int tegra_close_channel(struct drm_device *drm, void *data,
  437. struct drm_file *file)
  438. {
  439. struct tegra_drm_file *fpriv = file->driver_priv;
  440. struct drm_tegra_close_channel *args = data;
  441. struct tegra_drm_context *context;
  442. context = tegra_drm_get_context(args->context);
  443. if (!tegra_drm_file_owns_context(fpriv, context))
  444. return -EINVAL;
  445. list_del(&context->list);
  446. tegra_drm_context_free(context);
  447. return 0;
  448. }
  449. static int tegra_get_syncpt(struct drm_device *drm, void *data,
  450. struct drm_file *file)
  451. {
  452. struct tegra_drm_file *fpriv = file->driver_priv;
  453. struct drm_tegra_get_syncpt *args = data;
  454. struct tegra_drm_context *context;
  455. struct host1x_syncpt *syncpt;
  456. context = tegra_drm_get_context(args->context);
  457. if (!tegra_drm_file_owns_context(fpriv, context))
  458. return -ENODEV;
  459. if (args->index >= context->client->base.num_syncpts)
  460. return -EINVAL;
  461. syncpt = context->client->base.syncpts[args->index];
  462. args->id = host1x_syncpt_id(syncpt);
  463. return 0;
  464. }
  465. static int tegra_submit(struct drm_device *drm, void *data,
  466. struct drm_file *file)
  467. {
  468. struct tegra_drm_file *fpriv = file->driver_priv;
  469. struct drm_tegra_submit *args = data;
  470. struct tegra_drm_context *context;
  471. context = tegra_drm_get_context(args->context);
  472. if (!tegra_drm_file_owns_context(fpriv, context))
  473. return -ENODEV;
  474. return context->client->ops->submit(context, args, drm, file);
  475. }
  476. static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
  477. struct drm_file *file)
  478. {
  479. struct tegra_drm_file *fpriv = file->driver_priv;
  480. struct drm_tegra_get_syncpt_base *args = data;
  481. struct tegra_drm_context *context;
  482. struct host1x_syncpt_base *base;
  483. struct host1x_syncpt *syncpt;
  484. context = tegra_drm_get_context(args->context);
  485. if (!tegra_drm_file_owns_context(fpriv, context))
  486. return -ENODEV;
  487. if (args->syncpt >= context->client->base.num_syncpts)
  488. return -EINVAL;
  489. syncpt = context->client->base.syncpts[args->syncpt];
  490. base = host1x_syncpt_get_base(syncpt);
  491. if (!base)
  492. return -ENXIO;
  493. args->id = host1x_syncpt_base_id(base);
  494. return 0;
  495. }
  496. static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
  497. struct drm_file *file)
  498. {
  499. struct drm_tegra_gem_set_tiling *args = data;
  500. enum tegra_bo_tiling_mode mode;
  501. struct drm_gem_object *gem;
  502. unsigned long value = 0;
  503. struct tegra_bo *bo;
  504. switch (args->mode) {
  505. case DRM_TEGRA_GEM_TILING_MODE_PITCH:
  506. mode = TEGRA_BO_TILING_MODE_PITCH;
  507. if (args->value != 0)
  508. return -EINVAL;
  509. break;
  510. case DRM_TEGRA_GEM_TILING_MODE_TILED:
  511. mode = TEGRA_BO_TILING_MODE_TILED;
  512. if (args->value != 0)
  513. return -EINVAL;
  514. break;
  515. case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
  516. mode = TEGRA_BO_TILING_MODE_BLOCK;
  517. if (args->value > 5)
  518. return -EINVAL;
  519. value = args->value;
  520. break;
  521. default:
  522. return -EINVAL;
  523. }
  524. gem = drm_gem_object_lookup(drm, file, args->handle);
  525. if (!gem)
  526. return -ENOENT;
  527. bo = to_tegra_bo(gem);
  528. bo->tiling.mode = mode;
  529. bo->tiling.value = value;
  530. drm_gem_object_unreference(gem);
  531. return 0;
  532. }
  533. static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
  534. struct drm_file *file)
  535. {
  536. struct drm_tegra_gem_get_tiling *args = data;
  537. struct drm_gem_object *gem;
  538. struct tegra_bo *bo;
  539. int err = 0;
  540. gem = drm_gem_object_lookup(drm, file, args->handle);
  541. if (!gem)
  542. return -ENOENT;
  543. bo = to_tegra_bo(gem);
  544. switch (bo->tiling.mode) {
  545. case TEGRA_BO_TILING_MODE_PITCH:
  546. args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
  547. args->value = 0;
  548. break;
  549. case TEGRA_BO_TILING_MODE_TILED:
  550. args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
  551. args->value = 0;
  552. break;
  553. case TEGRA_BO_TILING_MODE_BLOCK:
  554. args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
  555. args->value = bo->tiling.value;
  556. break;
  557. default:
  558. err = -EINVAL;
  559. break;
  560. }
  561. drm_gem_object_unreference(gem);
  562. return err;
  563. }
  564. static int tegra_gem_set_flags(struct drm_device *drm, void *data,
  565. struct drm_file *file)
  566. {
  567. struct drm_tegra_gem_set_flags *args = data;
  568. struct drm_gem_object *gem;
  569. struct tegra_bo *bo;
  570. if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
  571. return -EINVAL;
  572. gem = drm_gem_object_lookup(drm, file, args->handle);
  573. if (!gem)
  574. return -ENOENT;
  575. bo = to_tegra_bo(gem);
  576. bo->flags = 0;
  577. if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
  578. bo->flags |= TEGRA_BO_BOTTOM_UP;
  579. drm_gem_object_unreference(gem);
  580. return 0;
  581. }
  582. static int tegra_gem_get_flags(struct drm_device *drm, void *data,
  583. struct drm_file *file)
  584. {
  585. struct drm_tegra_gem_get_flags *args = data;
  586. struct drm_gem_object *gem;
  587. struct tegra_bo *bo;
  588. gem = drm_gem_object_lookup(drm, file, args->handle);
  589. if (!gem)
  590. return -ENOENT;
  591. bo = to_tegra_bo(gem);
  592. args->flags = 0;
  593. if (bo->flags & TEGRA_BO_BOTTOM_UP)
  594. args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
  595. drm_gem_object_unreference(gem);
  596. return 0;
  597. }
  598. #endif
  599. static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
  600. #ifdef CONFIG_DRM_TEGRA_STAGING
  601. DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, DRM_UNLOCKED),
  602. DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, DRM_UNLOCKED),
  603. DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, DRM_UNLOCKED),
  604. DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, DRM_UNLOCKED),
  605. DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, DRM_UNLOCKED),
  606. DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, DRM_UNLOCKED),
  607. DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, DRM_UNLOCKED),
  608. DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, DRM_UNLOCKED),
  609. DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, DRM_UNLOCKED),
  610. DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, DRM_UNLOCKED),
  611. DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, DRM_UNLOCKED),
  612. DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, DRM_UNLOCKED),
  613. DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, DRM_UNLOCKED),
  614. DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, DRM_UNLOCKED),
  615. #endif
  616. };
  617. static const struct file_operations tegra_drm_fops = {
  618. .owner = THIS_MODULE,
  619. .open = drm_open,
  620. .release = drm_release,
  621. .unlocked_ioctl = drm_ioctl,
  622. .mmap = tegra_drm_mmap,
  623. .poll = drm_poll,
  624. .read = drm_read,
  625. #ifdef CONFIG_COMPAT
  626. .compat_ioctl = drm_compat_ioctl,
  627. #endif
  628. .llseek = noop_llseek,
  629. };
  630. static struct drm_crtc *tegra_crtc_from_pipe(struct drm_device *drm,
  631. unsigned int pipe)
  632. {
  633. struct drm_crtc *crtc;
  634. list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) {
  635. if (pipe == drm_crtc_index(crtc))
  636. return crtc;
  637. }
  638. return NULL;
  639. }
  640. static u32 tegra_drm_get_vblank_counter(struct drm_device *drm, int pipe)
  641. {
  642. struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
  643. struct tegra_dc *dc = to_tegra_dc(crtc);
  644. if (!crtc)
  645. return 0;
  646. return tegra_dc_get_vblank_counter(dc);
  647. }
  648. static int tegra_drm_enable_vblank(struct drm_device *drm, int pipe)
  649. {
  650. struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
  651. struct tegra_dc *dc = to_tegra_dc(crtc);
  652. if (!crtc)
  653. return -ENODEV;
  654. tegra_dc_enable_vblank(dc);
  655. return 0;
  656. }
  657. static void tegra_drm_disable_vblank(struct drm_device *drm, int pipe)
  658. {
  659. struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
  660. struct tegra_dc *dc = to_tegra_dc(crtc);
  661. if (crtc)
  662. tegra_dc_disable_vblank(dc);
  663. }
  664. static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file)
  665. {
  666. struct tegra_drm_file *fpriv = file->driver_priv;
  667. struct tegra_drm_context *context, *tmp;
  668. struct drm_crtc *crtc;
  669. list_for_each_entry(crtc, &drm->mode_config.crtc_list, head)
  670. tegra_dc_cancel_page_flip(crtc, file);
  671. list_for_each_entry_safe(context, tmp, &fpriv->contexts, list)
  672. tegra_drm_context_free(context);
  673. kfree(fpriv);
  674. }
  675. #ifdef CONFIG_DEBUG_FS
  676. static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
  677. {
  678. struct drm_info_node *node = (struct drm_info_node *)s->private;
  679. struct drm_device *drm = node->minor->dev;
  680. struct drm_framebuffer *fb;
  681. mutex_lock(&drm->mode_config.fb_lock);
  682. list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
  683. seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
  684. fb->base.id, fb->width, fb->height, fb->depth,
  685. fb->bits_per_pixel,
  686. atomic_read(&fb->refcount.refcount));
  687. }
  688. mutex_unlock(&drm->mode_config.fb_lock);
  689. return 0;
  690. }
  691. static int tegra_debugfs_iova(struct seq_file *s, void *data)
  692. {
  693. struct drm_info_node *node = (struct drm_info_node *)s->private;
  694. struct drm_device *drm = node->minor->dev;
  695. struct tegra_drm *tegra = drm->dev_private;
  696. return drm_mm_dump_table(s, &tegra->mm);
  697. }
  698. static struct drm_info_list tegra_debugfs_list[] = {
  699. { "framebuffers", tegra_debugfs_framebuffers, 0 },
  700. { "iova", tegra_debugfs_iova, 0 },
  701. };
  702. static int tegra_debugfs_init(struct drm_minor *minor)
  703. {
  704. return drm_debugfs_create_files(tegra_debugfs_list,
  705. ARRAY_SIZE(tegra_debugfs_list),
  706. minor->debugfs_root, minor);
  707. }
  708. static void tegra_debugfs_cleanup(struct drm_minor *minor)
  709. {
  710. drm_debugfs_remove_files(tegra_debugfs_list,
  711. ARRAY_SIZE(tegra_debugfs_list), minor);
  712. }
  713. #endif
  714. static struct drm_driver tegra_drm_driver = {
  715. .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
  716. .load = tegra_drm_load,
  717. .unload = tegra_drm_unload,
  718. .open = tegra_drm_open,
  719. .preclose = tegra_drm_preclose,
  720. .lastclose = tegra_drm_lastclose,
  721. .get_vblank_counter = tegra_drm_get_vblank_counter,
  722. .enable_vblank = tegra_drm_enable_vblank,
  723. .disable_vblank = tegra_drm_disable_vblank,
  724. #if defined(CONFIG_DEBUG_FS)
  725. .debugfs_init = tegra_debugfs_init,
  726. .debugfs_cleanup = tegra_debugfs_cleanup,
  727. #endif
  728. .gem_free_object = tegra_bo_free_object,
  729. .gem_vm_ops = &tegra_bo_vm_ops,
  730. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  731. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  732. .gem_prime_export = tegra_gem_prime_export,
  733. .gem_prime_import = tegra_gem_prime_import,
  734. .dumb_create = tegra_bo_dumb_create,
  735. .dumb_map_offset = tegra_bo_dumb_map_offset,
  736. .dumb_destroy = drm_gem_dumb_destroy,
  737. .ioctls = tegra_drm_ioctls,
  738. .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
  739. .fops = &tegra_drm_fops,
  740. .name = DRIVER_NAME,
  741. .desc = DRIVER_DESC,
  742. .date = DRIVER_DATE,
  743. .major = DRIVER_MAJOR,
  744. .minor = DRIVER_MINOR,
  745. .patchlevel = DRIVER_PATCHLEVEL,
  746. };
  747. int tegra_drm_register_client(struct tegra_drm *tegra,
  748. struct tegra_drm_client *client)
  749. {
  750. mutex_lock(&tegra->clients_lock);
  751. list_add_tail(&client->list, &tegra->clients);
  752. mutex_unlock(&tegra->clients_lock);
  753. return 0;
  754. }
  755. int tegra_drm_unregister_client(struct tegra_drm *tegra,
  756. struct tegra_drm_client *client)
  757. {
  758. mutex_lock(&tegra->clients_lock);
  759. list_del_init(&client->list);
  760. mutex_unlock(&tegra->clients_lock);
  761. return 0;
  762. }
  763. static int host1x_drm_probe(struct host1x_device *dev)
  764. {
  765. struct drm_driver *driver = &tegra_drm_driver;
  766. struct drm_device *drm;
  767. int err;
  768. drm = drm_dev_alloc(driver, &dev->dev);
  769. if (!drm)
  770. return -ENOMEM;
  771. drm_dev_set_unique(drm, dev_name(&dev->dev));
  772. dev_set_drvdata(&dev->dev, drm);
  773. err = drm_dev_register(drm, 0);
  774. if (err < 0)
  775. goto unref;
  776. DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name,
  777. driver->major, driver->minor, driver->patchlevel,
  778. driver->date, drm->primary->index);
  779. return 0;
  780. unref:
  781. drm_dev_unref(drm);
  782. return err;
  783. }
  784. static int host1x_drm_remove(struct host1x_device *dev)
  785. {
  786. struct drm_device *drm = dev_get_drvdata(&dev->dev);
  787. drm_dev_unregister(drm);
  788. drm_dev_unref(drm);
  789. return 0;
  790. }
  791. #ifdef CONFIG_PM_SLEEP
  792. static int host1x_drm_suspend(struct device *dev)
  793. {
  794. struct drm_device *drm = dev_get_drvdata(dev);
  795. drm_kms_helper_poll_disable(drm);
  796. return 0;
  797. }
  798. static int host1x_drm_resume(struct device *dev)
  799. {
  800. struct drm_device *drm = dev_get_drvdata(dev);
  801. drm_kms_helper_poll_enable(drm);
  802. return 0;
  803. }
  804. #endif
  805. static const struct dev_pm_ops host1x_drm_pm_ops = {
  806. SET_SYSTEM_SLEEP_PM_OPS(host1x_drm_suspend, host1x_drm_resume)
  807. };
  808. static const struct of_device_id host1x_drm_subdevs[] = {
  809. { .compatible = "nvidia,tegra20-dc", },
  810. { .compatible = "nvidia,tegra20-hdmi", },
  811. { .compatible = "nvidia,tegra20-gr2d", },
  812. { .compatible = "nvidia,tegra20-gr3d", },
  813. { .compatible = "nvidia,tegra30-dc", },
  814. { .compatible = "nvidia,tegra30-hdmi", },
  815. { .compatible = "nvidia,tegra30-gr2d", },
  816. { .compatible = "nvidia,tegra30-gr3d", },
  817. { .compatible = "nvidia,tegra114-dsi", },
  818. { .compatible = "nvidia,tegra114-hdmi", },
  819. { .compatible = "nvidia,tegra114-gr3d", },
  820. { .compatible = "nvidia,tegra124-dc", },
  821. { .compatible = "nvidia,tegra124-sor", },
  822. { .compatible = "nvidia,tegra124-hdmi", },
  823. { /* sentinel */ }
  824. };
  825. static struct host1x_driver host1x_drm_driver = {
  826. .driver = {
  827. .name = "drm",
  828. .pm = &host1x_drm_pm_ops,
  829. },
  830. .probe = host1x_drm_probe,
  831. .remove = host1x_drm_remove,
  832. .subdevs = host1x_drm_subdevs,
  833. };
  834. static int __init host1x_drm_init(void)
  835. {
  836. int err;
  837. err = host1x_driver_register(&host1x_drm_driver);
  838. if (err < 0)
  839. return err;
  840. err = platform_driver_register(&tegra_dc_driver);
  841. if (err < 0)
  842. goto unregister_host1x;
  843. err = platform_driver_register(&tegra_dsi_driver);
  844. if (err < 0)
  845. goto unregister_dc;
  846. err = platform_driver_register(&tegra_sor_driver);
  847. if (err < 0)
  848. goto unregister_dsi;
  849. err = platform_driver_register(&tegra_hdmi_driver);
  850. if (err < 0)
  851. goto unregister_sor;
  852. err = platform_driver_register(&tegra_dpaux_driver);
  853. if (err < 0)
  854. goto unregister_hdmi;
  855. err = platform_driver_register(&tegra_gr2d_driver);
  856. if (err < 0)
  857. goto unregister_dpaux;
  858. err = platform_driver_register(&tegra_gr3d_driver);
  859. if (err < 0)
  860. goto unregister_gr2d;
  861. return 0;
  862. unregister_gr2d:
  863. platform_driver_unregister(&tegra_gr2d_driver);
  864. unregister_dpaux:
  865. platform_driver_unregister(&tegra_dpaux_driver);
  866. unregister_hdmi:
  867. platform_driver_unregister(&tegra_hdmi_driver);
  868. unregister_sor:
  869. platform_driver_unregister(&tegra_sor_driver);
  870. unregister_dsi:
  871. platform_driver_unregister(&tegra_dsi_driver);
  872. unregister_dc:
  873. platform_driver_unregister(&tegra_dc_driver);
  874. unregister_host1x:
  875. host1x_driver_unregister(&host1x_drm_driver);
  876. return err;
  877. }
  878. module_init(host1x_drm_init);
  879. static void __exit host1x_drm_exit(void)
  880. {
  881. platform_driver_unregister(&tegra_gr3d_driver);
  882. platform_driver_unregister(&tegra_gr2d_driver);
  883. platform_driver_unregister(&tegra_dpaux_driver);
  884. platform_driver_unregister(&tegra_hdmi_driver);
  885. platform_driver_unregister(&tegra_sor_driver);
  886. platform_driver_unregister(&tegra_dsi_driver);
  887. platform_driver_unregister(&tegra_dc_driver);
  888. host1x_driver_unregister(&host1x_drm_driver);
  889. }
  890. module_exit(host1x_drm_exit);
  891. MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
  892. MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
  893. MODULE_LICENSE("GPL v2");