exynos_drm_ipp.c 43 KB

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  1. /*
  2. * Copyright (C) 2012 Samsung Electronics Co.Ltd
  3. * Authors:
  4. * Eunchul Kim <chulspro.kim@samsung.com>
  5. * Jinyoung Jeon <jy0.jeon@samsung.com>
  6. * Sangmin Lee <lsmin.lee@samsung.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/types.h>
  17. #include <linux/clk.h>
  18. #include <linux/pm_runtime.h>
  19. #include <drm/drmP.h>
  20. #include <drm/exynos_drm.h>
  21. #include "exynos_drm_drv.h"
  22. #include "exynos_drm_gem.h"
  23. #include "exynos_drm_ipp.h"
  24. #include "exynos_drm_iommu.h"
  25. /*
  26. * IPP stands for Image Post Processing and
  27. * supports image scaler/rotator and input/output DMA operations.
  28. * using FIMC, GSC, Rotator, so on.
  29. * IPP is integration device driver of same attribute h/w
  30. */
  31. /*
  32. * TODO
  33. * 1. expand command control id.
  34. * 2. integrate property and config.
  35. * 3. removed send_event id check routine.
  36. * 4. compare send_event id if needed.
  37. * 5. free subdrv_remove notifier callback list if needed.
  38. * 6. need to check subdrv_open about multi-open.
  39. * 7. need to power_on implement power and sysmmu ctrl.
  40. */
  41. #define get_ipp_context(dev) platform_get_drvdata(to_platform_device(dev))
  42. #define ipp_is_m2m_cmd(c) (c == IPP_CMD_M2M)
  43. /*
  44. * A structure of event.
  45. *
  46. * @base: base of event.
  47. * @event: ipp event.
  48. */
  49. struct drm_exynos_ipp_send_event {
  50. struct drm_pending_event base;
  51. struct drm_exynos_ipp_event event;
  52. };
  53. /*
  54. * A structure of memory node.
  55. *
  56. * @list: list head to memory queue information.
  57. * @ops_id: id of operations.
  58. * @prop_id: id of property.
  59. * @buf_id: id of buffer.
  60. * @buf_info: gem objects and dma address, size.
  61. * @filp: a pointer to drm_file.
  62. */
  63. struct drm_exynos_ipp_mem_node {
  64. struct list_head list;
  65. enum drm_exynos_ops_id ops_id;
  66. u32 prop_id;
  67. u32 buf_id;
  68. struct drm_exynos_ipp_buf_info buf_info;
  69. };
  70. /*
  71. * A structure of ipp context.
  72. *
  73. * @subdrv: prepare initialization using subdrv.
  74. * @ipp_lock: lock for synchronization of access to ipp_idr.
  75. * @prop_lock: lock for synchronization of access to prop_idr.
  76. * @ipp_idr: ipp driver idr.
  77. * @prop_idr: property idr.
  78. * @event_workq: event work queue.
  79. * @cmd_workq: command work queue.
  80. */
  81. struct ipp_context {
  82. struct exynos_drm_subdrv subdrv;
  83. struct mutex ipp_lock;
  84. struct mutex prop_lock;
  85. struct idr ipp_idr;
  86. struct idr prop_idr;
  87. struct workqueue_struct *event_workq;
  88. struct workqueue_struct *cmd_workq;
  89. };
  90. static LIST_HEAD(exynos_drm_ippdrv_list);
  91. static DEFINE_MUTEX(exynos_drm_ippdrv_lock);
  92. static BLOCKING_NOTIFIER_HEAD(exynos_drm_ippnb_list);
  93. int exynos_drm_ippdrv_register(struct exynos_drm_ippdrv *ippdrv)
  94. {
  95. mutex_lock(&exynos_drm_ippdrv_lock);
  96. list_add_tail(&ippdrv->drv_list, &exynos_drm_ippdrv_list);
  97. mutex_unlock(&exynos_drm_ippdrv_lock);
  98. return 0;
  99. }
  100. int exynos_drm_ippdrv_unregister(struct exynos_drm_ippdrv *ippdrv)
  101. {
  102. mutex_lock(&exynos_drm_ippdrv_lock);
  103. list_del(&ippdrv->drv_list);
  104. mutex_unlock(&exynos_drm_ippdrv_lock);
  105. return 0;
  106. }
  107. static int ipp_create_id(struct idr *id_idr, struct mutex *lock, void *obj)
  108. {
  109. int ret;
  110. mutex_lock(lock);
  111. ret = idr_alloc(id_idr, obj, 1, 0, GFP_KERNEL);
  112. mutex_unlock(lock);
  113. return ret;
  114. }
  115. static void ipp_remove_id(struct idr *id_idr, struct mutex *lock, u32 id)
  116. {
  117. mutex_lock(lock);
  118. idr_remove(id_idr, id);
  119. mutex_unlock(lock);
  120. }
  121. static void *ipp_find_obj(struct idr *id_idr, struct mutex *lock, u32 id)
  122. {
  123. void *obj;
  124. mutex_lock(lock);
  125. obj = idr_find(id_idr, id);
  126. mutex_unlock(lock);
  127. return obj;
  128. }
  129. static int ipp_check_driver(struct exynos_drm_ippdrv *ippdrv,
  130. struct drm_exynos_ipp_property *property)
  131. {
  132. if (ippdrv->dedicated || (!ipp_is_m2m_cmd(property->cmd) &&
  133. !pm_runtime_suspended(ippdrv->dev)))
  134. return -EBUSY;
  135. if (ippdrv->check_property &&
  136. ippdrv->check_property(ippdrv->dev, property))
  137. return -EINVAL;
  138. return 0;
  139. }
  140. static struct exynos_drm_ippdrv *ipp_find_driver(struct ipp_context *ctx,
  141. struct drm_exynos_ipp_property *property)
  142. {
  143. struct exynos_drm_ippdrv *ippdrv;
  144. u32 ipp_id = property->ipp_id;
  145. int ret;
  146. if (ipp_id) {
  147. ippdrv = ipp_find_obj(&ctx->ipp_idr, &ctx->ipp_lock, ipp_id);
  148. if (!ippdrv) {
  149. DRM_DEBUG("ipp%d driver not found\n", ipp_id);
  150. return ERR_PTR(-ENODEV);
  151. }
  152. ret = ipp_check_driver(ippdrv, property);
  153. if (ret < 0) {
  154. DRM_DEBUG("ipp%d driver check error %d\n", ipp_id, ret);
  155. return ERR_PTR(ret);
  156. }
  157. return ippdrv;
  158. } else {
  159. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list) {
  160. ret = ipp_check_driver(ippdrv, property);
  161. if (ret == 0)
  162. return ippdrv;
  163. }
  164. DRM_DEBUG("cannot find driver suitable for given property.\n");
  165. }
  166. return ERR_PTR(-ENODEV);
  167. }
  168. static struct exynos_drm_ippdrv *ipp_find_drv_by_handle(u32 prop_id)
  169. {
  170. struct exynos_drm_ippdrv *ippdrv;
  171. struct drm_exynos_ipp_cmd_node *c_node;
  172. int count = 0;
  173. DRM_DEBUG_KMS("prop_id[%d]\n", prop_id);
  174. /*
  175. * This case is search ipp driver by prop_id handle.
  176. * sometimes, ipp subsystem find driver by prop_id.
  177. * e.g PAUSE state, queue buf, command control.
  178. */
  179. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list) {
  180. DRM_DEBUG_KMS("count[%d]ippdrv[0x%x]\n", count++, (int)ippdrv);
  181. mutex_lock(&ippdrv->cmd_lock);
  182. list_for_each_entry(c_node, &ippdrv->cmd_list, list) {
  183. if (c_node->property.prop_id == prop_id) {
  184. mutex_unlock(&ippdrv->cmd_lock);
  185. return ippdrv;
  186. }
  187. }
  188. mutex_unlock(&ippdrv->cmd_lock);
  189. }
  190. return ERR_PTR(-ENODEV);
  191. }
  192. int exynos_drm_ipp_get_property(struct drm_device *drm_dev, void *data,
  193. struct drm_file *file)
  194. {
  195. struct drm_exynos_file_private *file_priv = file->driver_priv;
  196. struct device *dev = file_priv->ipp_dev;
  197. struct ipp_context *ctx = get_ipp_context(dev);
  198. struct drm_exynos_ipp_prop_list *prop_list = data;
  199. struct exynos_drm_ippdrv *ippdrv;
  200. int count = 0;
  201. if (!ctx) {
  202. DRM_ERROR("invalid context.\n");
  203. return -EINVAL;
  204. }
  205. if (!prop_list) {
  206. DRM_ERROR("invalid property parameter.\n");
  207. return -EINVAL;
  208. }
  209. DRM_DEBUG_KMS("ipp_id[%d]\n", prop_list->ipp_id);
  210. if (!prop_list->ipp_id) {
  211. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list)
  212. count++;
  213. /*
  214. * Supports ippdrv list count for user application.
  215. * First step user application getting ippdrv count.
  216. * and second step getting ippdrv capability using ipp_id.
  217. */
  218. prop_list->count = count;
  219. } else {
  220. /*
  221. * Getting ippdrv capability by ipp_id.
  222. * some device not supported wb, output interface.
  223. * so, user application detect correct ipp driver
  224. * using this ioctl.
  225. */
  226. ippdrv = ipp_find_obj(&ctx->ipp_idr, &ctx->ipp_lock,
  227. prop_list->ipp_id);
  228. if (!ippdrv) {
  229. DRM_ERROR("not found ipp%d driver.\n",
  230. prop_list->ipp_id);
  231. return -ENODEV;
  232. }
  233. *prop_list = ippdrv->prop_list;
  234. }
  235. return 0;
  236. }
  237. static void ipp_print_property(struct drm_exynos_ipp_property *property,
  238. int idx)
  239. {
  240. struct drm_exynos_ipp_config *config = &property->config[idx];
  241. struct drm_exynos_pos *pos = &config->pos;
  242. struct drm_exynos_sz *sz = &config->sz;
  243. DRM_DEBUG_KMS("prop_id[%d]ops[%s]fmt[0x%x]\n",
  244. property->prop_id, idx ? "dst" : "src", config->fmt);
  245. DRM_DEBUG_KMS("pos[%d %d %d %d]sz[%d %d]f[%d]r[%d]\n",
  246. pos->x, pos->y, pos->w, pos->h,
  247. sz->hsize, sz->vsize, config->flip, config->degree);
  248. }
  249. static struct drm_exynos_ipp_cmd_work *ipp_create_cmd_work(void)
  250. {
  251. struct drm_exynos_ipp_cmd_work *cmd_work;
  252. cmd_work = kzalloc(sizeof(*cmd_work), GFP_KERNEL);
  253. if (!cmd_work)
  254. return ERR_PTR(-ENOMEM);
  255. INIT_WORK((struct work_struct *)cmd_work, ipp_sched_cmd);
  256. return cmd_work;
  257. }
  258. static struct drm_exynos_ipp_event_work *ipp_create_event_work(void)
  259. {
  260. struct drm_exynos_ipp_event_work *event_work;
  261. event_work = kzalloc(sizeof(*event_work), GFP_KERNEL);
  262. if (!event_work)
  263. return ERR_PTR(-ENOMEM);
  264. INIT_WORK(&event_work->work, ipp_sched_event);
  265. return event_work;
  266. }
  267. int exynos_drm_ipp_set_property(struct drm_device *drm_dev, void *data,
  268. struct drm_file *file)
  269. {
  270. struct drm_exynos_file_private *file_priv = file->driver_priv;
  271. struct device *dev = file_priv->ipp_dev;
  272. struct ipp_context *ctx = get_ipp_context(dev);
  273. struct drm_exynos_ipp_property *property = data;
  274. struct exynos_drm_ippdrv *ippdrv;
  275. struct drm_exynos_ipp_cmd_node *c_node;
  276. u32 prop_id;
  277. int ret, i;
  278. if (!ctx) {
  279. DRM_ERROR("invalid context.\n");
  280. return -EINVAL;
  281. }
  282. if (!property) {
  283. DRM_ERROR("invalid property parameter.\n");
  284. return -EINVAL;
  285. }
  286. prop_id = property->prop_id;
  287. /*
  288. * This is log print for user application property.
  289. * user application set various property.
  290. */
  291. for_each_ipp_ops(i)
  292. ipp_print_property(property, i);
  293. /*
  294. * In case prop_id is not zero try to set existing property.
  295. */
  296. if (prop_id) {
  297. c_node = ipp_find_obj(&ctx->prop_idr, &ctx->prop_lock, prop_id);
  298. if (!c_node || c_node->filp != file) {
  299. DRM_DEBUG_KMS("prop_id[%d] not found\n", prop_id);
  300. return -EINVAL;
  301. }
  302. if (c_node->state != IPP_STATE_STOP) {
  303. DRM_DEBUG_KMS("prop_id[%d] not stopped\n", prop_id);
  304. return -EINVAL;
  305. }
  306. c_node->property = *property;
  307. return 0;
  308. }
  309. /* find ipp driver using ipp id */
  310. ippdrv = ipp_find_driver(ctx, property);
  311. if (IS_ERR(ippdrv)) {
  312. DRM_ERROR("failed to get ipp driver.\n");
  313. return -EINVAL;
  314. }
  315. /* allocate command node */
  316. c_node = kzalloc(sizeof(*c_node), GFP_KERNEL);
  317. if (!c_node)
  318. return -ENOMEM;
  319. ret = ipp_create_id(&ctx->prop_idr, &ctx->prop_lock, c_node);
  320. if (ret < 0) {
  321. DRM_ERROR("failed to create id.\n");
  322. goto err_clear;
  323. }
  324. property->prop_id = ret;
  325. DRM_DEBUG_KMS("created prop_id[%d]cmd[%d]ippdrv[0x%x]\n",
  326. property->prop_id, property->cmd, (int)ippdrv);
  327. /* stored property information and ippdrv in private data */
  328. c_node->property = *property;
  329. c_node->state = IPP_STATE_IDLE;
  330. c_node->filp = file;
  331. c_node->start_work = ipp_create_cmd_work();
  332. if (IS_ERR(c_node->start_work)) {
  333. DRM_ERROR("failed to create start work.\n");
  334. ret = PTR_ERR(c_node->start_work);
  335. goto err_remove_id;
  336. }
  337. c_node->stop_work = ipp_create_cmd_work();
  338. if (IS_ERR(c_node->stop_work)) {
  339. DRM_ERROR("failed to create stop work.\n");
  340. ret = PTR_ERR(c_node->stop_work);
  341. goto err_free_start;
  342. }
  343. c_node->event_work = ipp_create_event_work();
  344. if (IS_ERR(c_node->event_work)) {
  345. DRM_ERROR("failed to create event work.\n");
  346. ret = PTR_ERR(c_node->event_work);
  347. goto err_free_stop;
  348. }
  349. mutex_init(&c_node->lock);
  350. mutex_init(&c_node->mem_lock);
  351. mutex_init(&c_node->event_lock);
  352. init_completion(&c_node->start_complete);
  353. init_completion(&c_node->stop_complete);
  354. for_each_ipp_ops(i)
  355. INIT_LIST_HEAD(&c_node->mem_list[i]);
  356. INIT_LIST_HEAD(&c_node->event_list);
  357. mutex_lock(&ippdrv->cmd_lock);
  358. list_add_tail(&c_node->list, &ippdrv->cmd_list);
  359. mutex_unlock(&ippdrv->cmd_lock);
  360. /* make dedicated state without m2m */
  361. if (!ipp_is_m2m_cmd(property->cmd))
  362. ippdrv->dedicated = true;
  363. return 0;
  364. err_free_stop:
  365. kfree(c_node->stop_work);
  366. err_free_start:
  367. kfree(c_node->start_work);
  368. err_remove_id:
  369. ipp_remove_id(&ctx->prop_idr, &ctx->prop_lock, property->prop_id);
  370. err_clear:
  371. kfree(c_node);
  372. return ret;
  373. }
  374. static int ipp_validate_mem_node(struct drm_device *drm_dev,
  375. struct drm_exynos_ipp_mem_node *m_node,
  376. struct drm_exynos_ipp_cmd_node *c_node)
  377. {
  378. struct drm_exynos_ipp_config *ipp_cfg;
  379. unsigned int num_plane;
  380. unsigned long size, buf_size = 0, plane_size, img_size = 0;
  381. unsigned int bpp, width, height;
  382. int i;
  383. ipp_cfg = &c_node->property.config[m_node->ops_id];
  384. num_plane = drm_format_num_planes(ipp_cfg->fmt);
  385. /**
  386. * This is a rather simplified validation of a memory node.
  387. * It basically verifies provided gem object handles
  388. * and the buffer sizes with respect to current configuration.
  389. * This is not the best that can be done
  390. * but it seems more than enough
  391. */
  392. for (i = 0; i < num_plane; ++i) {
  393. width = ipp_cfg->sz.hsize;
  394. height = ipp_cfg->sz.vsize;
  395. bpp = drm_format_plane_cpp(ipp_cfg->fmt, i);
  396. /*
  397. * The result of drm_format_plane_cpp() for chroma planes must
  398. * be used with drm_format_xxxx_chroma_subsampling() for
  399. * correct result.
  400. */
  401. if (i > 0) {
  402. width /= drm_format_horz_chroma_subsampling(
  403. ipp_cfg->fmt);
  404. height /= drm_format_vert_chroma_subsampling(
  405. ipp_cfg->fmt);
  406. }
  407. plane_size = width * height * bpp;
  408. img_size += plane_size;
  409. if (m_node->buf_info.handles[i]) {
  410. size = exynos_drm_gem_get_size(drm_dev,
  411. m_node->buf_info.handles[i],
  412. c_node->filp);
  413. if (plane_size > size) {
  414. DRM_ERROR(
  415. "buffer %d is smaller than required\n",
  416. i);
  417. return -EINVAL;
  418. }
  419. buf_size += size;
  420. }
  421. }
  422. if (buf_size < img_size) {
  423. DRM_ERROR("size of buffers(%lu) is smaller than image(%lu)\n",
  424. buf_size, img_size);
  425. return -EINVAL;
  426. }
  427. return 0;
  428. }
  429. static int ipp_put_mem_node(struct drm_device *drm_dev,
  430. struct drm_exynos_ipp_cmd_node *c_node,
  431. struct drm_exynos_ipp_mem_node *m_node)
  432. {
  433. int i;
  434. DRM_DEBUG_KMS("node[0x%x]\n", (int)m_node);
  435. if (!m_node) {
  436. DRM_ERROR("invalid dequeue node.\n");
  437. return -EFAULT;
  438. }
  439. DRM_DEBUG_KMS("ops_id[%d]\n", m_node->ops_id);
  440. /* put gem buffer */
  441. for_each_ipp_planar(i) {
  442. unsigned long handle = m_node->buf_info.handles[i];
  443. if (handle)
  444. exynos_drm_gem_put_dma_addr(drm_dev, handle,
  445. c_node->filp);
  446. }
  447. list_del(&m_node->list);
  448. kfree(m_node);
  449. return 0;
  450. }
  451. static struct drm_exynos_ipp_mem_node
  452. *ipp_get_mem_node(struct drm_device *drm_dev,
  453. struct drm_exynos_ipp_cmd_node *c_node,
  454. struct drm_exynos_ipp_queue_buf *qbuf)
  455. {
  456. struct drm_exynos_ipp_mem_node *m_node;
  457. struct drm_exynos_ipp_buf_info *buf_info;
  458. int i;
  459. m_node = kzalloc(sizeof(*m_node), GFP_KERNEL);
  460. if (!m_node)
  461. return ERR_PTR(-ENOMEM);
  462. buf_info = &m_node->buf_info;
  463. /* operations, buffer id */
  464. m_node->ops_id = qbuf->ops_id;
  465. m_node->prop_id = qbuf->prop_id;
  466. m_node->buf_id = qbuf->buf_id;
  467. INIT_LIST_HEAD(&m_node->list);
  468. DRM_DEBUG_KMS("m_node[0x%x]ops_id[%d]\n", (int)m_node, qbuf->ops_id);
  469. DRM_DEBUG_KMS("prop_id[%d]buf_id[%d]\n", qbuf->prop_id, m_node->buf_id);
  470. for_each_ipp_planar(i) {
  471. DRM_DEBUG_KMS("i[%d]handle[0x%x]\n", i, qbuf->handle[i]);
  472. /* get dma address by handle */
  473. if (qbuf->handle[i]) {
  474. dma_addr_t *addr;
  475. addr = exynos_drm_gem_get_dma_addr(drm_dev,
  476. qbuf->handle[i], c_node->filp);
  477. if (IS_ERR(addr)) {
  478. DRM_ERROR("failed to get addr.\n");
  479. ipp_put_mem_node(drm_dev, c_node, m_node);
  480. return ERR_PTR(-EFAULT);
  481. }
  482. buf_info->handles[i] = qbuf->handle[i];
  483. buf_info->base[i] = *addr;
  484. DRM_DEBUG_KMS("i[%d]base[0x%x]hd[0x%lx]\n", i,
  485. buf_info->base[i], buf_info->handles[i]);
  486. }
  487. }
  488. mutex_lock(&c_node->mem_lock);
  489. if (ipp_validate_mem_node(drm_dev, m_node, c_node)) {
  490. ipp_put_mem_node(drm_dev, c_node, m_node);
  491. mutex_unlock(&c_node->mem_lock);
  492. return ERR_PTR(-EFAULT);
  493. }
  494. list_add_tail(&m_node->list, &c_node->mem_list[qbuf->ops_id]);
  495. mutex_unlock(&c_node->mem_lock);
  496. return m_node;
  497. }
  498. static void ipp_clean_mem_nodes(struct drm_device *drm_dev,
  499. struct drm_exynos_ipp_cmd_node *c_node, int ops)
  500. {
  501. struct drm_exynos_ipp_mem_node *m_node, *tm_node;
  502. struct list_head *head = &c_node->mem_list[ops];
  503. mutex_lock(&c_node->mem_lock);
  504. list_for_each_entry_safe(m_node, tm_node, head, list) {
  505. int ret;
  506. ret = ipp_put_mem_node(drm_dev, c_node, m_node);
  507. if (ret)
  508. DRM_ERROR("failed to put m_node.\n");
  509. }
  510. mutex_unlock(&c_node->mem_lock);
  511. }
  512. static void ipp_free_event(struct drm_pending_event *event)
  513. {
  514. kfree(event);
  515. }
  516. static int ipp_get_event(struct drm_device *drm_dev,
  517. struct drm_exynos_ipp_cmd_node *c_node,
  518. struct drm_exynos_ipp_queue_buf *qbuf)
  519. {
  520. struct drm_exynos_ipp_send_event *e;
  521. unsigned long flags;
  522. DRM_DEBUG_KMS("ops_id[%d]buf_id[%d]\n", qbuf->ops_id, qbuf->buf_id);
  523. e = kzalloc(sizeof(*e), GFP_KERNEL);
  524. if (!e) {
  525. spin_lock_irqsave(&drm_dev->event_lock, flags);
  526. c_node->filp->event_space += sizeof(e->event);
  527. spin_unlock_irqrestore(&drm_dev->event_lock, flags);
  528. return -ENOMEM;
  529. }
  530. /* make event */
  531. e->event.base.type = DRM_EXYNOS_IPP_EVENT;
  532. e->event.base.length = sizeof(e->event);
  533. e->event.user_data = qbuf->user_data;
  534. e->event.prop_id = qbuf->prop_id;
  535. e->event.buf_id[EXYNOS_DRM_OPS_DST] = qbuf->buf_id;
  536. e->base.event = &e->event.base;
  537. e->base.file_priv = c_node->filp;
  538. e->base.destroy = ipp_free_event;
  539. mutex_lock(&c_node->event_lock);
  540. list_add_tail(&e->base.link, &c_node->event_list);
  541. mutex_unlock(&c_node->event_lock);
  542. return 0;
  543. }
  544. static void ipp_put_event(struct drm_exynos_ipp_cmd_node *c_node,
  545. struct drm_exynos_ipp_queue_buf *qbuf)
  546. {
  547. struct drm_exynos_ipp_send_event *e, *te;
  548. int count = 0;
  549. mutex_lock(&c_node->event_lock);
  550. list_for_each_entry_safe(e, te, &c_node->event_list, base.link) {
  551. DRM_DEBUG_KMS("count[%d]e[0x%x]\n", count++, (int)e);
  552. /*
  553. * qbuf == NULL condition means all event deletion.
  554. * stop operations want to delete all event list.
  555. * another case delete only same buf id.
  556. */
  557. if (!qbuf) {
  558. /* delete list */
  559. list_del(&e->base.link);
  560. kfree(e);
  561. }
  562. /* compare buffer id */
  563. if (qbuf && (qbuf->buf_id ==
  564. e->event.buf_id[EXYNOS_DRM_OPS_DST])) {
  565. /* delete list */
  566. list_del(&e->base.link);
  567. kfree(e);
  568. goto out_unlock;
  569. }
  570. }
  571. out_unlock:
  572. mutex_unlock(&c_node->event_lock);
  573. return;
  574. }
  575. static void ipp_clean_cmd_node(struct ipp_context *ctx,
  576. struct drm_exynos_ipp_cmd_node *c_node)
  577. {
  578. int i;
  579. /* cancel works */
  580. cancel_work_sync(&c_node->start_work->work);
  581. cancel_work_sync(&c_node->stop_work->work);
  582. cancel_work_sync(&c_node->event_work->work);
  583. /* put event */
  584. ipp_put_event(c_node, NULL);
  585. for_each_ipp_ops(i)
  586. ipp_clean_mem_nodes(ctx->subdrv.drm_dev, c_node, i);
  587. /* delete list */
  588. list_del(&c_node->list);
  589. ipp_remove_id(&ctx->prop_idr, &ctx->prop_lock,
  590. c_node->property.prop_id);
  591. /* destroy mutex */
  592. mutex_destroy(&c_node->lock);
  593. mutex_destroy(&c_node->mem_lock);
  594. mutex_destroy(&c_node->event_lock);
  595. /* free command node */
  596. kfree(c_node->start_work);
  597. kfree(c_node->stop_work);
  598. kfree(c_node->event_work);
  599. kfree(c_node);
  600. }
  601. static bool ipp_check_mem_list(struct drm_exynos_ipp_cmd_node *c_node)
  602. {
  603. switch (c_node->property.cmd) {
  604. case IPP_CMD_WB:
  605. return !list_empty(&c_node->mem_list[EXYNOS_DRM_OPS_DST]);
  606. case IPP_CMD_OUTPUT:
  607. return !list_empty(&c_node->mem_list[EXYNOS_DRM_OPS_SRC]);
  608. case IPP_CMD_M2M:
  609. default:
  610. return !list_empty(&c_node->mem_list[EXYNOS_DRM_OPS_SRC]) &&
  611. !list_empty(&c_node->mem_list[EXYNOS_DRM_OPS_DST]);
  612. }
  613. }
  614. static struct drm_exynos_ipp_mem_node
  615. *ipp_find_mem_node(struct drm_exynos_ipp_cmd_node *c_node,
  616. struct drm_exynos_ipp_queue_buf *qbuf)
  617. {
  618. struct drm_exynos_ipp_mem_node *m_node;
  619. struct list_head *head;
  620. int count = 0;
  621. DRM_DEBUG_KMS("buf_id[%d]\n", qbuf->buf_id);
  622. /* source/destination memory list */
  623. head = &c_node->mem_list[qbuf->ops_id];
  624. /* find memory node from memory list */
  625. list_for_each_entry(m_node, head, list) {
  626. DRM_DEBUG_KMS("count[%d]m_node[0x%x]\n", count++, (int)m_node);
  627. /* compare buffer id */
  628. if (m_node->buf_id == qbuf->buf_id)
  629. return m_node;
  630. }
  631. return NULL;
  632. }
  633. static int ipp_set_mem_node(struct exynos_drm_ippdrv *ippdrv,
  634. struct drm_exynos_ipp_cmd_node *c_node,
  635. struct drm_exynos_ipp_mem_node *m_node)
  636. {
  637. struct exynos_drm_ipp_ops *ops = NULL;
  638. int ret = 0;
  639. DRM_DEBUG_KMS("node[0x%x]\n", (int)m_node);
  640. if (!m_node) {
  641. DRM_ERROR("invalid queue node.\n");
  642. return -EFAULT;
  643. }
  644. DRM_DEBUG_KMS("ops_id[%d]\n", m_node->ops_id);
  645. /* get operations callback */
  646. ops = ippdrv->ops[m_node->ops_id];
  647. if (!ops) {
  648. DRM_ERROR("not support ops.\n");
  649. return -EFAULT;
  650. }
  651. /* set address and enable irq */
  652. if (ops->set_addr) {
  653. ret = ops->set_addr(ippdrv->dev, &m_node->buf_info,
  654. m_node->buf_id, IPP_BUF_ENQUEUE);
  655. if (ret) {
  656. DRM_ERROR("failed to set addr.\n");
  657. return ret;
  658. }
  659. }
  660. return ret;
  661. }
  662. static void ipp_handle_cmd_work(struct device *dev,
  663. struct exynos_drm_ippdrv *ippdrv,
  664. struct drm_exynos_ipp_cmd_work *cmd_work,
  665. struct drm_exynos_ipp_cmd_node *c_node)
  666. {
  667. struct ipp_context *ctx = get_ipp_context(dev);
  668. cmd_work->ippdrv = ippdrv;
  669. cmd_work->c_node = c_node;
  670. queue_work(ctx->cmd_workq, &cmd_work->work);
  671. }
  672. static int ipp_queue_buf_with_run(struct device *dev,
  673. struct drm_exynos_ipp_cmd_node *c_node,
  674. struct drm_exynos_ipp_mem_node *m_node,
  675. struct drm_exynos_ipp_queue_buf *qbuf)
  676. {
  677. struct exynos_drm_ippdrv *ippdrv;
  678. struct drm_exynos_ipp_property *property;
  679. struct exynos_drm_ipp_ops *ops;
  680. int ret;
  681. ippdrv = ipp_find_drv_by_handle(qbuf->prop_id);
  682. if (IS_ERR(ippdrv)) {
  683. DRM_ERROR("failed to get ipp driver.\n");
  684. return -EFAULT;
  685. }
  686. ops = ippdrv->ops[qbuf->ops_id];
  687. if (!ops) {
  688. DRM_ERROR("failed to get ops.\n");
  689. return -EFAULT;
  690. }
  691. property = &c_node->property;
  692. if (c_node->state != IPP_STATE_START) {
  693. DRM_DEBUG_KMS("bypass for invalid state.\n");
  694. return 0;
  695. }
  696. mutex_lock(&c_node->mem_lock);
  697. if (!ipp_check_mem_list(c_node)) {
  698. mutex_unlock(&c_node->mem_lock);
  699. DRM_DEBUG_KMS("empty memory.\n");
  700. return 0;
  701. }
  702. /*
  703. * If set destination buffer and enabled clock,
  704. * then m2m operations need start operations at queue_buf
  705. */
  706. if (ipp_is_m2m_cmd(property->cmd)) {
  707. struct drm_exynos_ipp_cmd_work *cmd_work = c_node->start_work;
  708. cmd_work->ctrl = IPP_CTRL_PLAY;
  709. ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
  710. } else {
  711. ret = ipp_set_mem_node(ippdrv, c_node, m_node);
  712. if (ret) {
  713. mutex_unlock(&c_node->mem_lock);
  714. DRM_ERROR("failed to set m node.\n");
  715. return ret;
  716. }
  717. }
  718. mutex_unlock(&c_node->mem_lock);
  719. return 0;
  720. }
  721. static void ipp_clean_queue_buf(struct drm_device *drm_dev,
  722. struct drm_exynos_ipp_cmd_node *c_node,
  723. struct drm_exynos_ipp_queue_buf *qbuf)
  724. {
  725. struct drm_exynos_ipp_mem_node *m_node, *tm_node;
  726. /* delete list */
  727. mutex_lock(&c_node->mem_lock);
  728. list_for_each_entry_safe(m_node, tm_node,
  729. &c_node->mem_list[qbuf->ops_id], list) {
  730. if (m_node->buf_id == qbuf->buf_id &&
  731. m_node->ops_id == qbuf->ops_id)
  732. ipp_put_mem_node(drm_dev, c_node, m_node);
  733. }
  734. mutex_unlock(&c_node->mem_lock);
  735. }
  736. int exynos_drm_ipp_queue_buf(struct drm_device *drm_dev, void *data,
  737. struct drm_file *file)
  738. {
  739. struct drm_exynos_file_private *file_priv = file->driver_priv;
  740. struct device *dev = file_priv->ipp_dev;
  741. struct ipp_context *ctx = get_ipp_context(dev);
  742. struct drm_exynos_ipp_queue_buf *qbuf = data;
  743. struct drm_exynos_ipp_cmd_node *c_node;
  744. struct drm_exynos_ipp_mem_node *m_node;
  745. int ret;
  746. if (!qbuf) {
  747. DRM_ERROR("invalid buf parameter.\n");
  748. return -EINVAL;
  749. }
  750. if (qbuf->ops_id >= EXYNOS_DRM_OPS_MAX) {
  751. DRM_ERROR("invalid ops parameter.\n");
  752. return -EINVAL;
  753. }
  754. DRM_DEBUG_KMS("prop_id[%d]ops_id[%s]buf_id[%d]buf_type[%d]\n",
  755. qbuf->prop_id, qbuf->ops_id ? "dst" : "src",
  756. qbuf->buf_id, qbuf->buf_type);
  757. /* find command node */
  758. c_node = ipp_find_obj(&ctx->prop_idr, &ctx->prop_lock,
  759. qbuf->prop_id);
  760. if (!c_node || c_node->filp != file) {
  761. DRM_ERROR("failed to get command node.\n");
  762. return -ENODEV;
  763. }
  764. /* buffer control */
  765. switch (qbuf->buf_type) {
  766. case IPP_BUF_ENQUEUE:
  767. /* get memory node */
  768. m_node = ipp_get_mem_node(drm_dev, c_node, qbuf);
  769. if (IS_ERR(m_node)) {
  770. DRM_ERROR("failed to get m_node.\n");
  771. return PTR_ERR(m_node);
  772. }
  773. /*
  774. * first step get event for destination buffer.
  775. * and second step when M2M case run with destination buffer
  776. * if needed.
  777. */
  778. if (qbuf->ops_id == EXYNOS_DRM_OPS_DST) {
  779. /* get event for destination buffer */
  780. ret = ipp_get_event(drm_dev, c_node, qbuf);
  781. if (ret) {
  782. DRM_ERROR("failed to get event.\n");
  783. goto err_clean_node;
  784. }
  785. /*
  786. * M2M case run play control for streaming feature.
  787. * other case set address and waiting.
  788. */
  789. ret = ipp_queue_buf_with_run(dev, c_node, m_node, qbuf);
  790. if (ret) {
  791. DRM_ERROR("failed to run command.\n");
  792. goto err_clean_node;
  793. }
  794. }
  795. break;
  796. case IPP_BUF_DEQUEUE:
  797. mutex_lock(&c_node->lock);
  798. /* put event for destination buffer */
  799. if (qbuf->ops_id == EXYNOS_DRM_OPS_DST)
  800. ipp_put_event(c_node, qbuf);
  801. ipp_clean_queue_buf(drm_dev, c_node, qbuf);
  802. mutex_unlock(&c_node->lock);
  803. break;
  804. default:
  805. DRM_ERROR("invalid buffer control.\n");
  806. return -EINVAL;
  807. }
  808. return 0;
  809. err_clean_node:
  810. DRM_ERROR("clean memory nodes.\n");
  811. ipp_clean_queue_buf(drm_dev, c_node, qbuf);
  812. return ret;
  813. }
  814. static bool exynos_drm_ipp_check_valid(struct device *dev,
  815. enum drm_exynos_ipp_ctrl ctrl, enum drm_exynos_ipp_state state)
  816. {
  817. if (ctrl != IPP_CTRL_PLAY) {
  818. if (pm_runtime_suspended(dev)) {
  819. DRM_ERROR("pm:runtime_suspended.\n");
  820. goto err_status;
  821. }
  822. }
  823. switch (ctrl) {
  824. case IPP_CTRL_PLAY:
  825. if (state != IPP_STATE_IDLE)
  826. goto err_status;
  827. break;
  828. case IPP_CTRL_STOP:
  829. if (state == IPP_STATE_STOP)
  830. goto err_status;
  831. break;
  832. case IPP_CTRL_PAUSE:
  833. if (state != IPP_STATE_START)
  834. goto err_status;
  835. break;
  836. case IPP_CTRL_RESUME:
  837. if (state != IPP_STATE_STOP)
  838. goto err_status;
  839. break;
  840. default:
  841. DRM_ERROR("invalid state.\n");
  842. goto err_status;
  843. }
  844. return true;
  845. err_status:
  846. DRM_ERROR("invalid status:ctrl[%d]state[%d]\n", ctrl, state);
  847. return false;
  848. }
  849. int exynos_drm_ipp_cmd_ctrl(struct drm_device *drm_dev, void *data,
  850. struct drm_file *file)
  851. {
  852. struct drm_exynos_file_private *file_priv = file->driver_priv;
  853. struct exynos_drm_ippdrv *ippdrv = NULL;
  854. struct device *dev = file_priv->ipp_dev;
  855. struct ipp_context *ctx = get_ipp_context(dev);
  856. struct drm_exynos_ipp_cmd_ctrl *cmd_ctrl = data;
  857. struct drm_exynos_ipp_cmd_work *cmd_work;
  858. struct drm_exynos_ipp_cmd_node *c_node;
  859. if (!ctx) {
  860. DRM_ERROR("invalid context.\n");
  861. return -EINVAL;
  862. }
  863. if (!cmd_ctrl) {
  864. DRM_ERROR("invalid control parameter.\n");
  865. return -EINVAL;
  866. }
  867. DRM_DEBUG_KMS("ctrl[%d]prop_id[%d]\n",
  868. cmd_ctrl->ctrl, cmd_ctrl->prop_id);
  869. ippdrv = ipp_find_drv_by_handle(cmd_ctrl->prop_id);
  870. if (IS_ERR(ippdrv)) {
  871. DRM_ERROR("failed to get ipp driver.\n");
  872. return PTR_ERR(ippdrv);
  873. }
  874. c_node = ipp_find_obj(&ctx->prop_idr, &ctx->prop_lock,
  875. cmd_ctrl->prop_id);
  876. if (!c_node || c_node->filp != file) {
  877. DRM_ERROR("invalid command node list.\n");
  878. return -ENODEV;
  879. }
  880. if (!exynos_drm_ipp_check_valid(ippdrv->dev, cmd_ctrl->ctrl,
  881. c_node->state)) {
  882. DRM_ERROR("invalid state.\n");
  883. return -EINVAL;
  884. }
  885. switch (cmd_ctrl->ctrl) {
  886. case IPP_CTRL_PLAY:
  887. if (pm_runtime_suspended(ippdrv->dev))
  888. pm_runtime_get_sync(ippdrv->dev);
  889. c_node->state = IPP_STATE_START;
  890. cmd_work = c_node->start_work;
  891. cmd_work->ctrl = cmd_ctrl->ctrl;
  892. ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
  893. break;
  894. case IPP_CTRL_STOP:
  895. cmd_work = c_node->stop_work;
  896. cmd_work->ctrl = cmd_ctrl->ctrl;
  897. ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
  898. if (!wait_for_completion_timeout(&c_node->stop_complete,
  899. msecs_to_jiffies(300))) {
  900. DRM_ERROR("timeout stop:prop_id[%d]\n",
  901. c_node->property.prop_id);
  902. }
  903. c_node->state = IPP_STATE_STOP;
  904. ippdrv->dedicated = false;
  905. mutex_lock(&ippdrv->cmd_lock);
  906. ipp_clean_cmd_node(ctx, c_node);
  907. if (list_empty(&ippdrv->cmd_list))
  908. pm_runtime_put_sync(ippdrv->dev);
  909. mutex_unlock(&ippdrv->cmd_lock);
  910. break;
  911. case IPP_CTRL_PAUSE:
  912. cmd_work = c_node->stop_work;
  913. cmd_work->ctrl = cmd_ctrl->ctrl;
  914. ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
  915. if (!wait_for_completion_timeout(&c_node->stop_complete,
  916. msecs_to_jiffies(200))) {
  917. DRM_ERROR("timeout stop:prop_id[%d]\n",
  918. c_node->property.prop_id);
  919. }
  920. c_node->state = IPP_STATE_STOP;
  921. break;
  922. case IPP_CTRL_RESUME:
  923. c_node->state = IPP_STATE_START;
  924. cmd_work = c_node->start_work;
  925. cmd_work->ctrl = cmd_ctrl->ctrl;
  926. ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
  927. break;
  928. default:
  929. DRM_ERROR("could not support this state currently.\n");
  930. return -EINVAL;
  931. }
  932. DRM_DEBUG_KMS("done ctrl[%d]prop_id[%d]\n",
  933. cmd_ctrl->ctrl, cmd_ctrl->prop_id);
  934. return 0;
  935. }
  936. int exynos_drm_ippnb_register(struct notifier_block *nb)
  937. {
  938. return blocking_notifier_chain_register(
  939. &exynos_drm_ippnb_list, nb);
  940. }
  941. int exynos_drm_ippnb_unregister(struct notifier_block *nb)
  942. {
  943. return blocking_notifier_chain_unregister(
  944. &exynos_drm_ippnb_list, nb);
  945. }
  946. int exynos_drm_ippnb_send_event(unsigned long val, void *v)
  947. {
  948. return blocking_notifier_call_chain(
  949. &exynos_drm_ippnb_list, val, v);
  950. }
  951. static int ipp_set_property(struct exynos_drm_ippdrv *ippdrv,
  952. struct drm_exynos_ipp_property *property)
  953. {
  954. struct exynos_drm_ipp_ops *ops = NULL;
  955. bool swap = false;
  956. int ret, i;
  957. if (!property) {
  958. DRM_ERROR("invalid property parameter.\n");
  959. return -EINVAL;
  960. }
  961. DRM_DEBUG_KMS("prop_id[%d]\n", property->prop_id);
  962. /* reset h/w block */
  963. if (ippdrv->reset &&
  964. ippdrv->reset(ippdrv->dev)) {
  965. return -EINVAL;
  966. }
  967. /* set source,destination operations */
  968. for_each_ipp_ops(i) {
  969. struct drm_exynos_ipp_config *config =
  970. &property->config[i];
  971. ops = ippdrv->ops[i];
  972. if (!ops || !config) {
  973. DRM_ERROR("not support ops and config.\n");
  974. return -EINVAL;
  975. }
  976. /* set format */
  977. if (ops->set_fmt) {
  978. ret = ops->set_fmt(ippdrv->dev, config->fmt);
  979. if (ret)
  980. return ret;
  981. }
  982. /* set transform for rotation, flip */
  983. if (ops->set_transf) {
  984. ret = ops->set_transf(ippdrv->dev, config->degree,
  985. config->flip, &swap);
  986. if (ret)
  987. return ret;
  988. }
  989. /* set size */
  990. if (ops->set_size) {
  991. ret = ops->set_size(ippdrv->dev, swap, &config->pos,
  992. &config->sz);
  993. if (ret)
  994. return ret;
  995. }
  996. }
  997. return 0;
  998. }
  999. static int ipp_start_property(struct exynos_drm_ippdrv *ippdrv,
  1000. struct drm_exynos_ipp_cmd_node *c_node)
  1001. {
  1002. struct drm_exynos_ipp_mem_node *m_node;
  1003. struct drm_exynos_ipp_property *property = &c_node->property;
  1004. struct list_head *head;
  1005. int ret, i;
  1006. DRM_DEBUG_KMS("prop_id[%d]\n", property->prop_id);
  1007. /* store command info in ippdrv */
  1008. ippdrv->c_node = c_node;
  1009. mutex_lock(&c_node->mem_lock);
  1010. if (!ipp_check_mem_list(c_node)) {
  1011. DRM_DEBUG_KMS("empty memory.\n");
  1012. ret = -ENOMEM;
  1013. goto err_unlock;
  1014. }
  1015. /* set current property in ippdrv */
  1016. ret = ipp_set_property(ippdrv, property);
  1017. if (ret) {
  1018. DRM_ERROR("failed to set property.\n");
  1019. ippdrv->c_node = NULL;
  1020. goto err_unlock;
  1021. }
  1022. /* check command */
  1023. switch (property->cmd) {
  1024. case IPP_CMD_M2M:
  1025. for_each_ipp_ops(i) {
  1026. /* source/destination memory list */
  1027. head = &c_node->mem_list[i];
  1028. m_node = list_first_entry(head,
  1029. struct drm_exynos_ipp_mem_node, list);
  1030. DRM_DEBUG_KMS("m_node[0x%x]\n", (int)m_node);
  1031. ret = ipp_set_mem_node(ippdrv, c_node, m_node);
  1032. if (ret) {
  1033. DRM_ERROR("failed to set m node.\n");
  1034. goto err_unlock;
  1035. }
  1036. }
  1037. break;
  1038. case IPP_CMD_WB:
  1039. /* destination memory list */
  1040. head = &c_node->mem_list[EXYNOS_DRM_OPS_DST];
  1041. list_for_each_entry(m_node, head, list) {
  1042. ret = ipp_set_mem_node(ippdrv, c_node, m_node);
  1043. if (ret) {
  1044. DRM_ERROR("failed to set m node.\n");
  1045. goto err_unlock;
  1046. }
  1047. }
  1048. break;
  1049. case IPP_CMD_OUTPUT:
  1050. /* source memory list */
  1051. head = &c_node->mem_list[EXYNOS_DRM_OPS_SRC];
  1052. list_for_each_entry(m_node, head, list) {
  1053. ret = ipp_set_mem_node(ippdrv, c_node, m_node);
  1054. if (ret) {
  1055. DRM_ERROR("failed to set m node.\n");
  1056. goto err_unlock;
  1057. }
  1058. }
  1059. break;
  1060. default:
  1061. DRM_ERROR("invalid operations.\n");
  1062. ret = -EINVAL;
  1063. goto err_unlock;
  1064. }
  1065. mutex_unlock(&c_node->mem_lock);
  1066. DRM_DEBUG_KMS("cmd[%d]\n", property->cmd);
  1067. /* start operations */
  1068. if (ippdrv->start) {
  1069. ret = ippdrv->start(ippdrv->dev, property->cmd);
  1070. if (ret) {
  1071. DRM_ERROR("failed to start ops.\n");
  1072. ippdrv->c_node = NULL;
  1073. return ret;
  1074. }
  1075. }
  1076. return 0;
  1077. err_unlock:
  1078. mutex_unlock(&c_node->mem_lock);
  1079. ippdrv->c_node = NULL;
  1080. return ret;
  1081. }
  1082. static int ipp_stop_property(struct drm_device *drm_dev,
  1083. struct exynos_drm_ippdrv *ippdrv,
  1084. struct drm_exynos_ipp_cmd_node *c_node)
  1085. {
  1086. struct drm_exynos_ipp_property *property = &c_node->property;
  1087. int i;
  1088. DRM_DEBUG_KMS("prop_id[%d]\n", property->prop_id);
  1089. /* stop operations */
  1090. if (ippdrv->stop)
  1091. ippdrv->stop(ippdrv->dev, property->cmd);
  1092. /* check command */
  1093. switch (property->cmd) {
  1094. case IPP_CMD_M2M:
  1095. for_each_ipp_ops(i)
  1096. ipp_clean_mem_nodes(drm_dev, c_node, i);
  1097. break;
  1098. case IPP_CMD_WB:
  1099. ipp_clean_mem_nodes(drm_dev, c_node, EXYNOS_DRM_OPS_DST);
  1100. break;
  1101. case IPP_CMD_OUTPUT:
  1102. ipp_clean_mem_nodes(drm_dev, c_node, EXYNOS_DRM_OPS_SRC);
  1103. break;
  1104. default:
  1105. DRM_ERROR("invalid operations.\n");
  1106. return -EINVAL;
  1107. }
  1108. return 0;
  1109. }
  1110. void ipp_sched_cmd(struct work_struct *work)
  1111. {
  1112. struct drm_exynos_ipp_cmd_work *cmd_work =
  1113. container_of(work, struct drm_exynos_ipp_cmd_work, work);
  1114. struct exynos_drm_ippdrv *ippdrv;
  1115. struct drm_exynos_ipp_cmd_node *c_node;
  1116. struct drm_exynos_ipp_property *property;
  1117. int ret;
  1118. ippdrv = cmd_work->ippdrv;
  1119. if (!ippdrv) {
  1120. DRM_ERROR("invalid ippdrv list.\n");
  1121. return;
  1122. }
  1123. c_node = cmd_work->c_node;
  1124. if (!c_node) {
  1125. DRM_ERROR("invalid command node list.\n");
  1126. return;
  1127. }
  1128. mutex_lock(&c_node->lock);
  1129. property = &c_node->property;
  1130. switch (cmd_work->ctrl) {
  1131. case IPP_CTRL_PLAY:
  1132. case IPP_CTRL_RESUME:
  1133. ret = ipp_start_property(ippdrv, c_node);
  1134. if (ret) {
  1135. DRM_ERROR("failed to start property:prop_id[%d]\n",
  1136. c_node->property.prop_id);
  1137. goto err_unlock;
  1138. }
  1139. /*
  1140. * M2M case supports wait_completion of transfer.
  1141. * because M2M case supports single unit operation
  1142. * with multiple queue.
  1143. * M2M need to wait completion of data transfer.
  1144. */
  1145. if (ipp_is_m2m_cmd(property->cmd)) {
  1146. if (!wait_for_completion_timeout
  1147. (&c_node->start_complete, msecs_to_jiffies(200))) {
  1148. DRM_ERROR("timeout event:prop_id[%d]\n",
  1149. c_node->property.prop_id);
  1150. goto err_unlock;
  1151. }
  1152. }
  1153. break;
  1154. case IPP_CTRL_STOP:
  1155. case IPP_CTRL_PAUSE:
  1156. ret = ipp_stop_property(ippdrv->drm_dev, ippdrv,
  1157. c_node);
  1158. if (ret) {
  1159. DRM_ERROR("failed to stop property.\n");
  1160. goto err_unlock;
  1161. }
  1162. complete(&c_node->stop_complete);
  1163. break;
  1164. default:
  1165. DRM_ERROR("unknown control type\n");
  1166. break;
  1167. }
  1168. DRM_DEBUG_KMS("ctrl[%d] done.\n", cmd_work->ctrl);
  1169. err_unlock:
  1170. mutex_unlock(&c_node->lock);
  1171. }
  1172. static int ipp_send_event(struct exynos_drm_ippdrv *ippdrv,
  1173. struct drm_exynos_ipp_cmd_node *c_node, int *buf_id)
  1174. {
  1175. struct drm_device *drm_dev = ippdrv->drm_dev;
  1176. struct drm_exynos_ipp_property *property = &c_node->property;
  1177. struct drm_exynos_ipp_mem_node *m_node;
  1178. struct drm_exynos_ipp_queue_buf qbuf;
  1179. struct drm_exynos_ipp_send_event *e;
  1180. struct list_head *head;
  1181. struct timeval now;
  1182. unsigned long flags;
  1183. u32 tbuf_id[EXYNOS_DRM_OPS_MAX] = {0, };
  1184. int ret, i;
  1185. for_each_ipp_ops(i)
  1186. DRM_DEBUG_KMS("%s buf_id[%d]\n", i ? "dst" : "src", buf_id[i]);
  1187. if (!drm_dev) {
  1188. DRM_ERROR("failed to get drm_dev.\n");
  1189. return -EINVAL;
  1190. }
  1191. if (!property) {
  1192. DRM_ERROR("failed to get property.\n");
  1193. return -EINVAL;
  1194. }
  1195. mutex_lock(&c_node->event_lock);
  1196. if (list_empty(&c_node->event_list)) {
  1197. DRM_DEBUG_KMS("event list is empty.\n");
  1198. ret = 0;
  1199. goto err_event_unlock;
  1200. }
  1201. mutex_lock(&c_node->mem_lock);
  1202. if (!ipp_check_mem_list(c_node)) {
  1203. DRM_DEBUG_KMS("empty memory.\n");
  1204. ret = 0;
  1205. goto err_mem_unlock;
  1206. }
  1207. /* check command */
  1208. switch (property->cmd) {
  1209. case IPP_CMD_M2M:
  1210. for_each_ipp_ops(i) {
  1211. /* source/destination memory list */
  1212. head = &c_node->mem_list[i];
  1213. m_node = list_first_entry(head,
  1214. struct drm_exynos_ipp_mem_node, list);
  1215. tbuf_id[i] = m_node->buf_id;
  1216. DRM_DEBUG_KMS("%s buf_id[%d]\n",
  1217. i ? "dst" : "src", tbuf_id[i]);
  1218. ret = ipp_put_mem_node(drm_dev, c_node, m_node);
  1219. if (ret)
  1220. DRM_ERROR("failed to put m_node.\n");
  1221. }
  1222. break;
  1223. case IPP_CMD_WB:
  1224. /* clear buf for finding */
  1225. memset(&qbuf, 0x0, sizeof(qbuf));
  1226. qbuf.ops_id = EXYNOS_DRM_OPS_DST;
  1227. qbuf.buf_id = buf_id[EXYNOS_DRM_OPS_DST];
  1228. /* get memory node entry */
  1229. m_node = ipp_find_mem_node(c_node, &qbuf);
  1230. if (!m_node) {
  1231. DRM_ERROR("empty memory node.\n");
  1232. ret = -ENOMEM;
  1233. goto err_mem_unlock;
  1234. }
  1235. tbuf_id[EXYNOS_DRM_OPS_DST] = m_node->buf_id;
  1236. ret = ipp_put_mem_node(drm_dev, c_node, m_node);
  1237. if (ret)
  1238. DRM_ERROR("failed to put m_node.\n");
  1239. break;
  1240. case IPP_CMD_OUTPUT:
  1241. /* source memory list */
  1242. head = &c_node->mem_list[EXYNOS_DRM_OPS_SRC];
  1243. m_node = list_first_entry(head,
  1244. struct drm_exynos_ipp_mem_node, list);
  1245. tbuf_id[EXYNOS_DRM_OPS_SRC] = m_node->buf_id;
  1246. ret = ipp_put_mem_node(drm_dev, c_node, m_node);
  1247. if (ret)
  1248. DRM_ERROR("failed to put m_node.\n");
  1249. break;
  1250. default:
  1251. DRM_ERROR("invalid operations.\n");
  1252. ret = -EINVAL;
  1253. goto err_mem_unlock;
  1254. }
  1255. mutex_unlock(&c_node->mem_lock);
  1256. if (tbuf_id[EXYNOS_DRM_OPS_DST] != buf_id[EXYNOS_DRM_OPS_DST])
  1257. DRM_ERROR("failed to match buf_id[%d %d]prop_id[%d]\n",
  1258. tbuf_id[1], buf_id[1], property->prop_id);
  1259. /*
  1260. * command node have event list of destination buffer
  1261. * If destination buffer enqueue to mem list,
  1262. * then we make event and link to event list tail.
  1263. * so, we get first event for first enqueued buffer.
  1264. */
  1265. e = list_first_entry(&c_node->event_list,
  1266. struct drm_exynos_ipp_send_event, base.link);
  1267. do_gettimeofday(&now);
  1268. DRM_DEBUG_KMS("tv_sec[%ld]tv_usec[%ld]\n", now.tv_sec, now.tv_usec);
  1269. e->event.tv_sec = now.tv_sec;
  1270. e->event.tv_usec = now.tv_usec;
  1271. e->event.prop_id = property->prop_id;
  1272. /* set buffer id about source destination */
  1273. for_each_ipp_ops(i)
  1274. e->event.buf_id[i] = tbuf_id[i];
  1275. spin_lock_irqsave(&drm_dev->event_lock, flags);
  1276. list_move_tail(&e->base.link, &e->base.file_priv->event_list);
  1277. wake_up_interruptible(&e->base.file_priv->event_wait);
  1278. spin_unlock_irqrestore(&drm_dev->event_lock, flags);
  1279. mutex_unlock(&c_node->event_lock);
  1280. DRM_DEBUG_KMS("done cmd[%d]prop_id[%d]buf_id[%d]\n",
  1281. property->cmd, property->prop_id, tbuf_id[EXYNOS_DRM_OPS_DST]);
  1282. return 0;
  1283. err_mem_unlock:
  1284. mutex_unlock(&c_node->mem_lock);
  1285. err_event_unlock:
  1286. mutex_unlock(&c_node->event_lock);
  1287. return ret;
  1288. }
  1289. void ipp_sched_event(struct work_struct *work)
  1290. {
  1291. struct drm_exynos_ipp_event_work *event_work =
  1292. container_of(work, struct drm_exynos_ipp_event_work, work);
  1293. struct exynos_drm_ippdrv *ippdrv;
  1294. struct drm_exynos_ipp_cmd_node *c_node;
  1295. int ret;
  1296. if (!event_work) {
  1297. DRM_ERROR("failed to get event_work.\n");
  1298. return;
  1299. }
  1300. DRM_DEBUG_KMS("buf_id[%d]\n", event_work->buf_id[EXYNOS_DRM_OPS_DST]);
  1301. ippdrv = event_work->ippdrv;
  1302. if (!ippdrv) {
  1303. DRM_ERROR("failed to get ipp driver.\n");
  1304. return;
  1305. }
  1306. c_node = ippdrv->c_node;
  1307. if (!c_node) {
  1308. DRM_ERROR("failed to get command node.\n");
  1309. return;
  1310. }
  1311. /*
  1312. * IPP supports command thread, event thread synchronization.
  1313. * If IPP close immediately from user land, then IPP make
  1314. * synchronization with command thread, so make complete event.
  1315. * or going out operations.
  1316. */
  1317. if (c_node->state != IPP_STATE_START) {
  1318. DRM_DEBUG_KMS("bypass state[%d]prop_id[%d]\n",
  1319. c_node->state, c_node->property.prop_id);
  1320. goto err_completion;
  1321. }
  1322. ret = ipp_send_event(ippdrv, c_node, event_work->buf_id);
  1323. if (ret) {
  1324. DRM_ERROR("failed to send event.\n");
  1325. goto err_completion;
  1326. }
  1327. err_completion:
  1328. if (ipp_is_m2m_cmd(c_node->property.cmd))
  1329. complete(&c_node->start_complete);
  1330. }
  1331. static int ipp_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
  1332. {
  1333. struct ipp_context *ctx = get_ipp_context(dev);
  1334. struct exynos_drm_ippdrv *ippdrv;
  1335. int ret, count = 0;
  1336. /* get ipp driver entry */
  1337. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list) {
  1338. ippdrv->drm_dev = drm_dev;
  1339. ret = ipp_create_id(&ctx->ipp_idr, &ctx->ipp_lock, ippdrv);
  1340. if (ret < 0) {
  1341. DRM_ERROR("failed to create id.\n");
  1342. goto err;
  1343. }
  1344. ippdrv->prop_list.ipp_id = ret;
  1345. DRM_DEBUG_KMS("count[%d]ippdrv[0x%x]ipp_id[%d]\n",
  1346. count++, (int)ippdrv, ret);
  1347. /* store parent device for node */
  1348. ippdrv->parent_dev = dev;
  1349. /* store event work queue and handler */
  1350. ippdrv->event_workq = ctx->event_workq;
  1351. ippdrv->sched_event = ipp_sched_event;
  1352. INIT_LIST_HEAD(&ippdrv->cmd_list);
  1353. mutex_init(&ippdrv->cmd_lock);
  1354. if (is_drm_iommu_supported(drm_dev)) {
  1355. ret = drm_iommu_attach_device(drm_dev, ippdrv->dev);
  1356. if (ret) {
  1357. DRM_ERROR("failed to activate iommu\n");
  1358. goto err;
  1359. }
  1360. }
  1361. }
  1362. return 0;
  1363. err:
  1364. /* get ipp driver entry */
  1365. list_for_each_entry_continue_reverse(ippdrv, &exynos_drm_ippdrv_list,
  1366. drv_list) {
  1367. if (is_drm_iommu_supported(drm_dev))
  1368. drm_iommu_detach_device(drm_dev, ippdrv->dev);
  1369. ipp_remove_id(&ctx->ipp_idr, &ctx->ipp_lock,
  1370. ippdrv->prop_list.ipp_id);
  1371. }
  1372. return ret;
  1373. }
  1374. static void ipp_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
  1375. {
  1376. struct exynos_drm_ippdrv *ippdrv, *t;
  1377. struct ipp_context *ctx = get_ipp_context(dev);
  1378. /* get ipp driver entry */
  1379. list_for_each_entry_safe(ippdrv, t, &exynos_drm_ippdrv_list, drv_list) {
  1380. if (is_drm_iommu_supported(drm_dev))
  1381. drm_iommu_detach_device(drm_dev, ippdrv->dev);
  1382. ipp_remove_id(&ctx->ipp_idr, &ctx->ipp_lock,
  1383. ippdrv->prop_list.ipp_id);
  1384. ippdrv->drm_dev = NULL;
  1385. exynos_drm_ippdrv_unregister(ippdrv);
  1386. }
  1387. }
  1388. static int ipp_subdrv_open(struct drm_device *drm_dev, struct device *dev,
  1389. struct drm_file *file)
  1390. {
  1391. struct drm_exynos_file_private *file_priv = file->driver_priv;
  1392. file_priv->ipp_dev = dev;
  1393. DRM_DEBUG_KMS("done priv[0x%x]\n", (int)dev);
  1394. return 0;
  1395. }
  1396. static void ipp_subdrv_close(struct drm_device *drm_dev, struct device *dev,
  1397. struct drm_file *file)
  1398. {
  1399. struct exynos_drm_ippdrv *ippdrv = NULL;
  1400. struct ipp_context *ctx = get_ipp_context(dev);
  1401. struct drm_exynos_ipp_cmd_node *c_node, *tc_node;
  1402. int count = 0;
  1403. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list) {
  1404. mutex_lock(&ippdrv->cmd_lock);
  1405. list_for_each_entry_safe(c_node, tc_node,
  1406. &ippdrv->cmd_list, list) {
  1407. DRM_DEBUG_KMS("count[%d]ippdrv[0x%x]\n",
  1408. count++, (int)ippdrv);
  1409. if (c_node->filp == file) {
  1410. /*
  1411. * userland goto unnormal state. process killed.
  1412. * and close the file.
  1413. * so, IPP didn't called stop cmd ctrl.
  1414. * so, we are make stop operation in this state.
  1415. */
  1416. if (c_node->state == IPP_STATE_START) {
  1417. ipp_stop_property(drm_dev, ippdrv,
  1418. c_node);
  1419. c_node->state = IPP_STATE_STOP;
  1420. }
  1421. ippdrv->dedicated = false;
  1422. ipp_clean_cmd_node(ctx, c_node);
  1423. if (list_empty(&ippdrv->cmd_list))
  1424. pm_runtime_put_sync(ippdrv->dev);
  1425. }
  1426. }
  1427. mutex_unlock(&ippdrv->cmd_lock);
  1428. }
  1429. return;
  1430. }
  1431. static int ipp_probe(struct platform_device *pdev)
  1432. {
  1433. struct device *dev = &pdev->dev;
  1434. struct ipp_context *ctx;
  1435. struct exynos_drm_subdrv *subdrv;
  1436. int ret;
  1437. ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
  1438. if (!ctx)
  1439. return -ENOMEM;
  1440. mutex_init(&ctx->ipp_lock);
  1441. mutex_init(&ctx->prop_lock);
  1442. idr_init(&ctx->ipp_idr);
  1443. idr_init(&ctx->prop_idr);
  1444. /*
  1445. * create single thread for ipp event
  1446. * IPP supports event thread for IPP drivers.
  1447. * IPP driver send event_work to this thread.
  1448. * and IPP event thread send event to user process.
  1449. */
  1450. ctx->event_workq = create_singlethread_workqueue("ipp_event");
  1451. if (!ctx->event_workq) {
  1452. dev_err(dev, "failed to create event workqueue\n");
  1453. return -EINVAL;
  1454. }
  1455. /*
  1456. * create single thread for ipp command
  1457. * IPP supports command thread for user process.
  1458. * user process make command node using set property ioctl.
  1459. * and make start_work and send this work to command thread.
  1460. * and then this command thread start property.
  1461. */
  1462. ctx->cmd_workq = create_singlethread_workqueue("ipp_cmd");
  1463. if (!ctx->cmd_workq) {
  1464. dev_err(dev, "failed to create cmd workqueue\n");
  1465. ret = -EINVAL;
  1466. goto err_event_workq;
  1467. }
  1468. /* set sub driver informations */
  1469. subdrv = &ctx->subdrv;
  1470. subdrv->dev = dev;
  1471. subdrv->probe = ipp_subdrv_probe;
  1472. subdrv->remove = ipp_subdrv_remove;
  1473. subdrv->open = ipp_subdrv_open;
  1474. subdrv->close = ipp_subdrv_close;
  1475. platform_set_drvdata(pdev, ctx);
  1476. ret = exynos_drm_subdrv_register(subdrv);
  1477. if (ret < 0) {
  1478. DRM_ERROR("failed to register drm ipp device.\n");
  1479. goto err_cmd_workq;
  1480. }
  1481. dev_info(dev, "drm ipp registered successfully.\n");
  1482. return 0;
  1483. err_cmd_workq:
  1484. destroy_workqueue(ctx->cmd_workq);
  1485. err_event_workq:
  1486. destroy_workqueue(ctx->event_workq);
  1487. return ret;
  1488. }
  1489. static int ipp_remove(struct platform_device *pdev)
  1490. {
  1491. struct ipp_context *ctx = platform_get_drvdata(pdev);
  1492. /* unregister sub driver */
  1493. exynos_drm_subdrv_unregister(&ctx->subdrv);
  1494. /* remove,destroy ipp idr */
  1495. idr_destroy(&ctx->ipp_idr);
  1496. idr_destroy(&ctx->prop_idr);
  1497. mutex_destroy(&ctx->ipp_lock);
  1498. mutex_destroy(&ctx->prop_lock);
  1499. /* destroy command, event work queue */
  1500. destroy_workqueue(ctx->cmd_workq);
  1501. destroy_workqueue(ctx->event_workq);
  1502. return 0;
  1503. }
  1504. struct platform_driver ipp_driver = {
  1505. .probe = ipp_probe,
  1506. .remove = ipp_remove,
  1507. .driver = {
  1508. .name = "exynos-drm-ipp",
  1509. .owner = THIS_MODULE,
  1510. },
  1511. };