drm_dp_mst_topology.c 77 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860
  1. /*
  2. * Copyright © 2014 Red Hat
  3. *
  4. * Permission to use, copy, modify, distribute, and sell this software and its
  5. * documentation for any purpose is hereby granted without fee, provided that
  6. * the above copyright notice appear in all copies and that both that copyright
  7. * notice and this permission notice appear in supporting documentation, and
  8. * that the name of the copyright holders not be used in advertising or
  9. * publicity pertaining to distribution of the software without specific,
  10. * written prior permission. The copyright holders make no representations
  11. * about the suitability of this software for any purpose. It is provided "as
  12. * is" without express or implied warranty.
  13. *
  14. * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  15. * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  16. * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  17. * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  18. * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  19. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
  20. * OF THIS SOFTWARE.
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/delay.h>
  24. #include <linux/init.h>
  25. #include <linux/errno.h>
  26. #include <linux/sched.h>
  27. #include <linux/seq_file.h>
  28. #include <linux/i2c.h>
  29. #include <drm/drm_dp_mst_helper.h>
  30. #include <drm/drmP.h>
  31. #include <drm/drm_fixed.h>
  32. /**
  33. * DOC: dp mst helper
  34. *
  35. * These functions contain parts of the DisplayPort 1.2a MultiStream Transport
  36. * protocol. The helpers contain a topology manager and bandwidth manager.
  37. * The helpers encapsulate the sending and received of sideband msgs.
  38. */
  39. static bool dump_dp_payload_table(struct drm_dp_mst_topology_mgr *mgr,
  40. char *buf);
  41. static int test_calc_pbn_mode(void);
  42. static void drm_dp_put_port(struct drm_dp_mst_port *port);
  43. static int drm_dp_dpcd_write_payload(struct drm_dp_mst_topology_mgr *mgr,
  44. int id,
  45. struct drm_dp_payload *payload);
  46. static int drm_dp_send_dpcd_write(struct drm_dp_mst_topology_mgr *mgr,
  47. struct drm_dp_mst_port *port,
  48. int offset, int size, u8 *bytes);
  49. static int drm_dp_send_link_address(struct drm_dp_mst_topology_mgr *mgr,
  50. struct drm_dp_mst_branch *mstb);
  51. static int drm_dp_send_enum_path_resources(struct drm_dp_mst_topology_mgr *mgr,
  52. struct drm_dp_mst_branch *mstb,
  53. struct drm_dp_mst_port *port);
  54. static bool drm_dp_validate_guid(struct drm_dp_mst_topology_mgr *mgr,
  55. u8 *guid);
  56. static int drm_dp_mst_register_i2c_bus(struct drm_dp_aux *aux);
  57. static void drm_dp_mst_unregister_i2c_bus(struct drm_dp_aux *aux);
  58. static void drm_dp_mst_kick_tx(struct drm_dp_mst_topology_mgr *mgr);
  59. /* sideband msg handling */
  60. static u8 drm_dp_msg_header_crc4(const uint8_t *data, size_t num_nibbles)
  61. {
  62. u8 bitmask = 0x80;
  63. u8 bitshift = 7;
  64. u8 array_index = 0;
  65. int number_of_bits = num_nibbles * 4;
  66. u8 remainder = 0;
  67. while (number_of_bits != 0) {
  68. number_of_bits--;
  69. remainder <<= 1;
  70. remainder |= (data[array_index] & bitmask) >> bitshift;
  71. bitmask >>= 1;
  72. bitshift--;
  73. if (bitmask == 0) {
  74. bitmask = 0x80;
  75. bitshift = 7;
  76. array_index++;
  77. }
  78. if ((remainder & 0x10) == 0x10)
  79. remainder ^= 0x13;
  80. }
  81. number_of_bits = 4;
  82. while (number_of_bits != 0) {
  83. number_of_bits--;
  84. remainder <<= 1;
  85. if ((remainder & 0x10) != 0)
  86. remainder ^= 0x13;
  87. }
  88. return remainder;
  89. }
  90. static u8 drm_dp_msg_data_crc4(const uint8_t *data, u8 number_of_bytes)
  91. {
  92. u8 bitmask = 0x80;
  93. u8 bitshift = 7;
  94. u8 array_index = 0;
  95. int number_of_bits = number_of_bytes * 8;
  96. u16 remainder = 0;
  97. while (number_of_bits != 0) {
  98. number_of_bits--;
  99. remainder <<= 1;
  100. remainder |= (data[array_index] & bitmask) >> bitshift;
  101. bitmask >>= 1;
  102. bitshift--;
  103. if (bitmask == 0) {
  104. bitmask = 0x80;
  105. bitshift = 7;
  106. array_index++;
  107. }
  108. if ((remainder & 0x100) == 0x100)
  109. remainder ^= 0xd5;
  110. }
  111. number_of_bits = 8;
  112. while (number_of_bits != 0) {
  113. number_of_bits--;
  114. remainder <<= 1;
  115. if ((remainder & 0x100) != 0)
  116. remainder ^= 0xd5;
  117. }
  118. return remainder & 0xff;
  119. }
  120. static inline u8 drm_dp_calc_sb_hdr_size(struct drm_dp_sideband_msg_hdr *hdr)
  121. {
  122. u8 size = 3;
  123. size += (hdr->lct / 2);
  124. return size;
  125. }
  126. static void drm_dp_encode_sideband_msg_hdr(struct drm_dp_sideband_msg_hdr *hdr,
  127. u8 *buf, int *len)
  128. {
  129. int idx = 0;
  130. int i;
  131. u8 crc4;
  132. buf[idx++] = ((hdr->lct & 0xf) << 4) | (hdr->lcr & 0xf);
  133. for (i = 0; i < (hdr->lct / 2); i++)
  134. buf[idx++] = hdr->rad[i];
  135. buf[idx++] = (hdr->broadcast << 7) | (hdr->path_msg << 6) |
  136. (hdr->msg_len & 0x3f);
  137. buf[idx++] = (hdr->somt << 7) | (hdr->eomt << 6) | (hdr->seqno << 4);
  138. crc4 = drm_dp_msg_header_crc4(buf, (idx * 2) - 1);
  139. buf[idx - 1] |= (crc4 & 0xf);
  140. *len = idx;
  141. }
  142. static bool drm_dp_decode_sideband_msg_hdr(struct drm_dp_sideband_msg_hdr *hdr,
  143. u8 *buf, int buflen, u8 *hdrlen)
  144. {
  145. u8 crc4;
  146. u8 len;
  147. int i;
  148. u8 idx;
  149. if (buf[0] == 0)
  150. return false;
  151. len = 3;
  152. len += ((buf[0] & 0xf0) >> 4) / 2;
  153. if (len > buflen)
  154. return false;
  155. crc4 = drm_dp_msg_header_crc4(buf, (len * 2) - 1);
  156. if ((crc4 & 0xf) != (buf[len - 1] & 0xf)) {
  157. DRM_DEBUG_KMS("crc4 mismatch 0x%x 0x%x\n", crc4, buf[len - 1]);
  158. return false;
  159. }
  160. hdr->lct = (buf[0] & 0xf0) >> 4;
  161. hdr->lcr = (buf[0] & 0xf);
  162. idx = 1;
  163. for (i = 0; i < (hdr->lct / 2); i++)
  164. hdr->rad[i] = buf[idx++];
  165. hdr->broadcast = (buf[idx] >> 7) & 0x1;
  166. hdr->path_msg = (buf[idx] >> 6) & 0x1;
  167. hdr->msg_len = buf[idx] & 0x3f;
  168. idx++;
  169. hdr->somt = (buf[idx] >> 7) & 0x1;
  170. hdr->eomt = (buf[idx] >> 6) & 0x1;
  171. hdr->seqno = (buf[idx] >> 4) & 0x1;
  172. idx++;
  173. *hdrlen = idx;
  174. return true;
  175. }
  176. static void drm_dp_encode_sideband_req(struct drm_dp_sideband_msg_req_body *req,
  177. struct drm_dp_sideband_msg_tx *raw)
  178. {
  179. int idx = 0;
  180. int i;
  181. u8 *buf = raw->msg;
  182. buf[idx++] = req->req_type & 0x7f;
  183. switch (req->req_type) {
  184. case DP_ENUM_PATH_RESOURCES:
  185. buf[idx] = (req->u.port_num.port_number & 0xf) << 4;
  186. idx++;
  187. break;
  188. case DP_ALLOCATE_PAYLOAD:
  189. buf[idx] = (req->u.allocate_payload.port_number & 0xf) << 4 |
  190. (req->u.allocate_payload.number_sdp_streams & 0xf);
  191. idx++;
  192. buf[idx] = (req->u.allocate_payload.vcpi & 0x7f);
  193. idx++;
  194. buf[idx] = (req->u.allocate_payload.pbn >> 8);
  195. idx++;
  196. buf[idx] = (req->u.allocate_payload.pbn & 0xff);
  197. idx++;
  198. for (i = 0; i < req->u.allocate_payload.number_sdp_streams / 2; i++) {
  199. buf[idx] = ((req->u.allocate_payload.sdp_stream_sink[i * 2] & 0xf) << 4) |
  200. (req->u.allocate_payload.sdp_stream_sink[i * 2 + 1] & 0xf);
  201. idx++;
  202. }
  203. if (req->u.allocate_payload.number_sdp_streams & 1) {
  204. i = req->u.allocate_payload.number_sdp_streams - 1;
  205. buf[idx] = (req->u.allocate_payload.sdp_stream_sink[i] & 0xf) << 4;
  206. idx++;
  207. }
  208. break;
  209. case DP_QUERY_PAYLOAD:
  210. buf[idx] = (req->u.query_payload.port_number & 0xf) << 4;
  211. idx++;
  212. buf[idx] = (req->u.query_payload.vcpi & 0x7f);
  213. idx++;
  214. break;
  215. case DP_REMOTE_DPCD_READ:
  216. buf[idx] = (req->u.dpcd_read.port_number & 0xf) << 4;
  217. buf[idx] |= ((req->u.dpcd_read.dpcd_address & 0xf0000) >> 16) & 0xf;
  218. idx++;
  219. buf[idx] = (req->u.dpcd_read.dpcd_address & 0xff00) >> 8;
  220. idx++;
  221. buf[idx] = (req->u.dpcd_read.dpcd_address & 0xff);
  222. idx++;
  223. buf[idx] = (req->u.dpcd_read.num_bytes);
  224. idx++;
  225. break;
  226. case DP_REMOTE_DPCD_WRITE:
  227. buf[idx] = (req->u.dpcd_write.port_number & 0xf) << 4;
  228. buf[idx] |= ((req->u.dpcd_write.dpcd_address & 0xf0000) >> 16) & 0xf;
  229. idx++;
  230. buf[idx] = (req->u.dpcd_write.dpcd_address & 0xff00) >> 8;
  231. idx++;
  232. buf[idx] = (req->u.dpcd_write.dpcd_address & 0xff);
  233. idx++;
  234. buf[idx] = (req->u.dpcd_write.num_bytes);
  235. idx++;
  236. memcpy(&buf[idx], req->u.dpcd_write.bytes, req->u.dpcd_write.num_bytes);
  237. idx += req->u.dpcd_write.num_bytes;
  238. break;
  239. case DP_REMOTE_I2C_READ:
  240. buf[idx] = (req->u.i2c_read.port_number & 0xf) << 4;
  241. buf[idx] |= (req->u.i2c_read.num_transactions & 0x3);
  242. idx++;
  243. for (i = 0; i < (req->u.i2c_read.num_transactions & 0x3); i++) {
  244. buf[idx] = req->u.i2c_read.transactions[i].i2c_dev_id & 0x7f;
  245. idx++;
  246. buf[idx] = req->u.i2c_read.transactions[i].num_bytes;
  247. idx++;
  248. memcpy(&buf[idx], req->u.i2c_read.transactions[i].bytes, req->u.i2c_read.transactions[i].num_bytes);
  249. idx += req->u.i2c_read.transactions[i].num_bytes;
  250. buf[idx] = (req->u.i2c_read.transactions[i].no_stop_bit & 0x1) << 5;
  251. buf[idx] |= (req->u.i2c_read.transactions[i].i2c_transaction_delay & 0xf);
  252. idx++;
  253. }
  254. buf[idx] = (req->u.i2c_read.read_i2c_device_id) & 0x7f;
  255. idx++;
  256. buf[idx] = (req->u.i2c_read.num_bytes_read);
  257. idx++;
  258. break;
  259. case DP_REMOTE_I2C_WRITE:
  260. buf[idx] = (req->u.i2c_write.port_number & 0xf) << 4;
  261. idx++;
  262. buf[idx] = (req->u.i2c_write.write_i2c_device_id) & 0x7f;
  263. idx++;
  264. buf[idx] = (req->u.i2c_write.num_bytes);
  265. idx++;
  266. memcpy(&buf[idx], req->u.i2c_write.bytes, req->u.i2c_write.num_bytes);
  267. idx += req->u.i2c_write.num_bytes;
  268. break;
  269. }
  270. raw->cur_len = idx;
  271. }
  272. static void drm_dp_crc_sideband_chunk_req(u8 *msg, u8 len)
  273. {
  274. u8 crc4;
  275. crc4 = drm_dp_msg_data_crc4(msg, len);
  276. msg[len] = crc4;
  277. }
  278. static void drm_dp_encode_sideband_reply(struct drm_dp_sideband_msg_reply_body *rep,
  279. struct drm_dp_sideband_msg_tx *raw)
  280. {
  281. int idx = 0;
  282. u8 *buf = raw->msg;
  283. buf[idx++] = (rep->reply_type & 0x1) << 7 | (rep->req_type & 0x7f);
  284. raw->cur_len = idx;
  285. }
  286. /* this adds a chunk of msg to the builder to get the final msg */
  287. static bool drm_dp_sideband_msg_build(struct drm_dp_sideband_msg_rx *msg,
  288. u8 *replybuf, u8 replybuflen, bool hdr)
  289. {
  290. int ret;
  291. u8 crc4;
  292. if (hdr) {
  293. u8 hdrlen;
  294. struct drm_dp_sideband_msg_hdr recv_hdr;
  295. ret = drm_dp_decode_sideband_msg_hdr(&recv_hdr, replybuf, replybuflen, &hdrlen);
  296. if (ret == false) {
  297. print_hex_dump(KERN_DEBUG, "failed hdr", DUMP_PREFIX_NONE, 16, 1, replybuf, replybuflen, false);
  298. return false;
  299. }
  300. /* get length contained in this portion */
  301. msg->curchunk_len = recv_hdr.msg_len;
  302. msg->curchunk_hdrlen = hdrlen;
  303. /* we have already gotten an somt - don't bother parsing */
  304. if (recv_hdr.somt && msg->have_somt)
  305. return false;
  306. if (recv_hdr.somt) {
  307. memcpy(&msg->initial_hdr, &recv_hdr, sizeof(struct drm_dp_sideband_msg_hdr));
  308. msg->have_somt = true;
  309. }
  310. if (recv_hdr.eomt)
  311. msg->have_eomt = true;
  312. /* copy the bytes for the remainder of this header chunk */
  313. msg->curchunk_idx = min(msg->curchunk_len, (u8)(replybuflen - hdrlen));
  314. memcpy(&msg->chunk[0], replybuf + hdrlen, msg->curchunk_idx);
  315. } else {
  316. memcpy(&msg->chunk[msg->curchunk_idx], replybuf, replybuflen);
  317. msg->curchunk_idx += replybuflen;
  318. }
  319. if (msg->curchunk_idx >= msg->curchunk_len) {
  320. /* do CRC */
  321. crc4 = drm_dp_msg_data_crc4(msg->chunk, msg->curchunk_len - 1);
  322. /* copy chunk into bigger msg */
  323. memcpy(&msg->msg[msg->curlen], msg->chunk, msg->curchunk_len - 1);
  324. msg->curlen += msg->curchunk_len - 1;
  325. }
  326. return true;
  327. }
  328. static bool drm_dp_sideband_parse_link_address(struct drm_dp_sideband_msg_rx *raw,
  329. struct drm_dp_sideband_msg_reply_body *repmsg)
  330. {
  331. int idx = 1;
  332. int i;
  333. memcpy(repmsg->u.link_addr.guid, &raw->msg[idx], 16);
  334. idx += 16;
  335. repmsg->u.link_addr.nports = raw->msg[idx] & 0xf;
  336. idx++;
  337. if (idx > raw->curlen)
  338. goto fail_len;
  339. for (i = 0; i < repmsg->u.link_addr.nports; i++) {
  340. if (raw->msg[idx] & 0x80)
  341. repmsg->u.link_addr.ports[i].input_port = 1;
  342. repmsg->u.link_addr.ports[i].peer_device_type = (raw->msg[idx] >> 4) & 0x7;
  343. repmsg->u.link_addr.ports[i].port_number = (raw->msg[idx] & 0xf);
  344. idx++;
  345. if (idx > raw->curlen)
  346. goto fail_len;
  347. repmsg->u.link_addr.ports[i].mcs = (raw->msg[idx] >> 7) & 0x1;
  348. repmsg->u.link_addr.ports[i].ddps = (raw->msg[idx] >> 6) & 0x1;
  349. if (repmsg->u.link_addr.ports[i].input_port == 0)
  350. repmsg->u.link_addr.ports[i].legacy_device_plug_status = (raw->msg[idx] >> 5) & 0x1;
  351. idx++;
  352. if (idx > raw->curlen)
  353. goto fail_len;
  354. if (repmsg->u.link_addr.ports[i].input_port == 0) {
  355. repmsg->u.link_addr.ports[i].dpcd_revision = (raw->msg[idx]);
  356. idx++;
  357. if (idx > raw->curlen)
  358. goto fail_len;
  359. memcpy(repmsg->u.link_addr.ports[i].peer_guid, &raw->msg[idx], 16);
  360. idx += 16;
  361. if (idx > raw->curlen)
  362. goto fail_len;
  363. repmsg->u.link_addr.ports[i].num_sdp_streams = (raw->msg[idx] >> 4) & 0xf;
  364. repmsg->u.link_addr.ports[i].num_sdp_stream_sinks = (raw->msg[idx] & 0xf);
  365. idx++;
  366. }
  367. if (idx > raw->curlen)
  368. goto fail_len;
  369. }
  370. return true;
  371. fail_len:
  372. DRM_DEBUG_KMS("link address reply parse length fail %d %d\n", idx, raw->curlen);
  373. return false;
  374. }
  375. static bool drm_dp_sideband_parse_remote_dpcd_read(struct drm_dp_sideband_msg_rx *raw,
  376. struct drm_dp_sideband_msg_reply_body *repmsg)
  377. {
  378. int idx = 1;
  379. repmsg->u.remote_dpcd_read_ack.port_number = raw->msg[idx] & 0xf;
  380. idx++;
  381. if (idx > raw->curlen)
  382. goto fail_len;
  383. repmsg->u.remote_dpcd_read_ack.num_bytes = raw->msg[idx];
  384. if (idx > raw->curlen)
  385. goto fail_len;
  386. memcpy(repmsg->u.remote_dpcd_read_ack.bytes, &raw->msg[idx], repmsg->u.remote_dpcd_read_ack.num_bytes);
  387. return true;
  388. fail_len:
  389. DRM_DEBUG_KMS("link address reply parse length fail %d %d\n", idx, raw->curlen);
  390. return false;
  391. }
  392. static bool drm_dp_sideband_parse_remote_dpcd_write(struct drm_dp_sideband_msg_rx *raw,
  393. struct drm_dp_sideband_msg_reply_body *repmsg)
  394. {
  395. int idx = 1;
  396. repmsg->u.remote_dpcd_write_ack.port_number = raw->msg[idx] & 0xf;
  397. idx++;
  398. if (idx > raw->curlen)
  399. goto fail_len;
  400. return true;
  401. fail_len:
  402. DRM_DEBUG_KMS("parse length fail %d %d\n", idx, raw->curlen);
  403. return false;
  404. }
  405. static bool drm_dp_sideband_parse_remote_i2c_read_ack(struct drm_dp_sideband_msg_rx *raw,
  406. struct drm_dp_sideband_msg_reply_body *repmsg)
  407. {
  408. int idx = 1;
  409. repmsg->u.remote_i2c_read_ack.port_number = (raw->msg[idx] & 0xf);
  410. idx++;
  411. if (idx > raw->curlen)
  412. goto fail_len;
  413. repmsg->u.remote_i2c_read_ack.num_bytes = raw->msg[idx];
  414. idx++;
  415. /* TODO check */
  416. memcpy(repmsg->u.remote_i2c_read_ack.bytes, &raw->msg[idx], repmsg->u.remote_i2c_read_ack.num_bytes);
  417. return true;
  418. fail_len:
  419. DRM_DEBUG_KMS("remote i2c reply parse length fail %d %d\n", idx, raw->curlen);
  420. return false;
  421. }
  422. static bool drm_dp_sideband_parse_enum_path_resources_ack(struct drm_dp_sideband_msg_rx *raw,
  423. struct drm_dp_sideband_msg_reply_body *repmsg)
  424. {
  425. int idx = 1;
  426. repmsg->u.path_resources.port_number = (raw->msg[idx] >> 4) & 0xf;
  427. idx++;
  428. if (idx > raw->curlen)
  429. goto fail_len;
  430. repmsg->u.path_resources.full_payload_bw_number = (raw->msg[idx] << 8) | (raw->msg[idx+1]);
  431. idx += 2;
  432. if (idx > raw->curlen)
  433. goto fail_len;
  434. repmsg->u.path_resources.avail_payload_bw_number = (raw->msg[idx] << 8) | (raw->msg[idx+1]);
  435. idx += 2;
  436. if (idx > raw->curlen)
  437. goto fail_len;
  438. return true;
  439. fail_len:
  440. DRM_DEBUG_KMS("enum resource parse length fail %d %d\n", idx, raw->curlen);
  441. return false;
  442. }
  443. static bool drm_dp_sideband_parse_allocate_payload_ack(struct drm_dp_sideband_msg_rx *raw,
  444. struct drm_dp_sideband_msg_reply_body *repmsg)
  445. {
  446. int idx = 1;
  447. repmsg->u.allocate_payload.port_number = (raw->msg[idx] >> 4) & 0xf;
  448. idx++;
  449. if (idx > raw->curlen)
  450. goto fail_len;
  451. repmsg->u.allocate_payload.vcpi = raw->msg[idx];
  452. idx++;
  453. if (idx > raw->curlen)
  454. goto fail_len;
  455. repmsg->u.allocate_payload.allocated_pbn = (raw->msg[idx] << 8) | (raw->msg[idx+1]);
  456. idx += 2;
  457. if (idx > raw->curlen)
  458. goto fail_len;
  459. return true;
  460. fail_len:
  461. DRM_DEBUG_KMS("allocate payload parse length fail %d %d\n", idx, raw->curlen);
  462. return false;
  463. }
  464. static bool drm_dp_sideband_parse_query_payload_ack(struct drm_dp_sideband_msg_rx *raw,
  465. struct drm_dp_sideband_msg_reply_body *repmsg)
  466. {
  467. int idx = 1;
  468. repmsg->u.query_payload.port_number = (raw->msg[idx] >> 4) & 0xf;
  469. idx++;
  470. if (idx > raw->curlen)
  471. goto fail_len;
  472. repmsg->u.query_payload.allocated_pbn = (raw->msg[idx] << 8) | (raw->msg[idx + 1]);
  473. idx += 2;
  474. if (idx > raw->curlen)
  475. goto fail_len;
  476. return true;
  477. fail_len:
  478. DRM_DEBUG_KMS("query payload parse length fail %d %d\n", idx, raw->curlen);
  479. return false;
  480. }
  481. static bool drm_dp_sideband_parse_reply(struct drm_dp_sideband_msg_rx *raw,
  482. struct drm_dp_sideband_msg_reply_body *msg)
  483. {
  484. memset(msg, 0, sizeof(*msg));
  485. msg->reply_type = (raw->msg[0] & 0x80) >> 7;
  486. msg->req_type = (raw->msg[0] & 0x7f);
  487. if (msg->reply_type) {
  488. memcpy(msg->u.nak.guid, &raw->msg[1], 16);
  489. msg->u.nak.reason = raw->msg[17];
  490. msg->u.nak.nak_data = raw->msg[18];
  491. return false;
  492. }
  493. switch (msg->req_type) {
  494. case DP_LINK_ADDRESS:
  495. return drm_dp_sideband_parse_link_address(raw, msg);
  496. case DP_QUERY_PAYLOAD:
  497. return drm_dp_sideband_parse_query_payload_ack(raw, msg);
  498. case DP_REMOTE_DPCD_READ:
  499. return drm_dp_sideband_parse_remote_dpcd_read(raw, msg);
  500. case DP_REMOTE_DPCD_WRITE:
  501. return drm_dp_sideband_parse_remote_dpcd_write(raw, msg);
  502. case DP_REMOTE_I2C_READ:
  503. return drm_dp_sideband_parse_remote_i2c_read_ack(raw, msg);
  504. case DP_ENUM_PATH_RESOURCES:
  505. return drm_dp_sideband_parse_enum_path_resources_ack(raw, msg);
  506. case DP_ALLOCATE_PAYLOAD:
  507. return drm_dp_sideband_parse_allocate_payload_ack(raw, msg);
  508. default:
  509. DRM_ERROR("Got unknown reply 0x%02x\n", msg->req_type);
  510. return false;
  511. }
  512. }
  513. static bool drm_dp_sideband_parse_connection_status_notify(struct drm_dp_sideband_msg_rx *raw,
  514. struct drm_dp_sideband_msg_req_body *msg)
  515. {
  516. int idx = 1;
  517. msg->u.conn_stat.port_number = (raw->msg[idx] & 0xf0) >> 4;
  518. idx++;
  519. if (idx > raw->curlen)
  520. goto fail_len;
  521. memcpy(msg->u.conn_stat.guid, &raw->msg[idx], 16);
  522. idx += 16;
  523. if (idx > raw->curlen)
  524. goto fail_len;
  525. msg->u.conn_stat.legacy_device_plug_status = (raw->msg[idx] >> 6) & 0x1;
  526. msg->u.conn_stat.displayport_device_plug_status = (raw->msg[idx] >> 5) & 0x1;
  527. msg->u.conn_stat.message_capability_status = (raw->msg[idx] >> 4) & 0x1;
  528. msg->u.conn_stat.input_port = (raw->msg[idx] >> 3) & 0x1;
  529. msg->u.conn_stat.peer_device_type = (raw->msg[idx] & 0x7);
  530. idx++;
  531. return true;
  532. fail_len:
  533. DRM_DEBUG_KMS("connection status reply parse length fail %d %d\n", idx, raw->curlen);
  534. return false;
  535. }
  536. static bool drm_dp_sideband_parse_resource_status_notify(struct drm_dp_sideband_msg_rx *raw,
  537. struct drm_dp_sideband_msg_req_body *msg)
  538. {
  539. int idx = 1;
  540. msg->u.resource_stat.port_number = (raw->msg[idx] & 0xf0) >> 4;
  541. idx++;
  542. if (idx > raw->curlen)
  543. goto fail_len;
  544. memcpy(msg->u.resource_stat.guid, &raw->msg[idx], 16);
  545. idx += 16;
  546. if (idx > raw->curlen)
  547. goto fail_len;
  548. msg->u.resource_stat.available_pbn = (raw->msg[idx] << 8) | (raw->msg[idx + 1]);
  549. idx++;
  550. return true;
  551. fail_len:
  552. DRM_DEBUG_KMS("resource status reply parse length fail %d %d\n", idx, raw->curlen);
  553. return false;
  554. }
  555. static bool drm_dp_sideband_parse_req(struct drm_dp_sideband_msg_rx *raw,
  556. struct drm_dp_sideband_msg_req_body *msg)
  557. {
  558. memset(msg, 0, sizeof(*msg));
  559. msg->req_type = (raw->msg[0] & 0x7f);
  560. switch (msg->req_type) {
  561. case DP_CONNECTION_STATUS_NOTIFY:
  562. return drm_dp_sideband_parse_connection_status_notify(raw, msg);
  563. case DP_RESOURCE_STATUS_NOTIFY:
  564. return drm_dp_sideband_parse_resource_status_notify(raw, msg);
  565. default:
  566. DRM_ERROR("Got unknown request 0x%02x\n", msg->req_type);
  567. return false;
  568. }
  569. }
  570. static int build_dpcd_write(struct drm_dp_sideband_msg_tx *msg, u8 port_num, u32 offset, u8 num_bytes, u8 *bytes)
  571. {
  572. struct drm_dp_sideband_msg_req_body req;
  573. req.req_type = DP_REMOTE_DPCD_WRITE;
  574. req.u.dpcd_write.port_number = port_num;
  575. req.u.dpcd_write.dpcd_address = offset;
  576. req.u.dpcd_write.num_bytes = num_bytes;
  577. req.u.dpcd_write.bytes = bytes;
  578. drm_dp_encode_sideband_req(&req, msg);
  579. return 0;
  580. }
  581. static int build_link_address(struct drm_dp_sideband_msg_tx *msg)
  582. {
  583. struct drm_dp_sideband_msg_req_body req;
  584. req.req_type = DP_LINK_ADDRESS;
  585. drm_dp_encode_sideband_req(&req, msg);
  586. return 0;
  587. }
  588. static int build_enum_path_resources(struct drm_dp_sideband_msg_tx *msg, int port_num)
  589. {
  590. struct drm_dp_sideband_msg_req_body req;
  591. req.req_type = DP_ENUM_PATH_RESOURCES;
  592. req.u.port_num.port_number = port_num;
  593. drm_dp_encode_sideband_req(&req, msg);
  594. msg->path_msg = true;
  595. return 0;
  596. }
  597. static int build_allocate_payload(struct drm_dp_sideband_msg_tx *msg, int port_num,
  598. u8 vcpi, uint16_t pbn)
  599. {
  600. struct drm_dp_sideband_msg_req_body req;
  601. memset(&req, 0, sizeof(req));
  602. req.req_type = DP_ALLOCATE_PAYLOAD;
  603. req.u.allocate_payload.port_number = port_num;
  604. req.u.allocate_payload.vcpi = vcpi;
  605. req.u.allocate_payload.pbn = pbn;
  606. drm_dp_encode_sideband_req(&req, msg);
  607. msg->path_msg = true;
  608. return 0;
  609. }
  610. static int drm_dp_mst_assign_payload_id(struct drm_dp_mst_topology_mgr *mgr,
  611. struct drm_dp_vcpi *vcpi)
  612. {
  613. int ret, vcpi_ret;
  614. mutex_lock(&mgr->payload_lock);
  615. ret = find_first_zero_bit(&mgr->payload_mask, mgr->max_payloads + 1);
  616. if (ret > mgr->max_payloads) {
  617. ret = -EINVAL;
  618. DRM_DEBUG_KMS("out of payload ids %d\n", ret);
  619. goto out_unlock;
  620. }
  621. vcpi_ret = find_first_zero_bit(&mgr->vcpi_mask, mgr->max_payloads + 1);
  622. if (vcpi_ret > mgr->max_payloads) {
  623. ret = -EINVAL;
  624. DRM_DEBUG_KMS("out of vcpi ids %d\n", ret);
  625. goto out_unlock;
  626. }
  627. set_bit(ret, &mgr->payload_mask);
  628. set_bit(vcpi_ret, &mgr->vcpi_mask);
  629. vcpi->vcpi = vcpi_ret + 1;
  630. mgr->proposed_vcpis[ret - 1] = vcpi;
  631. out_unlock:
  632. mutex_unlock(&mgr->payload_lock);
  633. return ret;
  634. }
  635. static void drm_dp_mst_put_payload_id(struct drm_dp_mst_topology_mgr *mgr,
  636. int vcpi)
  637. {
  638. int i;
  639. if (vcpi == 0)
  640. return;
  641. mutex_lock(&mgr->payload_lock);
  642. DRM_DEBUG_KMS("putting payload %d\n", vcpi);
  643. clear_bit(vcpi - 1, &mgr->vcpi_mask);
  644. for (i = 0; i < mgr->max_payloads; i++) {
  645. if (mgr->proposed_vcpis[i])
  646. if (mgr->proposed_vcpis[i]->vcpi == vcpi) {
  647. mgr->proposed_vcpis[i] = NULL;
  648. clear_bit(i + 1, &mgr->payload_mask);
  649. }
  650. }
  651. mutex_unlock(&mgr->payload_lock);
  652. }
  653. static bool check_txmsg_state(struct drm_dp_mst_topology_mgr *mgr,
  654. struct drm_dp_sideband_msg_tx *txmsg)
  655. {
  656. bool ret;
  657. /*
  658. * All updates to txmsg->state are protected by mgr->qlock, and the two
  659. * cases we check here are terminal states. For those the barriers
  660. * provided by the wake_up/wait_event pair are enough.
  661. */
  662. ret = (txmsg->state == DRM_DP_SIDEBAND_TX_RX ||
  663. txmsg->state == DRM_DP_SIDEBAND_TX_TIMEOUT);
  664. return ret;
  665. }
  666. static int drm_dp_mst_wait_tx_reply(struct drm_dp_mst_branch *mstb,
  667. struct drm_dp_sideband_msg_tx *txmsg)
  668. {
  669. struct drm_dp_mst_topology_mgr *mgr = mstb->mgr;
  670. int ret;
  671. ret = wait_event_timeout(mgr->tx_waitq,
  672. check_txmsg_state(mgr, txmsg),
  673. (4 * HZ));
  674. mutex_lock(&mstb->mgr->qlock);
  675. if (ret > 0) {
  676. if (txmsg->state == DRM_DP_SIDEBAND_TX_TIMEOUT) {
  677. ret = -EIO;
  678. goto out;
  679. }
  680. } else {
  681. DRM_DEBUG_KMS("timedout msg send %p %d %d\n", txmsg, txmsg->state, txmsg->seqno);
  682. /* dump some state */
  683. ret = -EIO;
  684. /* remove from q */
  685. if (txmsg->state == DRM_DP_SIDEBAND_TX_QUEUED ||
  686. txmsg->state == DRM_DP_SIDEBAND_TX_START_SEND) {
  687. list_del(&txmsg->next);
  688. }
  689. if (txmsg->state == DRM_DP_SIDEBAND_TX_START_SEND ||
  690. txmsg->state == DRM_DP_SIDEBAND_TX_SENT) {
  691. mstb->tx_slots[txmsg->seqno] = NULL;
  692. }
  693. }
  694. out:
  695. mutex_unlock(&mgr->qlock);
  696. return ret;
  697. }
  698. static struct drm_dp_mst_branch *drm_dp_add_mst_branch_device(u8 lct, u8 *rad)
  699. {
  700. struct drm_dp_mst_branch *mstb;
  701. mstb = kzalloc(sizeof(*mstb), GFP_KERNEL);
  702. if (!mstb)
  703. return NULL;
  704. mstb->lct = lct;
  705. if (lct > 1)
  706. memcpy(mstb->rad, rad, lct / 2);
  707. INIT_LIST_HEAD(&mstb->ports);
  708. kref_init(&mstb->kref);
  709. return mstb;
  710. }
  711. static void drm_dp_destroy_mst_branch_device(struct kref *kref)
  712. {
  713. struct drm_dp_mst_branch *mstb = container_of(kref, struct drm_dp_mst_branch, kref);
  714. struct drm_dp_mst_port *port, *tmp;
  715. bool wake_tx = false;
  716. cancel_work_sync(&mstb->mgr->work);
  717. /*
  718. * destroy all ports - don't need lock
  719. * as there are no more references to the mst branch
  720. * device at this point.
  721. */
  722. list_for_each_entry_safe(port, tmp, &mstb->ports, next) {
  723. list_del(&port->next);
  724. drm_dp_put_port(port);
  725. }
  726. /* drop any tx slots msg */
  727. mutex_lock(&mstb->mgr->qlock);
  728. if (mstb->tx_slots[0]) {
  729. mstb->tx_slots[0]->state = DRM_DP_SIDEBAND_TX_TIMEOUT;
  730. mstb->tx_slots[0] = NULL;
  731. wake_tx = true;
  732. }
  733. if (mstb->tx_slots[1]) {
  734. mstb->tx_slots[1]->state = DRM_DP_SIDEBAND_TX_TIMEOUT;
  735. mstb->tx_slots[1] = NULL;
  736. wake_tx = true;
  737. }
  738. mutex_unlock(&mstb->mgr->qlock);
  739. if (wake_tx)
  740. wake_up(&mstb->mgr->tx_waitq);
  741. kfree(mstb);
  742. }
  743. static void drm_dp_put_mst_branch_device(struct drm_dp_mst_branch *mstb)
  744. {
  745. kref_put(&mstb->kref, drm_dp_destroy_mst_branch_device);
  746. }
  747. static void drm_dp_port_teardown_pdt(struct drm_dp_mst_port *port, int old_pdt)
  748. {
  749. struct drm_dp_mst_branch *mstb;
  750. switch (old_pdt) {
  751. case DP_PEER_DEVICE_DP_LEGACY_CONV:
  752. case DP_PEER_DEVICE_SST_SINK:
  753. /* remove i2c over sideband */
  754. drm_dp_mst_unregister_i2c_bus(&port->aux);
  755. break;
  756. case DP_PEER_DEVICE_MST_BRANCHING:
  757. mstb = port->mstb;
  758. port->mstb = NULL;
  759. drm_dp_put_mst_branch_device(mstb);
  760. break;
  761. }
  762. }
  763. static void drm_dp_destroy_port(struct kref *kref)
  764. {
  765. struct drm_dp_mst_port *port = container_of(kref, struct drm_dp_mst_port, kref);
  766. struct drm_dp_mst_topology_mgr *mgr = port->mgr;
  767. if (!port->input) {
  768. port->vcpi.num_slots = 0;
  769. kfree(port->cached_edid);
  770. /* we can't destroy the connector here, as
  771. we might be holding the mode_config.mutex
  772. from an EDID retrieval */
  773. if (port->connector) {
  774. mutex_lock(&mgr->destroy_connector_lock);
  775. list_add(&port->connector->destroy_list, &mgr->destroy_connector_list);
  776. mutex_unlock(&mgr->destroy_connector_lock);
  777. schedule_work(&mgr->destroy_connector_work);
  778. }
  779. drm_dp_port_teardown_pdt(port, port->pdt);
  780. if (!port->input && port->vcpi.vcpi > 0)
  781. drm_dp_mst_put_payload_id(mgr, port->vcpi.vcpi);
  782. }
  783. kfree(port);
  784. (*mgr->cbs->hotplug)(mgr);
  785. }
  786. static void drm_dp_put_port(struct drm_dp_mst_port *port)
  787. {
  788. kref_put(&port->kref, drm_dp_destroy_port);
  789. }
  790. static struct drm_dp_mst_branch *drm_dp_mst_get_validated_mstb_ref_locked(struct drm_dp_mst_branch *mstb, struct drm_dp_mst_branch *to_find)
  791. {
  792. struct drm_dp_mst_port *port;
  793. struct drm_dp_mst_branch *rmstb;
  794. if (to_find == mstb) {
  795. kref_get(&mstb->kref);
  796. return mstb;
  797. }
  798. list_for_each_entry(port, &mstb->ports, next) {
  799. if (port->mstb) {
  800. rmstb = drm_dp_mst_get_validated_mstb_ref_locked(port->mstb, to_find);
  801. if (rmstb)
  802. return rmstb;
  803. }
  804. }
  805. return NULL;
  806. }
  807. static struct drm_dp_mst_branch *drm_dp_get_validated_mstb_ref(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_branch *mstb)
  808. {
  809. struct drm_dp_mst_branch *rmstb = NULL;
  810. mutex_lock(&mgr->lock);
  811. if (mgr->mst_primary)
  812. rmstb = drm_dp_mst_get_validated_mstb_ref_locked(mgr->mst_primary, mstb);
  813. mutex_unlock(&mgr->lock);
  814. return rmstb;
  815. }
  816. static struct drm_dp_mst_port *drm_dp_mst_get_port_ref_locked(struct drm_dp_mst_branch *mstb, struct drm_dp_mst_port *to_find)
  817. {
  818. struct drm_dp_mst_port *port, *mport;
  819. list_for_each_entry(port, &mstb->ports, next) {
  820. if (port == to_find) {
  821. kref_get(&port->kref);
  822. return port;
  823. }
  824. if (port->mstb) {
  825. mport = drm_dp_mst_get_port_ref_locked(port->mstb, to_find);
  826. if (mport)
  827. return mport;
  828. }
  829. }
  830. return NULL;
  831. }
  832. static struct drm_dp_mst_port *drm_dp_get_validated_port_ref(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)
  833. {
  834. struct drm_dp_mst_port *rport = NULL;
  835. mutex_lock(&mgr->lock);
  836. if (mgr->mst_primary)
  837. rport = drm_dp_mst_get_port_ref_locked(mgr->mst_primary, port);
  838. mutex_unlock(&mgr->lock);
  839. return rport;
  840. }
  841. static struct drm_dp_mst_port *drm_dp_get_port(struct drm_dp_mst_branch *mstb, u8 port_num)
  842. {
  843. struct drm_dp_mst_port *port;
  844. list_for_each_entry(port, &mstb->ports, next) {
  845. if (port->port_num == port_num) {
  846. kref_get(&port->kref);
  847. return port;
  848. }
  849. }
  850. return NULL;
  851. }
  852. /*
  853. * calculate a new RAD for this MST branch device
  854. * if parent has an LCT of 2 then it has 1 nibble of RAD,
  855. * if parent has an LCT of 3 then it has 2 nibbles of RAD,
  856. */
  857. static u8 drm_dp_calculate_rad(struct drm_dp_mst_port *port,
  858. u8 *rad)
  859. {
  860. int lct = port->parent->lct;
  861. int shift = 4;
  862. int idx = lct / 2;
  863. if (lct > 1) {
  864. memcpy(rad, port->parent->rad, idx);
  865. shift = (lct % 2) ? 4 : 0;
  866. } else
  867. rad[0] = 0;
  868. rad[idx] |= port->port_num << shift;
  869. return lct + 1;
  870. }
  871. /*
  872. * return sends link address for new mstb
  873. */
  874. static bool drm_dp_port_setup_pdt(struct drm_dp_mst_port *port)
  875. {
  876. int ret;
  877. u8 rad[6], lct;
  878. bool send_link = false;
  879. switch (port->pdt) {
  880. case DP_PEER_DEVICE_DP_LEGACY_CONV:
  881. case DP_PEER_DEVICE_SST_SINK:
  882. /* add i2c over sideband */
  883. ret = drm_dp_mst_register_i2c_bus(&port->aux);
  884. break;
  885. case DP_PEER_DEVICE_MST_BRANCHING:
  886. lct = drm_dp_calculate_rad(port, rad);
  887. port->mstb = drm_dp_add_mst_branch_device(lct, rad);
  888. port->mstb->mgr = port->mgr;
  889. port->mstb->port_parent = port;
  890. send_link = true;
  891. break;
  892. }
  893. return send_link;
  894. }
  895. static void drm_dp_check_port_guid(struct drm_dp_mst_branch *mstb,
  896. struct drm_dp_mst_port *port)
  897. {
  898. int ret;
  899. if (port->dpcd_rev >= 0x12) {
  900. port->guid_valid = drm_dp_validate_guid(mstb->mgr, port->guid);
  901. if (!port->guid_valid) {
  902. ret = drm_dp_send_dpcd_write(mstb->mgr,
  903. port,
  904. DP_GUID,
  905. 16, port->guid);
  906. port->guid_valid = true;
  907. }
  908. }
  909. }
  910. static void build_mst_prop_path(struct drm_dp_mst_port *port,
  911. struct drm_dp_mst_branch *mstb,
  912. char *proppath,
  913. size_t proppath_size)
  914. {
  915. int i;
  916. char temp[8];
  917. snprintf(proppath, proppath_size, "mst:%d", mstb->mgr->conn_base_id);
  918. for (i = 0; i < (mstb->lct - 1); i++) {
  919. int shift = (i % 2) ? 0 : 4;
  920. int port_num = mstb->rad[i / 2] >> shift;
  921. snprintf(temp, sizeof(temp), "-%d", port_num);
  922. strlcat(proppath, temp, proppath_size);
  923. }
  924. snprintf(temp, sizeof(temp), "-%d", port->port_num);
  925. strlcat(proppath, temp, proppath_size);
  926. }
  927. static void drm_dp_add_port(struct drm_dp_mst_branch *mstb,
  928. struct device *dev,
  929. struct drm_dp_link_addr_reply_port *port_msg)
  930. {
  931. struct drm_dp_mst_port *port;
  932. bool ret;
  933. bool created = false;
  934. int old_pdt = 0;
  935. int old_ddps = 0;
  936. port = drm_dp_get_port(mstb, port_msg->port_number);
  937. if (!port) {
  938. port = kzalloc(sizeof(*port), GFP_KERNEL);
  939. if (!port)
  940. return;
  941. kref_init(&port->kref);
  942. port->parent = mstb;
  943. port->port_num = port_msg->port_number;
  944. port->mgr = mstb->mgr;
  945. port->aux.name = "DPMST";
  946. port->aux.dev = dev;
  947. created = true;
  948. } else {
  949. old_pdt = port->pdt;
  950. old_ddps = port->ddps;
  951. }
  952. port->pdt = port_msg->peer_device_type;
  953. port->input = port_msg->input_port;
  954. port->mcs = port_msg->mcs;
  955. port->ddps = port_msg->ddps;
  956. port->ldps = port_msg->legacy_device_plug_status;
  957. port->dpcd_rev = port_msg->dpcd_revision;
  958. port->num_sdp_streams = port_msg->num_sdp_streams;
  959. port->num_sdp_stream_sinks = port_msg->num_sdp_stream_sinks;
  960. memcpy(port->guid, port_msg->peer_guid, 16);
  961. /* manage mstb port lists with mgr lock - take a reference
  962. for this list */
  963. if (created) {
  964. mutex_lock(&mstb->mgr->lock);
  965. kref_get(&port->kref);
  966. list_add(&port->next, &mstb->ports);
  967. mutex_unlock(&mstb->mgr->lock);
  968. }
  969. if (old_ddps != port->ddps) {
  970. if (port->ddps) {
  971. drm_dp_check_port_guid(mstb, port);
  972. if (!port->input)
  973. drm_dp_send_enum_path_resources(mstb->mgr, mstb, port);
  974. } else {
  975. port->guid_valid = false;
  976. port->available_pbn = 0;
  977. }
  978. }
  979. if (old_pdt != port->pdt && !port->input) {
  980. drm_dp_port_teardown_pdt(port, old_pdt);
  981. ret = drm_dp_port_setup_pdt(port);
  982. if (ret == true) {
  983. drm_dp_send_link_address(mstb->mgr, port->mstb);
  984. port->mstb->link_address_sent = true;
  985. }
  986. }
  987. if (created && !port->input) {
  988. char proppath[255];
  989. build_mst_prop_path(port, mstb, proppath, sizeof(proppath));
  990. port->connector = (*mstb->mgr->cbs->add_connector)(mstb->mgr, port, proppath);
  991. if (port->port_num >= 8) {
  992. port->cached_edid = drm_get_edid(port->connector, &port->aux.ddc);
  993. }
  994. }
  995. /* put reference to this port */
  996. drm_dp_put_port(port);
  997. }
  998. static void drm_dp_update_port(struct drm_dp_mst_branch *mstb,
  999. struct drm_dp_connection_status_notify *conn_stat)
  1000. {
  1001. struct drm_dp_mst_port *port;
  1002. int old_pdt;
  1003. int old_ddps;
  1004. bool dowork = false;
  1005. port = drm_dp_get_port(mstb, conn_stat->port_number);
  1006. if (!port)
  1007. return;
  1008. old_ddps = port->ddps;
  1009. old_pdt = port->pdt;
  1010. port->pdt = conn_stat->peer_device_type;
  1011. port->mcs = conn_stat->message_capability_status;
  1012. port->ldps = conn_stat->legacy_device_plug_status;
  1013. port->ddps = conn_stat->displayport_device_plug_status;
  1014. if (old_ddps != port->ddps) {
  1015. if (port->ddps) {
  1016. drm_dp_check_port_guid(mstb, port);
  1017. dowork = true;
  1018. } else {
  1019. port->guid_valid = false;
  1020. port->available_pbn = 0;
  1021. }
  1022. }
  1023. if (old_pdt != port->pdt && !port->input) {
  1024. drm_dp_port_teardown_pdt(port, old_pdt);
  1025. if (drm_dp_port_setup_pdt(port))
  1026. dowork = true;
  1027. }
  1028. drm_dp_put_port(port);
  1029. if (dowork)
  1030. queue_work(system_long_wq, &mstb->mgr->work);
  1031. }
  1032. static struct drm_dp_mst_branch *drm_dp_get_mst_branch_device(struct drm_dp_mst_topology_mgr *mgr,
  1033. u8 lct, u8 *rad)
  1034. {
  1035. struct drm_dp_mst_branch *mstb;
  1036. struct drm_dp_mst_port *port;
  1037. int i;
  1038. /* find the port by iterating down */
  1039. mutex_lock(&mgr->lock);
  1040. mstb = mgr->mst_primary;
  1041. for (i = 0; i < lct - 1; i++) {
  1042. int shift = (i % 2) ? 0 : 4;
  1043. int port_num = rad[i / 2] >> shift;
  1044. list_for_each_entry(port, &mstb->ports, next) {
  1045. if (port->port_num == port_num) {
  1046. if (!port->mstb) {
  1047. DRM_ERROR("failed to lookup MSTB with lct %d, rad %02x\n", lct, rad[0]);
  1048. return NULL;
  1049. }
  1050. mstb = port->mstb;
  1051. break;
  1052. }
  1053. }
  1054. }
  1055. kref_get(&mstb->kref);
  1056. mutex_unlock(&mgr->lock);
  1057. return mstb;
  1058. }
  1059. static void drm_dp_check_and_send_link_address(struct drm_dp_mst_topology_mgr *mgr,
  1060. struct drm_dp_mst_branch *mstb)
  1061. {
  1062. struct drm_dp_mst_port *port;
  1063. struct drm_dp_mst_branch *mstb_child;
  1064. if (!mstb->link_address_sent) {
  1065. drm_dp_send_link_address(mgr, mstb);
  1066. mstb->link_address_sent = true;
  1067. }
  1068. list_for_each_entry(port, &mstb->ports, next) {
  1069. if (port->input)
  1070. continue;
  1071. if (!port->ddps)
  1072. continue;
  1073. if (!port->available_pbn)
  1074. drm_dp_send_enum_path_resources(mgr, mstb, port);
  1075. if (port->mstb) {
  1076. mstb_child = drm_dp_get_validated_mstb_ref(mgr, port->mstb);
  1077. if (mstb_child) {
  1078. drm_dp_check_and_send_link_address(mgr, mstb_child);
  1079. drm_dp_put_mst_branch_device(mstb_child);
  1080. }
  1081. }
  1082. }
  1083. }
  1084. static void drm_dp_mst_link_probe_work(struct work_struct *work)
  1085. {
  1086. struct drm_dp_mst_topology_mgr *mgr = container_of(work, struct drm_dp_mst_topology_mgr, work);
  1087. struct drm_dp_mst_branch *mstb;
  1088. mutex_lock(&mgr->lock);
  1089. mstb = mgr->mst_primary;
  1090. if (mstb) {
  1091. kref_get(&mstb->kref);
  1092. }
  1093. mutex_unlock(&mgr->lock);
  1094. if (mstb) {
  1095. drm_dp_check_and_send_link_address(mgr, mstb);
  1096. drm_dp_put_mst_branch_device(mstb);
  1097. }
  1098. }
  1099. static bool drm_dp_validate_guid(struct drm_dp_mst_topology_mgr *mgr,
  1100. u8 *guid)
  1101. {
  1102. static u8 zero_guid[16];
  1103. if (!memcmp(guid, zero_guid, 16)) {
  1104. u64 salt = get_jiffies_64();
  1105. memcpy(&guid[0], &salt, sizeof(u64));
  1106. memcpy(&guid[8], &salt, sizeof(u64));
  1107. return false;
  1108. }
  1109. return true;
  1110. }
  1111. #if 0
  1112. static int build_dpcd_read(struct drm_dp_sideband_msg_tx *msg, u8 port_num, u32 offset, u8 num_bytes)
  1113. {
  1114. struct drm_dp_sideband_msg_req_body req;
  1115. req.req_type = DP_REMOTE_DPCD_READ;
  1116. req.u.dpcd_read.port_number = port_num;
  1117. req.u.dpcd_read.dpcd_address = offset;
  1118. req.u.dpcd_read.num_bytes = num_bytes;
  1119. drm_dp_encode_sideband_req(&req, msg);
  1120. return 0;
  1121. }
  1122. #endif
  1123. static int drm_dp_send_sideband_msg(struct drm_dp_mst_topology_mgr *mgr,
  1124. bool up, u8 *msg, int len)
  1125. {
  1126. int ret;
  1127. int regbase = up ? DP_SIDEBAND_MSG_UP_REP_BASE : DP_SIDEBAND_MSG_DOWN_REQ_BASE;
  1128. int tosend, total, offset;
  1129. int retries = 0;
  1130. retry:
  1131. total = len;
  1132. offset = 0;
  1133. do {
  1134. tosend = min3(mgr->max_dpcd_transaction_bytes, 16, total);
  1135. ret = drm_dp_dpcd_write(mgr->aux, regbase + offset,
  1136. &msg[offset],
  1137. tosend);
  1138. if (ret != tosend) {
  1139. if (ret == -EIO && retries < 5) {
  1140. retries++;
  1141. goto retry;
  1142. }
  1143. DRM_DEBUG_KMS("failed to dpcd write %d %d\n", tosend, ret);
  1144. WARN(1, "fail\n");
  1145. return -EIO;
  1146. }
  1147. offset += tosend;
  1148. total -= tosend;
  1149. } while (total > 0);
  1150. return 0;
  1151. }
  1152. static int set_hdr_from_dst_qlock(struct drm_dp_sideband_msg_hdr *hdr,
  1153. struct drm_dp_sideband_msg_tx *txmsg)
  1154. {
  1155. struct drm_dp_mst_branch *mstb = txmsg->dst;
  1156. /* both msg slots are full */
  1157. if (txmsg->seqno == -1) {
  1158. if (mstb->tx_slots[0] && mstb->tx_slots[1]) {
  1159. DRM_DEBUG_KMS("%s: failed to find slot\n", __func__);
  1160. return -EAGAIN;
  1161. }
  1162. if (mstb->tx_slots[0] == NULL && mstb->tx_slots[1] == NULL) {
  1163. txmsg->seqno = mstb->last_seqno;
  1164. mstb->last_seqno ^= 1;
  1165. } else if (mstb->tx_slots[0] == NULL)
  1166. txmsg->seqno = 0;
  1167. else
  1168. txmsg->seqno = 1;
  1169. mstb->tx_slots[txmsg->seqno] = txmsg;
  1170. }
  1171. hdr->broadcast = 0;
  1172. hdr->path_msg = txmsg->path_msg;
  1173. hdr->lct = mstb->lct;
  1174. hdr->lcr = mstb->lct - 1;
  1175. if (mstb->lct > 1)
  1176. memcpy(hdr->rad, mstb->rad, mstb->lct / 2);
  1177. hdr->seqno = txmsg->seqno;
  1178. return 0;
  1179. }
  1180. /*
  1181. * process a single block of the next message in the sideband queue
  1182. */
  1183. static int process_single_tx_qlock(struct drm_dp_mst_topology_mgr *mgr,
  1184. struct drm_dp_sideband_msg_tx *txmsg,
  1185. bool up)
  1186. {
  1187. u8 chunk[48];
  1188. struct drm_dp_sideband_msg_hdr hdr;
  1189. int len, space, idx, tosend;
  1190. int ret;
  1191. memset(&hdr, 0, sizeof(struct drm_dp_sideband_msg_hdr));
  1192. if (txmsg->state == DRM_DP_SIDEBAND_TX_QUEUED) {
  1193. txmsg->seqno = -1;
  1194. txmsg->state = DRM_DP_SIDEBAND_TX_START_SEND;
  1195. }
  1196. /* make hdr from dst mst - for replies use seqno
  1197. otherwise assign one */
  1198. ret = set_hdr_from_dst_qlock(&hdr, txmsg);
  1199. if (ret < 0)
  1200. return ret;
  1201. /* amount left to send in this message */
  1202. len = txmsg->cur_len - txmsg->cur_offset;
  1203. /* 48 - sideband msg size - 1 byte for data CRC, x header bytes */
  1204. space = 48 - 1 - drm_dp_calc_sb_hdr_size(&hdr);
  1205. tosend = min(len, space);
  1206. if (len == txmsg->cur_len)
  1207. hdr.somt = 1;
  1208. if (space >= len)
  1209. hdr.eomt = 1;
  1210. hdr.msg_len = tosend + 1;
  1211. drm_dp_encode_sideband_msg_hdr(&hdr, chunk, &idx);
  1212. memcpy(&chunk[idx], &txmsg->msg[txmsg->cur_offset], tosend);
  1213. /* add crc at end */
  1214. drm_dp_crc_sideband_chunk_req(&chunk[idx], tosend);
  1215. idx += tosend + 1;
  1216. ret = drm_dp_send_sideband_msg(mgr, up, chunk, idx);
  1217. if (ret) {
  1218. DRM_DEBUG_KMS("sideband msg failed to send\n");
  1219. return ret;
  1220. }
  1221. txmsg->cur_offset += tosend;
  1222. if (txmsg->cur_offset == txmsg->cur_len) {
  1223. txmsg->state = DRM_DP_SIDEBAND_TX_SENT;
  1224. return 1;
  1225. }
  1226. return 0;
  1227. }
  1228. static void process_single_down_tx_qlock(struct drm_dp_mst_topology_mgr *mgr)
  1229. {
  1230. struct drm_dp_sideband_msg_tx *txmsg;
  1231. int ret;
  1232. WARN_ON(!mutex_is_locked(&mgr->qlock));
  1233. /* construct a chunk from the first msg in the tx_msg queue */
  1234. if (list_empty(&mgr->tx_msg_downq)) {
  1235. mgr->tx_down_in_progress = false;
  1236. return;
  1237. }
  1238. mgr->tx_down_in_progress = true;
  1239. txmsg = list_first_entry(&mgr->tx_msg_downq, struct drm_dp_sideband_msg_tx, next);
  1240. ret = process_single_tx_qlock(mgr, txmsg, false);
  1241. if (ret == 1) {
  1242. /* txmsg is sent it should be in the slots now */
  1243. list_del(&txmsg->next);
  1244. } else if (ret) {
  1245. DRM_DEBUG_KMS("failed to send msg in q %d\n", ret);
  1246. list_del(&txmsg->next);
  1247. if (txmsg->seqno != -1)
  1248. txmsg->dst->tx_slots[txmsg->seqno] = NULL;
  1249. txmsg->state = DRM_DP_SIDEBAND_TX_TIMEOUT;
  1250. wake_up(&mgr->tx_waitq);
  1251. }
  1252. if (list_empty(&mgr->tx_msg_downq)) {
  1253. mgr->tx_down_in_progress = false;
  1254. return;
  1255. }
  1256. }
  1257. /* called holding qlock */
  1258. static void process_single_up_tx_qlock(struct drm_dp_mst_topology_mgr *mgr)
  1259. {
  1260. struct drm_dp_sideband_msg_tx *txmsg;
  1261. int ret;
  1262. /* construct a chunk from the first msg in the tx_msg queue */
  1263. if (list_empty(&mgr->tx_msg_upq)) {
  1264. mgr->tx_up_in_progress = false;
  1265. return;
  1266. }
  1267. txmsg = list_first_entry(&mgr->tx_msg_upq, struct drm_dp_sideband_msg_tx, next);
  1268. ret = process_single_tx_qlock(mgr, txmsg, true);
  1269. if (ret == 1) {
  1270. /* up txmsgs aren't put in slots - so free after we send it */
  1271. list_del(&txmsg->next);
  1272. kfree(txmsg);
  1273. } else if (ret)
  1274. DRM_DEBUG_KMS("failed to send msg in q %d\n", ret);
  1275. mgr->tx_up_in_progress = true;
  1276. }
  1277. static void drm_dp_queue_down_tx(struct drm_dp_mst_topology_mgr *mgr,
  1278. struct drm_dp_sideband_msg_tx *txmsg)
  1279. {
  1280. mutex_lock(&mgr->qlock);
  1281. list_add_tail(&txmsg->next, &mgr->tx_msg_downq);
  1282. if (!mgr->tx_down_in_progress)
  1283. process_single_down_tx_qlock(mgr);
  1284. mutex_unlock(&mgr->qlock);
  1285. }
  1286. static int drm_dp_send_link_address(struct drm_dp_mst_topology_mgr *mgr,
  1287. struct drm_dp_mst_branch *mstb)
  1288. {
  1289. int len;
  1290. struct drm_dp_sideband_msg_tx *txmsg;
  1291. int ret;
  1292. txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL);
  1293. if (!txmsg)
  1294. return -ENOMEM;
  1295. txmsg->dst = mstb;
  1296. len = build_link_address(txmsg);
  1297. drm_dp_queue_down_tx(mgr, txmsg);
  1298. ret = drm_dp_mst_wait_tx_reply(mstb, txmsg);
  1299. if (ret > 0) {
  1300. int i;
  1301. if (txmsg->reply.reply_type == 1)
  1302. DRM_DEBUG_KMS("link address nak received\n");
  1303. else {
  1304. DRM_DEBUG_KMS("link address reply: %d\n", txmsg->reply.u.link_addr.nports);
  1305. for (i = 0; i < txmsg->reply.u.link_addr.nports; i++) {
  1306. DRM_DEBUG_KMS("port %d: input %d, pdt: %d, pn: %d, dpcd_rev: %02x, mcs: %d, ddps: %d, ldps %d, sdp %d/%d\n", i,
  1307. txmsg->reply.u.link_addr.ports[i].input_port,
  1308. txmsg->reply.u.link_addr.ports[i].peer_device_type,
  1309. txmsg->reply.u.link_addr.ports[i].port_number,
  1310. txmsg->reply.u.link_addr.ports[i].dpcd_revision,
  1311. txmsg->reply.u.link_addr.ports[i].mcs,
  1312. txmsg->reply.u.link_addr.ports[i].ddps,
  1313. txmsg->reply.u.link_addr.ports[i].legacy_device_plug_status,
  1314. txmsg->reply.u.link_addr.ports[i].num_sdp_streams,
  1315. txmsg->reply.u.link_addr.ports[i].num_sdp_stream_sinks);
  1316. }
  1317. for (i = 0; i < txmsg->reply.u.link_addr.nports; i++) {
  1318. drm_dp_add_port(mstb, mgr->dev, &txmsg->reply.u.link_addr.ports[i]);
  1319. }
  1320. (*mgr->cbs->hotplug)(mgr);
  1321. }
  1322. } else
  1323. DRM_DEBUG_KMS("link address failed %d\n", ret);
  1324. kfree(txmsg);
  1325. return 0;
  1326. }
  1327. static int drm_dp_send_enum_path_resources(struct drm_dp_mst_topology_mgr *mgr,
  1328. struct drm_dp_mst_branch *mstb,
  1329. struct drm_dp_mst_port *port)
  1330. {
  1331. int len;
  1332. struct drm_dp_sideband_msg_tx *txmsg;
  1333. int ret;
  1334. txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL);
  1335. if (!txmsg)
  1336. return -ENOMEM;
  1337. txmsg->dst = mstb;
  1338. len = build_enum_path_resources(txmsg, port->port_num);
  1339. drm_dp_queue_down_tx(mgr, txmsg);
  1340. ret = drm_dp_mst_wait_tx_reply(mstb, txmsg);
  1341. if (ret > 0) {
  1342. if (txmsg->reply.reply_type == 1)
  1343. DRM_DEBUG_KMS("enum path resources nak received\n");
  1344. else {
  1345. if (port->port_num != txmsg->reply.u.path_resources.port_number)
  1346. DRM_ERROR("got incorrect port in response\n");
  1347. DRM_DEBUG_KMS("enum path resources %d: %d %d\n", txmsg->reply.u.path_resources.port_number, txmsg->reply.u.path_resources.full_payload_bw_number,
  1348. txmsg->reply.u.path_resources.avail_payload_bw_number);
  1349. port->available_pbn = txmsg->reply.u.path_resources.avail_payload_bw_number;
  1350. }
  1351. }
  1352. kfree(txmsg);
  1353. return 0;
  1354. }
  1355. static int drm_dp_payload_send_msg(struct drm_dp_mst_topology_mgr *mgr,
  1356. struct drm_dp_mst_port *port,
  1357. int id,
  1358. int pbn)
  1359. {
  1360. struct drm_dp_sideband_msg_tx *txmsg;
  1361. struct drm_dp_mst_branch *mstb;
  1362. int len, ret;
  1363. mstb = drm_dp_get_validated_mstb_ref(mgr, port->parent);
  1364. if (!mstb)
  1365. return -EINVAL;
  1366. txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL);
  1367. if (!txmsg) {
  1368. ret = -ENOMEM;
  1369. goto fail_put;
  1370. }
  1371. txmsg->dst = mstb;
  1372. len = build_allocate_payload(txmsg, port->port_num,
  1373. id,
  1374. pbn);
  1375. drm_dp_queue_down_tx(mgr, txmsg);
  1376. ret = drm_dp_mst_wait_tx_reply(mstb, txmsg);
  1377. if (ret > 0) {
  1378. if (txmsg->reply.reply_type == 1) {
  1379. ret = -EINVAL;
  1380. } else
  1381. ret = 0;
  1382. }
  1383. kfree(txmsg);
  1384. fail_put:
  1385. drm_dp_put_mst_branch_device(mstb);
  1386. return ret;
  1387. }
  1388. static int drm_dp_create_payload_step1(struct drm_dp_mst_topology_mgr *mgr,
  1389. int id,
  1390. struct drm_dp_payload *payload)
  1391. {
  1392. int ret;
  1393. ret = drm_dp_dpcd_write_payload(mgr, id, payload);
  1394. if (ret < 0) {
  1395. payload->payload_state = 0;
  1396. return ret;
  1397. }
  1398. payload->payload_state = DP_PAYLOAD_LOCAL;
  1399. return 0;
  1400. }
  1401. static int drm_dp_create_payload_step2(struct drm_dp_mst_topology_mgr *mgr,
  1402. struct drm_dp_mst_port *port,
  1403. int id,
  1404. struct drm_dp_payload *payload)
  1405. {
  1406. int ret;
  1407. ret = drm_dp_payload_send_msg(mgr, port, id, port->vcpi.pbn);
  1408. if (ret < 0)
  1409. return ret;
  1410. payload->payload_state = DP_PAYLOAD_REMOTE;
  1411. return ret;
  1412. }
  1413. static int drm_dp_destroy_payload_step1(struct drm_dp_mst_topology_mgr *mgr,
  1414. struct drm_dp_mst_port *port,
  1415. int id,
  1416. struct drm_dp_payload *payload)
  1417. {
  1418. DRM_DEBUG_KMS("\n");
  1419. /* its okay for these to fail */
  1420. if (port) {
  1421. drm_dp_payload_send_msg(mgr, port, id, 0);
  1422. }
  1423. drm_dp_dpcd_write_payload(mgr, id, payload);
  1424. payload->payload_state = DP_PAYLOAD_DELETE_LOCAL;
  1425. return 0;
  1426. }
  1427. static int drm_dp_destroy_payload_step2(struct drm_dp_mst_topology_mgr *mgr,
  1428. int id,
  1429. struct drm_dp_payload *payload)
  1430. {
  1431. payload->payload_state = 0;
  1432. return 0;
  1433. }
  1434. /**
  1435. * drm_dp_update_payload_part1() - Execute payload update part 1
  1436. * @mgr: manager to use.
  1437. *
  1438. * This iterates over all proposed virtual channels, and tries to
  1439. * allocate space in the link for them. For 0->slots transitions,
  1440. * this step just writes the VCPI to the MST device. For slots->0
  1441. * transitions, this writes the updated VCPIs and removes the
  1442. * remote VC payloads.
  1443. *
  1444. * after calling this the driver should generate ACT and payload
  1445. * packets.
  1446. */
  1447. int drm_dp_update_payload_part1(struct drm_dp_mst_topology_mgr *mgr)
  1448. {
  1449. int i, j;
  1450. int cur_slots = 1;
  1451. struct drm_dp_payload req_payload;
  1452. struct drm_dp_mst_port *port;
  1453. mutex_lock(&mgr->payload_lock);
  1454. for (i = 0; i < mgr->max_payloads; i++) {
  1455. /* solve the current payloads - compare to the hw ones
  1456. - update the hw view */
  1457. req_payload.start_slot = cur_slots;
  1458. if (mgr->proposed_vcpis[i]) {
  1459. port = container_of(mgr->proposed_vcpis[i], struct drm_dp_mst_port, vcpi);
  1460. req_payload.num_slots = mgr->proposed_vcpis[i]->num_slots;
  1461. } else {
  1462. port = NULL;
  1463. req_payload.num_slots = 0;
  1464. }
  1465. if (mgr->payloads[i].start_slot != req_payload.start_slot) {
  1466. mgr->payloads[i].start_slot = req_payload.start_slot;
  1467. }
  1468. /* work out what is required to happen with this payload */
  1469. if (mgr->payloads[i].num_slots != req_payload.num_slots) {
  1470. /* need to push an update for this payload */
  1471. if (req_payload.num_slots) {
  1472. drm_dp_create_payload_step1(mgr, mgr->proposed_vcpis[i]->vcpi, &req_payload);
  1473. mgr->payloads[i].num_slots = req_payload.num_slots;
  1474. } else if (mgr->payloads[i].num_slots) {
  1475. mgr->payloads[i].num_slots = 0;
  1476. drm_dp_destroy_payload_step1(mgr, port, port->vcpi.vcpi, &mgr->payloads[i]);
  1477. req_payload.payload_state = mgr->payloads[i].payload_state;
  1478. mgr->payloads[i].start_slot = 0;
  1479. }
  1480. mgr->payloads[i].payload_state = req_payload.payload_state;
  1481. }
  1482. cur_slots += req_payload.num_slots;
  1483. }
  1484. for (i = 0; i < mgr->max_payloads; i++) {
  1485. if (mgr->payloads[i].payload_state == DP_PAYLOAD_DELETE_LOCAL) {
  1486. DRM_DEBUG_KMS("removing payload %d\n", i);
  1487. for (j = i; j < mgr->max_payloads - 1; j++) {
  1488. memcpy(&mgr->payloads[j], &mgr->payloads[j + 1], sizeof(struct drm_dp_payload));
  1489. mgr->proposed_vcpis[j] = mgr->proposed_vcpis[j + 1];
  1490. if (mgr->proposed_vcpis[j] && mgr->proposed_vcpis[j]->num_slots) {
  1491. set_bit(j + 1, &mgr->payload_mask);
  1492. } else {
  1493. clear_bit(j + 1, &mgr->payload_mask);
  1494. }
  1495. }
  1496. memset(&mgr->payloads[mgr->max_payloads - 1], 0, sizeof(struct drm_dp_payload));
  1497. mgr->proposed_vcpis[mgr->max_payloads - 1] = NULL;
  1498. clear_bit(mgr->max_payloads, &mgr->payload_mask);
  1499. }
  1500. }
  1501. mutex_unlock(&mgr->payload_lock);
  1502. return 0;
  1503. }
  1504. EXPORT_SYMBOL(drm_dp_update_payload_part1);
  1505. /**
  1506. * drm_dp_update_payload_part2() - Execute payload update part 2
  1507. * @mgr: manager to use.
  1508. *
  1509. * This iterates over all proposed virtual channels, and tries to
  1510. * allocate space in the link for them. For 0->slots transitions,
  1511. * this step writes the remote VC payload commands. For slots->0
  1512. * this just resets some internal state.
  1513. */
  1514. int drm_dp_update_payload_part2(struct drm_dp_mst_topology_mgr *mgr)
  1515. {
  1516. struct drm_dp_mst_port *port;
  1517. int i;
  1518. int ret = 0;
  1519. mutex_lock(&mgr->payload_lock);
  1520. for (i = 0; i < mgr->max_payloads; i++) {
  1521. if (!mgr->proposed_vcpis[i])
  1522. continue;
  1523. port = container_of(mgr->proposed_vcpis[i], struct drm_dp_mst_port, vcpi);
  1524. DRM_DEBUG_KMS("payload %d %d\n", i, mgr->payloads[i].payload_state);
  1525. if (mgr->payloads[i].payload_state == DP_PAYLOAD_LOCAL) {
  1526. ret = drm_dp_create_payload_step2(mgr, port, mgr->proposed_vcpis[i]->vcpi, &mgr->payloads[i]);
  1527. } else if (mgr->payloads[i].payload_state == DP_PAYLOAD_DELETE_LOCAL) {
  1528. ret = drm_dp_destroy_payload_step2(mgr, mgr->proposed_vcpis[i]->vcpi, &mgr->payloads[i]);
  1529. }
  1530. if (ret) {
  1531. mutex_unlock(&mgr->payload_lock);
  1532. return ret;
  1533. }
  1534. }
  1535. mutex_unlock(&mgr->payload_lock);
  1536. return 0;
  1537. }
  1538. EXPORT_SYMBOL(drm_dp_update_payload_part2);
  1539. #if 0 /* unused as of yet */
  1540. static int drm_dp_send_dpcd_read(struct drm_dp_mst_topology_mgr *mgr,
  1541. struct drm_dp_mst_port *port,
  1542. int offset, int size)
  1543. {
  1544. int len;
  1545. struct drm_dp_sideband_msg_tx *txmsg;
  1546. txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL);
  1547. if (!txmsg)
  1548. return -ENOMEM;
  1549. len = build_dpcd_read(txmsg, port->port_num, 0, 8);
  1550. txmsg->dst = port->parent;
  1551. drm_dp_queue_down_tx(mgr, txmsg);
  1552. return 0;
  1553. }
  1554. #endif
  1555. static int drm_dp_send_dpcd_write(struct drm_dp_mst_topology_mgr *mgr,
  1556. struct drm_dp_mst_port *port,
  1557. int offset, int size, u8 *bytes)
  1558. {
  1559. int len;
  1560. int ret;
  1561. struct drm_dp_sideband_msg_tx *txmsg;
  1562. struct drm_dp_mst_branch *mstb;
  1563. mstb = drm_dp_get_validated_mstb_ref(mgr, port->parent);
  1564. if (!mstb)
  1565. return -EINVAL;
  1566. txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL);
  1567. if (!txmsg) {
  1568. ret = -ENOMEM;
  1569. goto fail_put;
  1570. }
  1571. len = build_dpcd_write(txmsg, port->port_num, offset, size, bytes);
  1572. txmsg->dst = mstb;
  1573. drm_dp_queue_down_tx(mgr, txmsg);
  1574. ret = drm_dp_mst_wait_tx_reply(mstb, txmsg);
  1575. if (ret > 0) {
  1576. if (txmsg->reply.reply_type == 1) {
  1577. ret = -EINVAL;
  1578. } else
  1579. ret = 0;
  1580. }
  1581. kfree(txmsg);
  1582. fail_put:
  1583. drm_dp_put_mst_branch_device(mstb);
  1584. return ret;
  1585. }
  1586. static int drm_dp_encode_up_ack_reply(struct drm_dp_sideband_msg_tx *msg, u8 req_type)
  1587. {
  1588. struct drm_dp_sideband_msg_reply_body reply;
  1589. reply.reply_type = 1;
  1590. reply.req_type = req_type;
  1591. drm_dp_encode_sideband_reply(&reply, msg);
  1592. return 0;
  1593. }
  1594. static int drm_dp_send_up_ack_reply(struct drm_dp_mst_topology_mgr *mgr,
  1595. struct drm_dp_mst_branch *mstb,
  1596. int req_type, int seqno, bool broadcast)
  1597. {
  1598. struct drm_dp_sideband_msg_tx *txmsg;
  1599. txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL);
  1600. if (!txmsg)
  1601. return -ENOMEM;
  1602. txmsg->dst = mstb;
  1603. txmsg->seqno = seqno;
  1604. drm_dp_encode_up_ack_reply(txmsg, req_type);
  1605. mutex_lock(&mgr->qlock);
  1606. list_add_tail(&txmsg->next, &mgr->tx_msg_upq);
  1607. if (!mgr->tx_up_in_progress) {
  1608. process_single_up_tx_qlock(mgr);
  1609. }
  1610. mutex_unlock(&mgr->qlock);
  1611. return 0;
  1612. }
  1613. static bool drm_dp_get_vc_payload_bw(int dp_link_bw,
  1614. int dp_link_count,
  1615. int *out)
  1616. {
  1617. switch (dp_link_bw) {
  1618. default:
  1619. DRM_DEBUG_KMS("invalid link bandwidth in DPCD: %x (link count: %d)\n",
  1620. dp_link_bw, dp_link_count);
  1621. return false;
  1622. case DP_LINK_BW_1_62:
  1623. *out = 3 * dp_link_count;
  1624. break;
  1625. case DP_LINK_BW_2_7:
  1626. *out = 5 * dp_link_count;
  1627. break;
  1628. case DP_LINK_BW_5_4:
  1629. *out = 10 * dp_link_count;
  1630. break;
  1631. }
  1632. return true;
  1633. }
  1634. /**
  1635. * drm_dp_mst_topology_mgr_set_mst() - Set the MST state for a topology manager
  1636. * @mgr: manager to set state for
  1637. * @mst_state: true to enable MST on this connector - false to disable.
  1638. *
  1639. * This is called by the driver when it detects an MST capable device plugged
  1640. * into a DP MST capable port, or when a DP MST capable device is unplugged.
  1641. */
  1642. int drm_dp_mst_topology_mgr_set_mst(struct drm_dp_mst_topology_mgr *mgr, bool mst_state)
  1643. {
  1644. int ret = 0;
  1645. struct drm_dp_mst_branch *mstb = NULL;
  1646. mutex_lock(&mgr->lock);
  1647. if (mst_state == mgr->mst_state)
  1648. goto out_unlock;
  1649. mgr->mst_state = mst_state;
  1650. /* set the device into MST mode */
  1651. if (mst_state) {
  1652. WARN_ON(mgr->mst_primary);
  1653. /* get dpcd info */
  1654. ret = drm_dp_dpcd_read(mgr->aux, DP_DPCD_REV, mgr->dpcd, DP_RECEIVER_CAP_SIZE);
  1655. if (ret != DP_RECEIVER_CAP_SIZE) {
  1656. DRM_DEBUG_KMS("failed to read DPCD\n");
  1657. goto out_unlock;
  1658. }
  1659. if (!drm_dp_get_vc_payload_bw(mgr->dpcd[1],
  1660. mgr->dpcd[2] & DP_MAX_LANE_COUNT_MASK,
  1661. &mgr->pbn_div)) {
  1662. ret = -EINVAL;
  1663. goto out_unlock;
  1664. }
  1665. mgr->total_pbn = 2560;
  1666. mgr->total_slots = DIV_ROUND_UP(mgr->total_pbn, mgr->pbn_div);
  1667. mgr->avail_slots = mgr->total_slots;
  1668. /* add initial branch device at LCT 1 */
  1669. mstb = drm_dp_add_mst_branch_device(1, NULL);
  1670. if (mstb == NULL) {
  1671. ret = -ENOMEM;
  1672. goto out_unlock;
  1673. }
  1674. mstb->mgr = mgr;
  1675. /* give this the main reference */
  1676. mgr->mst_primary = mstb;
  1677. kref_get(&mgr->mst_primary->kref);
  1678. {
  1679. struct drm_dp_payload reset_pay;
  1680. reset_pay.start_slot = 0;
  1681. reset_pay.num_slots = 0x3f;
  1682. drm_dp_dpcd_write_payload(mgr, 0, &reset_pay);
  1683. }
  1684. ret = drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL,
  1685. DP_MST_EN | DP_UP_REQ_EN | DP_UPSTREAM_IS_SRC);
  1686. if (ret < 0) {
  1687. goto out_unlock;
  1688. }
  1689. /* sort out guid */
  1690. ret = drm_dp_dpcd_read(mgr->aux, DP_GUID, mgr->guid, 16);
  1691. if (ret != 16) {
  1692. DRM_DEBUG_KMS("failed to read DP GUID %d\n", ret);
  1693. goto out_unlock;
  1694. }
  1695. mgr->guid_valid = drm_dp_validate_guid(mgr, mgr->guid);
  1696. if (!mgr->guid_valid) {
  1697. ret = drm_dp_dpcd_write(mgr->aux, DP_GUID, mgr->guid, 16);
  1698. mgr->guid_valid = true;
  1699. }
  1700. queue_work(system_long_wq, &mgr->work);
  1701. ret = 0;
  1702. } else {
  1703. /* disable MST on the device */
  1704. mstb = mgr->mst_primary;
  1705. mgr->mst_primary = NULL;
  1706. /* this can fail if the device is gone */
  1707. drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL, 0);
  1708. ret = 0;
  1709. memset(mgr->payloads, 0, mgr->max_payloads * sizeof(struct drm_dp_payload));
  1710. mgr->payload_mask = 0;
  1711. set_bit(0, &mgr->payload_mask);
  1712. mgr->vcpi_mask = 0;
  1713. }
  1714. out_unlock:
  1715. mutex_unlock(&mgr->lock);
  1716. if (mstb)
  1717. drm_dp_put_mst_branch_device(mstb);
  1718. return ret;
  1719. }
  1720. EXPORT_SYMBOL(drm_dp_mst_topology_mgr_set_mst);
  1721. /**
  1722. * drm_dp_mst_topology_mgr_suspend() - suspend the MST manager
  1723. * @mgr: manager to suspend
  1724. *
  1725. * This function tells the MST device that we can't handle UP messages
  1726. * anymore. This should stop it from sending any since we are suspended.
  1727. */
  1728. void drm_dp_mst_topology_mgr_suspend(struct drm_dp_mst_topology_mgr *mgr)
  1729. {
  1730. mutex_lock(&mgr->lock);
  1731. drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL,
  1732. DP_MST_EN | DP_UPSTREAM_IS_SRC);
  1733. mutex_unlock(&mgr->lock);
  1734. }
  1735. EXPORT_SYMBOL(drm_dp_mst_topology_mgr_suspend);
  1736. /**
  1737. * drm_dp_mst_topology_mgr_resume() - resume the MST manager
  1738. * @mgr: manager to resume
  1739. *
  1740. * This will fetch DPCD and see if the device is still there,
  1741. * if it is, it will rewrite the MSTM control bits, and return.
  1742. *
  1743. * if the device fails this returns -1, and the driver should do
  1744. * a full MST reprobe, in case we were undocked.
  1745. */
  1746. int drm_dp_mst_topology_mgr_resume(struct drm_dp_mst_topology_mgr *mgr)
  1747. {
  1748. int ret = 0;
  1749. mutex_lock(&mgr->lock);
  1750. if (mgr->mst_primary) {
  1751. int sret;
  1752. sret = drm_dp_dpcd_read(mgr->aux, DP_DPCD_REV, mgr->dpcd, DP_RECEIVER_CAP_SIZE);
  1753. if (sret != DP_RECEIVER_CAP_SIZE) {
  1754. DRM_DEBUG_KMS("dpcd read failed - undocked during suspend?\n");
  1755. ret = -1;
  1756. goto out_unlock;
  1757. }
  1758. ret = drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL,
  1759. DP_MST_EN | DP_UP_REQ_EN | DP_UPSTREAM_IS_SRC);
  1760. if (ret < 0) {
  1761. DRM_DEBUG_KMS("mst write failed - undocked during suspend?\n");
  1762. ret = -1;
  1763. goto out_unlock;
  1764. }
  1765. ret = 0;
  1766. } else
  1767. ret = -1;
  1768. out_unlock:
  1769. mutex_unlock(&mgr->lock);
  1770. return ret;
  1771. }
  1772. EXPORT_SYMBOL(drm_dp_mst_topology_mgr_resume);
  1773. static void drm_dp_get_one_sb_msg(struct drm_dp_mst_topology_mgr *mgr, bool up)
  1774. {
  1775. int len;
  1776. u8 replyblock[32];
  1777. int replylen, origlen, curreply;
  1778. int ret;
  1779. struct drm_dp_sideband_msg_rx *msg;
  1780. int basereg = up ? DP_SIDEBAND_MSG_UP_REQ_BASE : DP_SIDEBAND_MSG_DOWN_REP_BASE;
  1781. msg = up ? &mgr->up_req_recv : &mgr->down_rep_recv;
  1782. len = min(mgr->max_dpcd_transaction_bytes, 16);
  1783. ret = drm_dp_dpcd_read(mgr->aux, basereg,
  1784. replyblock, len);
  1785. if (ret != len) {
  1786. DRM_DEBUG_KMS("failed to read DPCD down rep %d %d\n", len, ret);
  1787. return;
  1788. }
  1789. ret = drm_dp_sideband_msg_build(msg, replyblock, len, true);
  1790. if (!ret) {
  1791. DRM_DEBUG_KMS("sideband msg build failed %d\n", replyblock[0]);
  1792. return;
  1793. }
  1794. replylen = msg->curchunk_len + msg->curchunk_hdrlen;
  1795. origlen = replylen;
  1796. replylen -= len;
  1797. curreply = len;
  1798. while (replylen > 0) {
  1799. len = min3(replylen, mgr->max_dpcd_transaction_bytes, 16);
  1800. ret = drm_dp_dpcd_read(mgr->aux, basereg + curreply,
  1801. replyblock, len);
  1802. if (ret != len) {
  1803. DRM_DEBUG_KMS("failed to read a chunk\n");
  1804. }
  1805. ret = drm_dp_sideband_msg_build(msg, replyblock, len, false);
  1806. if (ret == false)
  1807. DRM_DEBUG_KMS("failed to build sideband msg\n");
  1808. curreply += len;
  1809. replylen -= len;
  1810. }
  1811. }
  1812. static int drm_dp_mst_handle_down_rep(struct drm_dp_mst_topology_mgr *mgr)
  1813. {
  1814. int ret = 0;
  1815. drm_dp_get_one_sb_msg(mgr, false);
  1816. if (mgr->down_rep_recv.have_eomt) {
  1817. struct drm_dp_sideband_msg_tx *txmsg;
  1818. struct drm_dp_mst_branch *mstb;
  1819. int slot = -1;
  1820. mstb = drm_dp_get_mst_branch_device(mgr,
  1821. mgr->down_rep_recv.initial_hdr.lct,
  1822. mgr->down_rep_recv.initial_hdr.rad);
  1823. if (!mstb) {
  1824. DRM_DEBUG_KMS("Got MST reply from unknown device %d\n", mgr->down_rep_recv.initial_hdr.lct);
  1825. memset(&mgr->down_rep_recv, 0, sizeof(struct drm_dp_sideband_msg_rx));
  1826. return 0;
  1827. }
  1828. /* find the message */
  1829. slot = mgr->down_rep_recv.initial_hdr.seqno;
  1830. mutex_lock(&mgr->qlock);
  1831. txmsg = mstb->tx_slots[slot];
  1832. /* remove from slots */
  1833. mutex_unlock(&mgr->qlock);
  1834. if (!txmsg) {
  1835. DRM_DEBUG_KMS("Got MST reply with no msg %p %d %d %02x %02x\n",
  1836. mstb,
  1837. mgr->down_rep_recv.initial_hdr.seqno,
  1838. mgr->down_rep_recv.initial_hdr.lct,
  1839. mgr->down_rep_recv.initial_hdr.rad[0],
  1840. mgr->down_rep_recv.msg[0]);
  1841. drm_dp_put_mst_branch_device(mstb);
  1842. memset(&mgr->down_rep_recv, 0, sizeof(struct drm_dp_sideband_msg_rx));
  1843. return 0;
  1844. }
  1845. drm_dp_sideband_parse_reply(&mgr->down_rep_recv, &txmsg->reply);
  1846. if (txmsg->reply.reply_type == 1) {
  1847. DRM_DEBUG_KMS("Got NAK reply: req 0x%02x, reason 0x%02x, nak data 0x%02x\n", txmsg->reply.req_type, txmsg->reply.u.nak.reason, txmsg->reply.u.nak.nak_data);
  1848. }
  1849. memset(&mgr->down_rep_recv, 0, sizeof(struct drm_dp_sideband_msg_rx));
  1850. drm_dp_put_mst_branch_device(mstb);
  1851. mutex_lock(&mgr->qlock);
  1852. txmsg->state = DRM_DP_SIDEBAND_TX_RX;
  1853. mstb->tx_slots[slot] = NULL;
  1854. mutex_unlock(&mgr->qlock);
  1855. wake_up(&mgr->tx_waitq);
  1856. }
  1857. return ret;
  1858. }
  1859. static int drm_dp_mst_handle_up_req(struct drm_dp_mst_topology_mgr *mgr)
  1860. {
  1861. int ret = 0;
  1862. drm_dp_get_one_sb_msg(mgr, true);
  1863. if (mgr->up_req_recv.have_eomt) {
  1864. struct drm_dp_sideband_msg_req_body msg;
  1865. struct drm_dp_mst_branch *mstb;
  1866. bool seqno;
  1867. mstb = drm_dp_get_mst_branch_device(mgr,
  1868. mgr->up_req_recv.initial_hdr.lct,
  1869. mgr->up_req_recv.initial_hdr.rad);
  1870. if (!mstb) {
  1871. DRM_DEBUG_KMS("Got MST reply from unknown device %d\n", mgr->up_req_recv.initial_hdr.lct);
  1872. memset(&mgr->up_req_recv, 0, sizeof(struct drm_dp_sideband_msg_rx));
  1873. return 0;
  1874. }
  1875. seqno = mgr->up_req_recv.initial_hdr.seqno;
  1876. drm_dp_sideband_parse_req(&mgr->up_req_recv, &msg);
  1877. if (msg.req_type == DP_CONNECTION_STATUS_NOTIFY) {
  1878. drm_dp_send_up_ack_reply(mgr, mstb, msg.req_type, seqno, false);
  1879. drm_dp_update_port(mstb, &msg.u.conn_stat);
  1880. DRM_DEBUG_KMS("Got CSN: pn: %d ldps:%d ddps: %d mcs: %d ip: %d pdt: %d\n", msg.u.conn_stat.port_number, msg.u.conn_stat.legacy_device_plug_status, msg.u.conn_stat.displayport_device_plug_status, msg.u.conn_stat.message_capability_status, msg.u.conn_stat.input_port, msg.u.conn_stat.peer_device_type);
  1881. (*mgr->cbs->hotplug)(mgr);
  1882. } else if (msg.req_type == DP_RESOURCE_STATUS_NOTIFY) {
  1883. drm_dp_send_up_ack_reply(mgr, mstb, msg.req_type, seqno, false);
  1884. DRM_DEBUG_KMS("Got RSN: pn: %d avail_pbn %d\n", msg.u.resource_stat.port_number, msg.u.resource_stat.available_pbn);
  1885. }
  1886. drm_dp_put_mst_branch_device(mstb);
  1887. memset(&mgr->up_req_recv, 0, sizeof(struct drm_dp_sideband_msg_rx));
  1888. }
  1889. return ret;
  1890. }
  1891. /**
  1892. * drm_dp_mst_hpd_irq() - MST hotplug IRQ notify
  1893. * @mgr: manager to notify irq for.
  1894. * @esi: 4 bytes from SINK_COUNT_ESI
  1895. * @handled: whether the hpd interrupt was consumed or not
  1896. *
  1897. * This should be called from the driver when it detects a short IRQ,
  1898. * along with the value of the DEVICE_SERVICE_IRQ_VECTOR_ESI0. The
  1899. * topology manager will process the sideband messages received as a result
  1900. * of this.
  1901. */
  1902. int drm_dp_mst_hpd_irq(struct drm_dp_mst_topology_mgr *mgr, u8 *esi, bool *handled)
  1903. {
  1904. int ret = 0;
  1905. int sc;
  1906. *handled = false;
  1907. sc = esi[0] & 0x3f;
  1908. if (sc != mgr->sink_count) {
  1909. mgr->sink_count = sc;
  1910. *handled = true;
  1911. }
  1912. if (esi[1] & DP_DOWN_REP_MSG_RDY) {
  1913. ret = drm_dp_mst_handle_down_rep(mgr);
  1914. *handled = true;
  1915. }
  1916. if (esi[1] & DP_UP_REQ_MSG_RDY) {
  1917. ret |= drm_dp_mst_handle_up_req(mgr);
  1918. *handled = true;
  1919. }
  1920. drm_dp_mst_kick_tx(mgr);
  1921. return ret;
  1922. }
  1923. EXPORT_SYMBOL(drm_dp_mst_hpd_irq);
  1924. /**
  1925. * drm_dp_mst_detect_port() - get connection status for an MST port
  1926. * @mgr: manager for this port
  1927. * @port: unverified pointer to a port
  1928. *
  1929. * This returns the current connection state for a port. It validates the
  1930. * port pointer still exists so the caller doesn't require a reference
  1931. */
  1932. enum drm_connector_status drm_dp_mst_detect_port(struct drm_connector *connector,
  1933. struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)
  1934. {
  1935. enum drm_connector_status status = connector_status_disconnected;
  1936. /* we need to search for the port in the mgr in case its gone */
  1937. port = drm_dp_get_validated_port_ref(mgr, port);
  1938. if (!port)
  1939. return connector_status_disconnected;
  1940. if (!port->ddps)
  1941. goto out;
  1942. switch (port->pdt) {
  1943. case DP_PEER_DEVICE_NONE:
  1944. case DP_PEER_DEVICE_MST_BRANCHING:
  1945. break;
  1946. case DP_PEER_DEVICE_SST_SINK:
  1947. status = connector_status_connected;
  1948. /* for logical ports - cache the EDID */
  1949. if (port->port_num >= 8 && !port->cached_edid) {
  1950. port->cached_edid = drm_get_edid(connector, &port->aux.ddc);
  1951. }
  1952. break;
  1953. case DP_PEER_DEVICE_DP_LEGACY_CONV:
  1954. if (port->ldps)
  1955. status = connector_status_connected;
  1956. break;
  1957. }
  1958. out:
  1959. drm_dp_put_port(port);
  1960. return status;
  1961. }
  1962. EXPORT_SYMBOL(drm_dp_mst_detect_port);
  1963. /**
  1964. * drm_dp_mst_get_edid() - get EDID for an MST port
  1965. * @connector: toplevel connector to get EDID for
  1966. * @mgr: manager for this port
  1967. * @port: unverified pointer to a port.
  1968. *
  1969. * This returns an EDID for the port connected to a connector,
  1970. * It validates the pointer still exists so the caller doesn't require a
  1971. * reference.
  1972. */
  1973. struct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)
  1974. {
  1975. struct edid *edid = NULL;
  1976. /* we need to search for the port in the mgr in case its gone */
  1977. port = drm_dp_get_validated_port_ref(mgr, port);
  1978. if (!port)
  1979. return NULL;
  1980. if (port->cached_edid)
  1981. edid = drm_edid_duplicate(port->cached_edid);
  1982. else
  1983. edid = drm_get_edid(connector, &port->aux.ddc);
  1984. drm_mode_connector_set_tile_property(connector);
  1985. drm_dp_put_port(port);
  1986. return edid;
  1987. }
  1988. EXPORT_SYMBOL(drm_dp_mst_get_edid);
  1989. /**
  1990. * drm_dp_find_vcpi_slots() - find slots for this PBN value
  1991. * @mgr: manager to use
  1992. * @pbn: payload bandwidth to convert into slots.
  1993. */
  1994. int drm_dp_find_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr,
  1995. int pbn)
  1996. {
  1997. int num_slots;
  1998. num_slots = DIV_ROUND_UP(pbn, mgr->pbn_div);
  1999. if (num_slots > mgr->avail_slots)
  2000. return -ENOSPC;
  2001. return num_slots;
  2002. }
  2003. EXPORT_SYMBOL(drm_dp_find_vcpi_slots);
  2004. static int drm_dp_init_vcpi(struct drm_dp_mst_topology_mgr *mgr,
  2005. struct drm_dp_vcpi *vcpi, int pbn)
  2006. {
  2007. int num_slots;
  2008. int ret;
  2009. num_slots = DIV_ROUND_UP(pbn, mgr->pbn_div);
  2010. if (num_slots > mgr->avail_slots)
  2011. return -ENOSPC;
  2012. vcpi->pbn = pbn;
  2013. vcpi->aligned_pbn = num_slots * mgr->pbn_div;
  2014. vcpi->num_slots = num_slots;
  2015. ret = drm_dp_mst_assign_payload_id(mgr, vcpi);
  2016. if (ret < 0)
  2017. return ret;
  2018. return 0;
  2019. }
  2020. /**
  2021. * drm_dp_mst_allocate_vcpi() - Allocate a virtual channel
  2022. * @mgr: manager for this port
  2023. * @port: port to allocate a virtual channel for.
  2024. * @pbn: payload bandwidth number to request
  2025. * @slots: returned number of slots for this PBN.
  2026. */
  2027. bool drm_dp_mst_allocate_vcpi(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, int pbn, int *slots)
  2028. {
  2029. int ret;
  2030. port = drm_dp_get_validated_port_ref(mgr, port);
  2031. if (!port)
  2032. return false;
  2033. if (port->vcpi.vcpi > 0) {
  2034. DRM_DEBUG_KMS("payload: vcpi %d already allocated for pbn %d - requested pbn %d\n", port->vcpi.vcpi, port->vcpi.pbn, pbn);
  2035. if (pbn == port->vcpi.pbn) {
  2036. *slots = port->vcpi.num_slots;
  2037. return true;
  2038. }
  2039. }
  2040. ret = drm_dp_init_vcpi(mgr, &port->vcpi, pbn);
  2041. if (ret) {
  2042. DRM_DEBUG_KMS("failed to init vcpi %d %d %d\n", DIV_ROUND_UP(pbn, mgr->pbn_div), mgr->avail_slots, ret);
  2043. goto out;
  2044. }
  2045. DRM_DEBUG_KMS("initing vcpi for %d %d\n", pbn, port->vcpi.num_slots);
  2046. *slots = port->vcpi.num_slots;
  2047. drm_dp_put_port(port);
  2048. return true;
  2049. out:
  2050. return false;
  2051. }
  2052. EXPORT_SYMBOL(drm_dp_mst_allocate_vcpi);
  2053. int drm_dp_mst_get_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)
  2054. {
  2055. int slots = 0;
  2056. port = drm_dp_get_validated_port_ref(mgr, port);
  2057. if (!port)
  2058. return slots;
  2059. slots = port->vcpi.num_slots;
  2060. drm_dp_put_port(port);
  2061. return slots;
  2062. }
  2063. EXPORT_SYMBOL(drm_dp_mst_get_vcpi_slots);
  2064. /**
  2065. * drm_dp_mst_reset_vcpi_slots() - Reset number of slots to 0 for VCPI
  2066. * @mgr: manager for this port
  2067. * @port: unverified pointer to a port.
  2068. *
  2069. * This just resets the number of slots for the ports VCPI for later programming.
  2070. */
  2071. void drm_dp_mst_reset_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)
  2072. {
  2073. port = drm_dp_get_validated_port_ref(mgr, port);
  2074. if (!port)
  2075. return;
  2076. port->vcpi.num_slots = 0;
  2077. drm_dp_put_port(port);
  2078. }
  2079. EXPORT_SYMBOL(drm_dp_mst_reset_vcpi_slots);
  2080. /**
  2081. * drm_dp_mst_deallocate_vcpi() - deallocate a VCPI
  2082. * @mgr: manager for this port
  2083. * @port: unverified port to deallocate vcpi for
  2084. */
  2085. void drm_dp_mst_deallocate_vcpi(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)
  2086. {
  2087. port = drm_dp_get_validated_port_ref(mgr, port);
  2088. if (!port)
  2089. return;
  2090. drm_dp_mst_put_payload_id(mgr, port->vcpi.vcpi);
  2091. port->vcpi.num_slots = 0;
  2092. port->vcpi.pbn = 0;
  2093. port->vcpi.aligned_pbn = 0;
  2094. port->vcpi.vcpi = 0;
  2095. drm_dp_put_port(port);
  2096. }
  2097. EXPORT_SYMBOL(drm_dp_mst_deallocate_vcpi);
  2098. static int drm_dp_dpcd_write_payload(struct drm_dp_mst_topology_mgr *mgr,
  2099. int id, struct drm_dp_payload *payload)
  2100. {
  2101. u8 payload_alloc[3], status;
  2102. int ret;
  2103. int retries = 0;
  2104. drm_dp_dpcd_writeb(mgr->aux, DP_PAYLOAD_TABLE_UPDATE_STATUS,
  2105. DP_PAYLOAD_TABLE_UPDATED);
  2106. payload_alloc[0] = id;
  2107. payload_alloc[1] = payload->start_slot;
  2108. payload_alloc[2] = payload->num_slots;
  2109. ret = drm_dp_dpcd_write(mgr->aux, DP_PAYLOAD_ALLOCATE_SET, payload_alloc, 3);
  2110. if (ret != 3) {
  2111. DRM_DEBUG_KMS("failed to write payload allocation %d\n", ret);
  2112. goto fail;
  2113. }
  2114. retry:
  2115. ret = drm_dp_dpcd_readb(mgr->aux, DP_PAYLOAD_TABLE_UPDATE_STATUS, &status);
  2116. if (ret < 0) {
  2117. DRM_DEBUG_KMS("failed to read payload table status %d\n", ret);
  2118. goto fail;
  2119. }
  2120. if (!(status & DP_PAYLOAD_TABLE_UPDATED)) {
  2121. retries++;
  2122. if (retries < 20) {
  2123. usleep_range(10000, 20000);
  2124. goto retry;
  2125. }
  2126. DRM_DEBUG_KMS("status not set after read payload table status %d\n", status);
  2127. ret = -EINVAL;
  2128. goto fail;
  2129. }
  2130. ret = 0;
  2131. fail:
  2132. return ret;
  2133. }
  2134. /**
  2135. * drm_dp_check_act_status() - Check ACT handled status.
  2136. * @mgr: manager to use
  2137. *
  2138. * Check the payload status bits in the DPCD for ACT handled completion.
  2139. */
  2140. int drm_dp_check_act_status(struct drm_dp_mst_topology_mgr *mgr)
  2141. {
  2142. u8 status;
  2143. int ret;
  2144. int count = 0;
  2145. do {
  2146. ret = drm_dp_dpcd_readb(mgr->aux, DP_PAYLOAD_TABLE_UPDATE_STATUS, &status);
  2147. if (ret < 0) {
  2148. DRM_DEBUG_KMS("failed to read payload table status %d\n", ret);
  2149. goto fail;
  2150. }
  2151. if (status & DP_PAYLOAD_ACT_HANDLED)
  2152. break;
  2153. count++;
  2154. udelay(100);
  2155. } while (count < 30);
  2156. if (!(status & DP_PAYLOAD_ACT_HANDLED)) {
  2157. DRM_DEBUG_KMS("failed to get ACT bit %d after %d retries\n", status, count);
  2158. ret = -EINVAL;
  2159. goto fail;
  2160. }
  2161. return 0;
  2162. fail:
  2163. return ret;
  2164. }
  2165. EXPORT_SYMBOL(drm_dp_check_act_status);
  2166. /**
  2167. * drm_dp_calc_pbn_mode() - Calculate the PBN for a mode.
  2168. * @clock: dot clock for the mode
  2169. * @bpp: bpp for the mode.
  2170. *
  2171. * This uses the formula in the spec to calculate the PBN value for a mode.
  2172. */
  2173. int drm_dp_calc_pbn_mode(int clock, int bpp)
  2174. {
  2175. fixed20_12 pix_bw;
  2176. fixed20_12 fbpp;
  2177. fixed20_12 result;
  2178. fixed20_12 margin, tmp;
  2179. u32 res;
  2180. pix_bw.full = dfixed_const(clock);
  2181. fbpp.full = dfixed_const(bpp);
  2182. tmp.full = dfixed_const(8);
  2183. fbpp.full = dfixed_div(fbpp, tmp);
  2184. result.full = dfixed_mul(pix_bw, fbpp);
  2185. margin.full = dfixed_const(54);
  2186. tmp.full = dfixed_const(64);
  2187. margin.full = dfixed_div(margin, tmp);
  2188. result.full = dfixed_div(result, margin);
  2189. margin.full = dfixed_const(1006);
  2190. tmp.full = dfixed_const(1000);
  2191. margin.full = dfixed_div(margin, tmp);
  2192. result.full = dfixed_mul(result, margin);
  2193. result.full = dfixed_div(result, tmp);
  2194. result.full = dfixed_ceil(result);
  2195. res = dfixed_trunc(result);
  2196. return res;
  2197. }
  2198. EXPORT_SYMBOL(drm_dp_calc_pbn_mode);
  2199. static int test_calc_pbn_mode(void)
  2200. {
  2201. int ret;
  2202. ret = drm_dp_calc_pbn_mode(154000, 30);
  2203. if (ret != 689)
  2204. return -EINVAL;
  2205. ret = drm_dp_calc_pbn_mode(234000, 30);
  2206. if (ret != 1047)
  2207. return -EINVAL;
  2208. return 0;
  2209. }
  2210. /* we want to kick the TX after we've ack the up/down IRQs. */
  2211. static void drm_dp_mst_kick_tx(struct drm_dp_mst_topology_mgr *mgr)
  2212. {
  2213. queue_work(system_long_wq, &mgr->tx_work);
  2214. }
  2215. static void drm_dp_mst_dump_mstb(struct seq_file *m,
  2216. struct drm_dp_mst_branch *mstb)
  2217. {
  2218. struct drm_dp_mst_port *port;
  2219. int tabs = mstb->lct;
  2220. char prefix[10];
  2221. int i;
  2222. for (i = 0; i < tabs; i++)
  2223. prefix[i] = '\t';
  2224. prefix[i] = '\0';
  2225. seq_printf(m, "%smst: %p, %d\n", prefix, mstb, mstb->num_ports);
  2226. list_for_each_entry(port, &mstb->ports, next) {
  2227. seq_printf(m, "%sport: %d: ddps: %d ldps: %d, %p, conn: %p\n", prefix, port->port_num, port->ddps, port->ldps, port, port->connector);
  2228. if (port->mstb)
  2229. drm_dp_mst_dump_mstb(m, port->mstb);
  2230. }
  2231. }
  2232. static bool dump_dp_payload_table(struct drm_dp_mst_topology_mgr *mgr,
  2233. char *buf)
  2234. {
  2235. int ret;
  2236. int i;
  2237. for (i = 0; i < 4; i++) {
  2238. ret = drm_dp_dpcd_read(mgr->aux, DP_PAYLOAD_TABLE_UPDATE_STATUS + (i * 16), &buf[i * 16], 16);
  2239. if (ret != 16)
  2240. break;
  2241. }
  2242. if (i == 4)
  2243. return true;
  2244. return false;
  2245. }
  2246. /**
  2247. * drm_dp_mst_dump_topology(): dump topology to seq file.
  2248. * @m: seq_file to dump output to
  2249. * @mgr: manager to dump current topology for.
  2250. *
  2251. * helper to dump MST topology to a seq file for debugfs.
  2252. */
  2253. void drm_dp_mst_dump_topology(struct seq_file *m,
  2254. struct drm_dp_mst_topology_mgr *mgr)
  2255. {
  2256. int i;
  2257. struct drm_dp_mst_port *port;
  2258. mutex_lock(&mgr->lock);
  2259. if (mgr->mst_primary)
  2260. drm_dp_mst_dump_mstb(m, mgr->mst_primary);
  2261. /* dump VCPIs */
  2262. mutex_unlock(&mgr->lock);
  2263. mutex_lock(&mgr->payload_lock);
  2264. seq_printf(m, "vcpi: %lx %lx\n", mgr->payload_mask, mgr->vcpi_mask);
  2265. for (i = 0; i < mgr->max_payloads; i++) {
  2266. if (mgr->proposed_vcpis[i]) {
  2267. port = container_of(mgr->proposed_vcpis[i], struct drm_dp_mst_port, vcpi);
  2268. seq_printf(m, "vcpi %d: %d %d %d\n", i, port->port_num, port->vcpi.vcpi, port->vcpi.num_slots);
  2269. } else
  2270. seq_printf(m, "vcpi %d:unsed\n", i);
  2271. }
  2272. for (i = 0; i < mgr->max_payloads; i++) {
  2273. seq_printf(m, "payload %d: %d, %d, %d\n",
  2274. i,
  2275. mgr->payloads[i].payload_state,
  2276. mgr->payloads[i].start_slot,
  2277. mgr->payloads[i].num_slots);
  2278. }
  2279. mutex_unlock(&mgr->payload_lock);
  2280. mutex_lock(&mgr->lock);
  2281. if (mgr->mst_primary) {
  2282. u8 buf[64];
  2283. bool bret;
  2284. int ret;
  2285. ret = drm_dp_dpcd_read(mgr->aux, DP_DPCD_REV, buf, DP_RECEIVER_CAP_SIZE);
  2286. seq_printf(m, "dpcd: ");
  2287. for (i = 0; i < DP_RECEIVER_CAP_SIZE; i++)
  2288. seq_printf(m, "%02x ", buf[i]);
  2289. seq_printf(m, "\n");
  2290. ret = drm_dp_dpcd_read(mgr->aux, DP_FAUX_CAP, buf, 2);
  2291. seq_printf(m, "faux/mst: ");
  2292. for (i = 0; i < 2; i++)
  2293. seq_printf(m, "%02x ", buf[i]);
  2294. seq_printf(m, "\n");
  2295. ret = drm_dp_dpcd_read(mgr->aux, DP_MSTM_CTRL, buf, 1);
  2296. seq_printf(m, "mst ctrl: ");
  2297. for (i = 0; i < 1; i++)
  2298. seq_printf(m, "%02x ", buf[i]);
  2299. seq_printf(m, "\n");
  2300. bret = dump_dp_payload_table(mgr, buf);
  2301. if (bret == true) {
  2302. seq_printf(m, "payload table: ");
  2303. for (i = 0; i < 63; i++)
  2304. seq_printf(m, "%02x ", buf[i]);
  2305. seq_printf(m, "\n");
  2306. }
  2307. }
  2308. mutex_unlock(&mgr->lock);
  2309. }
  2310. EXPORT_SYMBOL(drm_dp_mst_dump_topology);
  2311. static void drm_dp_tx_work(struct work_struct *work)
  2312. {
  2313. struct drm_dp_mst_topology_mgr *mgr = container_of(work, struct drm_dp_mst_topology_mgr, tx_work);
  2314. mutex_lock(&mgr->qlock);
  2315. if (mgr->tx_down_in_progress)
  2316. process_single_down_tx_qlock(mgr);
  2317. mutex_unlock(&mgr->qlock);
  2318. }
  2319. static void drm_dp_destroy_connector_work(struct work_struct *work)
  2320. {
  2321. struct drm_dp_mst_topology_mgr *mgr = container_of(work, struct drm_dp_mst_topology_mgr, destroy_connector_work);
  2322. struct drm_connector *connector;
  2323. /*
  2324. * Not a regular list traverse as we have to drop the destroy
  2325. * connector lock before destroying the connector, to avoid AB->BA
  2326. * ordering between this lock and the config mutex.
  2327. */
  2328. for (;;) {
  2329. mutex_lock(&mgr->destroy_connector_lock);
  2330. connector = list_first_entry_or_null(&mgr->destroy_connector_list, struct drm_connector, destroy_list);
  2331. if (!connector) {
  2332. mutex_unlock(&mgr->destroy_connector_lock);
  2333. break;
  2334. }
  2335. list_del(&connector->destroy_list);
  2336. mutex_unlock(&mgr->destroy_connector_lock);
  2337. mgr->cbs->destroy_connector(mgr, connector);
  2338. }
  2339. }
  2340. /**
  2341. * drm_dp_mst_topology_mgr_init - initialise a topology manager
  2342. * @mgr: manager struct to initialise
  2343. * @dev: device providing this structure - for i2c addition.
  2344. * @aux: DP helper aux channel to talk to this device
  2345. * @max_dpcd_transaction_bytes: hw specific DPCD transaction limit
  2346. * @max_payloads: maximum number of payloads this GPU can source
  2347. * @conn_base_id: the connector object ID the MST device is connected to.
  2348. *
  2349. * Return 0 for success, or negative error code on failure
  2350. */
  2351. int drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr,
  2352. struct device *dev, struct drm_dp_aux *aux,
  2353. int max_dpcd_transaction_bytes,
  2354. int max_payloads, int conn_base_id)
  2355. {
  2356. mutex_init(&mgr->lock);
  2357. mutex_init(&mgr->qlock);
  2358. mutex_init(&mgr->payload_lock);
  2359. mutex_init(&mgr->destroy_connector_lock);
  2360. INIT_LIST_HEAD(&mgr->tx_msg_upq);
  2361. INIT_LIST_HEAD(&mgr->tx_msg_downq);
  2362. INIT_LIST_HEAD(&mgr->destroy_connector_list);
  2363. INIT_WORK(&mgr->work, drm_dp_mst_link_probe_work);
  2364. INIT_WORK(&mgr->tx_work, drm_dp_tx_work);
  2365. INIT_WORK(&mgr->destroy_connector_work, drm_dp_destroy_connector_work);
  2366. init_waitqueue_head(&mgr->tx_waitq);
  2367. mgr->dev = dev;
  2368. mgr->aux = aux;
  2369. mgr->max_dpcd_transaction_bytes = max_dpcd_transaction_bytes;
  2370. mgr->max_payloads = max_payloads;
  2371. mgr->conn_base_id = conn_base_id;
  2372. mgr->payloads = kcalloc(max_payloads, sizeof(struct drm_dp_payload), GFP_KERNEL);
  2373. if (!mgr->payloads)
  2374. return -ENOMEM;
  2375. mgr->proposed_vcpis = kcalloc(max_payloads, sizeof(struct drm_dp_vcpi *), GFP_KERNEL);
  2376. if (!mgr->proposed_vcpis)
  2377. return -ENOMEM;
  2378. set_bit(0, &mgr->payload_mask);
  2379. test_calc_pbn_mode();
  2380. return 0;
  2381. }
  2382. EXPORT_SYMBOL(drm_dp_mst_topology_mgr_init);
  2383. /**
  2384. * drm_dp_mst_topology_mgr_destroy() - destroy topology manager.
  2385. * @mgr: manager to destroy
  2386. */
  2387. void drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr)
  2388. {
  2389. flush_work(&mgr->destroy_connector_work);
  2390. mutex_lock(&mgr->payload_lock);
  2391. kfree(mgr->payloads);
  2392. mgr->payloads = NULL;
  2393. kfree(mgr->proposed_vcpis);
  2394. mgr->proposed_vcpis = NULL;
  2395. mutex_unlock(&mgr->payload_lock);
  2396. mgr->dev = NULL;
  2397. mgr->aux = NULL;
  2398. }
  2399. EXPORT_SYMBOL(drm_dp_mst_topology_mgr_destroy);
  2400. /* I2C device */
  2401. static int drm_dp_mst_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
  2402. int num)
  2403. {
  2404. struct drm_dp_aux *aux = adapter->algo_data;
  2405. struct drm_dp_mst_port *port = container_of(aux, struct drm_dp_mst_port, aux);
  2406. struct drm_dp_mst_branch *mstb;
  2407. struct drm_dp_mst_topology_mgr *mgr = port->mgr;
  2408. unsigned int i;
  2409. bool reading = false;
  2410. struct drm_dp_sideband_msg_req_body msg;
  2411. struct drm_dp_sideband_msg_tx *txmsg = NULL;
  2412. int ret;
  2413. mstb = drm_dp_get_validated_mstb_ref(mgr, port->parent);
  2414. if (!mstb)
  2415. return -EREMOTEIO;
  2416. /* construct i2c msg */
  2417. /* see if last msg is a read */
  2418. if (msgs[num - 1].flags & I2C_M_RD)
  2419. reading = true;
  2420. if (!reading) {
  2421. DRM_DEBUG_KMS("Unsupported I2C transaction for MST device\n");
  2422. ret = -EIO;
  2423. goto out;
  2424. }
  2425. msg.req_type = DP_REMOTE_I2C_READ;
  2426. msg.u.i2c_read.num_transactions = num - 1;
  2427. msg.u.i2c_read.port_number = port->port_num;
  2428. for (i = 0; i < num - 1; i++) {
  2429. msg.u.i2c_read.transactions[i].i2c_dev_id = msgs[i].addr;
  2430. msg.u.i2c_read.transactions[i].num_bytes = msgs[i].len;
  2431. msg.u.i2c_read.transactions[i].bytes = msgs[i].buf;
  2432. }
  2433. msg.u.i2c_read.read_i2c_device_id = msgs[num - 1].addr;
  2434. msg.u.i2c_read.num_bytes_read = msgs[num - 1].len;
  2435. txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL);
  2436. if (!txmsg) {
  2437. ret = -ENOMEM;
  2438. goto out;
  2439. }
  2440. txmsg->dst = mstb;
  2441. drm_dp_encode_sideband_req(&msg, txmsg);
  2442. drm_dp_queue_down_tx(mgr, txmsg);
  2443. ret = drm_dp_mst_wait_tx_reply(mstb, txmsg);
  2444. if (ret > 0) {
  2445. if (txmsg->reply.reply_type == 1) { /* got a NAK back */
  2446. ret = -EREMOTEIO;
  2447. goto out;
  2448. }
  2449. if (txmsg->reply.u.remote_i2c_read_ack.num_bytes != msgs[num - 1].len) {
  2450. ret = -EIO;
  2451. goto out;
  2452. }
  2453. memcpy(msgs[num - 1].buf, txmsg->reply.u.remote_i2c_read_ack.bytes, msgs[num - 1].len);
  2454. ret = num;
  2455. }
  2456. out:
  2457. kfree(txmsg);
  2458. drm_dp_put_mst_branch_device(mstb);
  2459. return ret;
  2460. }
  2461. static u32 drm_dp_mst_i2c_functionality(struct i2c_adapter *adapter)
  2462. {
  2463. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
  2464. I2C_FUNC_SMBUS_READ_BLOCK_DATA |
  2465. I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
  2466. I2C_FUNC_10BIT_ADDR;
  2467. }
  2468. static const struct i2c_algorithm drm_dp_mst_i2c_algo = {
  2469. .functionality = drm_dp_mst_i2c_functionality,
  2470. .master_xfer = drm_dp_mst_i2c_xfer,
  2471. };
  2472. /**
  2473. * drm_dp_mst_register_i2c_bus() - register an I2C adapter for I2C-over-AUX
  2474. * @aux: DisplayPort AUX channel
  2475. *
  2476. * Returns 0 on success or a negative error code on failure.
  2477. */
  2478. static int drm_dp_mst_register_i2c_bus(struct drm_dp_aux *aux)
  2479. {
  2480. aux->ddc.algo = &drm_dp_mst_i2c_algo;
  2481. aux->ddc.algo_data = aux;
  2482. aux->ddc.retries = 3;
  2483. aux->ddc.class = I2C_CLASS_DDC;
  2484. aux->ddc.owner = THIS_MODULE;
  2485. aux->ddc.dev.parent = aux->dev;
  2486. aux->ddc.dev.of_node = aux->dev->of_node;
  2487. strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev),
  2488. sizeof(aux->ddc.name));
  2489. return i2c_add_adapter(&aux->ddc);
  2490. }
  2491. /**
  2492. * drm_dp_mst_unregister_i2c_bus() - unregister an I2C-over-AUX adapter
  2493. * @aux: DisplayPort AUX channel
  2494. */
  2495. static void drm_dp_mst_unregister_i2c_bus(struct drm_dp_aux *aux)
  2496. {
  2497. i2c_del_adapter(&aux->ddc);
  2498. }