vmwgfx_surface.c 50 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include <drm/ttm/ttm_placement.h>
  28. #include "vmwgfx_drv.h"
  29. #include "vmwgfx_resource_priv.h"
  30. #include "vmwgfx_so.h"
  31. #include "vmwgfx_binding.h"
  32. #include "device_include/svga3d_surfacedefs.h"
  33. #define SVGA3D_FLAGS_64(upper32, lower32) (((uint64_t)upper32 << 32) | lower32)
  34. #define SVGA3D_FLAGS_UPPER_32(svga3d_flags) (svga3d_flags >> 32)
  35. #define SVGA3D_FLAGS_LOWER_32(svga3d_flags) \
  36. (svga3d_flags & ((uint64_t)U32_MAX))
  37. /**
  38. * struct vmw_user_surface - User-space visible surface resource
  39. *
  40. * @base: The TTM base object handling user-space visibility.
  41. * @srf: The surface metadata.
  42. * @size: TTM accounting size for the surface.
  43. * @master: master of the creating client. Used for security check.
  44. */
  45. struct vmw_user_surface {
  46. struct ttm_prime_object prime;
  47. struct vmw_surface srf;
  48. uint32_t size;
  49. struct drm_master *master;
  50. struct ttm_base_object *backup_base;
  51. };
  52. /**
  53. * struct vmw_surface_offset - Backing store mip level offset info
  54. *
  55. * @face: Surface face.
  56. * @mip: Mip level.
  57. * @bo_offset: Offset into backing store of this mip level.
  58. *
  59. */
  60. struct vmw_surface_offset {
  61. uint32_t face;
  62. uint32_t mip;
  63. uint32_t bo_offset;
  64. };
  65. static void vmw_user_surface_free(struct vmw_resource *res);
  66. static struct vmw_resource *
  67. vmw_user_surface_base_to_res(struct ttm_base_object *base);
  68. static int vmw_legacy_srf_bind(struct vmw_resource *res,
  69. struct ttm_validate_buffer *val_buf);
  70. static int vmw_legacy_srf_unbind(struct vmw_resource *res,
  71. bool readback,
  72. struct ttm_validate_buffer *val_buf);
  73. static int vmw_legacy_srf_create(struct vmw_resource *res);
  74. static int vmw_legacy_srf_destroy(struct vmw_resource *res);
  75. static int vmw_gb_surface_create(struct vmw_resource *res);
  76. static int vmw_gb_surface_bind(struct vmw_resource *res,
  77. struct ttm_validate_buffer *val_buf);
  78. static int vmw_gb_surface_unbind(struct vmw_resource *res,
  79. bool readback,
  80. struct ttm_validate_buffer *val_buf);
  81. static int vmw_gb_surface_destroy(struct vmw_resource *res);
  82. static int
  83. vmw_gb_surface_define_internal(struct drm_device *dev,
  84. struct drm_vmw_gb_surface_create_ext_req *req,
  85. struct drm_vmw_gb_surface_create_rep *rep,
  86. struct drm_file *file_priv);
  87. static int
  88. vmw_gb_surface_reference_internal(struct drm_device *dev,
  89. struct drm_vmw_surface_arg *req,
  90. struct drm_vmw_gb_surface_ref_ext_rep *rep,
  91. struct drm_file *file_priv);
  92. static const struct vmw_user_resource_conv user_surface_conv = {
  93. .object_type = VMW_RES_SURFACE,
  94. .base_obj_to_res = vmw_user_surface_base_to_res,
  95. .res_free = vmw_user_surface_free
  96. };
  97. const struct vmw_user_resource_conv *user_surface_converter =
  98. &user_surface_conv;
  99. static uint64_t vmw_user_surface_size;
  100. static const struct vmw_res_func vmw_legacy_surface_func = {
  101. .res_type = vmw_res_surface,
  102. .needs_backup = false,
  103. .may_evict = true,
  104. .type_name = "legacy surfaces",
  105. .backup_placement = &vmw_srf_placement,
  106. .create = &vmw_legacy_srf_create,
  107. .destroy = &vmw_legacy_srf_destroy,
  108. .bind = &vmw_legacy_srf_bind,
  109. .unbind = &vmw_legacy_srf_unbind
  110. };
  111. static const struct vmw_res_func vmw_gb_surface_func = {
  112. .res_type = vmw_res_surface,
  113. .needs_backup = true,
  114. .may_evict = true,
  115. .type_name = "guest backed surfaces",
  116. .backup_placement = &vmw_mob_placement,
  117. .create = vmw_gb_surface_create,
  118. .destroy = vmw_gb_surface_destroy,
  119. .bind = vmw_gb_surface_bind,
  120. .unbind = vmw_gb_surface_unbind
  121. };
  122. /**
  123. * struct vmw_surface_dma - SVGA3D DMA command
  124. */
  125. struct vmw_surface_dma {
  126. SVGA3dCmdHeader header;
  127. SVGA3dCmdSurfaceDMA body;
  128. SVGA3dCopyBox cb;
  129. SVGA3dCmdSurfaceDMASuffix suffix;
  130. };
  131. /**
  132. * struct vmw_surface_define - SVGA3D Surface Define command
  133. */
  134. struct vmw_surface_define {
  135. SVGA3dCmdHeader header;
  136. SVGA3dCmdDefineSurface body;
  137. };
  138. /**
  139. * struct vmw_surface_destroy - SVGA3D Surface Destroy command
  140. */
  141. struct vmw_surface_destroy {
  142. SVGA3dCmdHeader header;
  143. SVGA3dCmdDestroySurface body;
  144. };
  145. /**
  146. * vmw_surface_dma_size - Compute fifo size for a dma command.
  147. *
  148. * @srf: Pointer to a struct vmw_surface
  149. *
  150. * Computes the required size for a surface dma command for backup or
  151. * restoration of the surface represented by @srf.
  152. */
  153. static inline uint32_t vmw_surface_dma_size(const struct vmw_surface *srf)
  154. {
  155. return srf->num_sizes * sizeof(struct vmw_surface_dma);
  156. }
  157. /**
  158. * vmw_surface_define_size - Compute fifo size for a surface define command.
  159. *
  160. * @srf: Pointer to a struct vmw_surface
  161. *
  162. * Computes the required size for a surface define command for the definition
  163. * of the surface represented by @srf.
  164. */
  165. static inline uint32_t vmw_surface_define_size(const struct vmw_surface *srf)
  166. {
  167. return sizeof(struct vmw_surface_define) + srf->num_sizes *
  168. sizeof(SVGA3dSize);
  169. }
  170. /**
  171. * vmw_surface_destroy_size - Compute fifo size for a surface destroy command.
  172. *
  173. * Computes the required size for a surface destroy command for the destruction
  174. * of a hw surface.
  175. */
  176. static inline uint32_t vmw_surface_destroy_size(void)
  177. {
  178. return sizeof(struct vmw_surface_destroy);
  179. }
  180. /**
  181. * vmw_surface_destroy_encode - Encode a surface_destroy command.
  182. *
  183. * @id: The surface id
  184. * @cmd_space: Pointer to memory area in which the commands should be encoded.
  185. */
  186. static void vmw_surface_destroy_encode(uint32_t id,
  187. void *cmd_space)
  188. {
  189. struct vmw_surface_destroy *cmd = (struct vmw_surface_destroy *)
  190. cmd_space;
  191. cmd->header.id = SVGA_3D_CMD_SURFACE_DESTROY;
  192. cmd->header.size = sizeof(cmd->body);
  193. cmd->body.sid = id;
  194. }
  195. /**
  196. * vmw_surface_define_encode - Encode a surface_define command.
  197. *
  198. * @srf: Pointer to a struct vmw_surface object.
  199. * @cmd_space: Pointer to memory area in which the commands should be encoded.
  200. */
  201. static void vmw_surface_define_encode(const struct vmw_surface *srf,
  202. void *cmd_space)
  203. {
  204. struct vmw_surface_define *cmd = (struct vmw_surface_define *)
  205. cmd_space;
  206. struct drm_vmw_size *src_size;
  207. SVGA3dSize *cmd_size;
  208. uint32_t cmd_len;
  209. int i;
  210. cmd_len = sizeof(cmd->body) + srf->num_sizes * sizeof(SVGA3dSize);
  211. cmd->header.id = SVGA_3D_CMD_SURFACE_DEFINE;
  212. cmd->header.size = cmd_len;
  213. cmd->body.sid = srf->res.id;
  214. /*
  215. * Downcast of surfaceFlags, was upcasted when received from user-space,
  216. * since driver internally stores as 64 bit.
  217. * For legacy surface define only 32 bit flag is supported.
  218. */
  219. cmd->body.surfaceFlags = (SVGA3dSurface1Flags)srf->flags;
  220. cmd->body.format = srf->format;
  221. for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i)
  222. cmd->body.face[i].numMipLevels = srf->mip_levels[i];
  223. cmd += 1;
  224. cmd_size = (SVGA3dSize *) cmd;
  225. src_size = srf->sizes;
  226. for (i = 0; i < srf->num_sizes; ++i, cmd_size++, src_size++) {
  227. cmd_size->width = src_size->width;
  228. cmd_size->height = src_size->height;
  229. cmd_size->depth = src_size->depth;
  230. }
  231. }
  232. /**
  233. * vmw_surface_dma_encode - Encode a surface_dma command.
  234. *
  235. * @srf: Pointer to a struct vmw_surface object.
  236. * @cmd_space: Pointer to memory area in which the commands should be encoded.
  237. * @ptr: Pointer to an SVGAGuestPtr indicating where the surface contents
  238. * should be placed or read from.
  239. * @to_surface: Boolean whether to DMA to the surface or from the surface.
  240. */
  241. static void vmw_surface_dma_encode(struct vmw_surface *srf,
  242. void *cmd_space,
  243. const SVGAGuestPtr *ptr,
  244. bool to_surface)
  245. {
  246. uint32_t i;
  247. struct vmw_surface_dma *cmd = (struct vmw_surface_dma *)cmd_space;
  248. const struct svga3d_surface_desc *desc =
  249. svga3dsurface_get_desc(srf->format);
  250. for (i = 0; i < srf->num_sizes; ++i) {
  251. SVGA3dCmdHeader *header = &cmd->header;
  252. SVGA3dCmdSurfaceDMA *body = &cmd->body;
  253. SVGA3dCopyBox *cb = &cmd->cb;
  254. SVGA3dCmdSurfaceDMASuffix *suffix = &cmd->suffix;
  255. const struct vmw_surface_offset *cur_offset = &srf->offsets[i];
  256. const struct drm_vmw_size *cur_size = &srf->sizes[i];
  257. header->id = SVGA_3D_CMD_SURFACE_DMA;
  258. header->size = sizeof(*body) + sizeof(*cb) + sizeof(*suffix);
  259. body->guest.ptr = *ptr;
  260. body->guest.ptr.offset += cur_offset->bo_offset;
  261. body->guest.pitch = svga3dsurface_calculate_pitch(desc,
  262. cur_size);
  263. body->host.sid = srf->res.id;
  264. body->host.face = cur_offset->face;
  265. body->host.mipmap = cur_offset->mip;
  266. body->transfer = ((to_surface) ? SVGA3D_WRITE_HOST_VRAM :
  267. SVGA3D_READ_HOST_VRAM);
  268. cb->x = 0;
  269. cb->y = 0;
  270. cb->z = 0;
  271. cb->srcx = 0;
  272. cb->srcy = 0;
  273. cb->srcz = 0;
  274. cb->w = cur_size->width;
  275. cb->h = cur_size->height;
  276. cb->d = cur_size->depth;
  277. suffix->suffixSize = sizeof(*suffix);
  278. suffix->maximumOffset =
  279. svga3dsurface_get_image_buffer_size(desc, cur_size,
  280. body->guest.pitch);
  281. suffix->flags.discard = 0;
  282. suffix->flags.unsynchronized = 0;
  283. suffix->flags.reserved = 0;
  284. ++cmd;
  285. }
  286. };
  287. /**
  288. * vmw_hw_surface_destroy - destroy a Device surface
  289. *
  290. * @res: Pointer to a struct vmw_resource embedded in a struct
  291. * vmw_surface.
  292. *
  293. * Destroys a the device surface associated with a struct vmw_surface if
  294. * any, and adjusts accounting and resource count accordingly.
  295. */
  296. static void vmw_hw_surface_destroy(struct vmw_resource *res)
  297. {
  298. struct vmw_private *dev_priv = res->dev_priv;
  299. struct vmw_surface *srf;
  300. void *cmd;
  301. if (res->func->destroy == vmw_gb_surface_destroy) {
  302. (void) vmw_gb_surface_destroy(res);
  303. return;
  304. }
  305. if (res->id != -1) {
  306. cmd = vmw_fifo_reserve(dev_priv, vmw_surface_destroy_size());
  307. if (unlikely(!cmd)) {
  308. DRM_ERROR("Failed reserving FIFO space for surface "
  309. "destruction.\n");
  310. return;
  311. }
  312. vmw_surface_destroy_encode(res->id, cmd);
  313. vmw_fifo_commit(dev_priv, vmw_surface_destroy_size());
  314. /*
  315. * used_memory_size_atomic, or separate lock
  316. * to avoid taking dev_priv::cmdbuf_mutex in
  317. * the destroy path.
  318. */
  319. mutex_lock(&dev_priv->cmdbuf_mutex);
  320. srf = vmw_res_to_srf(res);
  321. dev_priv->used_memory_size -= res->backup_size;
  322. mutex_unlock(&dev_priv->cmdbuf_mutex);
  323. }
  324. }
  325. /**
  326. * vmw_legacy_srf_create - Create a device surface as part of the
  327. * resource validation process.
  328. *
  329. * @res: Pointer to a struct vmw_surface.
  330. *
  331. * If the surface doesn't have a hw id.
  332. *
  333. * Returns -EBUSY if there wasn't sufficient device resources to
  334. * complete the validation. Retry after freeing up resources.
  335. *
  336. * May return other errors if the kernel is out of guest resources.
  337. */
  338. static int vmw_legacy_srf_create(struct vmw_resource *res)
  339. {
  340. struct vmw_private *dev_priv = res->dev_priv;
  341. struct vmw_surface *srf;
  342. uint32_t submit_size;
  343. uint8_t *cmd;
  344. int ret;
  345. if (likely(res->id != -1))
  346. return 0;
  347. srf = vmw_res_to_srf(res);
  348. if (unlikely(dev_priv->used_memory_size + res->backup_size >=
  349. dev_priv->memory_size))
  350. return -EBUSY;
  351. /*
  352. * Alloc id for the resource.
  353. */
  354. ret = vmw_resource_alloc_id(res);
  355. if (unlikely(ret != 0)) {
  356. DRM_ERROR("Failed to allocate a surface id.\n");
  357. goto out_no_id;
  358. }
  359. if (unlikely(res->id >= SVGA3D_MAX_SURFACE_IDS)) {
  360. ret = -EBUSY;
  361. goto out_no_fifo;
  362. }
  363. /*
  364. * Encode surface define- commands.
  365. */
  366. submit_size = vmw_surface_define_size(srf);
  367. cmd = vmw_fifo_reserve(dev_priv, submit_size);
  368. if (unlikely(!cmd)) {
  369. DRM_ERROR("Failed reserving FIFO space for surface "
  370. "creation.\n");
  371. ret = -ENOMEM;
  372. goto out_no_fifo;
  373. }
  374. vmw_surface_define_encode(srf, cmd);
  375. vmw_fifo_commit(dev_priv, submit_size);
  376. vmw_fifo_resource_inc(dev_priv);
  377. /*
  378. * Surface memory usage accounting.
  379. */
  380. dev_priv->used_memory_size += res->backup_size;
  381. return 0;
  382. out_no_fifo:
  383. vmw_resource_release_id(res);
  384. out_no_id:
  385. return ret;
  386. }
  387. /**
  388. * vmw_legacy_srf_dma - Copy backup data to or from a legacy surface.
  389. *
  390. * @res: Pointer to a struct vmw_res embedded in a struct
  391. * vmw_surface.
  392. * @val_buf: Pointer to a struct ttm_validate_buffer containing
  393. * information about the backup buffer.
  394. * @bind: Boolean wether to DMA to the surface.
  395. *
  396. * Transfer backup data to or from a legacy surface as part of the
  397. * validation process.
  398. * May return other errors if the kernel is out of guest resources.
  399. * The backup buffer will be fenced or idle upon successful completion,
  400. * and if the surface needs persistent backup storage, the backup buffer
  401. * will also be returned reserved iff @bind is true.
  402. */
  403. static int vmw_legacy_srf_dma(struct vmw_resource *res,
  404. struct ttm_validate_buffer *val_buf,
  405. bool bind)
  406. {
  407. SVGAGuestPtr ptr;
  408. struct vmw_fence_obj *fence;
  409. uint32_t submit_size;
  410. struct vmw_surface *srf = vmw_res_to_srf(res);
  411. uint8_t *cmd;
  412. struct vmw_private *dev_priv = res->dev_priv;
  413. BUG_ON(!val_buf->bo);
  414. submit_size = vmw_surface_dma_size(srf);
  415. cmd = vmw_fifo_reserve(dev_priv, submit_size);
  416. if (unlikely(!cmd)) {
  417. DRM_ERROR("Failed reserving FIFO space for surface "
  418. "DMA.\n");
  419. return -ENOMEM;
  420. }
  421. vmw_bo_get_guest_ptr(val_buf->bo, &ptr);
  422. vmw_surface_dma_encode(srf, cmd, &ptr, bind);
  423. vmw_fifo_commit(dev_priv, submit_size);
  424. /*
  425. * Create a fence object and fence the backup buffer.
  426. */
  427. (void) vmw_execbuf_fence_commands(NULL, dev_priv,
  428. &fence, NULL);
  429. vmw_bo_fence_single(val_buf->bo, fence);
  430. if (likely(fence != NULL))
  431. vmw_fence_obj_unreference(&fence);
  432. return 0;
  433. }
  434. /**
  435. * vmw_legacy_srf_bind - Perform a legacy surface bind as part of the
  436. * surface validation process.
  437. *
  438. * @res: Pointer to a struct vmw_res embedded in a struct
  439. * vmw_surface.
  440. * @val_buf: Pointer to a struct ttm_validate_buffer containing
  441. * information about the backup buffer.
  442. *
  443. * This function will copy backup data to the surface if the
  444. * backup buffer is dirty.
  445. */
  446. static int vmw_legacy_srf_bind(struct vmw_resource *res,
  447. struct ttm_validate_buffer *val_buf)
  448. {
  449. if (!res->backup_dirty)
  450. return 0;
  451. return vmw_legacy_srf_dma(res, val_buf, true);
  452. }
  453. /**
  454. * vmw_legacy_srf_unbind - Perform a legacy surface unbind as part of the
  455. * surface eviction process.
  456. *
  457. * @res: Pointer to a struct vmw_res embedded in a struct
  458. * vmw_surface.
  459. * @val_buf: Pointer to a struct ttm_validate_buffer containing
  460. * information about the backup buffer.
  461. *
  462. * This function will copy backup data from the surface.
  463. */
  464. static int vmw_legacy_srf_unbind(struct vmw_resource *res,
  465. bool readback,
  466. struct ttm_validate_buffer *val_buf)
  467. {
  468. if (unlikely(readback))
  469. return vmw_legacy_srf_dma(res, val_buf, false);
  470. return 0;
  471. }
  472. /**
  473. * vmw_legacy_srf_destroy - Destroy a device surface as part of a
  474. * resource eviction process.
  475. *
  476. * @res: Pointer to a struct vmw_res embedded in a struct
  477. * vmw_surface.
  478. */
  479. static int vmw_legacy_srf_destroy(struct vmw_resource *res)
  480. {
  481. struct vmw_private *dev_priv = res->dev_priv;
  482. uint32_t submit_size;
  483. uint8_t *cmd;
  484. BUG_ON(res->id == -1);
  485. /*
  486. * Encode the dma- and surface destroy commands.
  487. */
  488. submit_size = vmw_surface_destroy_size();
  489. cmd = vmw_fifo_reserve(dev_priv, submit_size);
  490. if (unlikely(!cmd)) {
  491. DRM_ERROR("Failed reserving FIFO space for surface "
  492. "eviction.\n");
  493. return -ENOMEM;
  494. }
  495. vmw_surface_destroy_encode(res->id, cmd);
  496. vmw_fifo_commit(dev_priv, submit_size);
  497. /*
  498. * Surface memory usage accounting.
  499. */
  500. dev_priv->used_memory_size -= res->backup_size;
  501. /*
  502. * Release the surface ID.
  503. */
  504. vmw_resource_release_id(res);
  505. vmw_fifo_resource_dec(dev_priv);
  506. return 0;
  507. }
  508. /**
  509. * vmw_surface_init - initialize a struct vmw_surface
  510. *
  511. * @dev_priv: Pointer to a device private struct.
  512. * @srf: Pointer to the struct vmw_surface to initialize.
  513. * @res_free: Pointer to a resource destructor used to free
  514. * the object.
  515. */
  516. static int vmw_surface_init(struct vmw_private *dev_priv,
  517. struct vmw_surface *srf,
  518. void (*res_free) (struct vmw_resource *res))
  519. {
  520. int ret;
  521. struct vmw_resource *res = &srf->res;
  522. BUG_ON(!res_free);
  523. ret = vmw_resource_init(dev_priv, res, true, res_free,
  524. (dev_priv->has_mob) ? &vmw_gb_surface_func :
  525. &vmw_legacy_surface_func);
  526. if (unlikely(ret != 0)) {
  527. res_free(res);
  528. return ret;
  529. }
  530. /*
  531. * The surface won't be visible to hardware until a
  532. * surface validate.
  533. */
  534. INIT_LIST_HEAD(&srf->view_list);
  535. vmw_resource_activate(res, vmw_hw_surface_destroy);
  536. return ret;
  537. }
  538. /**
  539. * vmw_user_surface_base_to_res - TTM base object to resource converter for
  540. * user visible surfaces
  541. *
  542. * @base: Pointer to a TTM base object
  543. *
  544. * Returns the struct vmw_resource embedded in a struct vmw_surface
  545. * for the user-visible object identified by the TTM base object @base.
  546. */
  547. static struct vmw_resource *
  548. vmw_user_surface_base_to_res(struct ttm_base_object *base)
  549. {
  550. return &(container_of(base, struct vmw_user_surface,
  551. prime.base)->srf.res);
  552. }
  553. /**
  554. * vmw_user_surface_free - User visible surface resource destructor
  555. *
  556. * @res: A struct vmw_resource embedded in a struct vmw_surface.
  557. */
  558. static void vmw_user_surface_free(struct vmw_resource *res)
  559. {
  560. struct vmw_surface *srf = vmw_res_to_srf(res);
  561. struct vmw_user_surface *user_srf =
  562. container_of(srf, struct vmw_user_surface, srf);
  563. struct vmw_private *dev_priv = srf->res.dev_priv;
  564. uint32_t size = user_srf->size;
  565. if (user_srf->master)
  566. drm_master_put(&user_srf->master);
  567. kfree(srf->offsets);
  568. kfree(srf->sizes);
  569. kfree(srf->snooper.image);
  570. ttm_prime_object_kfree(user_srf, prime);
  571. ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
  572. }
  573. /**
  574. * vmw_user_surface_free - User visible surface TTM base object destructor
  575. *
  576. * @p_base: Pointer to a pointer to a TTM base object
  577. * embedded in a struct vmw_user_surface.
  578. *
  579. * Drops the base object's reference on its resource, and the
  580. * pointer pointed to by *p_base is set to NULL.
  581. */
  582. static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
  583. {
  584. struct ttm_base_object *base = *p_base;
  585. struct vmw_user_surface *user_srf =
  586. container_of(base, struct vmw_user_surface, prime.base);
  587. struct vmw_resource *res = &user_srf->srf.res;
  588. *p_base = NULL;
  589. if (user_srf->backup_base)
  590. ttm_base_object_unref(&user_srf->backup_base);
  591. vmw_resource_unreference(&res);
  592. }
  593. /**
  594. * vmw_user_surface_destroy_ioctl - Ioctl function implementing
  595. * the user surface destroy functionality.
  596. *
  597. * @dev: Pointer to a struct drm_device.
  598. * @data: Pointer to data copied from / to user-space.
  599. * @file_priv: Pointer to a drm file private structure.
  600. */
  601. int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,
  602. struct drm_file *file_priv)
  603. {
  604. struct drm_vmw_surface_arg *arg = (struct drm_vmw_surface_arg *)data;
  605. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  606. return ttm_ref_object_base_unref(tfile, arg->sid, TTM_REF_USAGE);
  607. }
  608. /**
  609. * vmw_user_surface_define_ioctl - Ioctl function implementing
  610. * the user surface define functionality.
  611. *
  612. * @dev: Pointer to a struct drm_device.
  613. * @data: Pointer to data copied from / to user-space.
  614. * @file_priv: Pointer to a drm file private structure.
  615. */
  616. int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
  617. struct drm_file *file_priv)
  618. {
  619. struct vmw_private *dev_priv = vmw_priv(dev);
  620. struct vmw_user_surface *user_srf;
  621. struct vmw_surface *srf;
  622. struct vmw_resource *res;
  623. struct vmw_resource *tmp;
  624. union drm_vmw_surface_create_arg *arg =
  625. (union drm_vmw_surface_create_arg *)data;
  626. struct drm_vmw_surface_create_req *req = &arg->req;
  627. struct drm_vmw_surface_arg *rep = &arg->rep;
  628. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  629. struct ttm_operation_ctx ctx = {
  630. .interruptible = true,
  631. .no_wait_gpu = false
  632. };
  633. int ret;
  634. int i, j;
  635. uint32_t cur_bo_offset;
  636. struct drm_vmw_size *cur_size;
  637. struct vmw_surface_offset *cur_offset;
  638. uint32_t num_sizes;
  639. uint32_t size;
  640. const struct svga3d_surface_desc *desc;
  641. if (unlikely(vmw_user_surface_size == 0))
  642. vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
  643. 128;
  644. num_sizes = 0;
  645. for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
  646. if (req->mip_levels[i] > DRM_VMW_MAX_MIP_LEVELS)
  647. return -EINVAL;
  648. num_sizes += req->mip_levels[i];
  649. }
  650. if (num_sizes > DRM_VMW_MAX_SURFACE_FACES * DRM_VMW_MAX_MIP_LEVELS ||
  651. num_sizes == 0)
  652. return -EINVAL;
  653. size = vmw_user_surface_size + 128 +
  654. ttm_round_pot(num_sizes * sizeof(struct drm_vmw_size)) +
  655. ttm_round_pot(num_sizes * sizeof(struct vmw_surface_offset));
  656. desc = svga3dsurface_get_desc(req->format);
  657. if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
  658. DRM_ERROR("Invalid surface format for surface creation.\n");
  659. DRM_ERROR("Format requested is: %d\n", req->format);
  660. return -EINVAL;
  661. }
  662. ret = ttm_read_lock(&dev_priv->reservation_sem, true);
  663. if (unlikely(ret != 0))
  664. return ret;
  665. ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
  666. size, &ctx);
  667. if (unlikely(ret != 0)) {
  668. if (ret != -ERESTARTSYS)
  669. DRM_ERROR("Out of graphics memory for surface"
  670. " creation.\n");
  671. goto out_unlock;
  672. }
  673. user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
  674. if (unlikely(!user_srf)) {
  675. ret = -ENOMEM;
  676. goto out_no_user_srf;
  677. }
  678. srf = &user_srf->srf;
  679. res = &srf->res;
  680. /* Driver internally stores as 64-bit flags */
  681. srf->flags = (SVGA3dSurfaceAllFlags)req->flags;
  682. srf->format = req->format;
  683. srf->scanout = req->scanout;
  684. memcpy(srf->mip_levels, req->mip_levels, sizeof(srf->mip_levels));
  685. srf->num_sizes = num_sizes;
  686. user_srf->size = size;
  687. srf->sizes = memdup_user((struct drm_vmw_size __user *)(unsigned long)
  688. req->size_addr,
  689. sizeof(*srf->sizes) * srf->num_sizes);
  690. if (IS_ERR(srf->sizes)) {
  691. ret = PTR_ERR(srf->sizes);
  692. goto out_no_sizes;
  693. }
  694. srf->offsets = kmalloc_array(srf->num_sizes,
  695. sizeof(*srf->offsets),
  696. GFP_KERNEL);
  697. if (unlikely(!srf->offsets)) {
  698. ret = -ENOMEM;
  699. goto out_no_offsets;
  700. }
  701. srf->base_size = *srf->sizes;
  702. srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
  703. srf->multisample_count = 0;
  704. srf->multisample_pattern = SVGA3D_MS_PATTERN_NONE;
  705. srf->quality_level = SVGA3D_MS_QUALITY_NONE;
  706. cur_bo_offset = 0;
  707. cur_offset = srf->offsets;
  708. cur_size = srf->sizes;
  709. for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
  710. for (j = 0; j < srf->mip_levels[i]; ++j) {
  711. uint32_t stride = svga3dsurface_calculate_pitch
  712. (desc, cur_size);
  713. cur_offset->face = i;
  714. cur_offset->mip = j;
  715. cur_offset->bo_offset = cur_bo_offset;
  716. cur_bo_offset += svga3dsurface_get_image_buffer_size
  717. (desc, cur_size, stride);
  718. ++cur_offset;
  719. ++cur_size;
  720. }
  721. }
  722. res->backup_size = cur_bo_offset;
  723. if (srf->scanout &&
  724. srf->num_sizes == 1 &&
  725. srf->sizes[0].width == 64 &&
  726. srf->sizes[0].height == 64 &&
  727. srf->format == SVGA3D_A8R8G8B8) {
  728. srf->snooper.image = kzalloc(64 * 64 * 4, GFP_KERNEL);
  729. if (!srf->snooper.image) {
  730. DRM_ERROR("Failed to allocate cursor_image\n");
  731. ret = -ENOMEM;
  732. goto out_no_copy;
  733. }
  734. } else {
  735. srf->snooper.image = NULL;
  736. }
  737. user_srf->prime.base.shareable = false;
  738. user_srf->prime.base.tfile = NULL;
  739. if (drm_is_primary_client(file_priv))
  740. user_srf->master = drm_master_get(file_priv->master);
  741. /**
  742. * From this point, the generic resource management functions
  743. * destroy the object on failure.
  744. */
  745. ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
  746. if (unlikely(ret != 0))
  747. goto out_unlock;
  748. /*
  749. * A gb-aware client referencing a shared surface will
  750. * expect a backup buffer to be present.
  751. */
  752. if (dev_priv->has_mob && req->shareable) {
  753. uint32_t backup_handle;
  754. ret = vmw_user_bo_alloc(dev_priv, tfile,
  755. res->backup_size,
  756. true,
  757. &backup_handle,
  758. &res->backup,
  759. &user_srf->backup_base);
  760. if (unlikely(ret != 0)) {
  761. vmw_resource_unreference(&res);
  762. goto out_unlock;
  763. }
  764. }
  765. tmp = vmw_resource_reference(&srf->res);
  766. ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
  767. req->shareable, VMW_RES_SURFACE,
  768. &vmw_user_surface_base_release, NULL);
  769. if (unlikely(ret != 0)) {
  770. vmw_resource_unreference(&tmp);
  771. vmw_resource_unreference(&res);
  772. goto out_unlock;
  773. }
  774. rep->sid = user_srf->prime.base.hash.key;
  775. vmw_resource_unreference(&res);
  776. ttm_read_unlock(&dev_priv->reservation_sem);
  777. return 0;
  778. out_no_copy:
  779. kfree(srf->offsets);
  780. out_no_offsets:
  781. kfree(srf->sizes);
  782. out_no_sizes:
  783. ttm_prime_object_kfree(user_srf, prime);
  784. out_no_user_srf:
  785. ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
  786. out_unlock:
  787. ttm_read_unlock(&dev_priv->reservation_sem);
  788. return ret;
  789. }
  790. static int
  791. vmw_surface_handle_reference(struct vmw_private *dev_priv,
  792. struct drm_file *file_priv,
  793. uint32_t u_handle,
  794. enum drm_vmw_handle_type handle_type,
  795. struct ttm_base_object **base_p)
  796. {
  797. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  798. struct vmw_user_surface *user_srf;
  799. uint32_t handle;
  800. struct ttm_base_object *base;
  801. int ret;
  802. bool require_exist = false;
  803. if (handle_type == DRM_VMW_HANDLE_PRIME) {
  804. ret = ttm_prime_fd_to_handle(tfile, u_handle, &handle);
  805. if (unlikely(ret != 0))
  806. return ret;
  807. } else {
  808. if (unlikely(drm_is_render_client(file_priv)))
  809. require_exist = true;
  810. if (READ_ONCE(vmw_fpriv(file_priv)->locked_master)) {
  811. DRM_ERROR("Locked master refused legacy "
  812. "surface reference.\n");
  813. return -EACCES;
  814. }
  815. handle = u_handle;
  816. }
  817. ret = -EINVAL;
  818. base = ttm_base_object_lookup_for_ref(dev_priv->tdev, handle);
  819. if (unlikely(!base)) {
  820. DRM_ERROR("Could not find surface to reference.\n");
  821. goto out_no_lookup;
  822. }
  823. if (unlikely(ttm_base_object_type(base) != VMW_RES_SURFACE)) {
  824. DRM_ERROR("Referenced object is not a surface.\n");
  825. goto out_bad_resource;
  826. }
  827. if (handle_type != DRM_VMW_HANDLE_PRIME) {
  828. user_srf = container_of(base, struct vmw_user_surface,
  829. prime.base);
  830. /*
  831. * Make sure the surface creator has the same
  832. * authenticating master, or is already registered with us.
  833. */
  834. if (drm_is_primary_client(file_priv) &&
  835. user_srf->master != file_priv->master)
  836. require_exist = true;
  837. ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL,
  838. require_exist);
  839. if (unlikely(ret != 0)) {
  840. DRM_ERROR("Could not add a reference to a surface.\n");
  841. goto out_bad_resource;
  842. }
  843. }
  844. *base_p = base;
  845. return 0;
  846. out_bad_resource:
  847. ttm_base_object_unref(&base);
  848. out_no_lookup:
  849. if (handle_type == DRM_VMW_HANDLE_PRIME)
  850. (void) ttm_ref_object_base_unref(tfile, handle, TTM_REF_USAGE);
  851. return ret;
  852. }
  853. /**
  854. * vmw_user_surface_define_ioctl - Ioctl function implementing
  855. * the user surface reference functionality.
  856. *
  857. * @dev: Pointer to a struct drm_device.
  858. * @data: Pointer to data copied from / to user-space.
  859. * @file_priv: Pointer to a drm file private structure.
  860. */
  861. int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
  862. struct drm_file *file_priv)
  863. {
  864. struct vmw_private *dev_priv = vmw_priv(dev);
  865. union drm_vmw_surface_reference_arg *arg =
  866. (union drm_vmw_surface_reference_arg *)data;
  867. struct drm_vmw_surface_arg *req = &arg->req;
  868. struct drm_vmw_surface_create_req *rep = &arg->rep;
  869. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  870. struct vmw_surface *srf;
  871. struct vmw_user_surface *user_srf;
  872. struct drm_vmw_size __user *user_sizes;
  873. struct ttm_base_object *base;
  874. int ret;
  875. ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
  876. req->handle_type, &base);
  877. if (unlikely(ret != 0))
  878. return ret;
  879. user_srf = container_of(base, struct vmw_user_surface, prime.base);
  880. srf = &user_srf->srf;
  881. /* Downcast of flags when sending back to user space */
  882. rep->flags = (uint32_t)srf->flags;
  883. rep->format = srf->format;
  884. memcpy(rep->mip_levels, srf->mip_levels, sizeof(srf->mip_levels));
  885. user_sizes = (struct drm_vmw_size __user *)(unsigned long)
  886. rep->size_addr;
  887. if (user_sizes)
  888. ret = copy_to_user(user_sizes, &srf->base_size,
  889. sizeof(srf->base_size));
  890. if (unlikely(ret != 0)) {
  891. DRM_ERROR("copy_to_user failed %p %u\n",
  892. user_sizes, srf->num_sizes);
  893. ttm_ref_object_base_unref(tfile, base->hash.key, TTM_REF_USAGE);
  894. ret = -EFAULT;
  895. }
  896. ttm_base_object_unref(&base);
  897. return ret;
  898. }
  899. /**
  900. * vmw_surface_define_encode - Encode a surface_define command.
  901. *
  902. * @srf: Pointer to a struct vmw_surface object.
  903. * @cmd_space: Pointer to memory area in which the commands should be encoded.
  904. */
  905. static int vmw_gb_surface_create(struct vmw_resource *res)
  906. {
  907. struct vmw_private *dev_priv = res->dev_priv;
  908. struct vmw_surface *srf = vmw_res_to_srf(res);
  909. uint32_t cmd_len, cmd_id, submit_len;
  910. int ret;
  911. struct {
  912. SVGA3dCmdHeader header;
  913. SVGA3dCmdDefineGBSurface body;
  914. } *cmd;
  915. struct {
  916. SVGA3dCmdHeader header;
  917. SVGA3dCmdDefineGBSurface_v2 body;
  918. } *cmd2;
  919. struct {
  920. SVGA3dCmdHeader header;
  921. SVGA3dCmdDefineGBSurface_v3 body;
  922. } *cmd3;
  923. if (likely(res->id != -1))
  924. return 0;
  925. vmw_fifo_resource_inc(dev_priv);
  926. ret = vmw_resource_alloc_id(res);
  927. if (unlikely(ret != 0)) {
  928. DRM_ERROR("Failed to allocate a surface id.\n");
  929. goto out_no_id;
  930. }
  931. if (unlikely(res->id >= VMWGFX_NUM_GB_SURFACE)) {
  932. ret = -EBUSY;
  933. goto out_no_fifo;
  934. }
  935. if (dev_priv->has_sm4_1 && srf->array_size > 0) {
  936. cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V3;
  937. cmd_len = sizeof(cmd3->body);
  938. submit_len = sizeof(*cmd3);
  939. } else if (srf->array_size > 0) {
  940. /* has_dx checked on creation time. */
  941. cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V2;
  942. cmd_len = sizeof(cmd2->body);
  943. submit_len = sizeof(*cmd2);
  944. } else {
  945. cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE;
  946. cmd_len = sizeof(cmd->body);
  947. submit_len = sizeof(*cmd);
  948. }
  949. cmd = vmw_fifo_reserve(dev_priv, submit_len);
  950. cmd2 = (typeof(cmd2))cmd;
  951. cmd3 = (typeof(cmd3))cmd;
  952. if (unlikely(!cmd)) {
  953. DRM_ERROR("Failed reserving FIFO space for surface "
  954. "creation.\n");
  955. ret = -ENOMEM;
  956. goto out_no_fifo;
  957. }
  958. if (dev_priv->has_sm4_1 && srf->array_size > 0) {
  959. cmd3->header.id = cmd_id;
  960. cmd3->header.size = cmd_len;
  961. cmd3->body.sid = srf->res.id;
  962. cmd3->body.surfaceFlags = srf->flags;
  963. cmd3->body.format = srf->format;
  964. cmd3->body.numMipLevels = srf->mip_levels[0];
  965. cmd3->body.multisampleCount = srf->multisample_count;
  966. cmd3->body.multisamplePattern = srf->multisample_pattern;
  967. cmd3->body.qualityLevel = srf->quality_level;
  968. cmd3->body.autogenFilter = srf->autogen_filter;
  969. cmd3->body.size.width = srf->base_size.width;
  970. cmd3->body.size.height = srf->base_size.height;
  971. cmd3->body.size.depth = srf->base_size.depth;
  972. cmd3->body.arraySize = srf->array_size;
  973. } else if (srf->array_size > 0) {
  974. cmd2->header.id = cmd_id;
  975. cmd2->header.size = cmd_len;
  976. cmd2->body.sid = srf->res.id;
  977. cmd2->body.surfaceFlags = srf->flags;
  978. cmd2->body.format = srf->format;
  979. cmd2->body.numMipLevels = srf->mip_levels[0];
  980. cmd2->body.multisampleCount = srf->multisample_count;
  981. cmd2->body.autogenFilter = srf->autogen_filter;
  982. cmd2->body.size.width = srf->base_size.width;
  983. cmd2->body.size.height = srf->base_size.height;
  984. cmd2->body.size.depth = srf->base_size.depth;
  985. cmd2->body.arraySize = srf->array_size;
  986. } else {
  987. cmd->header.id = cmd_id;
  988. cmd->header.size = cmd_len;
  989. cmd->body.sid = srf->res.id;
  990. cmd->body.surfaceFlags = srf->flags;
  991. cmd->body.format = srf->format;
  992. cmd->body.numMipLevels = srf->mip_levels[0];
  993. cmd->body.multisampleCount = srf->multisample_count;
  994. cmd->body.autogenFilter = srf->autogen_filter;
  995. cmd->body.size.width = srf->base_size.width;
  996. cmd->body.size.height = srf->base_size.height;
  997. cmd->body.size.depth = srf->base_size.depth;
  998. }
  999. vmw_fifo_commit(dev_priv, submit_len);
  1000. return 0;
  1001. out_no_fifo:
  1002. vmw_resource_release_id(res);
  1003. out_no_id:
  1004. vmw_fifo_resource_dec(dev_priv);
  1005. return ret;
  1006. }
  1007. static int vmw_gb_surface_bind(struct vmw_resource *res,
  1008. struct ttm_validate_buffer *val_buf)
  1009. {
  1010. struct vmw_private *dev_priv = res->dev_priv;
  1011. struct {
  1012. SVGA3dCmdHeader header;
  1013. SVGA3dCmdBindGBSurface body;
  1014. } *cmd1;
  1015. struct {
  1016. SVGA3dCmdHeader header;
  1017. SVGA3dCmdUpdateGBSurface body;
  1018. } *cmd2;
  1019. uint32_t submit_size;
  1020. struct ttm_buffer_object *bo = val_buf->bo;
  1021. BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
  1022. submit_size = sizeof(*cmd1) + (res->backup_dirty ? sizeof(*cmd2) : 0);
  1023. cmd1 = vmw_fifo_reserve(dev_priv, submit_size);
  1024. if (unlikely(!cmd1)) {
  1025. DRM_ERROR("Failed reserving FIFO space for surface "
  1026. "binding.\n");
  1027. return -ENOMEM;
  1028. }
  1029. cmd1->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
  1030. cmd1->header.size = sizeof(cmd1->body);
  1031. cmd1->body.sid = res->id;
  1032. cmd1->body.mobid = bo->mem.start;
  1033. if (res->backup_dirty) {
  1034. cmd2 = (void *) &cmd1[1];
  1035. cmd2->header.id = SVGA_3D_CMD_UPDATE_GB_SURFACE;
  1036. cmd2->header.size = sizeof(cmd2->body);
  1037. cmd2->body.sid = res->id;
  1038. res->backup_dirty = false;
  1039. }
  1040. vmw_fifo_commit(dev_priv, submit_size);
  1041. return 0;
  1042. }
  1043. static int vmw_gb_surface_unbind(struct vmw_resource *res,
  1044. bool readback,
  1045. struct ttm_validate_buffer *val_buf)
  1046. {
  1047. struct vmw_private *dev_priv = res->dev_priv;
  1048. struct ttm_buffer_object *bo = val_buf->bo;
  1049. struct vmw_fence_obj *fence;
  1050. struct {
  1051. SVGA3dCmdHeader header;
  1052. SVGA3dCmdReadbackGBSurface body;
  1053. } *cmd1;
  1054. struct {
  1055. SVGA3dCmdHeader header;
  1056. SVGA3dCmdInvalidateGBSurface body;
  1057. } *cmd2;
  1058. struct {
  1059. SVGA3dCmdHeader header;
  1060. SVGA3dCmdBindGBSurface body;
  1061. } *cmd3;
  1062. uint32_t submit_size;
  1063. uint8_t *cmd;
  1064. BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
  1065. submit_size = sizeof(*cmd3) + (readback ? sizeof(*cmd1) : sizeof(*cmd2));
  1066. cmd = vmw_fifo_reserve(dev_priv, submit_size);
  1067. if (unlikely(!cmd)) {
  1068. DRM_ERROR("Failed reserving FIFO space for surface "
  1069. "unbinding.\n");
  1070. return -ENOMEM;
  1071. }
  1072. if (readback) {
  1073. cmd1 = (void *) cmd;
  1074. cmd1->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE;
  1075. cmd1->header.size = sizeof(cmd1->body);
  1076. cmd1->body.sid = res->id;
  1077. cmd3 = (void *) &cmd1[1];
  1078. } else {
  1079. cmd2 = (void *) cmd;
  1080. cmd2->header.id = SVGA_3D_CMD_INVALIDATE_GB_SURFACE;
  1081. cmd2->header.size = sizeof(cmd2->body);
  1082. cmd2->body.sid = res->id;
  1083. cmd3 = (void *) &cmd2[1];
  1084. }
  1085. cmd3->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
  1086. cmd3->header.size = sizeof(cmd3->body);
  1087. cmd3->body.sid = res->id;
  1088. cmd3->body.mobid = SVGA3D_INVALID_ID;
  1089. vmw_fifo_commit(dev_priv, submit_size);
  1090. /*
  1091. * Create a fence object and fence the backup buffer.
  1092. */
  1093. (void) vmw_execbuf_fence_commands(NULL, dev_priv,
  1094. &fence, NULL);
  1095. vmw_bo_fence_single(val_buf->bo, fence);
  1096. if (likely(fence != NULL))
  1097. vmw_fence_obj_unreference(&fence);
  1098. return 0;
  1099. }
  1100. static int vmw_gb_surface_destroy(struct vmw_resource *res)
  1101. {
  1102. struct vmw_private *dev_priv = res->dev_priv;
  1103. struct vmw_surface *srf = vmw_res_to_srf(res);
  1104. struct {
  1105. SVGA3dCmdHeader header;
  1106. SVGA3dCmdDestroyGBSurface body;
  1107. } *cmd;
  1108. if (likely(res->id == -1))
  1109. return 0;
  1110. mutex_lock(&dev_priv->binding_mutex);
  1111. vmw_view_surface_list_destroy(dev_priv, &srf->view_list);
  1112. vmw_binding_res_list_scrub(&res->binding_head);
  1113. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  1114. if (unlikely(!cmd)) {
  1115. DRM_ERROR("Failed reserving FIFO space for surface "
  1116. "destruction.\n");
  1117. mutex_unlock(&dev_priv->binding_mutex);
  1118. return -ENOMEM;
  1119. }
  1120. cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SURFACE;
  1121. cmd->header.size = sizeof(cmd->body);
  1122. cmd->body.sid = res->id;
  1123. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  1124. mutex_unlock(&dev_priv->binding_mutex);
  1125. vmw_resource_release_id(res);
  1126. vmw_fifo_resource_dec(dev_priv);
  1127. return 0;
  1128. }
  1129. /**
  1130. * vmw_gb_surface_define_ioctl - Ioctl function implementing
  1131. * the user surface define functionality.
  1132. *
  1133. * @dev: Pointer to a struct drm_device.
  1134. * @data: Pointer to data copied from / to user-space.
  1135. * @file_priv: Pointer to a drm file private structure.
  1136. */
  1137. int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data,
  1138. struct drm_file *file_priv)
  1139. {
  1140. union drm_vmw_gb_surface_create_arg *arg =
  1141. (union drm_vmw_gb_surface_create_arg *)data;
  1142. struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
  1143. struct drm_vmw_gb_surface_create_ext_req req_ext;
  1144. req_ext.base = arg->req;
  1145. req_ext.version = drm_vmw_gb_surface_v1;
  1146. req_ext.svga3d_flags_upper_32_bits = 0;
  1147. req_ext.multisample_pattern = SVGA3D_MS_PATTERN_NONE;
  1148. req_ext.quality_level = SVGA3D_MS_QUALITY_NONE;
  1149. req_ext.must_be_zero = 0;
  1150. return vmw_gb_surface_define_internal(dev, &req_ext, rep, file_priv);
  1151. }
  1152. /**
  1153. * vmw_gb_surface_reference_ioctl - Ioctl function implementing
  1154. * the user surface reference functionality.
  1155. *
  1156. * @dev: Pointer to a struct drm_device.
  1157. * @data: Pointer to data copied from / to user-space.
  1158. * @file_priv: Pointer to a drm file private structure.
  1159. */
  1160. int vmw_gb_surface_reference_ioctl(struct drm_device *dev, void *data,
  1161. struct drm_file *file_priv)
  1162. {
  1163. union drm_vmw_gb_surface_reference_arg *arg =
  1164. (union drm_vmw_gb_surface_reference_arg *)data;
  1165. struct drm_vmw_surface_arg *req = &arg->req;
  1166. struct drm_vmw_gb_surface_ref_rep *rep = &arg->rep;
  1167. struct drm_vmw_gb_surface_ref_ext_rep rep_ext;
  1168. int ret;
  1169. ret = vmw_gb_surface_reference_internal(dev, req, &rep_ext, file_priv);
  1170. if (unlikely(ret != 0))
  1171. return ret;
  1172. rep->creq = rep_ext.creq.base;
  1173. rep->crep = rep_ext.crep;
  1174. return ret;
  1175. }
  1176. /**
  1177. * vmw_surface_gb_priv_define - Define a private GB surface
  1178. *
  1179. * @dev: Pointer to a struct drm_device
  1180. * @user_accounting_size: Used to track user-space memory usage, set
  1181. * to 0 for kernel mode only memory
  1182. * @svga3d_flags: SVGA3d surface flags for the device
  1183. * @format: requested surface format
  1184. * @for_scanout: true if inteded to be used for scanout buffer
  1185. * @num_mip_levels: number of MIP levels
  1186. * @multisample_count:
  1187. * @array_size: Surface array size.
  1188. * @size: width, heigh, depth of the surface requested
  1189. * @multisample_pattern: Multisampling pattern when msaa is supported
  1190. * @quality_level: Precision settings
  1191. * @user_srf_out: allocated user_srf. Set to NULL on failure.
  1192. *
  1193. * GB surfaces allocated by this function will not have a user mode handle, and
  1194. * thus will only be visible to vmwgfx. For optimization reasons the
  1195. * surface may later be given a user mode handle by another function to make
  1196. * it available to user mode drivers.
  1197. */
  1198. int vmw_surface_gb_priv_define(struct drm_device *dev,
  1199. uint32_t user_accounting_size,
  1200. SVGA3dSurfaceAllFlags svga3d_flags,
  1201. SVGA3dSurfaceFormat format,
  1202. bool for_scanout,
  1203. uint32_t num_mip_levels,
  1204. uint32_t multisample_count,
  1205. uint32_t array_size,
  1206. struct drm_vmw_size size,
  1207. SVGA3dMSPattern multisample_pattern,
  1208. SVGA3dMSQualityLevel quality_level,
  1209. struct vmw_surface **srf_out)
  1210. {
  1211. struct vmw_private *dev_priv = vmw_priv(dev);
  1212. struct vmw_user_surface *user_srf;
  1213. struct ttm_operation_ctx ctx = {
  1214. .interruptible = true,
  1215. .no_wait_gpu = false
  1216. };
  1217. struct vmw_surface *srf;
  1218. int ret;
  1219. u32 num_layers = 1;
  1220. u32 sample_count = 1;
  1221. *srf_out = NULL;
  1222. if (for_scanout) {
  1223. uint32_t max_width, max_height;
  1224. if (!svga3dsurface_is_screen_target_format(format)) {
  1225. DRM_ERROR("Invalid Screen Target surface format.");
  1226. return -EINVAL;
  1227. }
  1228. max_width = min(dev_priv->texture_max_width,
  1229. dev_priv->stdu_max_width);
  1230. max_height = min(dev_priv->texture_max_height,
  1231. dev_priv->stdu_max_height);
  1232. if (size.width > max_width || size.height > max_height) {
  1233. DRM_ERROR("%ux%u\n, exceeds max surface size %ux%u",
  1234. size.width, size.height,
  1235. max_width, max_height);
  1236. return -EINVAL;
  1237. }
  1238. } else {
  1239. const struct svga3d_surface_desc *desc;
  1240. desc = svga3dsurface_get_desc(format);
  1241. if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
  1242. DRM_ERROR("Invalid surface format.\n");
  1243. return -EINVAL;
  1244. }
  1245. }
  1246. /* array_size must be null for non-GL3 host. */
  1247. if (array_size > 0 && !dev_priv->has_dx) {
  1248. DRM_ERROR("Tried to create DX surface on non-DX host.\n");
  1249. return -EINVAL;
  1250. }
  1251. ret = ttm_read_lock(&dev_priv->reservation_sem, true);
  1252. if (unlikely(ret != 0))
  1253. return ret;
  1254. ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
  1255. user_accounting_size, &ctx);
  1256. if (unlikely(ret != 0)) {
  1257. if (ret != -ERESTARTSYS)
  1258. DRM_ERROR("Out of graphics memory for surface"
  1259. " creation.\n");
  1260. goto out_unlock;
  1261. }
  1262. user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
  1263. if (unlikely(!user_srf)) {
  1264. ret = -ENOMEM;
  1265. goto out_no_user_srf;
  1266. }
  1267. *srf_out = &user_srf->srf;
  1268. user_srf->size = user_accounting_size;
  1269. user_srf->prime.base.shareable = false;
  1270. user_srf->prime.base.tfile = NULL;
  1271. srf = &user_srf->srf;
  1272. srf->flags = svga3d_flags;
  1273. srf->format = format;
  1274. srf->scanout = for_scanout;
  1275. srf->mip_levels[0] = num_mip_levels;
  1276. srf->num_sizes = 1;
  1277. srf->sizes = NULL;
  1278. srf->offsets = NULL;
  1279. srf->base_size = size;
  1280. srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
  1281. srf->array_size = array_size;
  1282. srf->multisample_count = multisample_count;
  1283. srf->multisample_pattern = multisample_pattern;
  1284. srf->quality_level = quality_level;
  1285. if (array_size)
  1286. num_layers = array_size;
  1287. else if (svga3d_flags & SVGA3D_SURFACE_CUBEMAP)
  1288. num_layers = SVGA3D_MAX_SURFACE_FACES;
  1289. if (srf->flags & SVGA3D_SURFACE_MULTISAMPLE)
  1290. sample_count = srf->multisample_count;
  1291. srf->res.backup_size =
  1292. svga3dsurface_get_serialized_size_extended(srf->format,
  1293. srf->base_size,
  1294. srf->mip_levels[0],
  1295. num_layers,
  1296. sample_count);
  1297. if (srf->flags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT)
  1298. srf->res.backup_size += sizeof(SVGA3dDXSOState);
  1299. if (dev_priv->active_display_unit == vmw_du_screen_target &&
  1300. for_scanout)
  1301. srf->flags |= SVGA3D_SURFACE_SCREENTARGET;
  1302. /*
  1303. * From this point, the generic resource management functions
  1304. * destroy the object on failure.
  1305. */
  1306. ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
  1307. ttm_read_unlock(&dev_priv->reservation_sem);
  1308. return ret;
  1309. out_no_user_srf:
  1310. ttm_mem_global_free(vmw_mem_glob(dev_priv), user_accounting_size);
  1311. out_unlock:
  1312. ttm_read_unlock(&dev_priv->reservation_sem);
  1313. return ret;
  1314. }
  1315. /**
  1316. * vmw_gb_surface_define_ext_ioctl - Ioctl function implementing
  1317. * the user surface define functionality.
  1318. *
  1319. * @dev: Pointer to a struct drm_device.
  1320. * @data: Pointer to data copied from / to user-space.
  1321. * @file_priv: Pointer to a drm file private structure.
  1322. */
  1323. int vmw_gb_surface_define_ext_ioctl(struct drm_device *dev, void *data,
  1324. struct drm_file *file_priv)
  1325. {
  1326. union drm_vmw_gb_surface_create_ext_arg *arg =
  1327. (union drm_vmw_gb_surface_create_ext_arg *)data;
  1328. struct drm_vmw_gb_surface_create_ext_req *req = &arg->req;
  1329. struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
  1330. return vmw_gb_surface_define_internal(dev, req, rep, file_priv);
  1331. }
  1332. /**
  1333. * vmw_gb_surface_reference_ext_ioctl - Ioctl function implementing
  1334. * the user surface reference functionality.
  1335. *
  1336. * @dev: Pointer to a struct drm_device.
  1337. * @data: Pointer to data copied from / to user-space.
  1338. * @file_priv: Pointer to a drm file private structure.
  1339. */
  1340. int vmw_gb_surface_reference_ext_ioctl(struct drm_device *dev, void *data,
  1341. struct drm_file *file_priv)
  1342. {
  1343. union drm_vmw_gb_surface_reference_ext_arg *arg =
  1344. (union drm_vmw_gb_surface_reference_ext_arg *)data;
  1345. struct drm_vmw_surface_arg *req = &arg->req;
  1346. struct drm_vmw_gb_surface_ref_ext_rep *rep = &arg->rep;
  1347. return vmw_gb_surface_reference_internal(dev, req, rep, file_priv);
  1348. }
  1349. /**
  1350. * vmw_gb_surface_define_internal - Ioctl function implementing
  1351. * the user surface define functionality.
  1352. *
  1353. * @dev: Pointer to a struct drm_device.
  1354. * @req: Request argument from user-space.
  1355. * @rep: Response argument to user-space.
  1356. * @file_priv: Pointer to a drm file private structure.
  1357. */
  1358. static int
  1359. vmw_gb_surface_define_internal(struct drm_device *dev,
  1360. struct drm_vmw_gb_surface_create_ext_req *req,
  1361. struct drm_vmw_gb_surface_create_rep *rep,
  1362. struct drm_file *file_priv)
  1363. {
  1364. struct vmw_private *dev_priv = vmw_priv(dev);
  1365. struct vmw_user_surface *user_srf;
  1366. struct vmw_surface *srf;
  1367. struct vmw_resource *res;
  1368. struct vmw_resource *tmp;
  1369. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  1370. int ret;
  1371. uint32_t size;
  1372. uint32_t backup_handle = 0;
  1373. SVGA3dSurfaceAllFlags svga3d_flags_64 =
  1374. SVGA3D_FLAGS_64(req->svga3d_flags_upper_32_bits,
  1375. req->base.svga3d_flags);
  1376. if (!dev_priv->has_sm4_1) {
  1377. /*
  1378. * If SM4_1 is not support then cannot send 64-bit flag to
  1379. * device.
  1380. */
  1381. if (req->svga3d_flags_upper_32_bits != 0)
  1382. return -EINVAL;
  1383. if (req->base.multisample_count != 0)
  1384. return -EINVAL;
  1385. if (req->multisample_pattern != SVGA3D_MS_PATTERN_NONE)
  1386. return -EINVAL;
  1387. if (req->quality_level != SVGA3D_MS_QUALITY_NONE)
  1388. return -EINVAL;
  1389. }
  1390. if ((svga3d_flags_64 & SVGA3D_SURFACE_MULTISAMPLE) &&
  1391. req->base.multisample_count == 0)
  1392. return -EINVAL;
  1393. if (req->base.mip_levels > DRM_VMW_MAX_MIP_LEVELS)
  1394. return -EINVAL;
  1395. if (unlikely(vmw_user_surface_size == 0))
  1396. vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
  1397. 128;
  1398. size = vmw_user_surface_size + 128;
  1399. /* Define a surface based on the parameters. */
  1400. ret = vmw_surface_gb_priv_define(dev,
  1401. size,
  1402. svga3d_flags_64,
  1403. req->base.format,
  1404. req->base.drm_surface_flags &
  1405. drm_vmw_surface_flag_scanout,
  1406. req->base.mip_levels,
  1407. req->base.multisample_count,
  1408. req->base.array_size,
  1409. req->base.base_size,
  1410. req->multisample_pattern,
  1411. req->quality_level,
  1412. &srf);
  1413. if (unlikely(ret != 0))
  1414. return ret;
  1415. user_srf = container_of(srf, struct vmw_user_surface, srf);
  1416. if (drm_is_primary_client(file_priv))
  1417. user_srf->master = drm_master_get(file_priv->master);
  1418. ret = ttm_read_lock(&dev_priv->reservation_sem, true);
  1419. if (unlikely(ret != 0))
  1420. return ret;
  1421. res = &user_srf->srf.res;
  1422. if (req->base.buffer_handle != SVGA3D_INVALID_ID) {
  1423. ret = vmw_user_bo_lookup(tfile, req->base.buffer_handle,
  1424. &res->backup,
  1425. &user_srf->backup_base);
  1426. if (ret == 0) {
  1427. if (res->backup->base.num_pages * PAGE_SIZE <
  1428. res->backup_size) {
  1429. DRM_ERROR("Surface backup buffer too small.\n");
  1430. vmw_bo_unreference(&res->backup);
  1431. ret = -EINVAL;
  1432. goto out_unlock;
  1433. } else {
  1434. backup_handle = req->base.buffer_handle;
  1435. }
  1436. }
  1437. } else if (req->base.drm_surface_flags &
  1438. drm_vmw_surface_flag_create_buffer)
  1439. ret = vmw_user_bo_alloc(dev_priv, tfile,
  1440. res->backup_size,
  1441. req->base.drm_surface_flags &
  1442. drm_vmw_surface_flag_shareable,
  1443. &backup_handle,
  1444. &res->backup,
  1445. &user_srf->backup_base);
  1446. if (unlikely(ret != 0)) {
  1447. vmw_resource_unreference(&res);
  1448. goto out_unlock;
  1449. }
  1450. tmp = vmw_resource_reference(res);
  1451. ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
  1452. req->base.drm_surface_flags &
  1453. drm_vmw_surface_flag_shareable,
  1454. VMW_RES_SURFACE,
  1455. &vmw_user_surface_base_release, NULL);
  1456. if (unlikely(ret != 0)) {
  1457. vmw_resource_unreference(&tmp);
  1458. vmw_resource_unreference(&res);
  1459. goto out_unlock;
  1460. }
  1461. rep->handle = user_srf->prime.base.hash.key;
  1462. rep->backup_size = res->backup_size;
  1463. if (res->backup) {
  1464. rep->buffer_map_handle =
  1465. drm_vma_node_offset_addr(&res->backup->base.vma_node);
  1466. rep->buffer_size = res->backup->base.num_pages * PAGE_SIZE;
  1467. rep->buffer_handle = backup_handle;
  1468. } else {
  1469. rep->buffer_map_handle = 0;
  1470. rep->buffer_size = 0;
  1471. rep->buffer_handle = SVGA3D_INVALID_ID;
  1472. }
  1473. vmw_resource_unreference(&res);
  1474. out_unlock:
  1475. ttm_read_unlock(&dev_priv->reservation_sem);
  1476. return ret;
  1477. }
  1478. /**
  1479. * vmw_gb_surface_reference_internal - Ioctl function implementing
  1480. * the user surface reference functionality.
  1481. *
  1482. * @dev: Pointer to a struct drm_device.
  1483. * @req: Pointer to user-space request surface arg.
  1484. * @rep: Pointer to response to user-space.
  1485. * @file_priv: Pointer to a drm file private structure.
  1486. */
  1487. static int
  1488. vmw_gb_surface_reference_internal(struct drm_device *dev,
  1489. struct drm_vmw_surface_arg *req,
  1490. struct drm_vmw_gb_surface_ref_ext_rep *rep,
  1491. struct drm_file *file_priv)
  1492. {
  1493. struct vmw_private *dev_priv = vmw_priv(dev);
  1494. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  1495. struct vmw_surface *srf;
  1496. struct vmw_user_surface *user_srf;
  1497. struct ttm_base_object *base;
  1498. uint32_t backup_handle;
  1499. int ret = -EINVAL;
  1500. ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
  1501. req->handle_type, &base);
  1502. if (unlikely(ret != 0))
  1503. return ret;
  1504. user_srf = container_of(base, struct vmw_user_surface, prime.base);
  1505. srf = &user_srf->srf;
  1506. if (!srf->res.backup) {
  1507. DRM_ERROR("Shared GB surface is missing a backup buffer.\n");
  1508. goto out_bad_resource;
  1509. }
  1510. mutex_lock(&dev_priv->cmdbuf_mutex); /* Protect res->backup */
  1511. ret = vmw_user_bo_reference(tfile, srf->res.backup, &backup_handle);
  1512. mutex_unlock(&dev_priv->cmdbuf_mutex);
  1513. if (unlikely(ret != 0)) {
  1514. DRM_ERROR("Could not add a reference to a GB surface "
  1515. "backup buffer.\n");
  1516. (void) ttm_ref_object_base_unref(tfile, base->hash.key,
  1517. TTM_REF_USAGE);
  1518. goto out_bad_resource;
  1519. }
  1520. rep->creq.base.svga3d_flags = SVGA3D_FLAGS_LOWER_32(srf->flags);
  1521. rep->creq.base.format = srf->format;
  1522. rep->creq.base.mip_levels = srf->mip_levels[0];
  1523. rep->creq.base.drm_surface_flags = 0;
  1524. rep->creq.base.multisample_count = srf->multisample_count;
  1525. rep->creq.base.autogen_filter = srf->autogen_filter;
  1526. rep->creq.base.array_size = srf->array_size;
  1527. rep->creq.base.buffer_handle = backup_handle;
  1528. rep->creq.base.base_size = srf->base_size;
  1529. rep->crep.handle = user_srf->prime.base.hash.key;
  1530. rep->crep.backup_size = srf->res.backup_size;
  1531. rep->crep.buffer_handle = backup_handle;
  1532. rep->crep.buffer_map_handle =
  1533. drm_vma_node_offset_addr(&srf->res.backup->base.vma_node);
  1534. rep->crep.buffer_size = srf->res.backup->base.num_pages * PAGE_SIZE;
  1535. rep->creq.version = drm_vmw_gb_surface_v1;
  1536. rep->creq.svga3d_flags_upper_32_bits =
  1537. SVGA3D_FLAGS_UPPER_32(srf->flags);
  1538. rep->creq.multisample_pattern = srf->multisample_pattern;
  1539. rep->creq.quality_level = srf->quality_level;
  1540. rep->creq.must_be_zero = 0;
  1541. out_bad_resource:
  1542. ttm_base_object_unref(&base);
  1543. return ret;
  1544. }