pci-sysfs.c 39 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include <linux/of.h>
  31. #include "pci.h"
  32. static int sysfs_initialized; /* = 0 */
  33. /* show configuration fields */
  34. #define pci_config_attr(field, format_string) \
  35. static ssize_t \
  36. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  37. { \
  38. struct pci_dev *pdev; \
  39. \
  40. pdev = to_pci_dev(dev); \
  41. return sprintf(buf, format_string, pdev->field); \
  42. } \
  43. static DEVICE_ATTR_RO(field)
  44. pci_config_attr(vendor, "0x%04x\n");
  45. pci_config_attr(device, "0x%04x\n");
  46. pci_config_attr(subsystem_vendor, "0x%04x\n");
  47. pci_config_attr(subsystem_device, "0x%04x\n");
  48. pci_config_attr(revision, "0x%02x\n");
  49. pci_config_attr(class, "0x%06x\n");
  50. pci_config_attr(irq, "%u\n");
  51. static ssize_t broken_parity_status_show(struct device *dev,
  52. struct device_attribute *attr,
  53. char *buf)
  54. {
  55. struct pci_dev *pdev = to_pci_dev(dev);
  56. return sprintf(buf, "%u\n", pdev->broken_parity_status);
  57. }
  58. static ssize_t broken_parity_status_store(struct device *dev,
  59. struct device_attribute *attr,
  60. const char *buf, size_t count)
  61. {
  62. struct pci_dev *pdev = to_pci_dev(dev);
  63. unsigned long val;
  64. if (kstrtoul(buf, 0, &val) < 0)
  65. return -EINVAL;
  66. pdev->broken_parity_status = !!val;
  67. return count;
  68. }
  69. static DEVICE_ATTR_RW(broken_parity_status);
  70. static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
  71. struct device_attribute *attr, char *buf)
  72. {
  73. const struct cpumask *mask;
  74. #ifdef CONFIG_NUMA
  75. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  76. cpumask_of_node(dev_to_node(dev));
  77. #else
  78. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  79. #endif
  80. return cpumap_print_to_pagebuf(list, buf, mask);
  81. }
  82. static ssize_t local_cpus_show(struct device *dev,
  83. struct device_attribute *attr, char *buf)
  84. {
  85. return pci_dev_show_local_cpu(dev, false, attr, buf);
  86. }
  87. static DEVICE_ATTR_RO(local_cpus);
  88. static ssize_t local_cpulist_show(struct device *dev,
  89. struct device_attribute *attr, char *buf)
  90. {
  91. return pci_dev_show_local_cpu(dev, true, attr, buf);
  92. }
  93. static DEVICE_ATTR_RO(local_cpulist);
  94. /*
  95. * PCI Bus Class Devices
  96. */
  97. static ssize_t cpuaffinity_show(struct device *dev,
  98. struct device_attribute *attr, char *buf)
  99. {
  100. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  101. return cpumap_print_to_pagebuf(false, buf, cpumask);
  102. }
  103. static DEVICE_ATTR_RO(cpuaffinity);
  104. static ssize_t cpulistaffinity_show(struct device *dev,
  105. struct device_attribute *attr, char *buf)
  106. {
  107. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  108. return cpumap_print_to_pagebuf(true, buf, cpumask);
  109. }
  110. static DEVICE_ATTR_RO(cpulistaffinity);
  111. /* show resources */
  112. static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
  113. char *buf)
  114. {
  115. struct pci_dev *pci_dev = to_pci_dev(dev);
  116. char *str = buf;
  117. int i;
  118. int max;
  119. resource_size_t start, end;
  120. if (pci_dev->subordinate)
  121. max = DEVICE_COUNT_RESOURCE;
  122. else
  123. max = PCI_BRIDGE_RESOURCES;
  124. for (i = 0; i < max; i++) {
  125. struct resource *res = &pci_dev->resource[i];
  126. pci_resource_to_user(pci_dev, i, res, &start, &end);
  127. str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
  128. (unsigned long long)start,
  129. (unsigned long long)end,
  130. (unsigned long long)res->flags);
  131. }
  132. return (str - buf);
  133. }
  134. static DEVICE_ATTR_RO(resource);
  135. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
  136. char *buf)
  137. {
  138. struct pci_dev *pci_dev = to_pci_dev(dev);
  139. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
  140. pci_dev->vendor, pci_dev->device,
  141. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  142. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  143. (u8)(pci_dev->class));
  144. }
  145. static DEVICE_ATTR_RO(modalias);
  146. static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
  147. const char *buf, size_t count)
  148. {
  149. struct pci_dev *pdev = to_pci_dev(dev);
  150. unsigned long val;
  151. ssize_t result = kstrtoul(buf, 0, &val);
  152. if (result < 0)
  153. return result;
  154. /* this can crash the machine when done on the "wrong" device */
  155. if (!capable(CAP_SYS_ADMIN))
  156. return -EPERM;
  157. if (!val) {
  158. if (pci_is_enabled(pdev))
  159. pci_disable_device(pdev);
  160. else
  161. result = -EIO;
  162. } else
  163. result = pci_enable_device(pdev);
  164. return result < 0 ? result : count;
  165. }
  166. static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
  167. char *buf)
  168. {
  169. struct pci_dev *pdev;
  170. pdev = to_pci_dev(dev);
  171. return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
  172. }
  173. static DEVICE_ATTR_RW(enable);
  174. #ifdef CONFIG_NUMA
  175. static ssize_t numa_node_store(struct device *dev,
  176. struct device_attribute *attr, const char *buf,
  177. size_t count)
  178. {
  179. struct pci_dev *pdev = to_pci_dev(dev);
  180. int node, ret;
  181. if (!capable(CAP_SYS_ADMIN))
  182. return -EPERM;
  183. ret = kstrtoint(buf, 0, &node);
  184. if (ret)
  185. return ret;
  186. if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
  187. return -EINVAL;
  188. if (node != NUMA_NO_NODE && !node_online(node))
  189. return -EINVAL;
  190. add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
  191. dev_alert(&pdev->dev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
  192. node);
  193. dev->numa_node = node;
  194. return count;
  195. }
  196. static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
  197. char *buf)
  198. {
  199. return sprintf(buf, "%d\n", dev->numa_node);
  200. }
  201. static DEVICE_ATTR_RW(numa_node);
  202. #endif
  203. static ssize_t dma_mask_bits_show(struct device *dev,
  204. struct device_attribute *attr, char *buf)
  205. {
  206. struct pci_dev *pdev = to_pci_dev(dev);
  207. return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
  208. }
  209. static DEVICE_ATTR_RO(dma_mask_bits);
  210. static ssize_t consistent_dma_mask_bits_show(struct device *dev,
  211. struct device_attribute *attr,
  212. char *buf)
  213. {
  214. return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
  215. }
  216. static DEVICE_ATTR_RO(consistent_dma_mask_bits);
  217. static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
  218. char *buf)
  219. {
  220. struct pci_dev *pdev = to_pci_dev(dev);
  221. struct pci_bus *subordinate = pdev->subordinate;
  222. return sprintf(buf, "%u\n", subordinate ?
  223. !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
  224. : !pdev->no_msi);
  225. }
  226. static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
  227. const char *buf, size_t count)
  228. {
  229. struct pci_dev *pdev = to_pci_dev(dev);
  230. struct pci_bus *subordinate = pdev->subordinate;
  231. unsigned long val;
  232. if (kstrtoul(buf, 0, &val) < 0)
  233. return -EINVAL;
  234. if (!capable(CAP_SYS_ADMIN))
  235. return -EPERM;
  236. /*
  237. * "no_msi" and "bus_flags" only affect what happens when a driver
  238. * requests MSI or MSI-X. They don't affect any drivers that have
  239. * already requested MSI or MSI-X.
  240. */
  241. if (!subordinate) {
  242. pdev->no_msi = !val;
  243. dev_info(&pdev->dev, "MSI/MSI-X %s for future drivers\n",
  244. val ? "allowed" : "disallowed");
  245. return count;
  246. }
  247. if (val)
  248. subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  249. else
  250. subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  251. dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
  252. val ? "allowed" : "disallowed");
  253. return count;
  254. }
  255. static DEVICE_ATTR_RW(msi_bus);
  256. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  257. size_t count)
  258. {
  259. unsigned long val;
  260. struct pci_bus *b = NULL;
  261. if (kstrtoul(buf, 0, &val) < 0)
  262. return -EINVAL;
  263. if (val) {
  264. pci_lock_rescan_remove();
  265. while ((b = pci_find_next_bus(b)) != NULL)
  266. pci_rescan_bus(b);
  267. pci_unlock_rescan_remove();
  268. }
  269. return count;
  270. }
  271. static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
  272. static struct attribute *pci_bus_attrs[] = {
  273. &bus_attr_rescan.attr,
  274. NULL,
  275. };
  276. static const struct attribute_group pci_bus_group = {
  277. .attrs = pci_bus_attrs,
  278. };
  279. const struct attribute_group *pci_bus_groups[] = {
  280. &pci_bus_group,
  281. NULL,
  282. };
  283. static ssize_t dev_rescan_store(struct device *dev,
  284. struct device_attribute *attr, const char *buf,
  285. size_t count)
  286. {
  287. unsigned long val;
  288. struct pci_dev *pdev = to_pci_dev(dev);
  289. if (kstrtoul(buf, 0, &val) < 0)
  290. return -EINVAL;
  291. if (val) {
  292. pci_lock_rescan_remove();
  293. pci_rescan_bus(pdev->bus);
  294. pci_unlock_rescan_remove();
  295. }
  296. return count;
  297. }
  298. static struct device_attribute dev_rescan_attr = __ATTR(rescan,
  299. (S_IWUSR|S_IWGRP),
  300. NULL, dev_rescan_store);
  301. static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
  302. const char *buf, size_t count)
  303. {
  304. unsigned long val;
  305. if (kstrtoul(buf, 0, &val) < 0)
  306. return -EINVAL;
  307. if (val && device_remove_file_self(dev, attr))
  308. pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
  309. return count;
  310. }
  311. static struct device_attribute dev_remove_attr = __ATTR(remove,
  312. (S_IWUSR|S_IWGRP),
  313. NULL, remove_store);
  314. static ssize_t dev_bus_rescan_store(struct device *dev,
  315. struct device_attribute *attr,
  316. const char *buf, size_t count)
  317. {
  318. unsigned long val;
  319. struct pci_bus *bus = to_pci_bus(dev);
  320. if (kstrtoul(buf, 0, &val) < 0)
  321. return -EINVAL;
  322. if (val) {
  323. pci_lock_rescan_remove();
  324. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  325. pci_rescan_bus_bridge_resize(bus->self);
  326. else
  327. pci_rescan_bus(bus);
  328. pci_unlock_rescan_remove();
  329. }
  330. return count;
  331. }
  332. static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
  333. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  334. static ssize_t d3cold_allowed_store(struct device *dev,
  335. struct device_attribute *attr,
  336. const char *buf, size_t count)
  337. {
  338. struct pci_dev *pdev = to_pci_dev(dev);
  339. unsigned long val;
  340. if (kstrtoul(buf, 0, &val) < 0)
  341. return -EINVAL;
  342. pdev->d3cold_allowed = !!val;
  343. if (pdev->d3cold_allowed)
  344. pci_d3cold_enable(pdev);
  345. else
  346. pci_d3cold_disable(pdev);
  347. pm_runtime_resume(dev);
  348. return count;
  349. }
  350. static ssize_t d3cold_allowed_show(struct device *dev,
  351. struct device_attribute *attr, char *buf)
  352. {
  353. struct pci_dev *pdev = to_pci_dev(dev);
  354. return sprintf(buf, "%u\n", pdev->d3cold_allowed);
  355. }
  356. static DEVICE_ATTR_RW(d3cold_allowed);
  357. #endif
  358. #ifdef CONFIG_OF
  359. static ssize_t devspec_show(struct device *dev,
  360. struct device_attribute *attr, char *buf)
  361. {
  362. struct pci_dev *pdev = to_pci_dev(dev);
  363. struct device_node *np = pci_device_to_OF_node(pdev);
  364. if (np == NULL || np->full_name == NULL)
  365. return 0;
  366. return sprintf(buf, "%s", np->full_name);
  367. }
  368. static DEVICE_ATTR_RO(devspec);
  369. #endif
  370. #ifdef CONFIG_PCI_IOV
  371. static ssize_t sriov_totalvfs_show(struct device *dev,
  372. struct device_attribute *attr,
  373. char *buf)
  374. {
  375. struct pci_dev *pdev = to_pci_dev(dev);
  376. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  377. }
  378. static ssize_t sriov_numvfs_show(struct device *dev,
  379. struct device_attribute *attr,
  380. char *buf)
  381. {
  382. struct pci_dev *pdev = to_pci_dev(dev);
  383. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  384. }
  385. /*
  386. * num_vfs > 0; number of VFs to enable
  387. * num_vfs = 0; disable all VFs
  388. *
  389. * Note: SRIOV spec doesn't allow partial VF
  390. * disable, so it's all or none.
  391. */
  392. static ssize_t sriov_numvfs_store(struct device *dev,
  393. struct device_attribute *attr,
  394. const char *buf, size_t count)
  395. {
  396. struct pci_dev *pdev = to_pci_dev(dev);
  397. struct pci_sriov *iov = pdev->sriov;
  398. int ret;
  399. u16 num_vfs;
  400. ret = kstrtou16(buf, 0, &num_vfs);
  401. if (ret < 0)
  402. return ret;
  403. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  404. return -ERANGE;
  405. mutex_lock(&iov->dev->sriov->lock);
  406. if (num_vfs == pdev->sriov->num_VFs)
  407. goto exit;
  408. /* is PF driver loaded w/callback */
  409. if (!pdev->driver || !pdev->driver->sriov_configure) {
  410. dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
  411. ret = -ENOENT;
  412. goto exit;
  413. }
  414. if (num_vfs == 0) {
  415. /* disable VFs */
  416. ret = pdev->driver->sriov_configure(pdev, 0);
  417. goto exit;
  418. }
  419. /* enable VFs */
  420. if (pdev->sriov->num_VFs) {
  421. dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  422. pdev->sriov->num_VFs, num_vfs);
  423. ret = -EBUSY;
  424. goto exit;
  425. }
  426. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  427. if (ret < 0)
  428. goto exit;
  429. if (ret != num_vfs)
  430. dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
  431. num_vfs, ret);
  432. exit:
  433. mutex_unlock(&iov->dev->sriov->lock);
  434. if (ret < 0)
  435. return ret;
  436. return count;
  437. }
  438. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  439. static struct device_attribute sriov_numvfs_attr =
  440. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  441. sriov_numvfs_show, sriov_numvfs_store);
  442. #endif /* CONFIG_PCI_IOV */
  443. static ssize_t driver_override_store(struct device *dev,
  444. struct device_attribute *attr,
  445. const char *buf, size_t count)
  446. {
  447. struct pci_dev *pdev = to_pci_dev(dev);
  448. char *driver_override, *old = pdev->driver_override, *cp;
  449. /* We need to keep extra room for a newline */
  450. if (count >= (PAGE_SIZE - 1))
  451. return -EINVAL;
  452. driver_override = kstrndup(buf, count, GFP_KERNEL);
  453. if (!driver_override)
  454. return -ENOMEM;
  455. cp = strchr(driver_override, '\n');
  456. if (cp)
  457. *cp = '\0';
  458. if (strlen(driver_override)) {
  459. pdev->driver_override = driver_override;
  460. } else {
  461. kfree(driver_override);
  462. pdev->driver_override = NULL;
  463. }
  464. kfree(old);
  465. return count;
  466. }
  467. static ssize_t driver_override_show(struct device *dev,
  468. struct device_attribute *attr, char *buf)
  469. {
  470. struct pci_dev *pdev = to_pci_dev(dev);
  471. return snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
  472. }
  473. static DEVICE_ATTR_RW(driver_override);
  474. static struct attribute *pci_dev_attrs[] = {
  475. &dev_attr_resource.attr,
  476. &dev_attr_vendor.attr,
  477. &dev_attr_device.attr,
  478. &dev_attr_subsystem_vendor.attr,
  479. &dev_attr_subsystem_device.attr,
  480. &dev_attr_revision.attr,
  481. &dev_attr_class.attr,
  482. &dev_attr_irq.attr,
  483. &dev_attr_local_cpus.attr,
  484. &dev_attr_local_cpulist.attr,
  485. &dev_attr_modalias.attr,
  486. #ifdef CONFIG_NUMA
  487. &dev_attr_numa_node.attr,
  488. #endif
  489. &dev_attr_dma_mask_bits.attr,
  490. &dev_attr_consistent_dma_mask_bits.attr,
  491. &dev_attr_enable.attr,
  492. &dev_attr_broken_parity_status.attr,
  493. &dev_attr_msi_bus.attr,
  494. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  495. &dev_attr_d3cold_allowed.attr,
  496. #endif
  497. #ifdef CONFIG_OF
  498. &dev_attr_devspec.attr,
  499. #endif
  500. &dev_attr_driver_override.attr,
  501. NULL,
  502. };
  503. static const struct attribute_group pci_dev_group = {
  504. .attrs = pci_dev_attrs,
  505. };
  506. const struct attribute_group *pci_dev_groups[] = {
  507. &pci_dev_group,
  508. NULL,
  509. };
  510. static struct attribute *pcibus_attrs[] = {
  511. &dev_attr_rescan.attr,
  512. &dev_attr_cpuaffinity.attr,
  513. &dev_attr_cpulistaffinity.attr,
  514. NULL,
  515. };
  516. static const struct attribute_group pcibus_group = {
  517. .attrs = pcibus_attrs,
  518. };
  519. const struct attribute_group *pcibus_groups[] = {
  520. &pcibus_group,
  521. NULL,
  522. };
  523. static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
  524. char *buf)
  525. {
  526. struct pci_dev *pdev = to_pci_dev(dev);
  527. struct pci_dev *vga_dev = vga_default_device();
  528. if (vga_dev)
  529. return sprintf(buf, "%u\n", (pdev == vga_dev));
  530. return sprintf(buf, "%u\n",
  531. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  532. IORESOURCE_ROM_SHADOW));
  533. }
  534. static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  535. static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
  536. struct bin_attribute *bin_attr, char *buf,
  537. loff_t off, size_t count)
  538. {
  539. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  540. unsigned int size = 64;
  541. loff_t init_off = off;
  542. u8 *data = (u8 *) buf;
  543. /* Several chips lock up trying to read undefined config space */
  544. if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
  545. size = dev->cfg_size;
  546. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  547. size = 128;
  548. if (off > size)
  549. return 0;
  550. if (off + count > size) {
  551. size -= off;
  552. count = size;
  553. } else {
  554. size = count;
  555. }
  556. pci_config_pm_runtime_get(dev);
  557. if ((off & 1) && size) {
  558. u8 val;
  559. pci_user_read_config_byte(dev, off, &val);
  560. data[off - init_off] = val;
  561. off++;
  562. size--;
  563. }
  564. if ((off & 3) && size > 2) {
  565. u16 val;
  566. pci_user_read_config_word(dev, off, &val);
  567. data[off - init_off] = val & 0xff;
  568. data[off - init_off + 1] = (val >> 8) & 0xff;
  569. off += 2;
  570. size -= 2;
  571. }
  572. while (size > 3) {
  573. u32 val;
  574. pci_user_read_config_dword(dev, off, &val);
  575. data[off - init_off] = val & 0xff;
  576. data[off - init_off + 1] = (val >> 8) & 0xff;
  577. data[off - init_off + 2] = (val >> 16) & 0xff;
  578. data[off - init_off + 3] = (val >> 24) & 0xff;
  579. off += 4;
  580. size -= 4;
  581. }
  582. if (size >= 2) {
  583. u16 val;
  584. pci_user_read_config_word(dev, off, &val);
  585. data[off - init_off] = val & 0xff;
  586. data[off - init_off + 1] = (val >> 8) & 0xff;
  587. off += 2;
  588. size -= 2;
  589. }
  590. if (size > 0) {
  591. u8 val;
  592. pci_user_read_config_byte(dev, off, &val);
  593. data[off - init_off] = val;
  594. off++;
  595. --size;
  596. }
  597. pci_config_pm_runtime_put(dev);
  598. return count;
  599. }
  600. static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
  601. struct bin_attribute *bin_attr, char *buf,
  602. loff_t off, size_t count)
  603. {
  604. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  605. unsigned int size = count;
  606. loff_t init_off = off;
  607. u8 *data = (u8 *) buf;
  608. if (off > dev->cfg_size)
  609. return 0;
  610. if (off + count > dev->cfg_size) {
  611. size = dev->cfg_size - off;
  612. count = size;
  613. }
  614. pci_config_pm_runtime_get(dev);
  615. if ((off & 1) && size) {
  616. pci_user_write_config_byte(dev, off, data[off - init_off]);
  617. off++;
  618. size--;
  619. }
  620. if ((off & 3) && size > 2) {
  621. u16 val = data[off - init_off];
  622. val |= (u16) data[off - init_off + 1] << 8;
  623. pci_user_write_config_word(dev, off, val);
  624. off += 2;
  625. size -= 2;
  626. }
  627. while (size > 3) {
  628. u32 val = data[off - init_off];
  629. val |= (u32) data[off - init_off + 1] << 8;
  630. val |= (u32) data[off - init_off + 2] << 16;
  631. val |= (u32) data[off - init_off + 3] << 24;
  632. pci_user_write_config_dword(dev, off, val);
  633. off += 4;
  634. size -= 4;
  635. }
  636. if (size >= 2) {
  637. u16 val = data[off - init_off];
  638. val |= (u16) data[off - init_off + 1] << 8;
  639. pci_user_write_config_word(dev, off, val);
  640. off += 2;
  641. size -= 2;
  642. }
  643. if (size) {
  644. pci_user_write_config_byte(dev, off, data[off - init_off]);
  645. off++;
  646. --size;
  647. }
  648. pci_config_pm_runtime_put(dev);
  649. return count;
  650. }
  651. static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj,
  652. struct bin_attribute *bin_attr, char *buf,
  653. loff_t off, size_t count)
  654. {
  655. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  656. if (bin_attr->size > 0) {
  657. if (off > bin_attr->size)
  658. count = 0;
  659. else if (count > bin_attr->size - off)
  660. count = bin_attr->size - off;
  661. }
  662. return pci_read_vpd(dev, off, count, buf);
  663. }
  664. static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj,
  665. struct bin_attribute *bin_attr, char *buf,
  666. loff_t off, size_t count)
  667. {
  668. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  669. if (bin_attr->size > 0) {
  670. if (off > bin_attr->size)
  671. count = 0;
  672. else if (count > bin_attr->size - off)
  673. count = bin_attr->size - off;
  674. }
  675. return pci_write_vpd(dev, off, count, buf);
  676. }
  677. #ifdef HAVE_PCI_LEGACY
  678. /**
  679. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  680. * @filp: open sysfs file
  681. * @kobj: kobject corresponding to file to read from
  682. * @bin_attr: struct bin_attribute for this file
  683. * @buf: buffer to store results
  684. * @off: offset into legacy I/O port space
  685. * @count: number of bytes to read
  686. *
  687. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  688. * callback routine (pci_legacy_read).
  689. */
  690. static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  691. struct bin_attribute *bin_attr, char *buf,
  692. loff_t off, size_t count)
  693. {
  694. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  695. /* Only support 1, 2 or 4 byte accesses */
  696. if (count != 1 && count != 2 && count != 4)
  697. return -EINVAL;
  698. return pci_legacy_read(bus, off, (u32 *)buf, count);
  699. }
  700. /**
  701. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  702. * @filp: open sysfs file
  703. * @kobj: kobject corresponding to file to read from
  704. * @bin_attr: struct bin_attribute for this file
  705. * @buf: buffer containing value to be written
  706. * @off: offset into legacy I/O port space
  707. * @count: number of bytes to write
  708. *
  709. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  710. * callback routine (pci_legacy_write).
  711. */
  712. static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  713. struct bin_attribute *bin_attr, char *buf,
  714. loff_t off, size_t count)
  715. {
  716. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  717. /* Only support 1, 2 or 4 byte accesses */
  718. if (count != 1 && count != 2 && count != 4)
  719. return -EINVAL;
  720. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  721. }
  722. /**
  723. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  724. * @filp: open sysfs file
  725. * @kobj: kobject corresponding to device to be mapped
  726. * @attr: struct bin_attribute for this file
  727. * @vma: struct vm_area_struct passed to mmap
  728. *
  729. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  730. * legacy memory space (first meg of bus space) into application virtual
  731. * memory space.
  732. */
  733. static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  734. struct bin_attribute *attr,
  735. struct vm_area_struct *vma)
  736. {
  737. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  738. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  739. }
  740. /**
  741. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  742. * @filp: open sysfs file
  743. * @kobj: kobject corresponding to device to be mapped
  744. * @attr: struct bin_attribute for this file
  745. * @vma: struct vm_area_struct passed to mmap
  746. *
  747. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  748. * legacy IO space (first meg of bus space) into application virtual
  749. * memory space. Returns -ENOSYS if the operation isn't supported
  750. */
  751. static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  752. struct bin_attribute *attr,
  753. struct vm_area_struct *vma)
  754. {
  755. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  756. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  757. }
  758. /**
  759. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  760. * @b: bus to create files under
  761. * @mmap_type: I/O port or memory
  762. *
  763. * Stub implementation. Can be overridden by arch if necessary.
  764. */
  765. void __weak pci_adjust_legacy_attr(struct pci_bus *b,
  766. enum pci_mmap_state mmap_type)
  767. {
  768. }
  769. /**
  770. * pci_create_legacy_files - create legacy I/O port and memory files
  771. * @b: bus to create files under
  772. *
  773. * Some platforms allow access to legacy I/O port and ISA memory space on
  774. * a per-bus basis. This routine creates the files and ties them into
  775. * their associated read, write and mmap files from pci-sysfs.c
  776. *
  777. * On error unwind, but don't propagate the error to the caller
  778. * as it is ok to set up the PCI bus without these files.
  779. */
  780. void pci_create_legacy_files(struct pci_bus *b)
  781. {
  782. int error;
  783. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  784. GFP_ATOMIC);
  785. if (!b->legacy_io)
  786. goto kzalloc_err;
  787. sysfs_bin_attr_init(b->legacy_io);
  788. b->legacy_io->attr.name = "legacy_io";
  789. b->legacy_io->size = 0xffff;
  790. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  791. b->legacy_io->read = pci_read_legacy_io;
  792. b->legacy_io->write = pci_write_legacy_io;
  793. b->legacy_io->mmap = pci_mmap_legacy_io;
  794. pci_adjust_legacy_attr(b, pci_mmap_io);
  795. error = device_create_bin_file(&b->dev, b->legacy_io);
  796. if (error)
  797. goto legacy_io_err;
  798. /* Allocated above after the legacy_io struct */
  799. b->legacy_mem = b->legacy_io + 1;
  800. sysfs_bin_attr_init(b->legacy_mem);
  801. b->legacy_mem->attr.name = "legacy_mem";
  802. b->legacy_mem->size = 1024*1024;
  803. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  804. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  805. pci_adjust_legacy_attr(b, pci_mmap_mem);
  806. error = device_create_bin_file(&b->dev, b->legacy_mem);
  807. if (error)
  808. goto legacy_mem_err;
  809. return;
  810. legacy_mem_err:
  811. device_remove_bin_file(&b->dev, b->legacy_io);
  812. legacy_io_err:
  813. kfree(b->legacy_io);
  814. b->legacy_io = NULL;
  815. kzalloc_err:
  816. printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
  817. return;
  818. }
  819. void pci_remove_legacy_files(struct pci_bus *b)
  820. {
  821. if (b->legacy_io) {
  822. device_remove_bin_file(&b->dev, b->legacy_io);
  823. device_remove_bin_file(&b->dev, b->legacy_mem);
  824. kfree(b->legacy_io); /* both are allocated here */
  825. }
  826. }
  827. #endif /* HAVE_PCI_LEGACY */
  828. #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
  829. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  830. enum pci_mmap_api mmap_api)
  831. {
  832. unsigned long nr, start, size;
  833. resource_size_t pci_start = 0, pci_end;
  834. if (pci_resource_len(pdev, resno) == 0)
  835. return 0;
  836. nr = vma_pages(vma);
  837. start = vma->vm_pgoff;
  838. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  839. if (mmap_api == PCI_MMAP_PROCFS) {
  840. pci_resource_to_user(pdev, resno, &pdev->resource[resno],
  841. &pci_start, &pci_end);
  842. pci_start >>= PAGE_SHIFT;
  843. }
  844. if (start >= pci_start && start < pci_start + size &&
  845. start + nr <= pci_start + size)
  846. return 1;
  847. return 0;
  848. }
  849. /**
  850. * pci_mmap_resource - map a PCI resource into user memory space
  851. * @kobj: kobject for mapping
  852. * @attr: struct bin_attribute for the file being mapped
  853. * @vma: struct vm_area_struct passed into the mmap
  854. * @write_combine: 1 for write_combine mapping
  855. *
  856. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  857. */
  858. static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  859. struct vm_area_struct *vma, int write_combine)
  860. {
  861. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  862. int bar = (unsigned long)attr->private;
  863. enum pci_mmap_state mmap_type;
  864. struct resource *res = &pdev->resource[bar];
  865. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
  866. return -EINVAL;
  867. if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) {
  868. WARN(1, "process \"%s\" tried to map 0x%08lx bytes at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  869. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  870. pci_name(pdev), bar,
  871. (u64)pci_resource_start(pdev, bar),
  872. (u64)pci_resource_len(pdev, bar));
  873. return -EINVAL;
  874. }
  875. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  876. return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
  877. }
  878. static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  879. struct bin_attribute *attr,
  880. struct vm_area_struct *vma)
  881. {
  882. return pci_mmap_resource(kobj, attr, vma, 0);
  883. }
  884. static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  885. struct bin_attribute *attr,
  886. struct vm_area_struct *vma)
  887. {
  888. return pci_mmap_resource(kobj, attr, vma, 1);
  889. }
  890. static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
  891. struct bin_attribute *attr, char *buf,
  892. loff_t off, size_t count, bool write)
  893. {
  894. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  895. int bar = (unsigned long)attr->private;
  896. struct resource *res;
  897. unsigned long port = off;
  898. res = &pdev->resource[bar];
  899. port += pci_resource_start(pdev, bar);
  900. if (port > pci_resource_end(pdev, bar))
  901. return 0;
  902. if (port + count - 1 > pci_resource_end(pdev, bar))
  903. return -EINVAL;
  904. switch (count) {
  905. case 1:
  906. if (write)
  907. outb(*(u8 *)buf, port);
  908. else
  909. *(u8 *)buf = inb(port);
  910. return 1;
  911. case 2:
  912. if (write)
  913. outw(*(u16 *)buf, port);
  914. else
  915. *(u16 *)buf = inw(port);
  916. return 2;
  917. case 4:
  918. if (write)
  919. outl(*(u32 *)buf, port);
  920. else
  921. *(u32 *)buf = inl(port);
  922. return 4;
  923. }
  924. return -EINVAL;
  925. }
  926. static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
  927. struct bin_attribute *attr, char *buf,
  928. loff_t off, size_t count)
  929. {
  930. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  931. }
  932. static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
  933. struct bin_attribute *attr, char *buf,
  934. loff_t off, size_t count)
  935. {
  936. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  937. }
  938. /**
  939. * pci_remove_resource_files - cleanup resource files
  940. * @pdev: dev to cleanup
  941. *
  942. * If we created resource files for @pdev, remove them from sysfs and
  943. * free their resources.
  944. */
  945. static void pci_remove_resource_files(struct pci_dev *pdev)
  946. {
  947. int i;
  948. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  949. struct bin_attribute *res_attr;
  950. res_attr = pdev->res_attr[i];
  951. if (res_attr) {
  952. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  953. kfree(res_attr);
  954. }
  955. res_attr = pdev->res_attr_wc[i];
  956. if (res_attr) {
  957. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  958. kfree(res_attr);
  959. }
  960. }
  961. }
  962. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  963. {
  964. /* allocate attribute structure, piggyback attribute name */
  965. int name_len = write_combine ? 13 : 10;
  966. struct bin_attribute *res_attr;
  967. char *res_attr_name;
  968. int retval;
  969. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  970. if (!res_attr)
  971. return -ENOMEM;
  972. res_attr_name = (char *)(res_attr + 1);
  973. sysfs_bin_attr_init(res_attr);
  974. if (write_combine) {
  975. pdev->res_attr_wc[num] = res_attr;
  976. sprintf(res_attr_name, "resource%d_wc", num);
  977. res_attr->mmap = pci_mmap_resource_wc;
  978. } else {
  979. pdev->res_attr[num] = res_attr;
  980. sprintf(res_attr_name, "resource%d", num);
  981. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  982. res_attr->read = pci_read_resource_io;
  983. res_attr->write = pci_write_resource_io;
  984. if (arch_can_pci_mmap_io())
  985. res_attr->mmap = pci_mmap_resource_uc;
  986. } else {
  987. res_attr->mmap = pci_mmap_resource_uc;
  988. }
  989. }
  990. res_attr->attr.name = res_attr_name;
  991. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  992. res_attr->size = pci_resource_len(pdev, num);
  993. res_attr->private = (void *)(unsigned long)num;
  994. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  995. if (retval)
  996. kfree(res_attr);
  997. return retval;
  998. }
  999. /**
  1000. * pci_create_resource_files - create resource files in sysfs for @dev
  1001. * @pdev: dev in question
  1002. *
  1003. * Walk the resources in @pdev creating files for each resource available.
  1004. */
  1005. static int pci_create_resource_files(struct pci_dev *pdev)
  1006. {
  1007. int i;
  1008. int retval;
  1009. /* Expose the PCI resources from this device as files */
  1010. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  1011. /* skip empty resources */
  1012. if (!pci_resource_len(pdev, i))
  1013. continue;
  1014. retval = pci_create_attr(pdev, i, 0);
  1015. /* for prefetchable resources, create a WC mappable file */
  1016. if (!retval && arch_can_pci_mmap_wc() &&
  1017. pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1018. retval = pci_create_attr(pdev, i, 1);
  1019. if (retval) {
  1020. pci_remove_resource_files(pdev);
  1021. return retval;
  1022. }
  1023. }
  1024. return 0;
  1025. }
  1026. #else /* !HAVE_PCI_MMAP */
  1027. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1028. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1029. #endif /* HAVE_PCI_MMAP */
  1030. /**
  1031. * pci_write_rom - used to enable access to the PCI ROM display
  1032. * @filp: sysfs file
  1033. * @kobj: kernel object handle
  1034. * @bin_attr: struct bin_attribute for this file
  1035. * @buf: user input
  1036. * @off: file offset
  1037. * @count: number of byte in input
  1038. *
  1039. * writing anything except 0 enables it
  1040. */
  1041. static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
  1042. struct bin_attribute *bin_attr, char *buf,
  1043. loff_t off, size_t count)
  1044. {
  1045. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1046. if ((off == 0) && (*buf == '0') && (count == 2))
  1047. pdev->rom_attr_enabled = 0;
  1048. else
  1049. pdev->rom_attr_enabled = 1;
  1050. return count;
  1051. }
  1052. /**
  1053. * pci_read_rom - read a PCI ROM
  1054. * @filp: sysfs file
  1055. * @kobj: kernel object handle
  1056. * @bin_attr: struct bin_attribute for this file
  1057. * @buf: where to put the data we read from the ROM
  1058. * @off: file offset
  1059. * @count: number of bytes to read
  1060. *
  1061. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1062. * device corresponding to @kobj.
  1063. */
  1064. static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
  1065. struct bin_attribute *bin_attr, char *buf,
  1066. loff_t off, size_t count)
  1067. {
  1068. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1069. void __iomem *rom;
  1070. size_t size;
  1071. if (!pdev->rom_attr_enabled)
  1072. return -EINVAL;
  1073. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1074. if (!rom || !size)
  1075. return -EIO;
  1076. if (off >= size)
  1077. count = 0;
  1078. else {
  1079. if (off + count > size)
  1080. count = size - off;
  1081. memcpy_fromio(buf, rom + off, count);
  1082. }
  1083. pci_unmap_rom(pdev, rom);
  1084. return count;
  1085. }
  1086. static struct bin_attribute pci_config_attr = {
  1087. .attr = {
  1088. .name = "config",
  1089. .mode = S_IRUGO | S_IWUSR,
  1090. },
  1091. .size = PCI_CFG_SPACE_SIZE,
  1092. .read = pci_read_config,
  1093. .write = pci_write_config,
  1094. };
  1095. static struct bin_attribute pcie_config_attr = {
  1096. .attr = {
  1097. .name = "config",
  1098. .mode = S_IRUGO | S_IWUSR,
  1099. },
  1100. .size = PCI_CFG_SPACE_EXP_SIZE,
  1101. .read = pci_read_config,
  1102. .write = pci_write_config,
  1103. };
  1104. static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
  1105. const char *buf, size_t count)
  1106. {
  1107. struct pci_dev *pdev = to_pci_dev(dev);
  1108. unsigned long val;
  1109. ssize_t result = kstrtoul(buf, 0, &val);
  1110. if (result < 0)
  1111. return result;
  1112. if (val != 1)
  1113. return -EINVAL;
  1114. result = pci_reset_function(pdev);
  1115. if (result < 0)
  1116. return result;
  1117. return count;
  1118. }
  1119. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1120. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1121. {
  1122. int retval;
  1123. struct bin_attribute *attr;
  1124. /* If the device has VPD, try to expose it in sysfs. */
  1125. if (dev->vpd) {
  1126. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1127. if (!attr)
  1128. return -ENOMEM;
  1129. sysfs_bin_attr_init(attr);
  1130. attr->size = 0;
  1131. attr->attr.name = "vpd";
  1132. attr->attr.mode = S_IRUSR | S_IWUSR;
  1133. attr->read = read_vpd_attr;
  1134. attr->write = write_vpd_attr;
  1135. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1136. if (retval) {
  1137. kfree(attr);
  1138. return retval;
  1139. }
  1140. dev->vpd->attr = attr;
  1141. }
  1142. /* Active State Power Management */
  1143. pcie_aspm_create_sysfs_dev_files(dev);
  1144. if (!pci_probe_reset_function(dev)) {
  1145. retval = device_create_file(&dev->dev, &reset_attr);
  1146. if (retval)
  1147. goto error;
  1148. dev->reset_fn = 1;
  1149. }
  1150. return 0;
  1151. error:
  1152. pcie_aspm_remove_sysfs_dev_files(dev);
  1153. if (dev->vpd && dev->vpd->attr) {
  1154. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1155. kfree(dev->vpd->attr);
  1156. }
  1157. return retval;
  1158. }
  1159. int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
  1160. {
  1161. int retval;
  1162. int rom_size;
  1163. struct bin_attribute *attr;
  1164. if (!sysfs_initialized)
  1165. return -EACCES;
  1166. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1167. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1168. else
  1169. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1170. if (retval)
  1171. goto err;
  1172. retval = pci_create_resource_files(pdev);
  1173. if (retval)
  1174. goto err_config_file;
  1175. /* If the device has a ROM, try to expose it in sysfs. */
  1176. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1177. if (rom_size) {
  1178. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1179. if (!attr) {
  1180. retval = -ENOMEM;
  1181. goto err_resource_files;
  1182. }
  1183. sysfs_bin_attr_init(attr);
  1184. attr->size = rom_size;
  1185. attr->attr.name = "rom";
  1186. attr->attr.mode = S_IRUSR | S_IWUSR;
  1187. attr->read = pci_read_rom;
  1188. attr->write = pci_write_rom;
  1189. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1190. if (retval) {
  1191. kfree(attr);
  1192. goto err_resource_files;
  1193. }
  1194. pdev->rom_attr = attr;
  1195. }
  1196. /* add sysfs entries for various capabilities */
  1197. retval = pci_create_capabilities_sysfs(pdev);
  1198. if (retval)
  1199. goto err_rom_file;
  1200. pci_create_firmware_label_files(pdev);
  1201. return 0;
  1202. err_rom_file:
  1203. if (pdev->rom_attr) {
  1204. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1205. kfree(pdev->rom_attr);
  1206. pdev->rom_attr = NULL;
  1207. }
  1208. err_resource_files:
  1209. pci_remove_resource_files(pdev);
  1210. err_config_file:
  1211. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1212. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1213. else
  1214. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1215. err:
  1216. return retval;
  1217. }
  1218. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1219. {
  1220. if (dev->vpd && dev->vpd->attr) {
  1221. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1222. kfree(dev->vpd->attr);
  1223. }
  1224. pcie_aspm_remove_sysfs_dev_files(dev);
  1225. if (dev->reset_fn) {
  1226. device_remove_file(&dev->dev, &reset_attr);
  1227. dev->reset_fn = 0;
  1228. }
  1229. }
  1230. /**
  1231. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1232. * @pdev: device whose entries we should free
  1233. *
  1234. * Cleanup when @pdev is removed from sysfs.
  1235. */
  1236. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1237. {
  1238. if (!sysfs_initialized)
  1239. return;
  1240. pci_remove_capabilities_sysfs(pdev);
  1241. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1242. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1243. else
  1244. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1245. pci_remove_resource_files(pdev);
  1246. if (pdev->rom_attr) {
  1247. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1248. kfree(pdev->rom_attr);
  1249. pdev->rom_attr = NULL;
  1250. }
  1251. pci_remove_firmware_label_files(pdev);
  1252. }
  1253. static int __init pci_sysfs_init(void)
  1254. {
  1255. struct pci_dev *pdev = NULL;
  1256. int retval;
  1257. sysfs_initialized = 1;
  1258. for_each_pci_dev(pdev) {
  1259. retval = pci_create_sysfs_dev_files(pdev);
  1260. if (retval) {
  1261. pci_dev_put(pdev);
  1262. return retval;
  1263. }
  1264. }
  1265. return 0;
  1266. }
  1267. late_initcall(pci_sysfs_init);
  1268. static struct attribute *pci_dev_dev_attrs[] = {
  1269. &vga_attr.attr,
  1270. NULL,
  1271. };
  1272. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1273. struct attribute *a, int n)
  1274. {
  1275. struct device *dev = kobj_to_dev(kobj);
  1276. struct pci_dev *pdev = to_pci_dev(dev);
  1277. if (a == &vga_attr.attr)
  1278. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1279. return 0;
  1280. return a->mode;
  1281. }
  1282. static struct attribute *pci_dev_hp_attrs[] = {
  1283. &dev_remove_attr.attr,
  1284. &dev_rescan_attr.attr,
  1285. NULL,
  1286. };
  1287. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1288. struct attribute *a, int n)
  1289. {
  1290. struct device *dev = kobj_to_dev(kobj);
  1291. struct pci_dev *pdev = to_pci_dev(dev);
  1292. if (pdev->is_virtfn)
  1293. return 0;
  1294. return a->mode;
  1295. }
  1296. static struct attribute_group pci_dev_hp_attr_group = {
  1297. .attrs = pci_dev_hp_attrs,
  1298. .is_visible = pci_dev_hp_attrs_are_visible,
  1299. };
  1300. #ifdef CONFIG_PCI_IOV
  1301. static struct attribute *sriov_dev_attrs[] = {
  1302. &sriov_totalvfs_attr.attr,
  1303. &sriov_numvfs_attr.attr,
  1304. NULL,
  1305. };
  1306. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1307. struct attribute *a, int n)
  1308. {
  1309. struct device *dev = kobj_to_dev(kobj);
  1310. if (!dev_is_pf(dev))
  1311. return 0;
  1312. return a->mode;
  1313. }
  1314. static struct attribute_group sriov_dev_attr_group = {
  1315. .attrs = sriov_dev_attrs,
  1316. .is_visible = sriov_attrs_are_visible,
  1317. };
  1318. #endif /* CONFIG_PCI_IOV */
  1319. static struct attribute_group pci_dev_attr_group = {
  1320. .attrs = pci_dev_dev_attrs,
  1321. .is_visible = pci_dev_attrs_are_visible,
  1322. };
  1323. static const struct attribute_group *pci_dev_attr_groups[] = {
  1324. &pci_dev_attr_group,
  1325. &pci_dev_hp_attr_group,
  1326. #ifdef CONFIG_PCI_IOV
  1327. &sriov_dev_attr_group,
  1328. #endif
  1329. NULL,
  1330. };
  1331. struct device_type pci_dev_type = {
  1332. .groups = pci_dev_attr_groups,
  1333. };