qeth_core_main.c 180 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright IBM Corp. 2007, 2009
  4. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
  5. * Frank Pavlic <fpavlic@de.ibm.com>,
  6. * Thomas Spatzier <tspat@de.ibm.com>,
  7. * Frank Blaschka <frank.blaschka@de.ibm.com>
  8. */
  9. #define KMSG_COMPONENT "qeth"
  10. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  11. #include <linux/compat.h>
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/string.h>
  15. #include <linux/errno.h>
  16. #include <linux/kernel.h>
  17. #include <linux/ip.h>
  18. #include <linux/tcp.h>
  19. #include <linux/mii.h>
  20. #include <linux/kthread.h>
  21. #include <linux/slab.h>
  22. #include <linux/if_vlan.h>
  23. #include <linux/netdevice.h>
  24. #include <linux/netdev_features.h>
  25. #include <linux/skbuff.h>
  26. #include <net/iucv/af_iucv.h>
  27. #include <net/dsfield.h>
  28. #include <asm/ebcdic.h>
  29. #include <asm/chpid.h>
  30. #include <asm/io.h>
  31. #include <asm/sysinfo.h>
  32. #include <asm/diag.h>
  33. #include <asm/cio.h>
  34. #include <asm/ccwdev.h>
  35. #include <asm/cpcmd.h>
  36. #include "qeth_core.h"
  37. struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
  38. /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
  39. /* N P A M L V H */
  40. [QETH_DBF_SETUP] = {"qeth_setup",
  41. 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
  42. [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
  43. &debug_sprintf_view, NULL},
  44. [QETH_DBF_CTRL] = {"qeth_control",
  45. 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
  46. };
  47. EXPORT_SYMBOL_GPL(qeth_dbf);
  48. struct qeth_card_list_struct qeth_core_card_list;
  49. EXPORT_SYMBOL_GPL(qeth_core_card_list);
  50. struct kmem_cache *qeth_core_header_cache;
  51. EXPORT_SYMBOL_GPL(qeth_core_header_cache);
  52. static struct kmem_cache *qeth_qdio_outbuf_cache;
  53. static struct device *qeth_core_root_dev;
  54. static struct lock_class_key qdio_out_skb_queue_key;
  55. static struct mutex qeth_mod_mutex;
  56. static void qeth_send_control_data_cb(struct qeth_channel *,
  57. struct qeth_cmd_buffer *);
  58. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
  59. static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
  60. static void qeth_free_buffer_pool(struct qeth_card *);
  61. static int qeth_qdio_establish(struct qeth_card *);
  62. static void qeth_free_qdio_buffers(struct qeth_card *);
  63. static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
  64. struct qeth_qdio_out_buffer *buf,
  65. enum iucv_tx_notify notification);
  66. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
  67. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
  68. struct workqueue_struct *qeth_wq;
  69. EXPORT_SYMBOL_GPL(qeth_wq);
  70. int qeth_card_hw_is_reachable(struct qeth_card *card)
  71. {
  72. return (card->state == CARD_STATE_SOFTSETUP) ||
  73. (card->state == CARD_STATE_UP);
  74. }
  75. EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
  76. static void qeth_close_dev_handler(struct work_struct *work)
  77. {
  78. struct qeth_card *card;
  79. card = container_of(work, struct qeth_card, close_dev_work);
  80. QETH_CARD_TEXT(card, 2, "cldevhdl");
  81. rtnl_lock();
  82. dev_close(card->dev);
  83. rtnl_unlock();
  84. ccwgroup_set_offline(card->gdev);
  85. }
  86. void qeth_close_dev(struct qeth_card *card)
  87. {
  88. QETH_CARD_TEXT(card, 2, "cldevsubm");
  89. queue_work(qeth_wq, &card->close_dev_work);
  90. }
  91. EXPORT_SYMBOL_GPL(qeth_close_dev);
  92. static const char *qeth_get_cardname(struct qeth_card *card)
  93. {
  94. if (card->info.guestlan) {
  95. switch (card->info.type) {
  96. case QETH_CARD_TYPE_OSD:
  97. return " Virtual NIC QDIO";
  98. case QETH_CARD_TYPE_IQD:
  99. return " Virtual NIC Hiper";
  100. case QETH_CARD_TYPE_OSM:
  101. return " Virtual NIC QDIO - OSM";
  102. case QETH_CARD_TYPE_OSX:
  103. return " Virtual NIC QDIO - OSX";
  104. default:
  105. return " unknown";
  106. }
  107. } else {
  108. switch (card->info.type) {
  109. case QETH_CARD_TYPE_OSD:
  110. return " OSD Express";
  111. case QETH_CARD_TYPE_IQD:
  112. return " HiperSockets";
  113. case QETH_CARD_TYPE_OSN:
  114. return " OSN QDIO";
  115. case QETH_CARD_TYPE_OSM:
  116. return " OSM QDIO";
  117. case QETH_CARD_TYPE_OSX:
  118. return " OSX QDIO";
  119. default:
  120. return " unknown";
  121. }
  122. }
  123. return " n/a";
  124. }
  125. /* max length to be returned: 14 */
  126. const char *qeth_get_cardname_short(struct qeth_card *card)
  127. {
  128. if (card->info.guestlan) {
  129. switch (card->info.type) {
  130. case QETH_CARD_TYPE_OSD:
  131. return "Virt.NIC QDIO";
  132. case QETH_CARD_TYPE_IQD:
  133. return "Virt.NIC Hiper";
  134. case QETH_CARD_TYPE_OSM:
  135. return "Virt.NIC OSM";
  136. case QETH_CARD_TYPE_OSX:
  137. return "Virt.NIC OSX";
  138. default:
  139. return "unknown";
  140. }
  141. } else {
  142. switch (card->info.type) {
  143. case QETH_CARD_TYPE_OSD:
  144. switch (card->info.link_type) {
  145. case QETH_LINK_TYPE_FAST_ETH:
  146. return "OSD_100";
  147. case QETH_LINK_TYPE_HSTR:
  148. return "HSTR";
  149. case QETH_LINK_TYPE_GBIT_ETH:
  150. return "OSD_1000";
  151. case QETH_LINK_TYPE_10GBIT_ETH:
  152. return "OSD_10GIG";
  153. case QETH_LINK_TYPE_LANE_ETH100:
  154. return "OSD_FE_LANE";
  155. case QETH_LINK_TYPE_LANE_TR:
  156. return "OSD_TR_LANE";
  157. case QETH_LINK_TYPE_LANE_ETH1000:
  158. return "OSD_GbE_LANE";
  159. case QETH_LINK_TYPE_LANE:
  160. return "OSD_ATM_LANE";
  161. default:
  162. return "OSD_Express";
  163. }
  164. case QETH_CARD_TYPE_IQD:
  165. return "HiperSockets";
  166. case QETH_CARD_TYPE_OSN:
  167. return "OSN";
  168. case QETH_CARD_TYPE_OSM:
  169. return "OSM_1000";
  170. case QETH_CARD_TYPE_OSX:
  171. return "OSX_10GIG";
  172. default:
  173. return "unknown";
  174. }
  175. }
  176. return "n/a";
  177. }
  178. void qeth_set_recovery_task(struct qeth_card *card)
  179. {
  180. card->recovery_task = current;
  181. }
  182. EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
  183. void qeth_clear_recovery_task(struct qeth_card *card)
  184. {
  185. card->recovery_task = NULL;
  186. }
  187. EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
  188. static bool qeth_is_recovery_task(const struct qeth_card *card)
  189. {
  190. return card->recovery_task == current;
  191. }
  192. void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
  193. int clear_start_mask)
  194. {
  195. unsigned long flags;
  196. spin_lock_irqsave(&card->thread_mask_lock, flags);
  197. card->thread_allowed_mask = threads;
  198. if (clear_start_mask)
  199. card->thread_start_mask &= threads;
  200. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  201. wake_up(&card->wait_q);
  202. }
  203. EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
  204. int qeth_threads_running(struct qeth_card *card, unsigned long threads)
  205. {
  206. unsigned long flags;
  207. int rc = 0;
  208. spin_lock_irqsave(&card->thread_mask_lock, flags);
  209. rc = (card->thread_running_mask & threads);
  210. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  211. return rc;
  212. }
  213. EXPORT_SYMBOL_GPL(qeth_threads_running);
  214. int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
  215. {
  216. if (qeth_is_recovery_task(card))
  217. return 0;
  218. return wait_event_interruptible(card->wait_q,
  219. qeth_threads_running(card, threads) == 0);
  220. }
  221. EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
  222. void qeth_clear_working_pool_list(struct qeth_card *card)
  223. {
  224. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  225. QETH_CARD_TEXT(card, 5, "clwrklst");
  226. list_for_each_entry_safe(pool_entry, tmp,
  227. &card->qdio.in_buf_pool.entry_list, list){
  228. list_del(&pool_entry->list);
  229. }
  230. }
  231. EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
  232. static int qeth_alloc_buffer_pool(struct qeth_card *card)
  233. {
  234. struct qeth_buffer_pool_entry *pool_entry;
  235. void *ptr;
  236. int i, j;
  237. QETH_CARD_TEXT(card, 5, "alocpool");
  238. for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
  239. pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
  240. if (!pool_entry) {
  241. qeth_free_buffer_pool(card);
  242. return -ENOMEM;
  243. }
  244. for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
  245. ptr = (void *) __get_free_page(GFP_KERNEL);
  246. if (!ptr) {
  247. while (j > 0)
  248. free_page((unsigned long)
  249. pool_entry->elements[--j]);
  250. kfree(pool_entry);
  251. qeth_free_buffer_pool(card);
  252. return -ENOMEM;
  253. }
  254. pool_entry->elements[j] = ptr;
  255. }
  256. list_add(&pool_entry->init_list,
  257. &card->qdio.init_pool.entry_list);
  258. }
  259. return 0;
  260. }
  261. int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
  262. {
  263. QETH_CARD_TEXT(card, 2, "realcbp");
  264. if ((card->state != CARD_STATE_DOWN) &&
  265. (card->state != CARD_STATE_RECOVER))
  266. return -EPERM;
  267. /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
  268. qeth_clear_working_pool_list(card);
  269. qeth_free_buffer_pool(card);
  270. card->qdio.in_buf_pool.buf_count = bufcnt;
  271. card->qdio.init_pool.buf_count = bufcnt;
  272. return qeth_alloc_buffer_pool(card);
  273. }
  274. EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
  275. static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
  276. {
  277. if (!q)
  278. return;
  279. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  280. kfree(q);
  281. }
  282. static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
  283. {
  284. struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  285. int i;
  286. if (!q)
  287. return NULL;
  288. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  289. kfree(q);
  290. return NULL;
  291. }
  292. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
  293. q->bufs[i].buffer = q->qdio_bufs[i];
  294. QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
  295. return q;
  296. }
  297. static int qeth_cq_init(struct qeth_card *card)
  298. {
  299. int rc;
  300. if (card->options.cq == QETH_CQ_ENABLED) {
  301. QETH_DBF_TEXT(SETUP, 2, "cqinit");
  302. qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
  303. QDIO_MAX_BUFFERS_PER_Q);
  304. card->qdio.c_q->next_buf_to_init = 127;
  305. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
  306. card->qdio.no_in_queues - 1, 0,
  307. 127);
  308. if (rc) {
  309. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  310. goto out;
  311. }
  312. }
  313. rc = 0;
  314. out:
  315. return rc;
  316. }
  317. static int qeth_alloc_cq(struct qeth_card *card)
  318. {
  319. int rc;
  320. if (card->options.cq == QETH_CQ_ENABLED) {
  321. int i;
  322. struct qdio_outbuf_state *outbuf_states;
  323. QETH_DBF_TEXT(SETUP, 2, "cqon");
  324. card->qdio.c_q = qeth_alloc_qdio_queue();
  325. if (!card->qdio.c_q) {
  326. rc = -1;
  327. goto kmsg_out;
  328. }
  329. card->qdio.no_in_queues = 2;
  330. card->qdio.out_bufstates =
  331. kcalloc(card->qdio.no_out_queues *
  332. QDIO_MAX_BUFFERS_PER_Q,
  333. sizeof(struct qdio_outbuf_state),
  334. GFP_KERNEL);
  335. outbuf_states = card->qdio.out_bufstates;
  336. if (outbuf_states == NULL) {
  337. rc = -1;
  338. goto free_cq_out;
  339. }
  340. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  341. card->qdio.out_qs[i]->bufstates = outbuf_states;
  342. outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
  343. }
  344. } else {
  345. QETH_DBF_TEXT(SETUP, 2, "nocq");
  346. card->qdio.c_q = NULL;
  347. card->qdio.no_in_queues = 1;
  348. }
  349. QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
  350. rc = 0;
  351. out:
  352. return rc;
  353. free_cq_out:
  354. qeth_free_qdio_queue(card->qdio.c_q);
  355. card->qdio.c_q = NULL;
  356. kmsg_out:
  357. dev_err(&card->gdev->dev, "Failed to create completion queue\n");
  358. goto out;
  359. }
  360. static void qeth_free_cq(struct qeth_card *card)
  361. {
  362. if (card->qdio.c_q) {
  363. --card->qdio.no_in_queues;
  364. qeth_free_qdio_queue(card->qdio.c_q);
  365. card->qdio.c_q = NULL;
  366. }
  367. kfree(card->qdio.out_bufstates);
  368. card->qdio.out_bufstates = NULL;
  369. }
  370. static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
  371. int delayed)
  372. {
  373. enum iucv_tx_notify n;
  374. switch (sbalf15) {
  375. case 0:
  376. n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
  377. break;
  378. case 4:
  379. case 16:
  380. case 17:
  381. case 18:
  382. n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
  383. TX_NOTIFY_UNREACHABLE;
  384. break;
  385. default:
  386. n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
  387. TX_NOTIFY_GENERALERROR;
  388. break;
  389. }
  390. return n;
  391. }
  392. static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
  393. int forced_cleanup)
  394. {
  395. if (q->card->options.cq != QETH_CQ_ENABLED)
  396. return;
  397. if (q->bufs[bidx]->next_pending != NULL) {
  398. struct qeth_qdio_out_buffer *head = q->bufs[bidx];
  399. struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
  400. while (c) {
  401. if (forced_cleanup ||
  402. atomic_read(&c->state) ==
  403. QETH_QDIO_BUF_HANDLED_DELAYED) {
  404. struct qeth_qdio_out_buffer *f = c;
  405. QETH_CARD_TEXT(f->q->card, 5, "fp");
  406. QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
  407. /* release here to avoid interleaving between
  408. outbound tasklet and inbound tasklet
  409. regarding notifications and lifecycle */
  410. qeth_release_skbs(c);
  411. c = f->next_pending;
  412. WARN_ON_ONCE(head->next_pending != f);
  413. head->next_pending = c;
  414. kmem_cache_free(qeth_qdio_outbuf_cache, f);
  415. } else {
  416. head = c;
  417. c = c->next_pending;
  418. }
  419. }
  420. }
  421. if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
  422. QETH_QDIO_BUF_HANDLED_DELAYED)) {
  423. /* for recovery situations */
  424. qeth_init_qdio_out_buf(q, bidx);
  425. QETH_CARD_TEXT(q->card, 2, "clprecov");
  426. }
  427. }
  428. static void qeth_qdio_handle_aob(struct qeth_card *card,
  429. unsigned long phys_aob_addr)
  430. {
  431. struct qaob *aob;
  432. struct qeth_qdio_out_buffer *buffer;
  433. enum iucv_tx_notify notification;
  434. unsigned int i;
  435. aob = (struct qaob *) phys_to_virt(phys_aob_addr);
  436. QETH_CARD_TEXT(card, 5, "haob");
  437. QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
  438. buffer = (struct qeth_qdio_out_buffer *) aob->user1;
  439. QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
  440. if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
  441. QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
  442. notification = TX_NOTIFY_OK;
  443. } else {
  444. WARN_ON_ONCE(atomic_read(&buffer->state) !=
  445. QETH_QDIO_BUF_PENDING);
  446. atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
  447. notification = TX_NOTIFY_DELAYED_OK;
  448. }
  449. if (aob->aorc != 0) {
  450. QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
  451. notification = qeth_compute_cq_notification(aob->aorc, 1);
  452. }
  453. qeth_notify_skbs(buffer->q, buffer, notification);
  454. /* Free dangling allocations. The attached skbs are handled by
  455. * qeth_cleanup_handled_pending().
  456. */
  457. for (i = 0;
  458. i < aob->sb_count && i < QETH_MAX_BUFFER_ELEMENTS(card);
  459. i++) {
  460. if (aob->sba[i] && buffer->is_header[i])
  461. kmem_cache_free(qeth_core_header_cache,
  462. (void *) aob->sba[i]);
  463. }
  464. atomic_set(&buffer->state, QETH_QDIO_BUF_HANDLED_DELAYED);
  465. qdio_release_aob(aob);
  466. }
  467. static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
  468. {
  469. return card->options.cq == QETH_CQ_ENABLED &&
  470. card->qdio.c_q != NULL &&
  471. queue != 0 &&
  472. queue == card->qdio.no_in_queues - 1;
  473. }
  474. static int __qeth_issue_next_read(struct qeth_card *card)
  475. {
  476. int rc;
  477. struct qeth_cmd_buffer *iob;
  478. QETH_CARD_TEXT(card, 5, "issnxrd");
  479. if (card->read.state != CH_STATE_UP)
  480. return -EIO;
  481. iob = qeth_get_buffer(&card->read);
  482. if (!iob) {
  483. dev_warn(&card->gdev->dev, "The qeth device driver "
  484. "failed to recover an error on the device\n");
  485. QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
  486. "available\n", dev_name(&card->gdev->dev));
  487. return -ENOMEM;
  488. }
  489. qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
  490. QETH_CARD_TEXT(card, 6, "noirqpnd");
  491. rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
  492. (addr_t) iob, 0, 0);
  493. if (rc) {
  494. QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
  495. "rc=%i\n", dev_name(&card->gdev->dev), rc);
  496. atomic_set(&card->read.irq_pending, 0);
  497. card->read_or_write_problem = 1;
  498. qeth_schedule_recovery(card);
  499. wake_up(&card->wait_q);
  500. }
  501. return rc;
  502. }
  503. static int qeth_issue_next_read(struct qeth_card *card)
  504. {
  505. int ret;
  506. spin_lock_irq(get_ccwdev_lock(CARD_RDEV(card)));
  507. ret = __qeth_issue_next_read(card);
  508. spin_unlock_irq(get_ccwdev_lock(CARD_RDEV(card)));
  509. return ret;
  510. }
  511. static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
  512. {
  513. struct qeth_reply *reply;
  514. reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
  515. if (reply) {
  516. refcount_set(&reply->refcnt, 1);
  517. atomic_set(&reply->received, 0);
  518. reply->card = card;
  519. }
  520. return reply;
  521. }
  522. static void qeth_get_reply(struct qeth_reply *reply)
  523. {
  524. refcount_inc(&reply->refcnt);
  525. }
  526. static void qeth_put_reply(struct qeth_reply *reply)
  527. {
  528. if (refcount_dec_and_test(&reply->refcnt))
  529. kfree(reply);
  530. }
  531. static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
  532. struct qeth_card *card)
  533. {
  534. char *ipa_name;
  535. int com = cmd->hdr.command;
  536. ipa_name = qeth_get_ipa_cmd_name(com);
  537. if (rc)
  538. QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
  539. "x%X \"%s\"\n",
  540. ipa_name, com, dev_name(&card->gdev->dev),
  541. QETH_CARD_IFNAME(card), rc,
  542. qeth_get_ipa_msg(rc));
  543. else
  544. QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
  545. ipa_name, com, dev_name(&card->gdev->dev),
  546. QETH_CARD_IFNAME(card));
  547. }
  548. static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
  549. struct qeth_cmd_buffer *iob)
  550. {
  551. struct qeth_ipa_cmd *cmd = NULL;
  552. QETH_CARD_TEXT(card, 5, "chkipad");
  553. if (IS_IPA(iob->data)) {
  554. cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
  555. if (IS_IPA_REPLY(cmd)) {
  556. if (cmd->hdr.command != IPA_CMD_SETCCID &&
  557. cmd->hdr.command != IPA_CMD_DELCCID &&
  558. cmd->hdr.command != IPA_CMD_MODCCID &&
  559. cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
  560. qeth_issue_ipa_msg(cmd,
  561. cmd->hdr.return_code, card);
  562. return cmd;
  563. } else {
  564. switch (cmd->hdr.command) {
  565. case IPA_CMD_STOPLAN:
  566. if (cmd->hdr.return_code ==
  567. IPA_RC_VEPA_TO_VEB_TRANSITION) {
  568. dev_err(&card->gdev->dev,
  569. "Interface %s is down because the "
  570. "adjacent port is no longer in "
  571. "reflective relay mode\n",
  572. QETH_CARD_IFNAME(card));
  573. qeth_close_dev(card);
  574. } else {
  575. dev_warn(&card->gdev->dev,
  576. "The link for interface %s on CHPID"
  577. " 0x%X failed\n",
  578. QETH_CARD_IFNAME(card),
  579. card->info.chpid);
  580. qeth_issue_ipa_msg(cmd,
  581. cmd->hdr.return_code, card);
  582. }
  583. card->lan_online = 0;
  584. if (card->dev && netif_carrier_ok(card->dev))
  585. netif_carrier_off(card->dev);
  586. return NULL;
  587. case IPA_CMD_STARTLAN:
  588. dev_info(&card->gdev->dev,
  589. "The link for %s on CHPID 0x%X has"
  590. " been restored\n",
  591. QETH_CARD_IFNAME(card),
  592. card->info.chpid);
  593. netif_carrier_on(card->dev);
  594. card->lan_online = 1;
  595. if (card->info.hwtrap)
  596. card->info.hwtrap = 2;
  597. qeth_schedule_recovery(card);
  598. return NULL;
  599. case IPA_CMD_SETBRIDGEPORT_IQD:
  600. case IPA_CMD_SETBRIDGEPORT_OSA:
  601. case IPA_CMD_ADDRESS_CHANGE_NOTIF:
  602. if (card->discipline->control_event_handler
  603. (card, cmd))
  604. return cmd;
  605. else
  606. return NULL;
  607. case IPA_CMD_MODCCID:
  608. return cmd;
  609. case IPA_CMD_REGISTER_LOCAL_ADDR:
  610. QETH_CARD_TEXT(card, 3, "irla");
  611. break;
  612. case IPA_CMD_UNREGISTER_LOCAL_ADDR:
  613. QETH_CARD_TEXT(card, 3, "urla");
  614. break;
  615. default:
  616. QETH_DBF_MESSAGE(2, "Received data is IPA "
  617. "but not a reply!\n");
  618. break;
  619. }
  620. }
  621. }
  622. return cmd;
  623. }
  624. void qeth_clear_ipacmd_list(struct qeth_card *card)
  625. {
  626. struct qeth_reply *reply, *r;
  627. unsigned long flags;
  628. QETH_CARD_TEXT(card, 4, "clipalst");
  629. spin_lock_irqsave(&card->lock, flags);
  630. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  631. qeth_get_reply(reply);
  632. reply->rc = -EIO;
  633. atomic_inc(&reply->received);
  634. list_del_init(&reply->list);
  635. wake_up(&reply->wait_q);
  636. qeth_put_reply(reply);
  637. }
  638. spin_unlock_irqrestore(&card->lock, flags);
  639. }
  640. EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
  641. static int qeth_check_idx_response(struct qeth_card *card,
  642. unsigned char *buffer)
  643. {
  644. if (!buffer)
  645. return 0;
  646. QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
  647. if ((buffer[2] & 0xc0) == 0xc0) {
  648. QETH_DBF_MESSAGE(2, "received an IDX TERMINATE with cause code %#02x\n",
  649. buffer[4]);
  650. QETH_CARD_TEXT(card, 2, "ckidxres");
  651. QETH_CARD_TEXT(card, 2, " idxterm");
  652. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  653. if (buffer[4] == 0xf6) {
  654. dev_err(&card->gdev->dev,
  655. "The qeth device is not configured "
  656. "for the OSI layer required by z/VM\n");
  657. return -EPERM;
  658. }
  659. return -EIO;
  660. }
  661. return 0;
  662. }
  663. static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
  664. {
  665. struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
  666. dev_get_drvdata(&cdev->dev))->dev);
  667. return card;
  668. }
  669. static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
  670. __u32 len)
  671. {
  672. struct qeth_card *card;
  673. card = CARD_FROM_CDEV(channel->ccwdev);
  674. QETH_CARD_TEXT(card, 4, "setupccw");
  675. if (channel == &card->read)
  676. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  677. else
  678. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  679. channel->ccw.count = len;
  680. channel->ccw.cda = (__u32) __pa(iob);
  681. }
  682. static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
  683. {
  684. __u8 index;
  685. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
  686. index = channel->io_buf_no;
  687. do {
  688. if (channel->iob[index].state == BUF_STATE_FREE) {
  689. channel->iob[index].state = BUF_STATE_LOCKED;
  690. channel->io_buf_no = (channel->io_buf_no + 1) %
  691. QETH_CMD_BUFFER_NO;
  692. memset(channel->iob[index].data, 0, QETH_BUFSIZE);
  693. return channel->iob + index;
  694. }
  695. index = (index + 1) % QETH_CMD_BUFFER_NO;
  696. } while (index != channel->io_buf_no);
  697. return NULL;
  698. }
  699. void qeth_release_buffer(struct qeth_channel *channel,
  700. struct qeth_cmd_buffer *iob)
  701. {
  702. unsigned long flags;
  703. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
  704. spin_lock_irqsave(&channel->iob_lock, flags);
  705. memset(iob->data, 0, QETH_BUFSIZE);
  706. iob->state = BUF_STATE_FREE;
  707. iob->callback = qeth_send_control_data_cb;
  708. iob->rc = 0;
  709. spin_unlock_irqrestore(&channel->iob_lock, flags);
  710. wake_up(&channel->wait_q);
  711. }
  712. EXPORT_SYMBOL_GPL(qeth_release_buffer);
  713. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
  714. {
  715. struct qeth_cmd_buffer *buffer = NULL;
  716. unsigned long flags;
  717. spin_lock_irqsave(&channel->iob_lock, flags);
  718. buffer = __qeth_get_buffer(channel);
  719. spin_unlock_irqrestore(&channel->iob_lock, flags);
  720. return buffer;
  721. }
  722. struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
  723. {
  724. struct qeth_cmd_buffer *buffer;
  725. wait_event(channel->wait_q,
  726. ((buffer = qeth_get_buffer(channel)) != NULL));
  727. return buffer;
  728. }
  729. EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
  730. void qeth_clear_cmd_buffers(struct qeth_channel *channel)
  731. {
  732. int cnt;
  733. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  734. qeth_release_buffer(channel, &channel->iob[cnt]);
  735. channel->io_buf_no = 0;
  736. }
  737. EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
  738. static void qeth_send_control_data_cb(struct qeth_channel *channel,
  739. struct qeth_cmd_buffer *iob)
  740. {
  741. struct qeth_card *card;
  742. struct qeth_reply *reply, *r;
  743. struct qeth_ipa_cmd *cmd;
  744. unsigned long flags;
  745. int keep_reply;
  746. int rc = 0;
  747. card = CARD_FROM_CDEV(channel->ccwdev);
  748. QETH_CARD_TEXT(card, 4, "sndctlcb");
  749. rc = qeth_check_idx_response(card, iob->data);
  750. switch (rc) {
  751. case 0:
  752. break;
  753. case -EIO:
  754. qeth_clear_ipacmd_list(card);
  755. qeth_schedule_recovery(card);
  756. /* fall through */
  757. default:
  758. goto out;
  759. }
  760. cmd = qeth_check_ipa_data(card, iob);
  761. if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
  762. goto out;
  763. /*in case of OSN : check if cmd is set */
  764. if (card->info.type == QETH_CARD_TYPE_OSN &&
  765. cmd &&
  766. cmd->hdr.command != IPA_CMD_STARTLAN &&
  767. card->osn_info.assist_cb != NULL) {
  768. card->osn_info.assist_cb(card->dev, cmd);
  769. goto out;
  770. }
  771. spin_lock_irqsave(&card->lock, flags);
  772. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  773. if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
  774. ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
  775. qeth_get_reply(reply);
  776. list_del_init(&reply->list);
  777. spin_unlock_irqrestore(&card->lock, flags);
  778. keep_reply = 0;
  779. if (reply->callback != NULL) {
  780. if (cmd) {
  781. reply->offset = (__u16)((char *)cmd -
  782. (char *)iob->data);
  783. keep_reply = reply->callback(card,
  784. reply,
  785. (unsigned long)cmd);
  786. } else
  787. keep_reply = reply->callback(card,
  788. reply,
  789. (unsigned long)iob);
  790. }
  791. if (cmd)
  792. reply->rc = (u16) cmd->hdr.return_code;
  793. else if (iob->rc)
  794. reply->rc = iob->rc;
  795. if (keep_reply) {
  796. spin_lock_irqsave(&card->lock, flags);
  797. list_add_tail(&reply->list,
  798. &card->cmd_waiter_list);
  799. spin_unlock_irqrestore(&card->lock, flags);
  800. } else {
  801. atomic_inc(&reply->received);
  802. wake_up(&reply->wait_q);
  803. }
  804. qeth_put_reply(reply);
  805. goto out;
  806. }
  807. }
  808. spin_unlock_irqrestore(&card->lock, flags);
  809. out:
  810. memcpy(&card->seqno.pdu_hdr_ack,
  811. QETH_PDU_HEADER_SEQ_NO(iob->data),
  812. QETH_SEQ_NO_LENGTH);
  813. qeth_release_buffer(channel, iob);
  814. }
  815. static int qeth_setup_channel(struct qeth_channel *channel)
  816. {
  817. int cnt;
  818. QETH_DBF_TEXT(SETUP, 2, "setupch");
  819. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
  820. channel->iob[cnt].data =
  821. kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
  822. if (channel->iob[cnt].data == NULL)
  823. break;
  824. channel->iob[cnt].state = BUF_STATE_FREE;
  825. channel->iob[cnt].channel = channel;
  826. channel->iob[cnt].callback = qeth_send_control_data_cb;
  827. channel->iob[cnt].rc = 0;
  828. }
  829. if (cnt < QETH_CMD_BUFFER_NO) {
  830. while (cnt-- > 0)
  831. kfree(channel->iob[cnt].data);
  832. return -ENOMEM;
  833. }
  834. channel->io_buf_no = 0;
  835. atomic_set(&channel->irq_pending, 0);
  836. spin_lock_init(&channel->iob_lock);
  837. init_waitqueue_head(&channel->wait_q);
  838. return 0;
  839. }
  840. static int qeth_set_thread_start_bit(struct qeth_card *card,
  841. unsigned long thread)
  842. {
  843. unsigned long flags;
  844. spin_lock_irqsave(&card->thread_mask_lock, flags);
  845. if (!(card->thread_allowed_mask & thread) ||
  846. (card->thread_start_mask & thread)) {
  847. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  848. return -EPERM;
  849. }
  850. card->thread_start_mask |= thread;
  851. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  852. return 0;
  853. }
  854. void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
  855. {
  856. unsigned long flags;
  857. spin_lock_irqsave(&card->thread_mask_lock, flags);
  858. card->thread_start_mask &= ~thread;
  859. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  860. wake_up(&card->wait_q);
  861. }
  862. EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
  863. void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
  864. {
  865. unsigned long flags;
  866. spin_lock_irqsave(&card->thread_mask_lock, flags);
  867. card->thread_running_mask &= ~thread;
  868. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  869. wake_up_all(&card->wait_q);
  870. }
  871. EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
  872. static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  873. {
  874. unsigned long flags;
  875. int rc = 0;
  876. spin_lock_irqsave(&card->thread_mask_lock, flags);
  877. if (card->thread_start_mask & thread) {
  878. if ((card->thread_allowed_mask & thread) &&
  879. !(card->thread_running_mask & thread)) {
  880. rc = 1;
  881. card->thread_start_mask &= ~thread;
  882. card->thread_running_mask |= thread;
  883. } else
  884. rc = -EPERM;
  885. }
  886. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  887. return rc;
  888. }
  889. int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  890. {
  891. int rc = 0;
  892. wait_event(card->wait_q,
  893. (rc = __qeth_do_run_thread(card, thread)) >= 0);
  894. return rc;
  895. }
  896. EXPORT_SYMBOL_GPL(qeth_do_run_thread);
  897. void qeth_schedule_recovery(struct qeth_card *card)
  898. {
  899. QETH_CARD_TEXT(card, 2, "startrec");
  900. if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
  901. schedule_work(&card->kernel_thread_starter);
  902. }
  903. EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
  904. static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
  905. {
  906. int dstat, cstat;
  907. char *sense;
  908. struct qeth_card *card;
  909. sense = (char *) irb->ecw;
  910. cstat = irb->scsw.cmd.cstat;
  911. dstat = irb->scsw.cmd.dstat;
  912. card = CARD_FROM_CDEV(cdev);
  913. if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
  914. SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
  915. SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
  916. QETH_CARD_TEXT(card, 2, "CGENCHK");
  917. dev_warn(&cdev->dev, "The qeth device driver "
  918. "failed to recover an error on the device\n");
  919. QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
  920. dev_name(&cdev->dev), dstat, cstat);
  921. print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
  922. 16, 1, irb, 64, 1);
  923. return 1;
  924. }
  925. if (dstat & DEV_STAT_UNIT_CHECK) {
  926. if (sense[SENSE_RESETTING_EVENT_BYTE] &
  927. SENSE_RESETTING_EVENT_FLAG) {
  928. QETH_CARD_TEXT(card, 2, "REVIND");
  929. return 1;
  930. }
  931. if (sense[SENSE_COMMAND_REJECT_BYTE] &
  932. SENSE_COMMAND_REJECT_FLAG) {
  933. QETH_CARD_TEXT(card, 2, "CMDREJi");
  934. return 1;
  935. }
  936. if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
  937. QETH_CARD_TEXT(card, 2, "AFFE");
  938. return 1;
  939. }
  940. if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
  941. QETH_CARD_TEXT(card, 2, "ZEROSEN");
  942. return 0;
  943. }
  944. QETH_CARD_TEXT(card, 2, "DGENCHK");
  945. return 1;
  946. }
  947. return 0;
  948. }
  949. static long __qeth_check_irb_error(struct ccw_device *cdev,
  950. unsigned long intparm, struct irb *irb)
  951. {
  952. struct qeth_card *card;
  953. card = CARD_FROM_CDEV(cdev);
  954. if (!card || !IS_ERR(irb))
  955. return 0;
  956. switch (PTR_ERR(irb)) {
  957. case -EIO:
  958. QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
  959. dev_name(&cdev->dev));
  960. QETH_CARD_TEXT(card, 2, "ckirberr");
  961. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  962. break;
  963. case -ETIMEDOUT:
  964. dev_warn(&cdev->dev, "A hardware operation timed out"
  965. " on the device\n");
  966. QETH_CARD_TEXT(card, 2, "ckirberr");
  967. QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
  968. if (intparm == QETH_RCD_PARM) {
  969. if (card->data.ccwdev == cdev) {
  970. card->data.state = CH_STATE_DOWN;
  971. wake_up(&card->wait_q);
  972. }
  973. }
  974. break;
  975. default:
  976. QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
  977. dev_name(&cdev->dev), PTR_ERR(irb));
  978. QETH_CARD_TEXT(card, 2, "ckirberr");
  979. QETH_CARD_TEXT(card, 2, " rc???");
  980. }
  981. return PTR_ERR(irb);
  982. }
  983. static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
  984. struct irb *irb)
  985. {
  986. int rc;
  987. int cstat, dstat;
  988. struct qeth_cmd_buffer *iob = NULL;
  989. struct qeth_channel *channel;
  990. struct qeth_card *card;
  991. card = CARD_FROM_CDEV(cdev);
  992. if (!card)
  993. return;
  994. QETH_CARD_TEXT(card, 5, "irq");
  995. if (card->read.ccwdev == cdev) {
  996. channel = &card->read;
  997. QETH_CARD_TEXT(card, 5, "read");
  998. } else if (card->write.ccwdev == cdev) {
  999. channel = &card->write;
  1000. QETH_CARD_TEXT(card, 5, "write");
  1001. } else {
  1002. channel = &card->data;
  1003. QETH_CARD_TEXT(card, 5, "data");
  1004. }
  1005. if (qeth_intparm_is_iob(intparm))
  1006. iob = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
  1007. if (__qeth_check_irb_error(cdev, intparm, irb)) {
  1008. /* IO was terminated, free its resources. */
  1009. if (iob)
  1010. qeth_release_buffer(iob->channel, iob);
  1011. atomic_set(&channel->irq_pending, 0);
  1012. wake_up(&card->wait_q);
  1013. return;
  1014. }
  1015. atomic_set(&channel->irq_pending, 0);
  1016. if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
  1017. channel->state = CH_STATE_STOPPED;
  1018. if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
  1019. channel->state = CH_STATE_HALTED;
  1020. /*let's wake up immediately on data channel*/
  1021. if ((channel == &card->data) && (intparm != 0) &&
  1022. (intparm != QETH_RCD_PARM))
  1023. goto out;
  1024. if (intparm == QETH_CLEAR_CHANNEL_PARM) {
  1025. QETH_CARD_TEXT(card, 6, "clrchpar");
  1026. /* we don't have to handle this further */
  1027. intparm = 0;
  1028. }
  1029. if (intparm == QETH_HALT_CHANNEL_PARM) {
  1030. QETH_CARD_TEXT(card, 6, "hltchpar");
  1031. /* we don't have to handle this further */
  1032. intparm = 0;
  1033. }
  1034. cstat = irb->scsw.cmd.cstat;
  1035. dstat = irb->scsw.cmd.dstat;
  1036. if ((dstat & DEV_STAT_UNIT_EXCEP) ||
  1037. (dstat & DEV_STAT_UNIT_CHECK) ||
  1038. (cstat)) {
  1039. if (irb->esw.esw0.erw.cons) {
  1040. dev_warn(&channel->ccwdev->dev,
  1041. "The qeth device driver failed to recover "
  1042. "an error on the device\n");
  1043. QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
  1044. "0x%X dstat 0x%X\n",
  1045. dev_name(&channel->ccwdev->dev), cstat, dstat);
  1046. print_hex_dump(KERN_WARNING, "qeth: irb ",
  1047. DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
  1048. print_hex_dump(KERN_WARNING, "qeth: sense data ",
  1049. DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
  1050. }
  1051. if (intparm == QETH_RCD_PARM) {
  1052. channel->state = CH_STATE_DOWN;
  1053. goto out;
  1054. }
  1055. rc = qeth_get_problem(cdev, irb);
  1056. if (rc) {
  1057. card->read_or_write_problem = 1;
  1058. qeth_clear_ipacmd_list(card);
  1059. qeth_schedule_recovery(card);
  1060. goto out;
  1061. }
  1062. }
  1063. if (intparm == QETH_RCD_PARM) {
  1064. channel->state = CH_STATE_RCD_DONE;
  1065. goto out;
  1066. }
  1067. if (channel == &card->data)
  1068. return;
  1069. if (channel == &card->read &&
  1070. channel->state == CH_STATE_UP)
  1071. __qeth_issue_next_read(card);
  1072. if (iob && iob->callback)
  1073. iob->callback(iob->channel, iob);
  1074. out:
  1075. wake_up(&card->wait_q);
  1076. return;
  1077. }
  1078. static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
  1079. struct qeth_qdio_out_buffer *buf,
  1080. enum iucv_tx_notify notification)
  1081. {
  1082. struct sk_buff *skb;
  1083. if (skb_queue_empty(&buf->skb_list))
  1084. goto out;
  1085. skb = skb_peek(&buf->skb_list);
  1086. while (skb) {
  1087. QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
  1088. QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
  1089. if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
  1090. if (skb->sk) {
  1091. struct iucv_sock *iucv = iucv_sk(skb->sk);
  1092. iucv->sk_txnotify(skb, notification);
  1093. }
  1094. }
  1095. if (skb_queue_is_last(&buf->skb_list, skb))
  1096. skb = NULL;
  1097. else
  1098. skb = skb_queue_next(&buf->skb_list, skb);
  1099. }
  1100. out:
  1101. return;
  1102. }
  1103. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
  1104. {
  1105. struct sk_buff *skb;
  1106. struct iucv_sock *iucv;
  1107. int notify_general_error = 0;
  1108. if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
  1109. notify_general_error = 1;
  1110. /* release may never happen from within CQ tasklet scope */
  1111. WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
  1112. skb = skb_dequeue(&buf->skb_list);
  1113. while (skb) {
  1114. QETH_CARD_TEXT(buf->q->card, 5, "skbr");
  1115. QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
  1116. if (notify_general_error &&
  1117. be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
  1118. if (skb->sk) {
  1119. iucv = iucv_sk(skb->sk);
  1120. iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
  1121. }
  1122. }
  1123. refcount_dec(&skb->users);
  1124. dev_kfree_skb_any(skb);
  1125. skb = skb_dequeue(&buf->skb_list);
  1126. }
  1127. }
  1128. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  1129. struct qeth_qdio_out_buffer *buf)
  1130. {
  1131. int i;
  1132. /* is PCI flag set on buffer? */
  1133. if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
  1134. atomic_dec(&queue->set_pci_flags_count);
  1135. qeth_release_skbs(buf);
  1136. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
  1137. if (buf->buffer->element[i].addr && buf->is_header[i])
  1138. kmem_cache_free(qeth_core_header_cache,
  1139. buf->buffer->element[i].addr);
  1140. buf->is_header[i] = 0;
  1141. }
  1142. qeth_scrub_qdio_buffer(buf->buffer,
  1143. QETH_MAX_BUFFER_ELEMENTS(queue->card));
  1144. buf->next_element_to_fill = 0;
  1145. atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
  1146. }
  1147. static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
  1148. {
  1149. int j;
  1150. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  1151. if (!q->bufs[j])
  1152. continue;
  1153. qeth_cleanup_handled_pending(q, j, 1);
  1154. qeth_clear_output_buffer(q, q->bufs[j]);
  1155. if (free) {
  1156. kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
  1157. q->bufs[j] = NULL;
  1158. }
  1159. }
  1160. }
  1161. void qeth_clear_qdio_buffers(struct qeth_card *card)
  1162. {
  1163. int i;
  1164. QETH_CARD_TEXT(card, 2, "clearqdbf");
  1165. /* clear outbound buffers to free skbs */
  1166. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1167. if (card->qdio.out_qs[i]) {
  1168. qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
  1169. }
  1170. }
  1171. }
  1172. EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
  1173. static void qeth_free_buffer_pool(struct qeth_card *card)
  1174. {
  1175. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  1176. int i = 0;
  1177. list_for_each_entry_safe(pool_entry, tmp,
  1178. &card->qdio.init_pool.entry_list, init_list){
  1179. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
  1180. free_page((unsigned long)pool_entry->elements[i]);
  1181. list_del(&pool_entry->init_list);
  1182. kfree(pool_entry);
  1183. }
  1184. }
  1185. static void qeth_clean_channel(struct qeth_channel *channel)
  1186. {
  1187. int cnt;
  1188. QETH_DBF_TEXT(SETUP, 2, "freech");
  1189. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  1190. kfree(channel->iob[cnt].data);
  1191. }
  1192. static void qeth_set_single_write_queues(struct qeth_card *card)
  1193. {
  1194. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1195. (card->qdio.no_out_queues == 4))
  1196. qeth_free_qdio_buffers(card);
  1197. card->qdio.no_out_queues = 1;
  1198. if (card->qdio.default_out_queue != 0)
  1199. dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
  1200. card->qdio.default_out_queue = 0;
  1201. }
  1202. static void qeth_set_multiple_write_queues(struct qeth_card *card)
  1203. {
  1204. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1205. (card->qdio.no_out_queues == 1)) {
  1206. qeth_free_qdio_buffers(card);
  1207. card->qdio.default_out_queue = 2;
  1208. }
  1209. card->qdio.no_out_queues = 4;
  1210. }
  1211. static void qeth_update_from_chp_desc(struct qeth_card *card)
  1212. {
  1213. struct ccw_device *ccwdev;
  1214. struct channel_path_desc_fmt0 *chp_dsc;
  1215. QETH_DBF_TEXT(SETUP, 2, "chp_desc");
  1216. ccwdev = card->data.ccwdev;
  1217. chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
  1218. if (!chp_dsc)
  1219. goto out;
  1220. card->info.func_level = 0x4100 + chp_dsc->desc;
  1221. if (card->info.type == QETH_CARD_TYPE_IQD)
  1222. goto out;
  1223. /* CHPP field bit 6 == 1 -> single queue */
  1224. if ((chp_dsc->chpp & 0x02) == 0x02)
  1225. qeth_set_single_write_queues(card);
  1226. else
  1227. qeth_set_multiple_write_queues(card);
  1228. out:
  1229. kfree(chp_dsc);
  1230. QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
  1231. QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
  1232. }
  1233. static void qeth_init_qdio_info(struct qeth_card *card)
  1234. {
  1235. QETH_DBF_TEXT(SETUP, 4, "intqdinf");
  1236. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  1237. /* inbound */
  1238. card->qdio.no_in_queues = 1;
  1239. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  1240. if (card->info.type == QETH_CARD_TYPE_IQD)
  1241. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
  1242. else
  1243. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
  1244. card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
  1245. INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
  1246. INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
  1247. }
  1248. static void qeth_set_intial_options(struct qeth_card *card)
  1249. {
  1250. card->options.route4.type = NO_ROUTER;
  1251. card->options.route6.type = NO_ROUTER;
  1252. card->options.fake_broadcast = 0;
  1253. card->options.performance_stats = 0;
  1254. card->options.rx_sg_cb = QETH_RX_SG_CB;
  1255. card->options.isolation = ISOLATION_MODE_NONE;
  1256. card->options.cq = QETH_CQ_DISABLED;
  1257. }
  1258. static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
  1259. {
  1260. unsigned long flags;
  1261. int rc = 0;
  1262. spin_lock_irqsave(&card->thread_mask_lock, flags);
  1263. QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
  1264. (u8) card->thread_start_mask,
  1265. (u8) card->thread_allowed_mask,
  1266. (u8) card->thread_running_mask);
  1267. rc = (card->thread_start_mask & thread);
  1268. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  1269. return rc;
  1270. }
  1271. static void qeth_start_kernel_thread(struct work_struct *work)
  1272. {
  1273. struct task_struct *ts;
  1274. struct qeth_card *card = container_of(work, struct qeth_card,
  1275. kernel_thread_starter);
  1276. QETH_CARD_TEXT(card , 2, "strthrd");
  1277. if (card->read.state != CH_STATE_UP &&
  1278. card->write.state != CH_STATE_UP)
  1279. return;
  1280. if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
  1281. ts = kthread_run(card->discipline->recover, (void *)card,
  1282. "qeth_recover");
  1283. if (IS_ERR(ts)) {
  1284. qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
  1285. qeth_clear_thread_running_bit(card,
  1286. QETH_RECOVER_THREAD);
  1287. }
  1288. }
  1289. }
  1290. static void qeth_buffer_reclaim_work(struct work_struct *);
  1291. static int qeth_setup_card(struct qeth_card *card)
  1292. {
  1293. QETH_DBF_TEXT(SETUP, 2, "setupcrd");
  1294. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1295. card->read.state = CH_STATE_DOWN;
  1296. card->write.state = CH_STATE_DOWN;
  1297. card->data.state = CH_STATE_DOWN;
  1298. card->state = CARD_STATE_DOWN;
  1299. card->lan_online = 0;
  1300. card->read_or_write_problem = 0;
  1301. card->dev = NULL;
  1302. spin_lock_init(&card->mclock);
  1303. spin_lock_init(&card->lock);
  1304. spin_lock_init(&card->ip_lock);
  1305. spin_lock_init(&card->thread_mask_lock);
  1306. mutex_init(&card->conf_mutex);
  1307. mutex_init(&card->discipline_mutex);
  1308. mutex_init(&card->vid_list_mutex);
  1309. card->thread_start_mask = 0;
  1310. card->thread_allowed_mask = 0;
  1311. card->thread_running_mask = 0;
  1312. INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
  1313. INIT_LIST_HEAD(&card->cmd_waiter_list);
  1314. init_waitqueue_head(&card->wait_q);
  1315. /* initial options */
  1316. qeth_set_intial_options(card);
  1317. /* IP address takeover */
  1318. INIT_LIST_HEAD(&card->ipato.entries);
  1319. card->ipato.enabled = false;
  1320. card->ipato.invert4 = false;
  1321. card->ipato.invert6 = false;
  1322. /* init QDIO stuff */
  1323. qeth_init_qdio_info(card);
  1324. INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
  1325. INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
  1326. return 0;
  1327. }
  1328. static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
  1329. {
  1330. struct qeth_card *card = container_of(slr, struct qeth_card,
  1331. qeth_service_level);
  1332. if (card->info.mcl_level[0])
  1333. seq_printf(m, "qeth: %s firmware level %s\n",
  1334. CARD_BUS_ID(card), card->info.mcl_level);
  1335. }
  1336. static struct qeth_card *qeth_alloc_card(void)
  1337. {
  1338. struct qeth_card *card;
  1339. QETH_DBF_TEXT(SETUP, 2, "alloccrd");
  1340. card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
  1341. if (!card)
  1342. goto out;
  1343. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1344. if (qeth_setup_channel(&card->read))
  1345. goto out_ip;
  1346. if (qeth_setup_channel(&card->write))
  1347. goto out_channel;
  1348. card->options.layer2 = -1;
  1349. card->qeth_service_level.seq_print = qeth_core_sl_print;
  1350. register_service_level(&card->qeth_service_level);
  1351. return card;
  1352. out_channel:
  1353. qeth_clean_channel(&card->read);
  1354. out_ip:
  1355. kfree(card);
  1356. out:
  1357. return NULL;
  1358. }
  1359. static void qeth_determine_card_type(struct qeth_card *card)
  1360. {
  1361. QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
  1362. card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
  1363. card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
  1364. card->info.type = CARD_RDEV(card)->id.driver_info;
  1365. card->qdio.no_out_queues = QETH_MAX_QUEUES;
  1366. if (card->info.type == QETH_CARD_TYPE_IQD)
  1367. card->info.is_multicast_different = 0x0103;
  1368. qeth_update_from_chp_desc(card);
  1369. }
  1370. static int qeth_clear_channel(struct qeth_channel *channel)
  1371. {
  1372. unsigned long flags;
  1373. struct qeth_card *card;
  1374. int rc;
  1375. card = CARD_FROM_CDEV(channel->ccwdev);
  1376. QETH_CARD_TEXT(card, 3, "clearch");
  1377. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1378. rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
  1379. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1380. if (rc)
  1381. return rc;
  1382. rc = wait_event_interruptible_timeout(card->wait_q,
  1383. channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
  1384. if (rc == -ERESTARTSYS)
  1385. return rc;
  1386. if (channel->state != CH_STATE_STOPPED)
  1387. return -ETIME;
  1388. channel->state = CH_STATE_DOWN;
  1389. return 0;
  1390. }
  1391. static int qeth_halt_channel(struct qeth_channel *channel)
  1392. {
  1393. unsigned long flags;
  1394. struct qeth_card *card;
  1395. int rc;
  1396. card = CARD_FROM_CDEV(channel->ccwdev);
  1397. QETH_CARD_TEXT(card, 3, "haltch");
  1398. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1399. rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
  1400. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1401. if (rc)
  1402. return rc;
  1403. rc = wait_event_interruptible_timeout(card->wait_q,
  1404. channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
  1405. if (rc == -ERESTARTSYS)
  1406. return rc;
  1407. if (channel->state != CH_STATE_HALTED)
  1408. return -ETIME;
  1409. return 0;
  1410. }
  1411. static int qeth_halt_channels(struct qeth_card *card)
  1412. {
  1413. int rc1 = 0, rc2 = 0, rc3 = 0;
  1414. QETH_CARD_TEXT(card, 3, "haltchs");
  1415. rc1 = qeth_halt_channel(&card->read);
  1416. rc2 = qeth_halt_channel(&card->write);
  1417. rc3 = qeth_halt_channel(&card->data);
  1418. if (rc1)
  1419. return rc1;
  1420. if (rc2)
  1421. return rc2;
  1422. return rc3;
  1423. }
  1424. static int qeth_clear_channels(struct qeth_card *card)
  1425. {
  1426. int rc1 = 0, rc2 = 0, rc3 = 0;
  1427. QETH_CARD_TEXT(card, 3, "clearchs");
  1428. rc1 = qeth_clear_channel(&card->read);
  1429. rc2 = qeth_clear_channel(&card->write);
  1430. rc3 = qeth_clear_channel(&card->data);
  1431. if (rc1)
  1432. return rc1;
  1433. if (rc2)
  1434. return rc2;
  1435. return rc3;
  1436. }
  1437. static int qeth_clear_halt_card(struct qeth_card *card, int halt)
  1438. {
  1439. int rc = 0;
  1440. QETH_CARD_TEXT(card, 3, "clhacrd");
  1441. if (halt)
  1442. rc = qeth_halt_channels(card);
  1443. if (rc)
  1444. return rc;
  1445. return qeth_clear_channels(card);
  1446. }
  1447. int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
  1448. {
  1449. int rc = 0;
  1450. QETH_CARD_TEXT(card, 3, "qdioclr");
  1451. switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
  1452. QETH_QDIO_CLEANING)) {
  1453. case QETH_QDIO_ESTABLISHED:
  1454. if (card->info.type == QETH_CARD_TYPE_IQD)
  1455. rc = qdio_shutdown(CARD_DDEV(card),
  1456. QDIO_FLAG_CLEANUP_USING_HALT);
  1457. else
  1458. rc = qdio_shutdown(CARD_DDEV(card),
  1459. QDIO_FLAG_CLEANUP_USING_CLEAR);
  1460. if (rc)
  1461. QETH_CARD_TEXT_(card, 3, "1err%d", rc);
  1462. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  1463. break;
  1464. case QETH_QDIO_CLEANING:
  1465. return rc;
  1466. default:
  1467. break;
  1468. }
  1469. rc = qeth_clear_halt_card(card, use_halt);
  1470. if (rc)
  1471. QETH_CARD_TEXT_(card, 3, "2err%d", rc);
  1472. card->state = CARD_STATE_DOWN;
  1473. return rc;
  1474. }
  1475. EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
  1476. static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
  1477. int *length)
  1478. {
  1479. struct ciw *ciw;
  1480. char *rcd_buf;
  1481. int ret;
  1482. struct qeth_channel *channel = &card->data;
  1483. unsigned long flags;
  1484. /*
  1485. * scan for RCD command in extended SenseID data
  1486. */
  1487. ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
  1488. if (!ciw || ciw->cmd == 0)
  1489. return -EOPNOTSUPP;
  1490. rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
  1491. if (!rcd_buf)
  1492. return -ENOMEM;
  1493. channel->ccw.cmd_code = ciw->cmd;
  1494. channel->ccw.cda = (__u32) __pa(rcd_buf);
  1495. channel->ccw.count = ciw->count;
  1496. channel->ccw.flags = CCW_FLAG_SLI;
  1497. channel->state = CH_STATE_RCD;
  1498. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1499. ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1500. QETH_RCD_PARM, LPM_ANYPATH, 0,
  1501. QETH_RCD_TIMEOUT);
  1502. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1503. if (!ret)
  1504. wait_event(card->wait_q,
  1505. (channel->state == CH_STATE_RCD_DONE ||
  1506. channel->state == CH_STATE_DOWN));
  1507. if (channel->state == CH_STATE_DOWN)
  1508. ret = -EIO;
  1509. else
  1510. channel->state = CH_STATE_DOWN;
  1511. if (ret) {
  1512. kfree(rcd_buf);
  1513. *buffer = NULL;
  1514. *length = 0;
  1515. } else {
  1516. *length = ciw->count;
  1517. *buffer = rcd_buf;
  1518. }
  1519. return ret;
  1520. }
  1521. static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
  1522. {
  1523. QETH_DBF_TEXT(SETUP, 2, "cfgunit");
  1524. card->info.chpid = prcd[30];
  1525. card->info.unit_addr2 = prcd[31];
  1526. card->info.cula = prcd[63];
  1527. card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
  1528. (prcd[0x11] == _ascebc['M']));
  1529. }
  1530. static enum qeth_discipline_id qeth_vm_detect_layer(struct qeth_card *card)
  1531. {
  1532. enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
  1533. struct diag26c_vnic_resp *response = NULL;
  1534. struct diag26c_vnic_req *request = NULL;
  1535. struct ccw_dev_id id;
  1536. char userid[80];
  1537. int rc = 0;
  1538. QETH_DBF_TEXT(SETUP, 2, "vmlayer");
  1539. cpcmd("QUERY USERID", userid, sizeof(userid), &rc);
  1540. if (rc)
  1541. goto out;
  1542. request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
  1543. response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
  1544. if (!request || !response) {
  1545. rc = -ENOMEM;
  1546. goto out;
  1547. }
  1548. ccw_device_get_id(CARD_RDEV(card), &id);
  1549. request->resp_buf_len = sizeof(*response);
  1550. request->resp_version = DIAG26C_VERSION6_VM65918;
  1551. request->req_format = DIAG26C_VNIC_INFO;
  1552. ASCEBC(userid, 8);
  1553. memcpy(&request->sys_name, userid, 8);
  1554. request->devno = id.devno;
  1555. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  1556. rc = diag26c(request, response, DIAG26C_PORT_VNIC);
  1557. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  1558. if (rc)
  1559. goto out;
  1560. QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
  1561. if (request->resp_buf_len < sizeof(*response) ||
  1562. response->version != request->resp_version) {
  1563. rc = -EIO;
  1564. goto out;
  1565. }
  1566. if (response->protocol == VNIC_INFO_PROT_L2)
  1567. disc = QETH_DISCIPLINE_LAYER2;
  1568. else if (response->protocol == VNIC_INFO_PROT_L3)
  1569. disc = QETH_DISCIPLINE_LAYER3;
  1570. out:
  1571. kfree(response);
  1572. kfree(request);
  1573. if (rc)
  1574. QETH_DBF_TEXT_(SETUP, 2, "err%x", rc);
  1575. return disc;
  1576. }
  1577. /* Determine whether the device requires a specific layer discipline */
  1578. static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
  1579. {
  1580. enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
  1581. if (card->info.type == QETH_CARD_TYPE_OSM ||
  1582. card->info.type == QETH_CARD_TYPE_OSN)
  1583. disc = QETH_DISCIPLINE_LAYER2;
  1584. else if (card->info.guestlan)
  1585. disc = (card->info.type == QETH_CARD_TYPE_IQD) ?
  1586. QETH_DISCIPLINE_LAYER3 :
  1587. qeth_vm_detect_layer(card);
  1588. switch (disc) {
  1589. case QETH_DISCIPLINE_LAYER2:
  1590. QETH_DBF_TEXT(SETUP, 3, "force l2");
  1591. break;
  1592. case QETH_DISCIPLINE_LAYER3:
  1593. QETH_DBF_TEXT(SETUP, 3, "force l3");
  1594. break;
  1595. default:
  1596. QETH_DBF_TEXT(SETUP, 3, "force no");
  1597. }
  1598. return disc;
  1599. }
  1600. static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
  1601. {
  1602. QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
  1603. if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
  1604. prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
  1605. card->info.blkt.time_total = 0;
  1606. card->info.blkt.inter_packet = 0;
  1607. card->info.blkt.inter_packet_jumbo = 0;
  1608. } else {
  1609. card->info.blkt.time_total = 250;
  1610. card->info.blkt.inter_packet = 5;
  1611. card->info.blkt.inter_packet_jumbo = 15;
  1612. }
  1613. }
  1614. static void qeth_init_tokens(struct qeth_card *card)
  1615. {
  1616. card->token.issuer_rm_w = 0x00010103UL;
  1617. card->token.cm_filter_w = 0x00010108UL;
  1618. card->token.cm_connection_w = 0x0001010aUL;
  1619. card->token.ulp_filter_w = 0x0001010bUL;
  1620. card->token.ulp_connection_w = 0x0001010dUL;
  1621. }
  1622. static void qeth_init_func_level(struct qeth_card *card)
  1623. {
  1624. switch (card->info.type) {
  1625. case QETH_CARD_TYPE_IQD:
  1626. card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
  1627. break;
  1628. case QETH_CARD_TYPE_OSD:
  1629. case QETH_CARD_TYPE_OSN:
  1630. card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
  1631. break;
  1632. default:
  1633. break;
  1634. }
  1635. }
  1636. static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
  1637. void (*idx_reply_cb)(struct qeth_channel *,
  1638. struct qeth_cmd_buffer *))
  1639. {
  1640. struct qeth_cmd_buffer *iob;
  1641. unsigned long flags;
  1642. int rc;
  1643. struct qeth_card *card;
  1644. QETH_DBF_TEXT(SETUP, 2, "idxanswr");
  1645. card = CARD_FROM_CDEV(channel->ccwdev);
  1646. iob = qeth_get_buffer(channel);
  1647. if (!iob)
  1648. return -ENOMEM;
  1649. iob->callback = idx_reply_cb;
  1650. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  1651. channel->ccw.count = QETH_BUFSIZE;
  1652. channel->ccw.cda = (__u32) __pa(iob->data);
  1653. wait_event(card->wait_q,
  1654. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1655. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1656. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1657. rc = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1658. (addr_t) iob, 0, 0, QETH_TIMEOUT);
  1659. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1660. if (rc) {
  1661. QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
  1662. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  1663. atomic_set(&channel->irq_pending, 0);
  1664. wake_up(&card->wait_q);
  1665. return rc;
  1666. }
  1667. rc = wait_event_interruptible_timeout(card->wait_q,
  1668. channel->state == CH_STATE_UP, QETH_TIMEOUT);
  1669. if (rc == -ERESTARTSYS)
  1670. return rc;
  1671. if (channel->state != CH_STATE_UP) {
  1672. rc = -ETIME;
  1673. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  1674. } else
  1675. rc = 0;
  1676. return rc;
  1677. }
  1678. static int qeth_idx_activate_channel(struct qeth_channel *channel,
  1679. void (*idx_reply_cb)(struct qeth_channel *,
  1680. struct qeth_cmd_buffer *))
  1681. {
  1682. struct qeth_card *card;
  1683. struct qeth_cmd_buffer *iob;
  1684. unsigned long flags;
  1685. __u16 temp;
  1686. __u8 tmp;
  1687. int rc;
  1688. struct ccw_dev_id temp_devid;
  1689. card = CARD_FROM_CDEV(channel->ccwdev);
  1690. QETH_DBF_TEXT(SETUP, 2, "idxactch");
  1691. iob = qeth_get_buffer(channel);
  1692. if (!iob)
  1693. return -ENOMEM;
  1694. iob->callback = idx_reply_cb;
  1695. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  1696. channel->ccw.count = IDX_ACTIVATE_SIZE;
  1697. channel->ccw.cda = (__u32) __pa(iob->data);
  1698. if (channel == &card->write) {
  1699. memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
  1700. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1701. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1702. card->seqno.trans_hdr++;
  1703. } else {
  1704. memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
  1705. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1706. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1707. }
  1708. tmp = ((__u8)card->info.portno) | 0x80;
  1709. memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
  1710. memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1711. &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
  1712. memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
  1713. &card->info.func_level, sizeof(__u16));
  1714. ccw_device_get_id(CARD_DDEV(card), &temp_devid);
  1715. memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
  1716. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1717. memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
  1718. wait_event(card->wait_q,
  1719. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1720. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1721. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1722. rc = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1723. (addr_t) iob, 0, 0, QETH_TIMEOUT);
  1724. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1725. if (rc) {
  1726. QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
  1727. rc);
  1728. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  1729. atomic_set(&channel->irq_pending, 0);
  1730. wake_up(&card->wait_q);
  1731. return rc;
  1732. }
  1733. rc = wait_event_interruptible_timeout(card->wait_q,
  1734. channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
  1735. if (rc == -ERESTARTSYS)
  1736. return rc;
  1737. if (channel->state != CH_STATE_ACTIVATING) {
  1738. dev_warn(&channel->ccwdev->dev, "The qeth device driver"
  1739. " failed to recover an error on the device\n");
  1740. QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
  1741. dev_name(&channel->ccwdev->dev));
  1742. QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
  1743. return -ETIME;
  1744. }
  1745. return qeth_idx_activate_get_answer(channel, idx_reply_cb);
  1746. }
  1747. static int qeth_peer_func_level(int level)
  1748. {
  1749. if ((level & 0xff) == 8)
  1750. return (level & 0xff) + 0x400;
  1751. if (((level >> 8) & 3) == 1)
  1752. return (level & 0xff) + 0x200;
  1753. return level;
  1754. }
  1755. static void qeth_idx_write_cb(struct qeth_channel *channel,
  1756. struct qeth_cmd_buffer *iob)
  1757. {
  1758. struct qeth_card *card;
  1759. __u16 temp;
  1760. QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
  1761. if (channel->state == CH_STATE_DOWN) {
  1762. channel->state = CH_STATE_ACTIVATING;
  1763. goto out;
  1764. }
  1765. card = CARD_FROM_CDEV(channel->ccwdev);
  1766. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1767. if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
  1768. dev_err(&card->write.ccwdev->dev,
  1769. "The adapter is used exclusively by another "
  1770. "host\n");
  1771. else
  1772. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
  1773. " negative reply\n",
  1774. dev_name(&card->write.ccwdev->dev));
  1775. goto out;
  1776. }
  1777. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1778. if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
  1779. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
  1780. "function level mismatch (sent: 0x%x, received: "
  1781. "0x%x)\n", dev_name(&card->write.ccwdev->dev),
  1782. card->info.func_level, temp);
  1783. goto out;
  1784. }
  1785. channel->state = CH_STATE_UP;
  1786. out:
  1787. qeth_release_buffer(channel, iob);
  1788. }
  1789. static void qeth_idx_read_cb(struct qeth_channel *channel,
  1790. struct qeth_cmd_buffer *iob)
  1791. {
  1792. struct qeth_card *card;
  1793. __u16 temp;
  1794. QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
  1795. if (channel->state == CH_STATE_DOWN) {
  1796. channel->state = CH_STATE_ACTIVATING;
  1797. goto out;
  1798. }
  1799. card = CARD_FROM_CDEV(channel->ccwdev);
  1800. if (qeth_check_idx_response(card, iob->data))
  1801. goto out;
  1802. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1803. switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
  1804. case QETH_IDX_ACT_ERR_EXCL:
  1805. dev_err(&card->write.ccwdev->dev,
  1806. "The adapter is used exclusively by another "
  1807. "host\n");
  1808. break;
  1809. case QETH_IDX_ACT_ERR_AUTH:
  1810. case QETH_IDX_ACT_ERR_AUTH_USER:
  1811. dev_err(&card->read.ccwdev->dev,
  1812. "Setting the device online failed because of "
  1813. "insufficient authorization\n");
  1814. break;
  1815. default:
  1816. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
  1817. " negative reply\n",
  1818. dev_name(&card->read.ccwdev->dev));
  1819. }
  1820. QETH_CARD_TEXT_(card, 2, "idxread%c",
  1821. QETH_IDX_ACT_CAUSE_CODE(iob->data));
  1822. goto out;
  1823. }
  1824. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1825. if (temp != qeth_peer_func_level(card->info.func_level)) {
  1826. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
  1827. "level mismatch (sent: 0x%x, received: 0x%x)\n",
  1828. dev_name(&card->read.ccwdev->dev),
  1829. card->info.func_level, temp);
  1830. goto out;
  1831. }
  1832. memcpy(&card->token.issuer_rm_r,
  1833. QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1834. QETH_MPC_TOKEN_LENGTH);
  1835. memcpy(&card->info.mcl_level[0],
  1836. QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
  1837. channel->state = CH_STATE_UP;
  1838. out:
  1839. qeth_release_buffer(channel, iob);
  1840. }
  1841. void qeth_prepare_control_data(struct qeth_card *card, int len,
  1842. struct qeth_cmd_buffer *iob)
  1843. {
  1844. qeth_setup_ccw(&card->write, iob->data, len);
  1845. iob->callback = qeth_release_buffer;
  1846. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1847. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1848. card->seqno.trans_hdr++;
  1849. memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
  1850. &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
  1851. card->seqno.pdu_hdr++;
  1852. memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
  1853. &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
  1854. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1855. }
  1856. EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
  1857. /**
  1858. * qeth_send_control_data() - send control command to the card
  1859. * @card: qeth_card structure pointer
  1860. * @len: size of the command buffer
  1861. * @iob: qeth_cmd_buffer pointer
  1862. * @reply_cb: callback function pointer
  1863. * @cb_card: pointer to the qeth_card structure
  1864. * @cb_reply: pointer to the qeth_reply structure
  1865. * @cb_cmd: pointer to the original iob for non-IPA
  1866. * commands, or to the qeth_ipa_cmd structure
  1867. * for the IPA commands.
  1868. * @reply_param: private pointer passed to the callback
  1869. *
  1870. * Returns the value of the `return_code' field of the response
  1871. * block returned from the hardware, or other error indication.
  1872. * Value of zero indicates successful execution of the command.
  1873. *
  1874. * Callback function gets called one or more times, with cb_cmd
  1875. * pointing to the response returned by the hardware. Callback
  1876. * function must return non-zero if more reply blocks are expected,
  1877. * and zero if the last or only reply block is received. Callback
  1878. * function can get the value of the reply_param pointer from the
  1879. * field 'param' of the structure qeth_reply.
  1880. */
  1881. int qeth_send_control_data(struct qeth_card *card, int len,
  1882. struct qeth_cmd_buffer *iob,
  1883. int (*reply_cb)(struct qeth_card *cb_card,
  1884. struct qeth_reply *cb_reply,
  1885. unsigned long cb_cmd),
  1886. void *reply_param)
  1887. {
  1888. int rc;
  1889. unsigned long flags;
  1890. struct qeth_reply *reply = NULL;
  1891. unsigned long timeout, event_timeout;
  1892. struct qeth_ipa_cmd *cmd = NULL;
  1893. QETH_CARD_TEXT(card, 2, "sendctl");
  1894. if (card->read_or_write_problem) {
  1895. qeth_release_buffer(iob->channel, iob);
  1896. return -EIO;
  1897. }
  1898. reply = qeth_alloc_reply(card);
  1899. if (!reply) {
  1900. return -ENOMEM;
  1901. }
  1902. reply->callback = reply_cb;
  1903. reply->param = reply_param;
  1904. init_waitqueue_head(&reply->wait_q);
  1905. while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
  1906. if (IS_IPA(iob->data)) {
  1907. cmd = __ipa_cmd(iob);
  1908. cmd->hdr.seqno = card->seqno.ipa++;
  1909. reply->seqno = cmd->hdr.seqno;
  1910. event_timeout = QETH_IPA_TIMEOUT;
  1911. } else {
  1912. reply->seqno = QETH_IDX_COMMAND_SEQNO;
  1913. event_timeout = QETH_TIMEOUT;
  1914. }
  1915. qeth_prepare_control_data(card, len, iob);
  1916. spin_lock_irqsave(&card->lock, flags);
  1917. list_add_tail(&reply->list, &card->cmd_waiter_list);
  1918. spin_unlock_irqrestore(&card->lock, flags);
  1919. timeout = jiffies + event_timeout;
  1920. QETH_CARD_TEXT(card, 6, "noirqpnd");
  1921. spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
  1922. rc = ccw_device_start_timeout(CARD_WDEV(card), &card->write.ccw,
  1923. (addr_t) iob, 0, 0, event_timeout);
  1924. spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
  1925. if (rc) {
  1926. QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
  1927. "ccw_device_start rc = %i\n",
  1928. dev_name(&card->write.ccwdev->dev), rc);
  1929. QETH_CARD_TEXT_(card, 2, " err%d", rc);
  1930. spin_lock_irqsave(&card->lock, flags);
  1931. list_del_init(&reply->list);
  1932. qeth_put_reply(reply);
  1933. spin_unlock_irqrestore(&card->lock, flags);
  1934. qeth_release_buffer(iob->channel, iob);
  1935. atomic_set(&card->write.irq_pending, 0);
  1936. wake_up(&card->wait_q);
  1937. return rc;
  1938. }
  1939. /* we have only one long running ipassist, since we can ensure
  1940. process context of this command we can sleep */
  1941. if (cmd && cmd->hdr.command == IPA_CMD_SETIP &&
  1942. cmd->hdr.prot_version == QETH_PROT_IPV4) {
  1943. if (!wait_event_timeout(reply->wait_q,
  1944. atomic_read(&reply->received), event_timeout))
  1945. goto time_err;
  1946. } else {
  1947. while (!atomic_read(&reply->received)) {
  1948. if (time_after(jiffies, timeout))
  1949. goto time_err;
  1950. cpu_relax();
  1951. }
  1952. }
  1953. rc = reply->rc;
  1954. qeth_put_reply(reply);
  1955. return rc;
  1956. time_err:
  1957. reply->rc = -ETIME;
  1958. spin_lock_irqsave(&reply->card->lock, flags);
  1959. list_del_init(&reply->list);
  1960. spin_unlock_irqrestore(&reply->card->lock, flags);
  1961. atomic_inc(&reply->received);
  1962. rc = reply->rc;
  1963. qeth_put_reply(reply);
  1964. return rc;
  1965. }
  1966. EXPORT_SYMBOL_GPL(qeth_send_control_data);
  1967. static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1968. unsigned long data)
  1969. {
  1970. struct qeth_cmd_buffer *iob;
  1971. QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
  1972. iob = (struct qeth_cmd_buffer *) data;
  1973. memcpy(&card->token.cm_filter_r,
  1974. QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1975. QETH_MPC_TOKEN_LENGTH);
  1976. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1977. return 0;
  1978. }
  1979. static int qeth_cm_enable(struct qeth_card *card)
  1980. {
  1981. int rc;
  1982. struct qeth_cmd_buffer *iob;
  1983. QETH_DBF_TEXT(SETUP, 2, "cmenable");
  1984. iob = qeth_wait_for_buffer(&card->write);
  1985. memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
  1986. memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
  1987. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1988. memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
  1989. &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
  1990. rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
  1991. qeth_cm_enable_cb, NULL);
  1992. return rc;
  1993. }
  1994. static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  1995. unsigned long data)
  1996. {
  1997. struct qeth_cmd_buffer *iob;
  1998. QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
  1999. iob = (struct qeth_cmd_buffer *) data;
  2000. memcpy(&card->token.cm_connection_r,
  2001. QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
  2002. QETH_MPC_TOKEN_LENGTH);
  2003. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2004. return 0;
  2005. }
  2006. static int qeth_cm_setup(struct qeth_card *card)
  2007. {
  2008. int rc;
  2009. struct qeth_cmd_buffer *iob;
  2010. QETH_DBF_TEXT(SETUP, 2, "cmsetup");
  2011. iob = qeth_wait_for_buffer(&card->write);
  2012. memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
  2013. memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
  2014. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  2015. memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
  2016. &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
  2017. memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
  2018. &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
  2019. rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
  2020. qeth_cm_setup_cb, NULL);
  2021. return rc;
  2022. }
  2023. static int qeth_get_initial_mtu_for_card(struct qeth_card *card)
  2024. {
  2025. switch (card->info.type) {
  2026. case QETH_CARD_TYPE_IQD:
  2027. return card->info.max_mtu;
  2028. case QETH_CARD_TYPE_OSD:
  2029. case QETH_CARD_TYPE_OSX:
  2030. if (!card->options.layer2)
  2031. return ETH_DATA_LEN - 8; /* L3: allow for LLC + SNAP */
  2032. /* fall through */
  2033. default:
  2034. return ETH_DATA_LEN;
  2035. }
  2036. }
  2037. static int qeth_get_mtu_outof_framesize(int framesize)
  2038. {
  2039. switch (framesize) {
  2040. case 0x4000:
  2041. return 8192;
  2042. case 0x6000:
  2043. return 16384;
  2044. case 0xa000:
  2045. return 32768;
  2046. case 0xffff:
  2047. return 57344;
  2048. default:
  2049. return 0;
  2050. }
  2051. }
  2052. static int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
  2053. {
  2054. switch (card->info.type) {
  2055. case QETH_CARD_TYPE_OSD:
  2056. case QETH_CARD_TYPE_OSM:
  2057. case QETH_CARD_TYPE_OSX:
  2058. case QETH_CARD_TYPE_IQD:
  2059. return ((mtu >= 576) &&
  2060. (mtu <= card->info.max_mtu));
  2061. case QETH_CARD_TYPE_OSN:
  2062. default:
  2063. return 1;
  2064. }
  2065. }
  2066. static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  2067. unsigned long data)
  2068. {
  2069. __u16 mtu, framesize;
  2070. __u16 len;
  2071. __u8 link_type;
  2072. struct qeth_cmd_buffer *iob;
  2073. QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
  2074. iob = (struct qeth_cmd_buffer *) data;
  2075. memcpy(&card->token.ulp_filter_r,
  2076. QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
  2077. QETH_MPC_TOKEN_LENGTH);
  2078. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2079. memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
  2080. mtu = qeth_get_mtu_outof_framesize(framesize);
  2081. if (!mtu) {
  2082. iob->rc = -EINVAL;
  2083. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2084. return 0;
  2085. }
  2086. if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
  2087. /* frame size has changed */
  2088. if (card->dev &&
  2089. ((card->dev->mtu == card->info.initial_mtu) ||
  2090. (card->dev->mtu > mtu)))
  2091. card->dev->mtu = mtu;
  2092. qeth_free_qdio_buffers(card);
  2093. }
  2094. card->info.initial_mtu = mtu;
  2095. card->info.max_mtu = mtu;
  2096. card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
  2097. } else {
  2098. card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
  2099. iob->data);
  2100. card->info.initial_mtu = min(card->info.max_mtu,
  2101. qeth_get_initial_mtu_for_card(card));
  2102. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  2103. }
  2104. memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
  2105. if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
  2106. memcpy(&link_type,
  2107. QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
  2108. card->info.link_type = link_type;
  2109. } else
  2110. card->info.link_type = 0;
  2111. QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
  2112. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2113. return 0;
  2114. }
  2115. static int qeth_ulp_enable(struct qeth_card *card)
  2116. {
  2117. int rc;
  2118. char prot_type;
  2119. struct qeth_cmd_buffer *iob;
  2120. /*FIXME: trace view callbacks*/
  2121. QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
  2122. iob = qeth_wait_for_buffer(&card->write);
  2123. memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
  2124. *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
  2125. (__u8) card->info.portno;
  2126. if (card->options.layer2)
  2127. if (card->info.type == QETH_CARD_TYPE_OSN)
  2128. prot_type = QETH_PROT_OSN2;
  2129. else
  2130. prot_type = QETH_PROT_LAYER2;
  2131. else
  2132. prot_type = QETH_PROT_TCPIP;
  2133. memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
  2134. memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
  2135. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2136. memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
  2137. &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
  2138. rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
  2139. qeth_ulp_enable_cb, NULL);
  2140. return rc;
  2141. }
  2142. static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  2143. unsigned long data)
  2144. {
  2145. struct qeth_cmd_buffer *iob;
  2146. QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
  2147. iob = (struct qeth_cmd_buffer *) data;
  2148. memcpy(&card->token.ulp_connection_r,
  2149. QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2150. QETH_MPC_TOKEN_LENGTH);
  2151. if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2152. 3)) {
  2153. QETH_DBF_TEXT(SETUP, 2, "olmlimit");
  2154. dev_err(&card->gdev->dev, "A connection could not be "
  2155. "established because of an OLM limit\n");
  2156. iob->rc = -EMLINK;
  2157. }
  2158. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2159. return 0;
  2160. }
  2161. static int qeth_ulp_setup(struct qeth_card *card)
  2162. {
  2163. int rc;
  2164. __u16 temp;
  2165. struct qeth_cmd_buffer *iob;
  2166. struct ccw_dev_id dev_id;
  2167. QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
  2168. iob = qeth_wait_for_buffer(&card->write);
  2169. memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
  2170. memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
  2171. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2172. memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
  2173. &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
  2174. memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
  2175. &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
  2176. ccw_device_get_id(CARD_DDEV(card), &dev_id);
  2177. memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
  2178. temp = (card->info.cula << 8) + card->info.unit_addr2;
  2179. memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
  2180. rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
  2181. qeth_ulp_setup_cb, NULL);
  2182. return rc;
  2183. }
  2184. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
  2185. {
  2186. struct qeth_qdio_out_buffer *newbuf;
  2187. newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
  2188. if (!newbuf)
  2189. return -ENOMEM;
  2190. newbuf->buffer = q->qdio_bufs[bidx];
  2191. skb_queue_head_init(&newbuf->skb_list);
  2192. lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
  2193. newbuf->q = q;
  2194. newbuf->next_pending = q->bufs[bidx];
  2195. atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
  2196. q->bufs[bidx] = newbuf;
  2197. return 0;
  2198. }
  2199. static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
  2200. {
  2201. if (!q)
  2202. return;
  2203. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2204. kfree(q);
  2205. }
  2206. static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
  2207. {
  2208. struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  2209. if (!q)
  2210. return NULL;
  2211. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  2212. kfree(q);
  2213. return NULL;
  2214. }
  2215. return q;
  2216. }
  2217. static int qeth_alloc_qdio_buffers(struct qeth_card *card)
  2218. {
  2219. int i, j;
  2220. QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
  2221. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
  2222. QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
  2223. return 0;
  2224. QETH_DBF_TEXT(SETUP, 2, "inq");
  2225. card->qdio.in_q = qeth_alloc_qdio_queue();
  2226. if (!card->qdio.in_q)
  2227. goto out_nomem;
  2228. /* inbound buffer pool */
  2229. if (qeth_alloc_buffer_pool(card))
  2230. goto out_freeinq;
  2231. /* outbound */
  2232. card->qdio.out_qs =
  2233. kcalloc(card->qdio.no_out_queues,
  2234. sizeof(struct qeth_qdio_out_q *),
  2235. GFP_KERNEL);
  2236. if (!card->qdio.out_qs)
  2237. goto out_freepool;
  2238. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2239. card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
  2240. if (!card->qdio.out_qs[i])
  2241. goto out_freeoutq;
  2242. QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
  2243. QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
  2244. card->qdio.out_qs[i]->queue_no = i;
  2245. /* give outbound qeth_qdio_buffers their qdio_buffers */
  2246. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2247. WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
  2248. if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
  2249. goto out_freeoutqbufs;
  2250. }
  2251. }
  2252. /* completion */
  2253. if (qeth_alloc_cq(card))
  2254. goto out_freeoutq;
  2255. return 0;
  2256. out_freeoutqbufs:
  2257. while (j > 0) {
  2258. --j;
  2259. kmem_cache_free(qeth_qdio_outbuf_cache,
  2260. card->qdio.out_qs[i]->bufs[j]);
  2261. card->qdio.out_qs[i]->bufs[j] = NULL;
  2262. }
  2263. out_freeoutq:
  2264. while (i > 0) {
  2265. qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
  2266. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2267. }
  2268. kfree(card->qdio.out_qs);
  2269. card->qdio.out_qs = NULL;
  2270. out_freepool:
  2271. qeth_free_buffer_pool(card);
  2272. out_freeinq:
  2273. qeth_free_qdio_queue(card->qdio.in_q);
  2274. card->qdio.in_q = NULL;
  2275. out_nomem:
  2276. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  2277. return -ENOMEM;
  2278. }
  2279. static void qeth_free_qdio_buffers(struct qeth_card *card)
  2280. {
  2281. int i, j;
  2282. if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
  2283. QETH_QDIO_UNINITIALIZED)
  2284. return;
  2285. qeth_free_cq(card);
  2286. cancel_delayed_work_sync(&card->buffer_reclaim_work);
  2287. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2288. if (card->qdio.in_q->bufs[j].rx_skb)
  2289. dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
  2290. }
  2291. qeth_free_qdio_queue(card->qdio.in_q);
  2292. card->qdio.in_q = NULL;
  2293. /* inbound buffer pool */
  2294. qeth_free_buffer_pool(card);
  2295. /* free outbound qdio_qs */
  2296. if (card->qdio.out_qs) {
  2297. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2298. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2299. qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
  2300. }
  2301. kfree(card->qdio.out_qs);
  2302. card->qdio.out_qs = NULL;
  2303. }
  2304. }
  2305. static void qeth_create_qib_param_field(struct qeth_card *card,
  2306. char *param_field)
  2307. {
  2308. param_field[0] = _ascebc['P'];
  2309. param_field[1] = _ascebc['C'];
  2310. param_field[2] = _ascebc['I'];
  2311. param_field[3] = _ascebc['T'];
  2312. *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
  2313. *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
  2314. *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
  2315. }
  2316. static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
  2317. char *param_field)
  2318. {
  2319. param_field[16] = _ascebc['B'];
  2320. param_field[17] = _ascebc['L'];
  2321. param_field[18] = _ascebc['K'];
  2322. param_field[19] = _ascebc['T'];
  2323. *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
  2324. *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
  2325. *((unsigned int *) (&param_field[28])) =
  2326. card->info.blkt.inter_packet_jumbo;
  2327. }
  2328. static int qeth_qdio_activate(struct qeth_card *card)
  2329. {
  2330. QETH_DBF_TEXT(SETUP, 3, "qdioact");
  2331. return qdio_activate(CARD_DDEV(card));
  2332. }
  2333. static int qeth_dm_act(struct qeth_card *card)
  2334. {
  2335. int rc;
  2336. struct qeth_cmd_buffer *iob;
  2337. QETH_DBF_TEXT(SETUP, 2, "dmact");
  2338. iob = qeth_wait_for_buffer(&card->write);
  2339. memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
  2340. memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
  2341. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2342. memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
  2343. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2344. rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
  2345. return rc;
  2346. }
  2347. static int qeth_mpc_initialize(struct qeth_card *card)
  2348. {
  2349. int rc;
  2350. QETH_DBF_TEXT(SETUP, 2, "mpcinit");
  2351. rc = qeth_issue_next_read(card);
  2352. if (rc) {
  2353. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2354. return rc;
  2355. }
  2356. rc = qeth_cm_enable(card);
  2357. if (rc) {
  2358. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  2359. goto out_qdio;
  2360. }
  2361. rc = qeth_cm_setup(card);
  2362. if (rc) {
  2363. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  2364. goto out_qdio;
  2365. }
  2366. rc = qeth_ulp_enable(card);
  2367. if (rc) {
  2368. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  2369. goto out_qdio;
  2370. }
  2371. rc = qeth_ulp_setup(card);
  2372. if (rc) {
  2373. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2374. goto out_qdio;
  2375. }
  2376. rc = qeth_alloc_qdio_buffers(card);
  2377. if (rc) {
  2378. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2379. goto out_qdio;
  2380. }
  2381. rc = qeth_qdio_establish(card);
  2382. if (rc) {
  2383. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  2384. qeth_free_qdio_buffers(card);
  2385. goto out_qdio;
  2386. }
  2387. rc = qeth_qdio_activate(card);
  2388. if (rc) {
  2389. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  2390. goto out_qdio;
  2391. }
  2392. rc = qeth_dm_act(card);
  2393. if (rc) {
  2394. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  2395. goto out_qdio;
  2396. }
  2397. return 0;
  2398. out_qdio:
  2399. qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  2400. qdio_free(CARD_DDEV(card));
  2401. return rc;
  2402. }
  2403. void qeth_print_status_message(struct qeth_card *card)
  2404. {
  2405. switch (card->info.type) {
  2406. case QETH_CARD_TYPE_OSD:
  2407. case QETH_CARD_TYPE_OSM:
  2408. case QETH_CARD_TYPE_OSX:
  2409. /* VM will use a non-zero first character
  2410. * to indicate a HiperSockets like reporting
  2411. * of the level OSA sets the first character to zero
  2412. * */
  2413. if (!card->info.mcl_level[0]) {
  2414. sprintf(card->info.mcl_level, "%02x%02x",
  2415. card->info.mcl_level[2],
  2416. card->info.mcl_level[3]);
  2417. break;
  2418. }
  2419. /* fallthrough */
  2420. case QETH_CARD_TYPE_IQD:
  2421. if ((card->info.guestlan) ||
  2422. (card->info.mcl_level[0] & 0x80)) {
  2423. card->info.mcl_level[0] = (char) _ebcasc[(__u8)
  2424. card->info.mcl_level[0]];
  2425. card->info.mcl_level[1] = (char) _ebcasc[(__u8)
  2426. card->info.mcl_level[1]];
  2427. card->info.mcl_level[2] = (char) _ebcasc[(__u8)
  2428. card->info.mcl_level[2]];
  2429. card->info.mcl_level[3] = (char) _ebcasc[(__u8)
  2430. card->info.mcl_level[3]];
  2431. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2432. }
  2433. break;
  2434. default:
  2435. memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
  2436. }
  2437. dev_info(&card->gdev->dev,
  2438. "Device is a%s card%s%s%s\nwith link type %s.\n",
  2439. qeth_get_cardname(card),
  2440. (card->info.mcl_level[0]) ? " (level: " : "",
  2441. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2442. (card->info.mcl_level[0]) ? ")" : "",
  2443. qeth_get_cardname_short(card));
  2444. }
  2445. EXPORT_SYMBOL_GPL(qeth_print_status_message);
  2446. static void qeth_initialize_working_pool_list(struct qeth_card *card)
  2447. {
  2448. struct qeth_buffer_pool_entry *entry;
  2449. QETH_CARD_TEXT(card, 5, "inwrklst");
  2450. list_for_each_entry(entry,
  2451. &card->qdio.init_pool.entry_list, init_list) {
  2452. qeth_put_buffer_pool_entry(card, entry);
  2453. }
  2454. }
  2455. static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
  2456. struct qeth_card *card)
  2457. {
  2458. struct list_head *plh;
  2459. struct qeth_buffer_pool_entry *entry;
  2460. int i, free;
  2461. struct page *page;
  2462. if (list_empty(&card->qdio.in_buf_pool.entry_list))
  2463. return NULL;
  2464. list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
  2465. entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
  2466. free = 1;
  2467. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2468. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2469. free = 0;
  2470. break;
  2471. }
  2472. }
  2473. if (free) {
  2474. list_del_init(&entry->list);
  2475. return entry;
  2476. }
  2477. }
  2478. /* no free buffer in pool so take first one and swap pages */
  2479. entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
  2480. struct qeth_buffer_pool_entry, list);
  2481. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2482. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2483. page = alloc_page(GFP_ATOMIC);
  2484. if (!page) {
  2485. return NULL;
  2486. } else {
  2487. free_page((unsigned long)entry->elements[i]);
  2488. entry->elements[i] = page_address(page);
  2489. if (card->options.performance_stats)
  2490. card->perf_stats.sg_alloc_page_rx++;
  2491. }
  2492. }
  2493. }
  2494. list_del_init(&entry->list);
  2495. return entry;
  2496. }
  2497. static int qeth_init_input_buffer(struct qeth_card *card,
  2498. struct qeth_qdio_buffer *buf)
  2499. {
  2500. struct qeth_buffer_pool_entry *pool_entry;
  2501. int i;
  2502. if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
  2503. buf->rx_skb = netdev_alloc_skb(card->dev,
  2504. QETH_RX_PULL_LEN + ETH_HLEN);
  2505. if (!buf->rx_skb)
  2506. return 1;
  2507. }
  2508. pool_entry = qeth_find_free_buffer_pool_entry(card);
  2509. if (!pool_entry)
  2510. return 1;
  2511. /*
  2512. * since the buffer is accessed only from the input_tasklet
  2513. * there shouldn't be a need to synchronize; also, since we use
  2514. * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
  2515. * buffers
  2516. */
  2517. buf->pool_entry = pool_entry;
  2518. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2519. buf->buffer->element[i].length = PAGE_SIZE;
  2520. buf->buffer->element[i].addr = pool_entry->elements[i];
  2521. if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
  2522. buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
  2523. else
  2524. buf->buffer->element[i].eflags = 0;
  2525. buf->buffer->element[i].sflags = 0;
  2526. }
  2527. return 0;
  2528. }
  2529. int qeth_init_qdio_queues(struct qeth_card *card)
  2530. {
  2531. int i, j;
  2532. int rc;
  2533. QETH_DBF_TEXT(SETUP, 2, "initqdqs");
  2534. /* inbound queue */
  2535. qdio_reset_buffers(card->qdio.in_q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2536. memset(&card->rx, 0, sizeof(struct qeth_rx));
  2537. qeth_initialize_working_pool_list(card);
  2538. /*give only as many buffers to hardware as we have buffer pool entries*/
  2539. for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
  2540. qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
  2541. card->qdio.in_q->next_buf_to_init =
  2542. card->qdio.in_buf_pool.buf_count - 1;
  2543. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
  2544. card->qdio.in_buf_pool.buf_count - 1);
  2545. if (rc) {
  2546. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2547. return rc;
  2548. }
  2549. /* completion */
  2550. rc = qeth_cq_init(card);
  2551. if (rc) {
  2552. return rc;
  2553. }
  2554. /* outbound queue */
  2555. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2556. qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
  2557. QDIO_MAX_BUFFERS_PER_Q);
  2558. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2559. qeth_clear_output_buffer(card->qdio.out_qs[i],
  2560. card->qdio.out_qs[i]->bufs[j]);
  2561. }
  2562. card->qdio.out_qs[i]->card = card;
  2563. card->qdio.out_qs[i]->next_buf_to_fill = 0;
  2564. card->qdio.out_qs[i]->do_pack = 0;
  2565. atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
  2566. atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
  2567. atomic_set(&card->qdio.out_qs[i]->state,
  2568. QETH_OUT_Q_UNLOCKED);
  2569. }
  2570. return 0;
  2571. }
  2572. EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
  2573. static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
  2574. {
  2575. switch (link_type) {
  2576. case QETH_LINK_TYPE_HSTR:
  2577. return 2;
  2578. default:
  2579. return 1;
  2580. }
  2581. }
  2582. static void qeth_fill_ipacmd_header(struct qeth_card *card,
  2583. struct qeth_ipa_cmd *cmd, __u8 command,
  2584. enum qeth_prot_versions prot)
  2585. {
  2586. memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
  2587. cmd->hdr.command = command;
  2588. cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
  2589. /* cmd->hdr.seqno is set by qeth_send_control_data() */
  2590. cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
  2591. cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
  2592. if (card->options.layer2)
  2593. cmd->hdr.prim_version_no = 2;
  2594. else
  2595. cmd->hdr.prim_version_no = 1;
  2596. cmd->hdr.param_count = 1;
  2597. cmd->hdr.prot_version = prot;
  2598. cmd->hdr.ipa_supported = 0;
  2599. cmd->hdr.ipa_enabled = 0;
  2600. }
  2601. struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
  2602. enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
  2603. {
  2604. struct qeth_cmd_buffer *iob;
  2605. iob = qeth_get_buffer(&card->write);
  2606. if (iob) {
  2607. qeth_fill_ipacmd_header(card, __ipa_cmd(iob), ipacmd, prot);
  2608. } else {
  2609. dev_warn(&card->gdev->dev,
  2610. "The qeth driver ran out of channel command buffers\n");
  2611. QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
  2612. dev_name(&card->gdev->dev));
  2613. }
  2614. return iob;
  2615. }
  2616. EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
  2617. void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2618. char prot_type)
  2619. {
  2620. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  2621. memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
  2622. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  2623. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2624. }
  2625. EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
  2626. /**
  2627. * qeth_send_ipa_cmd() - send an IPA command
  2628. *
  2629. * See qeth_send_control_data() for explanation of the arguments.
  2630. */
  2631. int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2632. int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
  2633. unsigned long),
  2634. void *reply_param)
  2635. {
  2636. int rc;
  2637. char prot_type;
  2638. QETH_CARD_TEXT(card, 4, "sendipa");
  2639. if (card->options.layer2)
  2640. if (card->info.type == QETH_CARD_TYPE_OSN)
  2641. prot_type = QETH_PROT_OSN2;
  2642. else
  2643. prot_type = QETH_PROT_LAYER2;
  2644. else
  2645. prot_type = QETH_PROT_TCPIP;
  2646. qeth_prepare_ipa_cmd(card, iob, prot_type);
  2647. rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
  2648. iob, reply_cb, reply_param);
  2649. if (rc == -ETIME) {
  2650. qeth_clear_ipacmd_list(card);
  2651. qeth_schedule_recovery(card);
  2652. }
  2653. return rc;
  2654. }
  2655. EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
  2656. static int qeth_send_startlan(struct qeth_card *card)
  2657. {
  2658. int rc;
  2659. struct qeth_cmd_buffer *iob;
  2660. QETH_DBF_TEXT(SETUP, 2, "strtlan");
  2661. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
  2662. if (!iob)
  2663. return -ENOMEM;
  2664. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  2665. return rc;
  2666. }
  2667. static int qeth_setadpparms_inspect_rc(struct qeth_ipa_cmd *cmd)
  2668. {
  2669. if (!cmd->hdr.return_code)
  2670. cmd->hdr.return_code =
  2671. cmd->data.setadapterparms.hdr.return_code;
  2672. return cmd->hdr.return_code;
  2673. }
  2674. static int qeth_query_setadapterparms_cb(struct qeth_card *card,
  2675. struct qeth_reply *reply, unsigned long data)
  2676. {
  2677. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  2678. QETH_CARD_TEXT(card, 3, "quyadpcb");
  2679. if (qeth_setadpparms_inspect_rc(cmd))
  2680. return 0;
  2681. if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
  2682. card->info.link_type =
  2683. cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
  2684. QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
  2685. }
  2686. card->options.adp.supported_funcs =
  2687. cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
  2688. return 0;
  2689. }
  2690. static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
  2691. __u32 command, __u32 cmdlen)
  2692. {
  2693. struct qeth_cmd_buffer *iob;
  2694. struct qeth_ipa_cmd *cmd;
  2695. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
  2696. QETH_PROT_IPV4);
  2697. if (iob) {
  2698. cmd = __ipa_cmd(iob);
  2699. cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
  2700. cmd->data.setadapterparms.hdr.command_code = command;
  2701. cmd->data.setadapterparms.hdr.used_total = 1;
  2702. cmd->data.setadapterparms.hdr.seq_no = 1;
  2703. }
  2704. return iob;
  2705. }
  2706. int qeth_query_setadapterparms(struct qeth_card *card)
  2707. {
  2708. int rc;
  2709. struct qeth_cmd_buffer *iob;
  2710. QETH_CARD_TEXT(card, 3, "queryadp");
  2711. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
  2712. sizeof(struct qeth_ipacmd_setadpparms));
  2713. if (!iob)
  2714. return -ENOMEM;
  2715. rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
  2716. return rc;
  2717. }
  2718. EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
  2719. static int qeth_query_ipassists_cb(struct qeth_card *card,
  2720. struct qeth_reply *reply, unsigned long data)
  2721. {
  2722. struct qeth_ipa_cmd *cmd;
  2723. QETH_DBF_TEXT(SETUP, 2, "qipasscb");
  2724. cmd = (struct qeth_ipa_cmd *) data;
  2725. switch (cmd->hdr.return_code) {
  2726. case IPA_RC_NOTSUPP:
  2727. case IPA_RC_L2_UNSUPPORTED_CMD:
  2728. QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
  2729. card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
  2730. card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
  2731. return -0;
  2732. default:
  2733. if (cmd->hdr.return_code) {
  2734. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
  2735. "rc=%d\n",
  2736. dev_name(&card->gdev->dev),
  2737. cmd->hdr.return_code);
  2738. return 0;
  2739. }
  2740. }
  2741. if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
  2742. card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
  2743. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  2744. } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
  2745. card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
  2746. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  2747. } else
  2748. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
  2749. "\n", dev_name(&card->gdev->dev));
  2750. return 0;
  2751. }
  2752. int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
  2753. {
  2754. int rc;
  2755. struct qeth_cmd_buffer *iob;
  2756. QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
  2757. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
  2758. if (!iob)
  2759. return -ENOMEM;
  2760. rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
  2761. return rc;
  2762. }
  2763. EXPORT_SYMBOL_GPL(qeth_query_ipassists);
  2764. static int qeth_query_switch_attributes_cb(struct qeth_card *card,
  2765. struct qeth_reply *reply, unsigned long data)
  2766. {
  2767. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  2768. struct qeth_query_switch_attributes *attrs;
  2769. struct qeth_switch_info *sw_info;
  2770. QETH_CARD_TEXT(card, 2, "qswiatcb");
  2771. if (qeth_setadpparms_inspect_rc(cmd))
  2772. return 0;
  2773. sw_info = (struct qeth_switch_info *)reply->param;
  2774. attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
  2775. sw_info->capabilities = attrs->capabilities;
  2776. sw_info->settings = attrs->settings;
  2777. QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
  2778. sw_info->settings);
  2779. return 0;
  2780. }
  2781. int qeth_query_switch_attributes(struct qeth_card *card,
  2782. struct qeth_switch_info *sw_info)
  2783. {
  2784. struct qeth_cmd_buffer *iob;
  2785. QETH_CARD_TEXT(card, 2, "qswiattr");
  2786. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
  2787. return -EOPNOTSUPP;
  2788. if (!netif_carrier_ok(card->dev))
  2789. return -ENOMEDIUM;
  2790. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
  2791. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  2792. if (!iob)
  2793. return -ENOMEM;
  2794. return qeth_send_ipa_cmd(card, iob,
  2795. qeth_query_switch_attributes_cb, sw_info);
  2796. }
  2797. EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
  2798. static int qeth_query_setdiagass_cb(struct qeth_card *card,
  2799. struct qeth_reply *reply, unsigned long data)
  2800. {
  2801. struct qeth_ipa_cmd *cmd;
  2802. __u16 rc;
  2803. cmd = (struct qeth_ipa_cmd *)data;
  2804. rc = cmd->hdr.return_code;
  2805. if (rc)
  2806. QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
  2807. else
  2808. card->info.diagass_support = cmd->data.diagass.ext;
  2809. return 0;
  2810. }
  2811. static int qeth_query_setdiagass(struct qeth_card *card)
  2812. {
  2813. struct qeth_cmd_buffer *iob;
  2814. struct qeth_ipa_cmd *cmd;
  2815. QETH_DBF_TEXT(SETUP, 2, "qdiagass");
  2816. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2817. if (!iob)
  2818. return -ENOMEM;
  2819. cmd = __ipa_cmd(iob);
  2820. cmd->data.diagass.subcmd_len = 16;
  2821. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
  2822. return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
  2823. }
  2824. static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
  2825. {
  2826. unsigned long info = get_zeroed_page(GFP_KERNEL);
  2827. struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
  2828. struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
  2829. struct ccw_dev_id ccwid;
  2830. int level;
  2831. tid->chpid = card->info.chpid;
  2832. ccw_device_get_id(CARD_RDEV(card), &ccwid);
  2833. tid->ssid = ccwid.ssid;
  2834. tid->devno = ccwid.devno;
  2835. if (!info)
  2836. return;
  2837. level = stsi(NULL, 0, 0, 0);
  2838. if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
  2839. tid->lparnr = info222->lpar_number;
  2840. if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
  2841. EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
  2842. memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
  2843. }
  2844. free_page(info);
  2845. return;
  2846. }
  2847. static int qeth_hw_trap_cb(struct qeth_card *card,
  2848. struct qeth_reply *reply, unsigned long data)
  2849. {
  2850. struct qeth_ipa_cmd *cmd;
  2851. __u16 rc;
  2852. cmd = (struct qeth_ipa_cmd *)data;
  2853. rc = cmd->hdr.return_code;
  2854. if (rc)
  2855. QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
  2856. return 0;
  2857. }
  2858. int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
  2859. {
  2860. struct qeth_cmd_buffer *iob;
  2861. struct qeth_ipa_cmd *cmd;
  2862. QETH_DBF_TEXT(SETUP, 2, "diagtrap");
  2863. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2864. if (!iob)
  2865. return -ENOMEM;
  2866. cmd = __ipa_cmd(iob);
  2867. cmd->data.diagass.subcmd_len = 80;
  2868. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
  2869. cmd->data.diagass.type = 1;
  2870. cmd->data.diagass.action = action;
  2871. switch (action) {
  2872. case QETH_DIAGS_TRAP_ARM:
  2873. cmd->data.diagass.options = 0x0003;
  2874. cmd->data.diagass.ext = 0x00010000 +
  2875. sizeof(struct qeth_trap_id);
  2876. qeth_get_trap_id(card,
  2877. (struct qeth_trap_id *)cmd->data.diagass.cdata);
  2878. break;
  2879. case QETH_DIAGS_TRAP_DISARM:
  2880. cmd->data.diagass.options = 0x0001;
  2881. break;
  2882. case QETH_DIAGS_TRAP_CAPTURE:
  2883. break;
  2884. }
  2885. return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
  2886. }
  2887. EXPORT_SYMBOL_GPL(qeth_hw_trap);
  2888. static int qeth_check_qdio_errors(struct qeth_card *card,
  2889. struct qdio_buffer *buf,
  2890. unsigned int qdio_error,
  2891. const char *dbftext)
  2892. {
  2893. if (qdio_error) {
  2894. QETH_CARD_TEXT(card, 2, dbftext);
  2895. QETH_CARD_TEXT_(card, 2, " F15=%02X",
  2896. buf->element[15].sflags);
  2897. QETH_CARD_TEXT_(card, 2, " F14=%02X",
  2898. buf->element[14].sflags);
  2899. QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
  2900. if ((buf->element[15].sflags) == 0x12) {
  2901. card->stats.rx_dropped++;
  2902. return 0;
  2903. } else
  2904. return 1;
  2905. }
  2906. return 0;
  2907. }
  2908. static void qeth_queue_input_buffer(struct qeth_card *card, int index)
  2909. {
  2910. struct qeth_qdio_q *queue = card->qdio.in_q;
  2911. struct list_head *lh;
  2912. int count;
  2913. int i;
  2914. int rc;
  2915. int newcount = 0;
  2916. count = (index < queue->next_buf_to_init)?
  2917. card->qdio.in_buf_pool.buf_count -
  2918. (queue->next_buf_to_init - index) :
  2919. card->qdio.in_buf_pool.buf_count -
  2920. (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
  2921. /* only requeue at a certain threshold to avoid SIGAs */
  2922. if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
  2923. for (i = queue->next_buf_to_init;
  2924. i < queue->next_buf_to_init + count; ++i) {
  2925. if (qeth_init_input_buffer(card,
  2926. &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
  2927. break;
  2928. } else {
  2929. newcount++;
  2930. }
  2931. }
  2932. if (newcount < count) {
  2933. /* we are in memory shortage so we switch back to
  2934. traditional skb allocation and drop packages */
  2935. atomic_set(&card->force_alloc_skb, 3);
  2936. count = newcount;
  2937. } else {
  2938. atomic_add_unless(&card->force_alloc_skb, -1, 0);
  2939. }
  2940. if (!count) {
  2941. i = 0;
  2942. list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
  2943. i++;
  2944. if (i == card->qdio.in_buf_pool.buf_count) {
  2945. QETH_CARD_TEXT(card, 2, "qsarbw");
  2946. card->reclaim_index = index;
  2947. schedule_delayed_work(
  2948. &card->buffer_reclaim_work,
  2949. QETH_RECLAIM_WORK_TIME);
  2950. }
  2951. return;
  2952. }
  2953. /*
  2954. * according to old code it should be avoided to requeue all
  2955. * 128 buffers in order to benefit from PCI avoidance.
  2956. * this function keeps at least one buffer (the buffer at
  2957. * 'index') un-requeued -> this buffer is the first buffer that
  2958. * will be requeued the next time
  2959. */
  2960. if (card->options.performance_stats) {
  2961. card->perf_stats.inbound_do_qdio_cnt++;
  2962. card->perf_stats.inbound_do_qdio_start_time =
  2963. qeth_get_micros();
  2964. }
  2965. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
  2966. queue->next_buf_to_init, count);
  2967. if (card->options.performance_stats)
  2968. card->perf_stats.inbound_do_qdio_time +=
  2969. qeth_get_micros() -
  2970. card->perf_stats.inbound_do_qdio_start_time;
  2971. if (rc) {
  2972. QETH_CARD_TEXT(card, 2, "qinberr");
  2973. }
  2974. queue->next_buf_to_init = (queue->next_buf_to_init + count) %
  2975. QDIO_MAX_BUFFERS_PER_Q;
  2976. }
  2977. }
  2978. static void qeth_buffer_reclaim_work(struct work_struct *work)
  2979. {
  2980. struct qeth_card *card = container_of(work, struct qeth_card,
  2981. buffer_reclaim_work.work);
  2982. QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
  2983. qeth_queue_input_buffer(card, card->reclaim_index);
  2984. }
  2985. static void qeth_handle_send_error(struct qeth_card *card,
  2986. struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
  2987. {
  2988. int sbalf15 = buffer->buffer->element[15].sflags;
  2989. QETH_CARD_TEXT(card, 6, "hdsnderr");
  2990. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2991. if (sbalf15 == 0) {
  2992. qdio_err = 0;
  2993. } else {
  2994. qdio_err = 1;
  2995. }
  2996. }
  2997. qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
  2998. if (!qdio_err)
  2999. return;
  3000. if ((sbalf15 >= 15) && (sbalf15 <= 31))
  3001. return;
  3002. QETH_CARD_TEXT(card, 1, "lnkfail");
  3003. QETH_CARD_TEXT_(card, 1, "%04x %02x",
  3004. (u16)qdio_err, (u8)sbalf15);
  3005. }
  3006. /**
  3007. * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
  3008. * @queue: queue to check for packing buffer
  3009. *
  3010. * Returns number of buffers that were prepared for flush.
  3011. */
  3012. static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
  3013. {
  3014. struct qeth_qdio_out_buffer *buffer;
  3015. buffer = queue->bufs[queue->next_buf_to_fill];
  3016. if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
  3017. (buffer->next_element_to_fill > 0)) {
  3018. /* it's a packing buffer */
  3019. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3020. queue->next_buf_to_fill =
  3021. (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
  3022. return 1;
  3023. }
  3024. return 0;
  3025. }
  3026. /*
  3027. * Switched to packing state if the number of used buffers on a queue
  3028. * reaches a certain limit.
  3029. */
  3030. static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
  3031. {
  3032. if (!queue->do_pack) {
  3033. if (atomic_read(&queue->used_buffers)
  3034. >= QETH_HIGH_WATERMARK_PACK){
  3035. /* switch non-PACKING -> PACKING */
  3036. QETH_CARD_TEXT(queue->card, 6, "np->pack");
  3037. if (queue->card->options.performance_stats)
  3038. queue->card->perf_stats.sc_dp_p++;
  3039. queue->do_pack = 1;
  3040. }
  3041. }
  3042. }
  3043. /*
  3044. * Switches from packing to non-packing mode. If there is a packing
  3045. * buffer on the queue this buffer will be prepared to be flushed.
  3046. * In that case 1 is returned to inform the caller. If no buffer
  3047. * has to be flushed, zero is returned.
  3048. */
  3049. static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
  3050. {
  3051. if (queue->do_pack) {
  3052. if (atomic_read(&queue->used_buffers)
  3053. <= QETH_LOW_WATERMARK_PACK) {
  3054. /* switch PACKING -> non-PACKING */
  3055. QETH_CARD_TEXT(queue->card, 6, "pack->np");
  3056. if (queue->card->options.performance_stats)
  3057. queue->card->perf_stats.sc_p_dp++;
  3058. queue->do_pack = 0;
  3059. return qeth_prep_flush_pack_buffer(queue);
  3060. }
  3061. }
  3062. return 0;
  3063. }
  3064. static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
  3065. int count)
  3066. {
  3067. struct qeth_qdio_out_buffer *buf;
  3068. int rc;
  3069. int i;
  3070. unsigned int qdio_flags;
  3071. for (i = index; i < index + count; ++i) {
  3072. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3073. buf = queue->bufs[bidx];
  3074. buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
  3075. SBAL_EFLAGS_LAST_ENTRY;
  3076. if (queue->bufstates)
  3077. queue->bufstates[bidx].user = buf;
  3078. if (queue->card->info.type == QETH_CARD_TYPE_IQD)
  3079. continue;
  3080. if (!queue->do_pack) {
  3081. if ((atomic_read(&queue->used_buffers) >=
  3082. (QETH_HIGH_WATERMARK_PACK -
  3083. QETH_WATERMARK_PACK_FUZZ)) &&
  3084. !atomic_read(&queue->set_pci_flags_count)) {
  3085. /* it's likely that we'll go to packing
  3086. * mode soon */
  3087. atomic_inc(&queue->set_pci_flags_count);
  3088. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3089. }
  3090. } else {
  3091. if (!atomic_read(&queue->set_pci_flags_count)) {
  3092. /*
  3093. * there's no outstanding PCI any more, so we
  3094. * have to request a PCI to be sure the the PCI
  3095. * will wake at some time in the future then we
  3096. * can flush packed buffers that might still be
  3097. * hanging around, which can happen if no
  3098. * further send was requested by the stack
  3099. */
  3100. atomic_inc(&queue->set_pci_flags_count);
  3101. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3102. }
  3103. }
  3104. }
  3105. netif_trans_update(queue->card->dev);
  3106. if (queue->card->options.performance_stats) {
  3107. queue->card->perf_stats.outbound_do_qdio_cnt++;
  3108. queue->card->perf_stats.outbound_do_qdio_start_time =
  3109. qeth_get_micros();
  3110. }
  3111. qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
  3112. if (atomic_read(&queue->set_pci_flags_count))
  3113. qdio_flags |= QDIO_FLAG_PCI_OUT;
  3114. rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
  3115. queue->queue_no, index, count);
  3116. if (queue->card->options.performance_stats)
  3117. queue->card->perf_stats.outbound_do_qdio_time +=
  3118. qeth_get_micros() -
  3119. queue->card->perf_stats.outbound_do_qdio_start_time;
  3120. atomic_add(count, &queue->used_buffers);
  3121. if (rc) {
  3122. queue->card->stats.tx_errors += count;
  3123. /* ignore temporary SIGA errors without busy condition */
  3124. if (rc == -ENOBUFS)
  3125. return;
  3126. QETH_CARD_TEXT(queue->card, 2, "flushbuf");
  3127. QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
  3128. QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
  3129. QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
  3130. QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
  3131. /* this must not happen under normal circumstances. if it
  3132. * happens something is really wrong -> recover */
  3133. qeth_schedule_recovery(queue->card);
  3134. return;
  3135. }
  3136. if (queue->card->options.performance_stats)
  3137. queue->card->perf_stats.bufs_sent += count;
  3138. }
  3139. static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
  3140. {
  3141. int index;
  3142. int flush_cnt = 0;
  3143. int q_was_packing = 0;
  3144. /*
  3145. * check if weed have to switch to non-packing mode or if
  3146. * we have to get a pci flag out on the queue
  3147. */
  3148. if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
  3149. !atomic_read(&queue->set_pci_flags_count)) {
  3150. if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
  3151. QETH_OUT_Q_UNLOCKED) {
  3152. /*
  3153. * If we get in here, there was no action in
  3154. * do_send_packet. So, we check if there is a
  3155. * packing buffer to be flushed here.
  3156. */
  3157. netif_stop_queue(queue->card->dev);
  3158. index = queue->next_buf_to_fill;
  3159. q_was_packing = queue->do_pack;
  3160. /* queue->do_pack may change */
  3161. barrier();
  3162. flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
  3163. if (!flush_cnt &&
  3164. !atomic_read(&queue->set_pci_flags_count))
  3165. flush_cnt += qeth_prep_flush_pack_buffer(queue);
  3166. if (queue->card->options.performance_stats &&
  3167. q_was_packing)
  3168. queue->card->perf_stats.bufs_sent_pack +=
  3169. flush_cnt;
  3170. if (flush_cnt)
  3171. qeth_flush_buffers(queue, index, flush_cnt);
  3172. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3173. }
  3174. }
  3175. }
  3176. static void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
  3177. unsigned long card_ptr)
  3178. {
  3179. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3180. if (card->dev && (card->dev->flags & IFF_UP))
  3181. napi_schedule(&card->napi);
  3182. }
  3183. int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
  3184. {
  3185. int rc;
  3186. if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
  3187. rc = -1;
  3188. goto out;
  3189. } else {
  3190. if (card->options.cq == cq) {
  3191. rc = 0;
  3192. goto out;
  3193. }
  3194. if (card->state != CARD_STATE_DOWN &&
  3195. card->state != CARD_STATE_RECOVER) {
  3196. rc = -1;
  3197. goto out;
  3198. }
  3199. qeth_free_qdio_buffers(card);
  3200. card->options.cq = cq;
  3201. rc = 0;
  3202. }
  3203. out:
  3204. return rc;
  3205. }
  3206. EXPORT_SYMBOL_GPL(qeth_configure_cq);
  3207. static void qeth_qdio_cq_handler(struct qeth_card *card, unsigned int qdio_err,
  3208. unsigned int queue, int first_element,
  3209. int count)
  3210. {
  3211. struct qeth_qdio_q *cq = card->qdio.c_q;
  3212. int i;
  3213. int rc;
  3214. if (!qeth_is_cq(card, queue))
  3215. goto out;
  3216. QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
  3217. QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
  3218. QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
  3219. if (qdio_err) {
  3220. netif_stop_queue(card->dev);
  3221. qeth_schedule_recovery(card);
  3222. goto out;
  3223. }
  3224. if (card->options.performance_stats) {
  3225. card->perf_stats.cq_cnt++;
  3226. card->perf_stats.cq_start_time = qeth_get_micros();
  3227. }
  3228. for (i = first_element; i < first_element + count; ++i) {
  3229. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3230. struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
  3231. int e = 0;
  3232. while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
  3233. buffer->element[e].addr) {
  3234. unsigned long phys_aob_addr;
  3235. phys_aob_addr = (unsigned long) buffer->element[e].addr;
  3236. qeth_qdio_handle_aob(card, phys_aob_addr);
  3237. ++e;
  3238. }
  3239. qeth_scrub_qdio_buffer(buffer, QDIO_MAX_ELEMENTS_PER_BUFFER);
  3240. }
  3241. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
  3242. card->qdio.c_q->next_buf_to_init,
  3243. count);
  3244. if (rc) {
  3245. dev_warn(&card->gdev->dev,
  3246. "QDIO reported an error, rc=%i\n", rc);
  3247. QETH_CARD_TEXT(card, 2, "qcqherr");
  3248. }
  3249. card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
  3250. + count) % QDIO_MAX_BUFFERS_PER_Q;
  3251. netif_wake_queue(card->dev);
  3252. if (card->options.performance_stats) {
  3253. int delta_t = qeth_get_micros();
  3254. delta_t -= card->perf_stats.cq_start_time;
  3255. card->perf_stats.cq_time += delta_t;
  3256. }
  3257. out:
  3258. return;
  3259. }
  3260. static void qeth_qdio_input_handler(struct ccw_device *ccwdev,
  3261. unsigned int qdio_err, int queue,
  3262. int first_elem, int count,
  3263. unsigned long card_ptr)
  3264. {
  3265. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3266. QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
  3267. QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
  3268. if (qeth_is_cq(card, queue))
  3269. qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
  3270. else if (qdio_err)
  3271. qeth_schedule_recovery(card);
  3272. }
  3273. static void qeth_qdio_output_handler(struct ccw_device *ccwdev,
  3274. unsigned int qdio_error, int __queue,
  3275. int first_element, int count,
  3276. unsigned long card_ptr)
  3277. {
  3278. struct qeth_card *card = (struct qeth_card *) card_ptr;
  3279. struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
  3280. struct qeth_qdio_out_buffer *buffer;
  3281. int i;
  3282. QETH_CARD_TEXT(card, 6, "qdouhdl");
  3283. if (qdio_error & QDIO_ERROR_FATAL) {
  3284. QETH_CARD_TEXT(card, 2, "achkcond");
  3285. netif_stop_queue(card->dev);
  3286. qeth_schedule_recovery(card);
  3287. return;
  3288. }
  3289. if (card->options.performance_stats) {
  3290. card->perf_stats.outbound_handler_cnt++;
  3291. card->perf_stats.outbound_handler_start_time =
  3292. qeth_get_micros();
  3293. }
  3294. for (i = first_element; i < (first_element + count); ++i) {
  3295. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3296. buffer = queue->bufs[bidx];
  3297. qeth_handle_send_error(card, buffer, qdio_error);
  3298. if (queue->bufstates &&
  3299. (queue->bufstates[bidx].flags &
  3300. QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
  3301. WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
  3302. if (atomic_cmpxchg(&buffer->state,
  3303. QETH_QDIO_BUF_PRIMED,
  3304. QETH_QDIO_BUF_PENDING) ==
  3305. QETH_QDIO_BUF_PRIMED) {
  3306. qeth_notify_skbs(queue, buffer,
  3307. TX_NOTIFY_PENDING);
  3308. }
  3309. QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
  3310. /* prepare the queue slot for re-use: */
  3311. qeth_scrub_qdio_buffer(buffer->buffer,
  3312. QETH_MAX_BUFFER_ELEMENTS(card));
  3313. if (qeth_init_qdio_out_buf(queue, bidx)) {
  3314. QETH_CARD_TEXT(card, 2, "outofbuf");
  3315. qeth_schedule_recovery(card);
  3316. }
  3317. } else {
  3318. if (card->options.cq == QETH_CQ_ENABLED) {
  3319. enum iucv_tx_notify n;
  3320. n = qeth_compute_cq_notification(
  3321. buffer->buffer->element[15].sflags, 0);
  3322. qeth_notify_skbs(queue, buffer, n);
  3323. }
  3324. qeth_clear_output_buffer(queue, buffer);
  3325. }
  3326. qeth_cleanup_handled_pending(queue, bidx, 0);
  3327. }
  3328. atomic_sub(count, &queue->used_buffers);
  3329. /* check if we need to do something on this outbound queue */
  3330. if (card->info.type != QETH_CARD_TYPE_IQD)
  3331. qeth_check_outbound_queue(queue);
  3332. netif_wake_queue(queue->card->dev);
  3333. if (card->options.performance_stats)
  3334. card->perf_stats.outbound_handler_time += qeth_get_micros() -
  3335. card->perf_stats.outbound_handler_start_time;
  3336. }
  3337. /* We cannot use outbound queue 3 for unicast packets on HiperSockets */
  3338. static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
  3339. {
  3340. if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
  3341. return 2;
  3342. return queue_num;
  3343. }
  3344. /**
  3345. * Note: Function assumes that we have 4 outbound queues.
  3346. */
  3347. int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
  3348. int ipv, int cast_type)
  3349. {
  3350. __be16 *tci;
  3351. u8 tos;
  3352. if (cast_type && card->info.is_multicast_different)
  3353. return card->info.is_multicast_different &
  3354. (card->qdio.no_out_queues - 1);
  3355. switch (card->qdio.do_prio_queueing) {
  3356. case QETH_PRIO_Q_ING_TOS:
  3357. case QETH_PRIO_Q_ING_PREC:
  3358. switch (ipv) {
  3359. case 4:
  3360. tos = ipv4_get_dsfield(ip_hdr(skb));
  3361. break;
  3362. case 6:
  3363. tos = ipv6_get_dsfield(ipv6_hdr(skb));
  3364. break;
  3365. default:
  3366. return card->qdio.default_out_queue;
  3367. }
  3368. if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
  3369. return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
  3370. if (tos & IPTOS_MINCOST)
  3371. return qeth_cut_iqd_prio(card, 3);
  3372. if (tos & IPTOS_RELIABILITY)
  3373. return 2;
  3374. if (tos & IPTOS_THROUGHPUT)
  3375. return 1;
  3376. if (tos & IPTOS_LOWDELAY)
  3377. return 0;
  3378. break;
  3379. case QETH_PRIO_Q_ING_SKB:
  3380. if (skb->priority > 5)
  3381. return 0;
  3382. return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
  3383. case QETH_PRIO_Q_ING_VLAN:
  3384. tci = &((struct ethhdr *)skb->data)->h_proto;
  3385. if (be16_to_cpu(*tci) == ETH_P_8021Q)
  3386. return qeth_cut_iqd_prio(card,
  3387. ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
  3388. break;
  3389. default:
  3390. break;
  3391. }
  3392. return card->qdio.default_out_queue;
  3393. }
  3394. EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
  3395. /**
  3396. * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
  3397. * @skb: SKB address
  3398. *
  3399. * Returns the number of pages, and thus QDIO buffer elements, needed to cover
  3400. * fragmented part of the SKB. Returns zero for linear SKB.
  3401. */
  3402. int qeth_get_elements_for_frags(struct sk_buff *skb)
  3403. {
  3404. int cnt, elements = 0;
  3405. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3406. struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
  3407. elements += qeth_get_elements_for_range(
  3408. (addr_t)skb_frag_address(frag),
  3409. (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
  3410. }
  3411. return elements;
  3412. }
  3413. EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
  3414. /**
  3415. * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
  3416. * @card: qeth card structure, to check max. elems.
  3417. * @skb: SKB address
  3418. * @extra_elems: extra elems needed, to check against max.
  3419. * @data_offset: range starts at skb->data + data_offset
  3420. *
  3421. * Returns the number of pages, and thus QDIO buffer elements, needed to cover
  3422. * skb data, including linear part and fragments. Checks if the result plus
  3423. * extra_elems fits under the limit for the card. Returns 0 if it does not.
  3424. * Note: extra_elems is not included in the returned result.
  3425. */
  3426. int qeth_get_elements_no(struct qeth_card *card,
  3427. struct sk_buff *skb, int extra_elems, int data_offset)
  3428. {
  3429. addr_t end = (addr_t)skb->data + skb_headlen(skb);
  3430. int elements = qeth_get_elements_for_frags(skb);
  3431. addr_t start = (addr_t)skb->data + data_offset;
  3432. if (start != end)
  3433. elements += qeth_get_elements_for_range(start, end);
  3434. if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
  3435. QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
  3436. "(Number=%d / Length=%d). Discarded.\n",
  3437. elements + extra_elems, skb->len);
  3438. return 0;
  3439. }
  3440. return elements;
  3441. }
  3442. EXPORT_SYMBOL_GPL(qeth_get_elements_no);
  3443. int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
  3444. {
  3445. int hroom, inpage, rest;
  3446. if (((unsigned long)skb->data & PAGE_MASK) !=
  3447. (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
  3448. hroom = skb_headroom(skb);
  3449. inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
  3450. rest = len - inpage;
  3451. if (rest > hroom)
  3452. return 1;
  3453. memmove(skb->data - rest, skb->data, skb_headlen(skb));
  3454. skb->data -= rest;
  3455. skb->tail -= rest;
  3456. *hdr = (struct qeth_hdr *)skb->data;
  3457. QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
  3458. }
  3459. return 0;
  3460. }
  3461. EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
  3462. /**
  3463. * qeth_push_hdr() - push a qeth_hdr onto an skb.
  3464. * @skb: skb that the qeth_hdr should be pushed onto.
  3465. * @hdr: double pointer to a qeth_hdr. When returning with >= 0,
  3466. * it contains a valid pointer to a qeth_hdr.
  3467. * @len: length of the hdr that needs to be pushed on.
  3468. *
  3469. * Returns the pushed length. If the header can't be pushed on
  3470. * (eg. because it would cross a page boundary), it is allocated from
  3471. * the cache instead and 0 is returned.
  3472. * Error to create the hdr is indicated by returning with < 0.
  3473. */
  3474. int qeth_push_hdr(struct sk_buff *skb, struct qeth_hdr **hdr, unsigned int len)
  3475. {
  3476. if (skb_headroom(skb) >= len &&
  3477. qeth_get_elements_for_range((addr_t)skb->data - len,
  3478. (addr_t)skb->data) == 1) {
  3479. *hdr = skb_push(skb, len);
  3480. return len;
  3481. }
  3482. /* fall back */
  3483. *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
  3484. if (!*hdr)
  3485. return -ENOMEM;
  3486. return 0;
  3487. }
  3488. EXPORT_SYMBOL_GPL(qeth_push_hdr);
  3489. static void __qeth_fill_buffer(struct sk_buff *skb,
  3490. struct qeth_qdio_out_buffer *buf,
  3491. bool is_first_elem, unsigned int offset)
  3492. {
  3493. struct qdio_buffer *buffer = buf->buffer;
  3494. int element = buf->next_element_to_fill;
  3495. int length = skb_headlen(skb) - offset;
  3496. char *data = skb->data + offset;
  3497. int length_here, cnt;
  3498. /* map linear part into buffer element(s) */
  3499. while (length > 0) {
  3500. /* length_here is the remaining amount of data in this page */
  3501. length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
  3502. if (length < length_here)
  3503. length_here = length;
  3504. buffer->element[element].addr = data;
  3505. buffer->element[element].length = length_here;
  3506. length -= length_here;
  3507. if (is_first_elem) {
  3508. is_first_elem = false;
  3509. if (length || skb_is_nonlinear(skb))
  3510. /* skb needs additional elements */
  3511. buffer->element[element].eflags =
  3512. SBAL_EFLAGS_FIRST_FRAG;
  3513. else
  3514. buffer->element[element].eflags = 0;
  3515. } else {
  3516. buffer->element[element].eflags =
  3517. SBAL_EFLAGS_MIDDLE_FRAG;
  3518. }
  3519. data += length_here;
  3520. element++;
  3521. }
  3522. /* map page frags into buffer element(s) */
  3523. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3524. skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
  3525. data = skb_frag_address(frag);
  3526. length = skb_frag_size(frag);
  3527. while (length > 0) {
  3528. length_here = PAGE_SIZE -
  3529. ((unsigned long) data % PAGE_SIZE);
  3530. if (length < length_here)
  3531. length_here = length;
  3532. buffer->element[element].addr = data;
  3533. buffer->element[element].length = length_here;
  3534. buffer->element[element].eflags =
  3535. SBAL_EFLAGS_MIDDLE_FRAG;
  3536. length -= length_here;
  3537. data += length_here;
  3538. element++;
  3539. }
  3540. }
  3541. if (buffer->element[element - 1].eflags)
  3542. buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
  3543. buf->next_element_to_fill = element;
  3544. }
  3545. /**
  3546. * qeth_fill_buffer() - map skb into an output buffer
  3547. * @queue: QDIO queue to submit the buffer on
  3548. * @buf: buffer to transport the skb
  3549. * @skb: skb to map into the buffer
  3550. * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated
  3551. * from qeth_core_header_cache.
  3552. * @offset: when mapping the skb, start at skb->data + offset
  3553. * @hd_len: if > 0, build a dedicated header element of this size
  3554. */
  3555. static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
  3556. struct qeth_qdio_out_buffer *buf,
  3557. struct sk_buff *skb, struct qeth_hdr *hdr,
  3558. unsigned int offset, unsigned int hd_len)
  3559. {
  3560. struct qdio_buffer *buffer = buf->buffer;
  3561. bool is_first_elem = true;
  3562. int flush_cnt = 0;
  3563. refcount_inc(&skb->users);
  3564. skb_queue_tail(&buf->skb_list, skb);
  3565. /* build dedicated header element */
  3566. if (hd_len) {
  3567. int element = buf->next_element_to_fill;
  3568. is_first_elem = false;
  3569. buffer->element[element].addr = hdr;
  3570. buffer->element[element].length = hd_len;
  3571. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3572. /* remember to free cache-allocated qeth_hdr: */
  3573. buf->is_header[element] = ((void *)hdr != skb->data);
  3574. buf->next_element_to_fill++;
  3575. }
  3576. __qeth_fill_buffer(skb, buf, is_first_elem, offset);
  3577. if (!queue->do_pack) {
  3578. QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
  3579. /* set state to PRIMED -> will be flushed */
  3580. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3581. flush_cnt = 1;
  3582. } else {
  3583. QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
  3584. if (queue->card->options.performance_stats)
  3585. queue->card->perf_stats.skbs_sent_pack++;
  3586. if (buf->next_element_to_fill >=
  3587. QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
  3588. /*
  3589. * packed buffer if full -> set state PRIMED
  3590. * -> will be flushed
  3591. */
  3592. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3593. flush_cnt = 1;
  3594. }
  3595. }
  3596. return flush_cnt;
  3597. }
  3598. int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue, struct sk_buff *skb,
  3599. struct qeth_hdr *hdr, unsigned int offset,
  3600. unsigned int hd_len)
  3601. {
  3602. int index = queue->next_buf_to_fill;
  3603. struct qeth_qdio_out_buffer *buffer = queue->bufs[index];
  3604. /*
  3605. * check if buffer is empty to make sure that we do not 'overtake'
  3606. * ourselves and try to fill a buffer that is already primed
  3607. */
  3608. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
  3609. return -EBUSY;
  3610. queue->next_buf_to_fill = (index + 1) % QDIO_MAX_BUFFERS_PER_Q;
  3611. qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3612. qeth_flush_buffers(queue, index, 1);
  3613. return 0;
  3614. }
  3615. EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
  3616. int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  3617. struct sk_buff *skb, struct qeth_hdr *hdr,
  3618. unsigned int offset, unsigned int hd_len,
  3619. int elements_needed)
  3620. {
  3621. struct qeth_qdio_out_buffer *buffer;
  3622. int start_index;
  3623. int flush_count = 0;
  3624. int do_pack = 0;
  3625. int tmp;
  3626. int rc = 0;
  3627. /* spin until we get the queue ... */
  3628. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3629. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3630. start_index = queue->next_buf_to_fill;
  3631. buffer = queue->bufs[queue->next_buf_to_fill];
  3632. /*
  3633. * check if buffer is empty to make sure that we do not 'overtake'
  3634. * ourselves and try to fill a buffer that is already primed
  3635. */
  3636. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
  3637. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3638. return -EBUSY;
  3639. }
  3640. /* check if we need to switch packing state of this queue */
  3641. qeth_switch_to_packing_if_needed(queue);
  3642. if (queue->do_pack) {
  3643. do_pack = 1;
  3644. /* does packet fit in current buffer? */
  3645. if ((QETH_MAX_BUFFER_ELEMENTS(card) -
  3646. buffer->next_element_to_fill) < elements_needed) {
  3647. /* ... no -> set state PRIMED */
  3648. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3649. flush_count++;
  3650. queue->next_buf_to_fill =
  3651. (queue->next_buf_to_fill + 1) %
  3652. QDIO_MAX_BUFFERS_PER_Q;
  3653. buffer = queue->bufs[queue->next_buf_to_fill];
  3654. /* we did a step forward, so check buffer state
  3655. * again */
  3656. if (atomic_read(&buffer->state) !=
  3657. QETH_QDIO_BUF_EMPTY) {
  3658. qeth_flush_buffers(queue, start_index,
  3659. flush_count);
  3660. atomic_set(&queue->state,
  3661. QETH_OUT_Q_UNLOCKED);
  3662. rc = -EBUSY;
  3663. goto out;
  3664. }
  3665. }
  3666. }
  3667. tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3668. queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
  3669. QDIO_MAX_BUFFERS_PER_Q;
  3670. flush_count += tmp;
  3671. if (flush_count)
  3672. qeth_flush_buffers(queue, start_index, flush_count);
  3673. else if (!atomic_read(&queue->set_pci_flags_count))
  3674. atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
  3675. /*
  3676. * queue->state will go from LOCKED -> UNLOCKED or from
  3677. * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
  3678. * (switch packing state or flush buffer to get another pci flag out).
  3679. * In that case we will enter this loop
  3680. */
  3681. while (atomic_dec_return(&queue->state)) {
  3682. start_index = queue->next_buf_to_fill;
  3683. /* check if we can go back to non-packing state */
  3684. tmp = qeth_switch_to_nonpacking_if_needed(queue);
  3685. /*
  3686. * check if we need to flush a packing buffer to get a pci
  3687. * flag out on the queue
  3688. */
  3689. if (!tmp && !atomic_read(&queue->set_pci_flags_count))
  3690. tmp = qeth_prep_flush_pack_buffer(queue);
  3691. if (tmp) {
  3692. qeth_flush_buffers(queue, start_index, tmp);
  3693. flush_count += tmp;
  3694. }
  3695. }
  3696. out:
  3697. /* at this point the queue is UNLOCKED again */
  3698. if (queue->card->options.performance_stats && do_pack)
  3699. queue->card->perf_stats.bufs_sent_pack += flush_count;
  3700. return rc;
  3701. }
  3702. EXPORT_SYMBOL_GPL(qeth_do_send_packet);
  3703. static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
  3704. struct qeth_reply *reply, unsigned long data)
  3705. {
  3706. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  3707. struct qeth_ipacmd_setadpparms *setparms;
  3708. QETH_CARD_TEXT(card, 4, "prmadpcb");
  3709. setparms = &(cmd->data.setadapterparms);
  3710. if (qeth_setadpparms_inspect_rc(cmd)) {
  3711. QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
  3712. setparms->data.mode = SET_PROMISC_MODE_OFF;
  3713. }
  3714. card->info.promisc_mode = setparms->data.mode;
  3715. return 0;
  3716. }
  3717. void qeth_setadp_promisc_mode(struct qeth_card *card)
  3718. {
  3719. enum qeth_ipa_promisc_modes mode;
  3720. struct net_device *dev = card->dev;
  3721. struct qeth_cmd_buffer *iob;
  3722. struct qeth_ipa_cmd *cmd;
  3723. QETH_CARD_TEXT(card, 4, "setprom");
  3724. if (((dev->flags & IFF_PROMISC) &&
  3725. (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
  3726. (!(dev->flags & IFF_PROMISC) &&
  3727. (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
  3728. return;
  3729. mode = SET_PROMISC_MODE_OFF;
  3730. if (dev->flags & IFF_PROMISC)
  3731. mode = SET_PROMISC_MODE_ON;
  3732. QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
  3733. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
  3734. sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
  3735. if (!iob)
  3736. return;
  3737. cmd = __ipa_cmd(iob);
  3738. cmd->data.setadapterparms.data.mode = mode;
  3739. qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
  3740. }
  3741. EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
  3742. int qeth_change_mtu(struct net_device *dev, int new_mtu)
  3743. {
  3744. struct qeth_card *card;
  3745. char dbf_text[15];
  3746. card = dev->ml_priv;
  3747. QETH_CARD_TEXT(card, 4, "chgmtu");
  3748. sprintf(dbf_text, "%8x", new_mtu);
  3749. QETH_CARD_TEXT(card, 4, dbf_text);
  3750. if (!qeth_mtu_is_valid(card, new_mtu))
  3751. return -EINVAL;
  3752. dev->mtu = new_mtu;
  3753. return 0;
  3754. }
  3755. EXPORT_SYMBOL_GPL(qeth_change_mtu);
  3756. struct net_device_stats *qeth_get_stats(struct net_device *dev)
  3757. {
  3758. struct qeth_card *card;
  3759. card = dev->ml_priv;
  3760. QETH_CARD_TEXT(card, 5, "getstat");
  3761. return &card->stats;
  3762. }
  3763. EXPORT_SYMBOL_GPL(qeth_get_stats);
  3764. static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
  3765. struct qeth_reply *reply, unsigned long data)
  3766. {
  3767. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  3768. QETH_CARD_TEXT(card, 4, "chgmaccb");
  3769. if (qeth_setadpparms_inspect_rc(cmd))
  3770. return 0;
  3771. if (!card->options.layer2 ||
  3772. !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
  3773. ether_addr_copy(card->dev->dev_addr,
  3774. cmd->data.setadapterparms.data.change_addr.addr);
  3775. card->info.mac_bits |= QETH_LAYER2_MAC_READ;
  3776. }
  3777. return 0;
  3778. }
  3779. int qeth_setadpparms_change_macaddr(struct qeth_card *card)
  3780. {
  3781. int rc;
  3782. struct qeth_cmd_buffer *iob;
  3783. struct qeth_ipa_cmd *cmd;
  3784. QETH_CARD_TEXT(card, 4, "chgmac");
  3785. iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
  3786. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3787. sizeof(struct qeth_change_addr));
  3788. if (!iob)
  3789. return -ENOMEM;
  3790. cmd = __ipa_cmd(iob);
  3791. cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
  3792. cmd->data.setadapterparms.data.change_addr.addr_size = ETH_ALEN;
  3793. ether_addr_copy(cmd->data.setadapterparms.data.change_addr.addr,
  3794. card->dev->dev_addr);
  3795. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
  3796. NULL);
  3797. return rc;
  3798. }
  3799. EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
  3800. static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
  3801. struct qeth_reply *reply, unsigned long data)
  3802. {
  3803. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  3804. struct qeth_set_access_ctrl *access_ctrl_req;
  3805. int fallback = *(int *)reply->param;
  3806. QETH_CARD_TEXT(card, 4, "setaccb");
  3807. if (cmd->hdr.return_code)
  3808. return 0;
  3809. qeth_setadpparms_inspect_rc(cmd);
  3810. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3811. QETH_DBF_TEXT_(SETUP, 2, "setaccb");
  3812. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3813. QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
  3814. cmd->data.setadapterparms.hdr.return_code);
  3815. if (cmd->data.setadapterparms.hdr.return_code !=
  3816. SET_ACCESS_CTRL_RC_SUCCESS)
  3817. QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
  3818. card->gdev->dev.kobj.name,
  3819. access_ctrl_req->subcmd_code,
  3820. cmd->data.setadapterparms.hdr.return_code);
  3821. switch (cmd->data.setadapterparms.hdr.return_code) {
  3822. case SET_ACCESS_CTRL_RC_SUCCESS:
  3823. if (card->options.isolation == ISOLATION_MODE_NONE) {
  3824. dev_info(&card->gdev->dev,
  3825. "QDIO data connection isolation is deactivated\n");
  3826. } else {
  3827. dev_info(&card->gdev->dev,
  3828. "QDIO data connection isolation is activated\n");
  3829. }
  3830. break;
  3831. case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
  3832. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
  3833. "deactivated\n", dev_name(&card->gdev->dev));
  3834. if (fallback)
  3835. card->options.isolation = card->options.prev_isolation;
  3836. break;
  3837. case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
  3838. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
  3839. " activated\n", dev_name(&card->gdev->dev));
  3840. if (fallback)
  3841. card->options.isolation = card->options.prev_isolation;
  3842. break;
  3843. case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
  3844. dev_err(&card->gdev->dev, "Adapter does not "
  3845. "support QDIO data connection isolation\n");
  3846. break;
  3847. case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
  3848. dev_err(&card->gdev->dev,
  3849. "Adapter is dedicated. "
  3850. "QDIO data connection isolation not supported\n");
  3851. if (fallback)
  3852. card->options.isolation = card->options.prev_isolation;
  3853. break;
  3854. case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
  3855. dev_err(&card->gdev->dev,
  3856. "TSO does not permit QDIO data connection isolation\n");
  3857. if (fallback)
  3858. card->options.isolation = card->options.prev_isolation;
  3859. break;
  3860. case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
  3861. dev_err(&card->gdev->dev, "The adjacent switch port does not "
  3862. "support reflective relay mode\n");
  3863. if (fallback)
  3864. card->options.isolation = card->options.prev_isolation;
  3865. break;
  3866. case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
  3867. dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
  3868. "enabled at the adjacent switch port");
  3869. if (fallback)
  3870. card->options.isolation = card->options.prev_isolation;
  3871. break;
  3872. case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
  3873. dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
  3874. "at the adjacent switch failed\n");
  3875. break;
  3876. default:
  3877. /* this should never happen */
  3878. if (fallback)
  3879. card->options.isolation = card->options.prev_isolation;
  3880. break;
  3881. }
  3882. return 0;
  3883. }
  3884. static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
  3885. enum qeth_ipa_isolation_modes isolation, int fallback)
  3886. {
  3887. int rc;
  3888. struct qeth_cmd_buffer *iob;
  3889. struct qeth_ipa_cmd *cmd;
  3890. struct qeth_set_access_ctrl *access_ctrl_req;
  3891. QETH_CARD_TEXT(card, 4, "setacctl");
  3892. QETH_DBF_TEXT_(SETUP, 2, "setacctl");
  3893. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3894. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
  3895. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3896. sizeof(struct qeth_set_access_ctrl));
  3897. if (!iob)
  3898. return -ENOMEM;
  3899. cmd = __ipa_cmd(iob);
  3900. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3901. access_ctrl_req->subcmd_code = isolation;
  3902. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
  3903. &fallback);
  3904. QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
  3905. return rc;
  3906. }
  3907. int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
  3908. {
  3909. int rc = 0;
  3910. QETH_CARD_TEXT(card, 4, "setactlo");
  3911. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  3912. card->info.type == QETH_CARD_TYPE_OSX) &&
  3913. qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
  3914. rc = qeth_setadpparms_set_access_ctrl(card,
  3915. card->options.isolation, fallback);
  3916. if (rc) {
  3917. QETH_DBF_MESSAGE(3,
  3918. "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
  3919. card->gdev->dev.kobj.name,
  3920. rc);
  3921. rc = -EOPNOTSUPP;
  3922. }
  3923. } else if (card->options.isolation != ISOLATION_MODE_NONE) {
  3924. card->options.isolation = ISOLATION_MODE_NONE;
  3925. dev_err(&card->gdev->dev, "Adapter does not "
  3926. "support QDIO data connection isolation\n");
  3927. rc = -EOPNOTSUPP;
  3928. }
  3929. return rc;
  3930. }
  3931. EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
  3932. void qeth_tx_timeout(struct net_device *dev)
  3933. {
  3934. struct qeth_card *card;
  3935. card = dev->ml_priv;
  3936. QETH_CARD_TEXT(card, 4, "txtimeo");
  3937. card->stats.tx_errors++;
  3938. qeth_schedule_recovery(card);
  3939. }
  3940. EXPORT_SYMBOL_GPL(qeth_tx_timeout);
  3941. static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
  3942. {
  3943. struct qeth_card *card = dev->ml_priv;
  3944. int rc = 0;
  3945. switch (regnum) {
  3946. case MII_BMCR: /* Basic mode control register */
  3947. rc = BMCR_FULLDPLX;
  3948. if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
  3949. (card->info.link_type != QETH_LINK_TYPE_OSN) &&
  3950. (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
  3951. rc |= BMCR_SPEED100;
  3952. break;
  3953. case MII_BMSR: /* Basic mode status register */
  3954. rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
  3955. BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
  3956. BMSR_100BASE4;
  3957. break;
  3958. case MII_PHYSID1: /* PHYS ID 1 */
  3959. rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
  3960. dev->dev_addr[2];
  3961. rc = (rc >> 5) & 0xFFFF;
  3962. break;
  3963. case MII_PHYSID2: /* PHYS ID 2 */
  3964. rc = (dev->dev_addr[2] << 10) & 0xFFFF;
  3965. break;
  3966. case MII_ADVERTISE: /* Advertisement control reg */
  3967. rc = ADVERTISE_ALL;
  3968. break;
  3969. case MII_LPA: /* Link partner ability reg */
  3970. rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
  3971. LPA_100BASE4 | LPA_LPACK;
  3972. break;
  3973. case MII_EXPANSION: /* Expansion register */
  3974. break;
  3975. case MII_DCOUNTER: /* disconnect counter */
  3976. break;
  3977. case MII_FCSCOUNTER: /* false carrier counter */
  3978. break;
  3979. case MII_NWAYTEST: /* N-way auto-neg test register */
  3980. break;
  3981. case MII_RERRCOUNTER: /* rx error counter */
  3982. rc = card->stats.rx_errors;
  3983. break;
  3984. case MII_SREVISION: /* silicon revision */
  3985. break;
  3986. case MII_RESV1: /* reserved 1 */
  3987. break;
  3988. case MII_LBRERROR: /* loopback, rx, bypass error */
  3989. break;
  3990. case MII_PHYADDR: /* physical address */
  3991. break;
  3992. case MII_RESV2: /* reserved 2 */
  3993. break;
  3994. case MII_TPISTATUS: /* TPI status for 10mbps */
  3995. break;
  3996. case MII_NCONFIG: /* network interface config */
  3997. break;
  3998. default:
  3999. break;
  4000. }
  4001. return rc;
  4002. }
  4003. static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
  4004. struct qeth_cmd_buffer *iob, int len,
  4005. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  4006. unsigned long),
  4007. void *reply_param)
  4008. {
  4009. u16 s1, s2;
  4010. QETH_CARD_TEXT(card, 4, "sendsnmp");
  4011. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  4012. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  4013. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  4014. /* adjust PDU length fields in IPA_PDU_HEADER */
  4015. s1 = (u32) IPA_PDU_HEADER_SIZE + len;
  4016. s2 = (u32) len;
  4017. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  4018. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  4019. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  4020. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  4021. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  4022. reply_cb, reply_param);
  4023. }
  4024. static int qeth_snmp_command_cb(struct qeth_card *card,
  4025. struct qeth_reply *reply, unsigned long sdata)
  4026. {
  4027. struct qeth_ipa_cmd *cmd;
  4028. struct qeth_arp_query_info *qinfo;
  4029. struct qeth_snmp_cmd *snmp;
  4030. unsigned char *data;
  4031. __u16 data_len;
  4032. QETH_CARD_TEXT(card, 3, "snpcmdcb");
  4033. cmd = (struct qeth_ipa_cmd *) sdata;
  4034. data = (unsigned char *)((char *)cmd - reply->offset);
  4035. qinfo = (struct qeth_arp_query_info *) reply->param;
  4036. snmp = &cmd->data.setadapterparms.data.snmp;
  4037. if (cmd->hdr.return_code) {
  4038. QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
  4039. return 0;
  4040. }
  4041. if (cmd->data.setadapterparms.hdr.return_code) {
  4042. cmd->hdr.return_code =
  4043. cmd->data.setadapterparms.hdr.return_code;
  4044. QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
  4045. return 0;
  4046. }
  4047. data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
  4048. if (cmd->data.setadapterparms.hdr.seq_no == 1)
  4049. data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
  4050. else
  4051. data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
  4052. /* check if there is enough room in userspace */
  4053. if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
  4054. QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
  4055. cmd->hdr.return_code = IPA_RC_ENOMEM;
  4056. return 0;
  4057. }
  4058. QETH_CARD_TEXT_(card, 4, "snore%i",
  4059. cmd->data.setadapterparms.hdr.used_total);
  4060. QETH_CARD_TEXT_(card, 4, "sseqn%i",
  4061. cmd->data.setadapterparms.hdr.seq_no);
  4062. /*copy entries to user buffer*/
  4063. if (cmd->data.setadapterparms.hdr.seq_no == 1) {
  4064. memcpy(qinfo->udata + qinfo->udata_offset,
  4065. (char *)snmp,
  4066. data_len + offsetof(struct qeth_snmp_cmd, data));
  4067. qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
  4068. } else {
  4069. memcpy(qinfo->udata + qinfo->udata_offset,
  4070. (char *)&snmp->request, data_len);
  4071. }
  4072. qinfo->udata_offset += data_len;
  4073. /* check if all replies received ... */
  4074. QETH_CARD_TEXT_(card, 4, "srtot%i",
  4075. cmd->data.setadapterparms.hdr.used_total);
  4076. QETH_CARD_TEXT_(card, 4, "srseq%i",
  4077. cmd->data.setadapterparms.hdr.seq_no);
  4078. if (cmd->data.setadapterparms.hdr.seq_no <
  4079. cmd->data.setadapterparms.hdr.used_total)
  4080. return 1;
  4081. return 0;
  4082. }
  4083. static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
  4084. {
  4085. struct qeth_cmd_buffer *iob;
  4086. struct qeth_ipa_cmd *cmd;
  4087. struct qeth_snmp_ureq *ureq;
  4088. unsigned int req_len;
  4089. struct qeth_arp_query_info qinfo = {0, };
  4090. int rc = 0;
  4091. QETH_CARD_TEXT(card, 3, "snmpcmd");
  4092. if (card->info.guestlan)
  4093. return -EOPNOTSUPP;
  4094. if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
  4095. (!card->options.layer2)) {
  4096. return -EOPNOTSUPP;
  4097. }
  4098. /* skip 4 bytes (data_len struct member) to get req_len */
  4099. if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
  4100. return -EFAULT;
  4101. if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
  4102. sizeof(struct qeth_ipacmd_hdr) -
  4103. sizeof(struct qeth_ipacmd_setadpparms_hdr)))
  4104. return -EINVAL;
  4105. ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
  4106. if (IS_ERR(ureq)) {
  4107. QETH_CARD_TEXT(card, 2, "snmpnome");
  4108. return PTR_ERR(ureq);
  4109. }
  4110. qinfo.udata_len = ureq->hdr.data_len;
  4111. qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
  4112. if (!qinfo.udata) {
  4113. kfree(ureq);
  4114. return -ENOMEM;
  4115. }
  4116. qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
  4117. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
  4118. QETH_SNMP_SETADP_CMDLENGTH + req_len);
  4119. if (!iob) {
  4120. rc = -ENOMEM;
  4121. goto out;
  4122. }
  4123. cmd = __ipa_cmd(iob);
  4124. memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
  4125. rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
  4126. qeth_snmp_command_cb, (void *)&qinfo);
  4127. if (rc)
  4128. QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
  4129. QETH_CARD_IFNAME(card), rc);
  4130. else {
  4131. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4132. rc = -EFAULT;
  4133. }
  4134. out:
  4135. kfree(ureq);
  4136. kfree(qinfo.udata);
  4137. return rc;
  4138. }
  4139. static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
  4140. struct qeth_reply *reply, unsigned long data)
  4141. {
  4142. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
  4143. struct qeth_qoat_priv *priv;
  4144. char *resdata;
  4145. int resdatalen;
  4146. QETH_CARD_TEXT(card, 3, "qoatcb");
  4147. if (qeth_setadpparms_inspect_rc(cmd))
  4148. return 0;
  4149. priv = (struct qeth_qoat_priv *)reply->param;
  4150. resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
  4151. resdata = (char *)data + 28;
  4152. if (resdatalen > (priv->buffer_len - priv->response_len)) {
  4153. cmd->hdr.return_code = IPA_RC_FFFF;
  4154. return 0;
  4155. }
  4156. memcpy((priv->buffer + priv->response_len), resdata,
  4157. resdatalen);
  4158. priv->response_len += resdatalen;
  4159. if (cmd->data.setadapterparms.hdr.seq_no <
  4160. cmd->data.setadapterparms.hdr.used_total)
  4161. return 1;
  4162. return 0;
  4163. }
  4164. static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
  4165. {
  4166. int rc = 0;
  4167. struct qeth_cmd_buffer *iob;
  4168. struct qeth_ipa_cmd *cmd;
  4169. struct qeth_query_oat *oat_req;
  4170. struct qeth_query_oat_data oat_data;
  4171. struct qeth_qoat_priv priv;
  4172. void __user *tmp;
  4173. QETH_CARD_TEXT(card, 3, "qoatcmd");
  4174. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
  4175. rc = -EOPNOTSUPP;
  4176. goto out;
  4177. }
  4178. if (copy_from_user(&oat_data, udata,
  4179. sizeof(struct qeth_query_oat_data))) {
  4180. rc = -EFAULT;
  4181. goto out;
  4182. }
  4183. priv.buffer_len = oat_data.buffer_len;
  4184. priv.response_len = 0;
  4185. priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
  4186. if (!priv.buffer) {
  4187. rc = -ENOMEM;
  4188. goto out;
  4189. }
  4190. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
  4191. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  4192. sizeof(struct qeth_query_oat));
  4193. if (!iob) {
  4194. rc = -ENOMEM;
  4195. goto out_free;
  4196. }
  4197. cmd = __ipa_cmd(iob);
  4198. oat_req = &cmd->data.setadapterparms.data.query_oat;
  4199. oat_req->subcmd_code = oat_data.command;
  4200. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
  4201. &priv);
  4202. if (!rc) {
  4203. if (is_compat_task())
  4204. tmp = compat_ptr(oat_data.ptr);
  4205. else
  4206. tmp = (void __user *)(unsigned long)oat_data.ptr;
  4207. if (copy_to_user(tmp, priv.buffer,
  4208. priv.response_len)) {
  4209. rc = -EFAULT;
  4210. goto out_free;
  4211. }
  4212. oat_data.response_len = priv.response_len;
  4213. if (copy_to_user(udata, &oat_data,
  4214. sizeof(struct qeth_query_oat_data)))
  4215. rc = -EFAULT;
  4216. } else
  4217. if (rc == IPA_RC_FFFF)
  4218. rc = -EFAULT;
  4219. out_free:
  4220. kfree(priv.buffer);
  4221. out:
  4222. return rc;
  4223. }
  4224. static int qeth_query_card_info_cb(struct qeth_card *card,
  4225. struct qeth_reply *reply, unsigned long data)
  4226. {
  4227. struct carrier_info *carrier_info = (struct carrier_info *)reply->param;
  4228. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
  4229. struct qeth_query_card_info *card_info;
  4230. QETH_CARD_TEXT(card, 2, "qcrdincb");
  4231. if (qeth_setadpparms_inspect_rc(cmd))
  4232. return 0;
  4233. card_info = &cmd->data.setadapterparms.data.card_info;
  4234. carrier_info->card_type = card_info->card_type;
  4235. carrier_info->port_mode = card_info->port_mode;
  4236. carrier_info->port_speed = card_info->port_speed;
  4237. return 0;
  4238. }
  4239. static int qeth_query_card_info(struct qeth_card *card,
  4240. struct carrier_info *carrier_info)
  4241. {
  4242. struct qeth_cmd_buffer *iob;
  4243. QETH_CARD_TEXT(card, 2, "qcrdinfo");
  4244. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
  4245. return -EOPNOTSUPP;
  4246. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
  4247. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  4248. if (!iob)
  4249. return -ENOMEM;
  4250. return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
  4251. (void *)carrier_info);
  4252. }
  4253. /**
  4254. * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
  4255. * @card: pointer to a qeth_card
  4256. *
  4257. * Returns
  4258. * 0, if a MAC address has been set for the card's netdevice
  4259. * a return code, for various error conditions
  4260. */
  4261. int qeth_vm_request_mac(struct qeth_card *card)
  4262. {
  4263. struct diag26c_mac_resp *response;
  4264. struct diag26c_mac_req *request;
  4265. struct ccw_dev_id id;
  4266. int rc;
  4267. QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
  4268. if (!card->dev)
  4269. return -ENODEV;
  4270. request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
  4271. response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
  4272. if (!request || !response) {
  4273. rc = -ENOMEM;
  4274. goto out;
  4275. }
  4276. ccw_device_get_id(CARD_DDEV(card), &id);
  4277. request->resp_buf_len = sizeof(*response);
  4278. request->resp_version = DIAG26C_VERSION2;
  4279. request->op_code = DIAG26C_GET_MAC;
  4280. request->devno = id.devno;
  4281. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  4282. rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
  4283. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  4284. if (rc)
  4285. goto out;
  4286. QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
  4287. if (request->resp_buf_len < sizeof(*response) ||
  4288. response->version != request->resp_version) {
  4289. rc = -EIO;
  4290. QETH_DBF_TEXT(SETUP, 2, "badresp");
  4291. QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
  4292. sizeof(request->resp_buf_len));
  4293. } else if (!is_valid_ether_addr(response->mac)) {
  4294. rc = -EINVAL;
  4295. QETH_DBF_TEXT(SETUP, 2, "badmac");
  4296. QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
  4297. } else {
  4298. ether_addr_copy(card->dev->dev_addr, response->mac);
  4299. }
  4300. out:
  4301. kfree(response);
  4302. kfree(request);
  4303. return rc;
  4304. }
  4305. EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
  4306. static int qeth_get_qdio_q_format(struct qeth_card *card)
  4307. {
  4308. if (card->info.type == QETH_CARD_TYPE_IQD)
  4309. return QDIO_IQDIO_QFMT;
  4310. else
  4311. return QDIO_QETH_QFMT;
  4312. }
  4313. static void qeth_determine_capabilities(struct qeth_card *card)
  4314. {
  4315. int rc;
  4316. int length;
  4317. char *prcd;
  4318. struct ccw_device *ddev;
  4319. int ddev_offline = 0;
  4320. QETH_DBF_TEXT(SETUP, 2, "detcapab");
  4321. ddev = CARD_DDEV(card);
  4322. if (!ddev->online) {
  4323. ddev_offline = 1;
  4324. rc = ccw_device_set_online(ddev);
  4325. if (rc) {
  4326. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4327. goto out;
  4328. }
  4329. }
  4330. rc = qeth_read_conf_data(card, (void **) &prcd, &length);
  4331. if (rc) {
  4332. QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
  4333. dev_name(&card->gdev->dev), rc);
  4334. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4335. goto out_offline;
  4336. }
  4337. qeth_configure_unitaddr(card, prcd);
  4338. if (ddev_offline)
  4339. qeth_configure_blkt_default(card, prcd);
  4340. kfree(prcd);
  4341. rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
  4342. if (rc)
  4343. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4344. QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
  4345. QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
  4346. QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
  4347. QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
  4348. QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
  4349. if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
  4350. ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
  4351. ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
  4352. dev_info(&card->gdev->dev,
  4353. "Completion Queueing supported\n");
  4354. } else {
  4355. card->options.cq = QETH_CQ_NOTAVAILABLE;
  4356. }
  4357. out_offline:
  4358. if (ddev_offline == 1)
  4359. ccw_device_set_offline(ddev);
  4360. out:
  4361. return;
  4362. }
  4363. static void qeth_qdio_establish_cq(struct qeth_card *card,
  4364. struct qdio_buffer **in_sbal_ptrs,
  4365. void (**queue_start_poll)
  4366. (struct ccw_device *, int,
  4367. unsigned long))
  4368. {
  4369. int i;
  4370. if (card->options.cq == QETH_CQ_ENABLED) {
  4371. int offset = QDIO_MAX_BUFFERS_PER_Q *
  4372. (card->qdio.no_in_queues - 1);
  4373. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4374. in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
  4375. virt_to_phys(card->qdio.c_q->bufs[i].buffer);
  4376. }
  4377. queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
  4378. }
  4379. }
  4380. static int qeth_qdio_establish(struct qeth_card *card)
  4381. {
  4382. struct qdio_initialize init_data;
  4383. char *qib_param_field;
  4384. struct qdio_buffer **in_sbal_ptrs;
  4385. void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
  4386. struct qdio_buffer **out_sbal_ptrs;
  4387. int i, j, k;
  4388. int rc = 0;
  4389. QETH_DBF_TEXT(SETUP, 2, "qdioest");
  4390. qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q,
  4391. GFP_KERNEL);
  4392. if (!qib_param_field) {
  4393. rc = -ENOMEM;
  4394. goto out_free_nothing;
  4395. }
  4396. qeth_create_qib_param_field(card, qib_param_field);
  4397. qeth_create_qib_param_field_blkt(card, qib_param_field);
  4398. in_sbal_ptrs = kcalloc(card->qdio.no_in_queues * QDIO_MAX_BUFFERS_PER_Q,
  4399. sizeof(void *),
  4400. GFP_KERNEL);
  4401. if (!in_sbal_ptrs) {
  4402. rc = -ENOMEM;
  4403. goto out_free_qib_param;
  4404. }
  4405. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4406. in_sbal_ptrs[i] = (struct qdio_buffer *)
  4407. virt_to_phys(card->qdio.in_q->bufs[i].buffer);
  4408. }
  4409. queue_start_poll = kcalloc(card->qdio.no_in_queues, sizeof(void *),
  4410. GFP_KERNEL);
  4411. if (!queue_start_poll) {
  4412. rc = -ENOMEM;
  4413. goto out_free_in_sbals;
  4414. }
  4415. for (i = 0; i < card->qdio.no_in_queues; ++i)
  4416. queue_start_poll[i] = qeth_qdio_start_poll;
  4417. qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
  4418. out_sbal_ptrs =
  4419. kcalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q,
  4420. sizeof(void *),
  4421. GFP_KERNEL);
  4422. if (!out_sbal_ptrs) {
  4423. rc = -ENOMEM;
  4424. goto out_free_queue_start_poll;
  4425. }
  4426. for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
  4427. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
  4428. out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
  4429. card->qdio.out_qs[i]->bufs[j]->buffer);
  4430. }
  4431. memset(&init_data, 0, sizeof(struct qdio_initialize));
  4432. init_data.cdev = CARD_DDEV(card);
  4433. init_data.q_format = qeth_get_qdio_q_format(card);
  4434. init_data.qib_param_field_format = 0;
  4435. init_data.qib_param_field = qib_param_field;
  4436. init_data.no_input_qs = card->qdio.no_in_queues;
  4437. init_data.no_output_qs = card->qdio.no_out_queues;
  4438. init_data.input_handler = qeth_qdio_input_handler;
  4439. init_data.output_handler = qeth_qdio_output_handler;
  4440. init_data.queue_start_poll_array = queue_start_poll;
  4441. init_data.int_parm = (unsigned long) card;
  4442. init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
  4443. init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
  4444. init_data.output_sbal_state_array = card->qdio.out_bufstates;
  4445. init_data.scan_threshold =
  4446. (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
  4447. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
  4448. QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
  4449. rc = qdio_allocate(&init_data);
  4450. if (rc) {
  4451. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4452. goto out;
  4453. }
  4454. rc = qdio_establish(&init_data);
  4455. if (rc) {
  4456. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4457. qdio_free(CARD_DDEV(card));
  4458. }
  4459. }
  4460. switch (card->options.cq) {
  4461. case QETH_CQ_ENABLED:
  4462. dev_info(&card->gdev->dev, "Completion Queue support enabled");
  4463. break;
  4464. case QETH_CQ_DISABLED:
  4465. dev_info(&card->gdev->dev, "Completion Queue support disabled");
  4466. break;
  4467. default:
  4468. break;
  4469. }
  4470. out:
  4471. kfree(out_sbal_ptrs);
  4472. out_free_queue_start_poll:
  4473. kfree(queue_start_poll);
  4474. out_free_in_sbals:
  4475. kfree(in_sbal_ptrs);
  4476. out_free_qib_param:
  4477. kfree(qib_param_field);
  4478. out_free_nothing:
  4479. return rc;
  4480. }
  4481. static void qeth_core_free_card(struct qeth_card *card)
  4482. {
  4483. QETH_DBF_TEXT(SETUP, 2, "freecrd");
  4484. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  4485. qeth_clean_channel(&card->read);
  4486. qeth_clean_channel(&card->write);
  4487. qeth_free_qdio_buffers(card);
  4488. unregister_service_level(&card->qeth_service_level);
  4489. kfree(card);
  4490. }
  4491. void qeth_trace_features(struct qeth_card *card)
  4492. {
  4493. QETH_CARD_TEXT(card, 2, "features");
  4494. QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
  4495. QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
  4496. QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
  4497. QETH_CARD_HEX(card, 2, &card->info.diagass_support,
  4498. sizeof(card->info.diagass_support));
  4499. }
  4500. EXPORT_SYMBOL_GPL(qeth_trace_features);
  4501. static struct ccw_device_id qeth_ids[] = {
  4502. {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
  4503. .driver_info = QETH_CARD_TYPE_OSD},
  4504. {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
  4505. .driver_info = QETH_CARD_TYPE_IQD},
  4506. {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
  4507. .driver_info = QETH_CARD_TYPE_OSN},
  4508. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
  4509. .driver_info = QETH_CARD_TYPE_OSM},
  4510. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
  4511. .driver_info = QETH_CARD_TYPE_OSX},
  4512. {},
  4513. };
  4514. MODULE_DEVICE_TABLE(ccw, qeth_ids);
  4515. static struct ccw_driver qeth_ccw_driver = {
  4516. .driver = {
  4517. .owner = THIS_MODULE,
  4518. .name = "qeth",
  4519. },
  4520. .ids = qeth_ids,
  4521. .probe = ccwgroup_probe_ccwdev,
  4522. .remove = ccwgroup_remove_ccwdev,
  4523. };
  4524. int qeth_core_hardsetup_card(struct qeth_card *card)
  4525. {
  4526. int retries = 3;
  4527. int rc;
  4528. QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
  4529. atomic_set(&card->force_alloc_skb, 0);
  4530. qeth_update_from_chp_desc(card);
  4531. retry:
  4532. if (retries < 3)
  4533. QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
  4534. dev_name(&card->gdev->dev));
  4535. rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  4536. ccw_device_set_offline(CARD_DDEV(card));
  4537. ccw_device_set_offline(CARD_WDEV(card));
  4538. ccw_device_set_offline(CARD_RDEV(card));
  4539. qdio_free(CARD_DDEV(card));
  4540. rc = ccw_device_set_online(CARD_RDEV(card));
  4541. if (rc)
  4542. goto retriable;
  4543. rc = ccw_device_set_online(CARD_WDEV(card));
  4544. if (rc)
  4545. goto retriable;
  4546. rc = ccw_device_set_online(CARD_DDEV(card));
  4547. if (rc)
  4548. goto retriable;
  4549. retriable:
  4550. if (rc == -ERESTARTSYS) {
  4551. QETH_DBF_TEXT(SETUP, 2, "break1");
  4552. return rc;
  4553. } else if (rc) {
  4554. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  4555. if (--retries < 0)
  4556. goto out;
  4557. else
  4558. goto retry;
  4559. }
  4560. qeth_determine_capabilities(card);
  4561. qeth_init_tokens(card);
  4562. qeth_init_func_level(card);
  4563. rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
  4564. if (rc == -ERESTARTSYS) {
  4565. QETH_DBF_TEXT(SETUP, 2, "break2");
  4566. return rc;
  4567. } else if (rc) {
  4568. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4569. if (--retries < 0)
  4570. goto out;
  4571. else
  4572. goto retry;
  4573. }
  4574. rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
  4575. if (rc == -ERESTARTSYS) {
  4576. QETH_DBF_TEXT(SETUP, 2, "break3");
  4577. return rc;
  4578. } else if (rc) {
  4579. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  4580. if (--retries < 0)
  4581. goto out;
  4582. else
  4583. goto retry;
  4584. }
  4585. card->read_or_write_problem = 0;
  4586. rc = qeth_mpc_initialize(card);
  4587. if (rc) {
  4588. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4589. goto out;
  4590. }
  4591. rc = qeth_send_startlan(card);
  4592. if (rc) {
  4593. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4594. if (rc == IPA_RC_LAN_OFFLINE) {
  4595. dev_warn(&card->gdev->dev,
  4596. "The LAN is offline\n");
  4597. card->lan_online = 0;
  4598. } else {
  4599. rc = -ENODEV;
  4600. goto out;
  4601. }
  4602. } else
  4603. card->lan_online = 1;
  4604. card->options.ipa4.supported_funcs = 0;
  4605. card->options.ipa6.supported_funcs = 0;
  4606. card->options.adp.supported_funcs = 0;
  4607. card->options.sbp.supported_funcs = 0;
  4608. card->info.diagass_support = 0;
  4609. rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
  4610. if (rc == -ENOMEM)
  4611. goto out;
  4612. if (qeth_is_supported(card, IPA_IPV6)) {
  4613. rc = qeth_query_ipassists(card, QETH_PROT_IPV6);
  4614. if (rc == -ENOMEM)
  4615. goto out;
  4616. }
  4617. if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
  4618. rc = qeth_query_setadapterparms(card);
  4619. if (rc < 0) {
  4620. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  4621. goto out;
  4622. }
  4623. }
  4624. if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
  4625. rc = qeth_query_setdiagass(card);
  4626. if (rc < 0) {
  4627. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  4628. goto out;
  4629. }
  4630. }
  4631. return 0;
  4632. out:
  4633. dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
  4634. "an error on the device\n");
  4635. QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
  4636. dev_name(&card->gdev->dev), rc);
  4637. return rc;
  4638. }
  4639. EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
  4640. static void qeth_create_skb_frag(struct qdio_buffer_element *element,
  4641. struct sk_buff *skb, int offset, int data_len)
  4642. {
  4643. struct page *page = virt_to_page(element->addr);
  4644. unsigned int next_frag;
  4645. /* first fill the linear space */
  4646. if (!skb->len) {
  4647. unsigned int linear = min(data_len, skb_tailroom(skb));
  4648. skb_put_data(skb, element->addr + offset, linear);
  4649. data_len -= linear;
  4650. if (!data_len)
  4651. return;
  4652. offset += linear;
  4653. /* fall through to add page frag for remaining data */
  4654. }
  4655. next_frag = skb_shinfo(skb)->nr_frags;
  4656. get_page(page);
  4657. skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len);
  4658. }
  4659. static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
  4660. {
  4661. return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
  4662. }
  4663. struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
  4664. struct qeth_qdio_buffer *qethbuffer,
  4665. struct qdio_buffer_element **__element, int *__offset,
  4666. struct qeth_hdr **hdr)
  4667. {
  4668. struct qdio_buffer_element *element = *__element;
  4669. struct qdio_buffer *buffer = qethbuffer->buffer;
  4670. int offset = *__offset;
  4671. struct sk_buff *skb;
  4672. int skb_len = 0;
  4673. void *data_ptr;
  4674. int data_len;
  4675. int headroom = 0;
  4676. int use_rx_sg = 0;
  4677. /* qeth_hdr must not cross element boundaries */
  4678. while (element->length < offset + sizeof(struct qeth_hdr)) {
  4679. if (qeth_is_last_sbale(element))
  4680. return NULL;
  4681. element++;
  4682. offset = 0;
  4683. }
  4684. *hdr = element->addr + offset;
  4685. offset += sizeof(struct qeth_hdr);
  4686. switch ((*hdr)->hdr.l2.id) {
  4687. case QETH_HEADER_TYPE_LAYER2:
  4688. skb_len = (*hdr)->hdr.l2.pkt_length;
  4689. break;
  4690. case QETH_HEADER_TYPE_LAYER3:
  4691. skb_len = (*hdr)->hdr.l3.length;
  4692. headroom = ETH_HLEN;
  4693. break;
  4694. case QETH_HEADER_TYPE_OSN:
  4695. skb_len = (*hdr)->hdr.osn.pdu_length;
  4696. headroom = sizeof(struct qeth_hdr);
  4697. break;
  4698. default:
  4699. break;
  4700. }
  4701. if (!skb_len)
  4702. return NULL;
  4703. if (((skb_len >= card->options.rx_sg_cb) &&
  4704. (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
  4705. (!atomic_read(&card->force_alloc_skb))) ||
  4706. (card->options.cq == QETH_CQ_ENABLED))
  4707. use_rx_sg = 1;
  4708. if (use_rx_sg && qethbuffer->rx_skb) {
  4709. /* QETH_CQ_ENABLED only: */
  4710. skb = qethbuffer->rx_skb;
  4711. qethbuffer->rx_skb = NULL;
  4712. } else {
  4713. unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len;
  4714. skb = napi_alloc_skb(&card->napi, linear + headroom);
  4715. }
  4716. if (!skb)
  4717. goto no_mem;
  4718. if (headroom)
  4719. skb_reserve(skb, headroom);
  4720. data_ptr = element->addr + offset;
  4721. while (skb_len) {
  4722. data_len = min(skb_len, (int)(element->length - offset));
  4723. if (data_len) {
  4724. if (use_rx_sg)
  4725. qeth_create_skb_frag(element, skb, offset,
  4726. data_len);
  4727. else
  4728. skb_put_data(skb, data_ptr, data_len);
  4729. }
  4730. skb_len -= data_len;
  4731. if (skb_len) {
  4732. if (qeth_is_last_sbale(element)) {
  4733. QETH_CARD_TEXT(card, 4, "unexeob");
  4734. QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
  4735. dev_kfree_skb_any(skb);
  4736. card->stats.rx_errors++;
  4737. return NULL;
  4738. }
  4739. element++;
  4740. offset = 0;
  4741. data_ptr = element->addr;
  4742. } else {
  4743. offset += data_len;
  4744. }
  4745. }
  4746. *__element = element;
  4747. *__offset = offset;
  4748. if (use_rx_sg && card->options.performance_stats) {
  4749. card->perf_stats.sg_skbs_rx++;
  4750. card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
  4751. }
  4752. return skb;
  4753. no_mem:
  4754. if (net_ratelimit()) {
  4755. QETH_CARD_TEXT(card, 2, "noskbmem");
  4756. }
  4757. card->stats.rx_dropped++;
  4758. return NULL;
  4759. }
  4760. EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
  4761. int qeth_poll(struct napi_struct *napi, int budget)
  4762. {
  4763. struct qeth_card *card = container_of(napi, struct qeth_card, napi);
  4764. int work_done = 0;
  4765. struct qeth_qdio_buffer *buffer;
  4766. int done;
  4767. int new_budget = budget;
  4768. if (card->options.performance_stats) {
  4769. card->perf_stats.inbound_cnt++;
  4770. card->perf_stats.inbound_start_time = qeth_get_micros();
  4771. }
  4772. while (1) {
  4773. if (!card->rx.b_count) {
  4774. card->rx.qdio_err = 0;
  4775. card->rx.b_count = qdio_get_next_buffers(
  4776. card->data.ccwdev, 0, &card->rx.b_index,
  4777. &card->rx.qdio_err);
  4778. if (card->rx.b_count <= 0) {
  4779. card->rx.b_count = 0;
  4780. break;
  4781. }
  4782. card->rx.b_element =
  4783. &card->qdio.in_q->bufs[card->rx.b_index]
  4784. .buffer->element[0];
  4785. card->rx.e_offset = 0;
  4786. }
  4787. while (card->rx.b_count) {
  4788. buffer = &card->qdio.in_q->bufs[card->rx.b_index];
  4789. if (!(card->rx.qdio_err &&
  4790. qeth_check_qdio_errors(card, buffer->buffer,
  4791. card->rx.qdio_err, "qinerr")))
  4792. work_done +=
  4793. card->discipline->process_rx_buffer(
  4794. card, new_budget, &done);
  4795. else
  4796. done = 1;
  4797. if (done) {
  4798. if (card->options.performance_stats)
  4799. card->perf_stats.bufs_rec++;
  4800. qeth_put_buffer_pool_entry(card,
  4801. buffer->pool_entry);
  4802. qeth_queue_input_buffer(card, card->rx.b_index);
  4803. card->rx.b_count--;
  4804. if (card->rx.b_count) {
  4805. card->rx.b_index =
  4806. (card->rx.b_index + 1) %
  4807. QDIO_MAX_BUFFERS_PER_Q;
  4808. card->rx.b_element =
  4809. &card->qdio.in_q
  4810. ->bufs[card->rx.b_index]
  4811. .buffer->element[0];
  4812. card->rx.e_offset = 0;
  4813. }
  4814. }
  4815. if (work_done >= budget)
  4816. goto out;
  4817. else
  4818. new_budget = budget - work_done;
  4819. }
  4820. }
  4821. napi_complete_done(napi, work_done);
  4822. if (qdio_start_irq(card->data.ccwdev, 0))
  4823. napi_schedule(&card->napi);
  4824. out:
  4825. if (card->options.performance_stats)
  4826. card->perf_stats.inbound_time += qeth_get_micros() -
  4827. card->perf_stats.inbound_start_time;
  4828. return work_done;
  4829. }
  4830. EXPORT_SYMBOL_GPL(qeth_poll);
  4831. static int qeth_setassparms_inspect_rc(struct qeth_ipa_cmd *cmd)
  4832. {
  4833. if (!cmd->hdr.return_code)
  4834. cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
  4835. return cmd->hdr.return_code;
  4836. }
  4837. int qeth_setassparms_cb(struct qeth_card *card,
  4838. struct qeth_reply *reply, unsigned long data)
  4839. {
  4840. struct qeth_ipa_cmd *cmd;
  4841. QETH_CARD_TEXT(card, 4, "defadpcb");
  4842. cmd = (struct qeth_ipa_cmd *) data;
  4843. if (cmd->hdr.return_code == 0) {
  4844. cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
  4845. if (cmd->hdr.prot_version == QETH_PROT_IPV4)
  4846. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  4847. if (cmd->hdr.prot_version == QETH_PROT_IPV6)
  4848. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  4849. }
  4850. return 0;
  4851. }
  4852. EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
  4853. struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
  4854. enum qeth_ipa_funcs ipa_func,
  4855. __u16 cmd_code, __u16 len,
  4856. enum qeth_prot_versions prot)
  4857. {
  4858. struct qeth_cmd_buffer *iob;
  4859. struct qeth_ipa_cmd *cmd;
  4860. QETH_CARD_TEXT(card, 4, "getasscm");
  4861. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
  4862. if (iob) {
  4863. cmd = __ipa_cmd(iob);
  4864. cmd->data.setassparms.hdr.assist_no = ipa_func;
  4865. cmd->data.setassparms.hdr.length = 8 + len;
  4866. cmd->data.setassparms.hdr.command_code = cmd_code;
  4867. cmd->data.setassparms.hdr.return_code = 0;
  4868. cmd->data.setassparms.hdr.seq_no = 0;
  4869. }
  4870. return iob;
  4871. }
  4872. EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
  4873. int qeth_send_setassparms(struct qeth_card *card,
  4874. struct qeth_cmd_buffer *iob, __u16 len, long data,
  4875. int (*reply_cb)(struct qeth_card *,
  4876. struct qeth_reply *, unsigned long),
  4877. void *reply_param)
  4878. {
  4879. int rc;
  4880. struct qeth_ipa_cmd *cmd;
  4881. QETH_CARD_TEXT(card, 4, "sendassp");
  4882. cmd = __ipa_cmd(iob);
  4883. if (len <= sizeof(__u32))
  4884. cmd->data.setassparms.data.flags_32bit = (__u32) data;
  4885. else /* (len > sizeof(__u32)) */
  4886. memcpy(&cmd->data.setassparms.data, (void *) data, len);
  4887. rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
  4888. return rc;
  4889. }
  4890. EXPORT_SYMBOL_GPL(qeth_send_setassparms);
  4891. int qeth_send_simple_setassparms_prot(struct qeth_card *card,
  4892. enum qeth_ipa_funcs ipa_func,
  4893. u16 cmd_code, long data,
  4894. enum qeth_prot_versions prot)
  4895. {
  4896. int rc;
  4897. int length = 0;
  4898. struct qeth_cmd_buffer *iob;
  4899. QETH_CARD_TEXT_(card, 4, "simassp%i", prot);
  4900. if (data)
  4901. length = sizeof(__u32);
  4902. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code, length, prot);
  4903. if (!iob)
  4904. return -ENOMEM;
  4905. rc = qeth_send_setassparms(card, iob, length, data,
  4906. qeth_setassparms_cb, NULL);
  4907. return rc;
  4908. }
  4909. EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms_prot);
  4910. static void qeth_unregister_dbf_views(void)
  4911. {
  4912. int x;
  4913. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4914. debug_unregister(qeth_dbf[x].id);
  4915. qeth_dbf[x].id = NULL;
  4916. }
  4917. }
  4918. void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
  4919. {
  4920. char dbf_txt_buf[32];
  4921. va_list args;
  4922. if (!debug_level_enabled(id, level))
  4923. return;
  4924. va_start(args, fmt);
  4925. vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
  4926. va_end(args);
  4927. debug_text_event(id, level, dbf_txt_buf);
  4928. }
  4929. EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
  4930. static int qeth_register_dbf_views(void)
  4931. {
  4932. int ret;
  4933. int x;
  4934. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4935. /* register the areas */
  4936. qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
  4937. qeth_dbf[x].pages,
  4938. qeth_dbf[x].areas,
  4939. qeth_dbf[x].len);
  4940. if (qeth_dbf[x].id == NULL) {
  4941. qeth_unregister_dbf_views();
  4942. return -ENOMEM;
  4943. }
  4944. /* register a view */
  4945. ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
  4946. if (ret) {
  4947. qeth_unregister_dbf_views();
  4948. return ret;
  4949. }
  4950. /* set a passing level */
  4951. debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
  4952. }
  4953. return 0;
  4954. }
  4955. int qeth_core_load_discipline(struct qeth_card *card,
  4956. enum qeth_discipline_id discipline)
  4957. {
  4958. int rc = 0;
  4959. mutex_lock(&qeth_mod_mutex);
  4960. switch (discipline) {
  4961. case QETH_DISCIPLINE_LAYER3:
  4962. card->discipline = try_then_request_module(
  4963. symbol_get(qeth_l3_discipline), "qeth_l3");
  4964. break;
  4965. case QETH_DISCIPLINE_LAYER2:
  4966. card->discipline = try_then_request_module(
  4967. symbol_get(qeth_l2_discipline), "qeth_l2");
  4968. break;
  4969. default:
  4970. break;
  4971. }
  4972. if (!card->discipline) {
  4973. dev_err(&card->gdev->dev, "There is no kernel module to "
  4974. "support discipline %d\n", discipline);
  4975. rc = -EINVAL;
  4976. }
  4977. mutex_unlock(&qeth_mod_mutex);
  4978. return rc;
  4979. }
  4980. void qeth_core_free_discipline(struct qeth_card *card)
  4981. {
  4982. if (card->options.layer2)
  4983. symbol_put(qeth_l2_discipline);
  4984. else
  4985. symbol_put(qeth_l3_discipline);
  4986. card->discipline = NULL;
  4987. }
  4988. const struct device_type qeth_generic_devtype = {
  4989. .name = "qeth_generic",
  4990. .groups = qeth_generic_attr_groups,
  4991. };
  4992. EXPORT_SYMBOL_GPL(qeth_generic_devtype);
  4993. static const struct device_type qeth_osn_devtype = {
  4994. .name = "qeth_osn",
  4995. .groups = qeth_osn_attr_groups,
  4996. };
  4997. #define DBF_NAME_LEN 20
  4998. struct qeth_dbf_entry {
  4999. char dbf_name[DBF_NAME_LEN];
  5000. debug_info_t *dbf_info;
  5001. struct list_head dbf_list;
  5002. };
  5003. static LIST_HEAD(qeth_dbf_list);
  5004. static DEFINE_MUTEX(qeth_dbf_list_mutex);
  5005. static debug_info_t *qeth_get_dbf_entry(char *name)
  5006. {
  5007. struct qeth_dbf_entry *entry;
  5008. debug_info_t *rc = NULL;
  5009. mutex_lock(&qeth_dbf_list_mutex);
  5010. list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
  5011. if (strcmp(entry->dbf_name, name) == 0) {
  5012. rc = entry->dbf_info;
  5013. break;
  5014. }
  5015. }
  5016. mutex_unlock(&qeth_dbf_list_mutex);
  5017. return rc;
  5018. }
  5019. static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
  5020. {
  5021. struct qeth_dbf_entry *new_entry;
  5022. card->debug = debug_register(name, 2, 1, 8);
  5023. if (!card->debug) {
  5024. QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
  5025. goto err;
  5026. }
  5027. if (debug_register_view(card->debug, &debug_hex_ascii_view))
  5028. goto err_dbg;
  5029. new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
  5030. if (!new_entry)
  5031. goto err_dbg;
  5032. strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
  5033. new_entry->dbf_info = card->debug;
  5034. mutex_lock(&qeth_dbf_list_mutex);
  5035. list_add(&new_entry->dbf_list, &qeth_dbf_list);
  5036. mutex_unlock(&qeth_dbf_list_mutex);
  5037. return 0;
  5038. err_dbg:
  5039. debug_unregister(card->debug);
  5040. err:
  5041. return -ENOMEM;
  5042. }
  5043. static void qeth_clear_dbf_list(void)
  5044. {
  5045. struct qeth_dbf_entry *entry, *tmp;
  5046. mutex_lock(&qeth_dbf_list_mutex);
  5047. list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
  5048. list_del(&entry->dbf_list);
  5049. debug_unregister(entry->dbf_info);
  5050. kfree(entry);
  5051. }
  5052. mutex_unlock(&qeth_dbf_list_mutex);
  5053. }
  5054. static int qeth_core_probe_device(struct ccwgroup_device *gdev)
  5055. {
  5056. struct qeth_card *card;
  5057. struct device *dev;
  5058. int rc;
  5059. enum qeth_discipline_id enforced_disc;
  5060. unsigned long flags;
  5061. char dbf_name[DBF_NAME_LEN];
  5062. QETH_DBF_TEXT(SETUP, 2, "probedev");
  5063. dev = &gdev->dev;
  5064. if (!get_device(dev))
  5065. return -ENODEV;
  5066. QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
  5067. card = qeth_alloc_card();
  5068. if (!card) {
  5069. QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
  5070. rc = -ENOMEM;
  5071. goto err_dev;
  5072. }
  5073. snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
  5074. dev_name(&gdev->dev));
  5075. card->debug = qeth_get_dbf_entry(dbf_name);
  5076. if (!card->debug) {
  5077. rc = qeth_add_dbf_entry(card, dbf_name);
  5078. if (rc)
  5079. goto err_card;
  5080. }
  5081. card->read.ccwdev = gdev->cdev[0];
  5082. card->write.ccwdev = gdev->cdev[1];
  5083. card->data.ccwdev = gdev->cdev[2];
  5084. dev_set_drvdata(&gdev->dev, card);
  5085. card->gdev = gdev;
  5086. gdev->cdev[0]->handler = qeth_irq;
  5087. gdev->cdev[1]->handler = qeth_irq;
  5088. gdev->cdev[2]->handler = qeth_irq;
  5089. qeth_determine_card_type(card);
  5090. rc = qeth_setup_card(card);
  5091. if (rc) {
  5092. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  5093. goto err_card;
  5094. }
  5095. qeth_determine_capabilities(card);
  5096. enforced_disc = qeth_enforce_discipline(card);
  5097. switch (enforced_disc) {
  5098. case QETH_DISCIPLINE_UNDETERMINED:
  5099. gdev->dev.type = &qeth_generic_devtype;
  5100. break;
  5101. default:
  5102. card->info.layer_enforced = true;
  5103. rc = qeth_core_load_discipline(card, enforced_disc);
  5104. if (rc)
  5105. goto err_card;
  5106. gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
  5107. ? card->discipline->devtype
  5108. : &qeth_osn_devtype;
  5109. rc = card->discipline->setup(card->gdev);
  5110. if (rc)
  5111. goto err_disc;
  5112. break;
  5113. }
  5114. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  5115. list_add_tail(&card->list, &qeth_core_card_list.list);
  5116. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  5117. return 0;
  5118. err_disc:
  5119. qeth_core_free_discipline(card);
  5120. err_card:
  5121. qeth_core_free_card(card);
  5122. err_dev:
  5123. put_device(dev);
  5124. return rc;
  5125. }
  5126. static void qeth_core_remove_device(struct ccwgroup_device *gdev)
  5127. {
  5128. unsigned long flags;
  5129. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5130. QETH_DBF_TEXT(SETUP, 2, "removedv");
  5131. if (card->discipline) {
  5132. card->discipline->remove(gdev);
  5133. qeth_core_free_discipline(card);
  5134. }
  5135. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  5136. list_del(&card->list);
  5137. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  5138. qeth_core_free_card(card);
  5139. dev_set_drvdata(&gdev->dev, NULL);
  5140. put_device(&gdev->dev);
  5141. return;
  5142. }
  5143. static int qeth_core_set_online(struct ccwgroup_device *gdev)
  5144. {
  5145. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5146. int rc = 0;
  5147. enum qeth_discipline_id def_discipline;
  5148. if (!card->discipline) {
  5149. if (card->info.type == QETH_CARD_TYPE_IQD)
  5150. def_discipline = QETH_DISCIPLINE_LAYER3;
  5151. else
  5152. def_discipline = QETH_DISCIPLINE_LAYER2;
  5153. rc = qeth_core_load_discipline(card, def_discipline);
  5154. if (rc)
  5155. goto err;
  5156. rc = card->discipline->setup(card->gdev);
  5157. if (rc) {
  5158. qeth_core_free_discipline(card);
  5159. goto err;
  5160. }
  5161. }
  5162. rc = card->discipline->set_online(gdev);
  5163. err:
  5164. return rc;
  5165. }
  5166. static int qeth_core_set_offline(struct ccwgroup_device *gdev)
  5167. {
  5168. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5169. return card->discipline->set_offline(gdev);
  5170. }
  5171. static void qeth_core_shutdown(struct ccwgroup_device *gdev)
  5172. {
  5173. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5174. qeth_set_allowed_threads(card, 0, 1);
  5175. if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
  5176. qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
  5177. qeth_qdio_clear_card(card, 0);
  5178. qeth_clear_qdio_buffers(card);
  5179. qdio_free(CARD_DDEV(card));
  5180. }
  5181. static int qeth_core_freeze(struct ccwgroup_device *gdev)
  5182. {
  5183. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5184. if (card->discipline && card->discipline->freeze)
  5185. return card->discipline->freeze(gdev);
  5186. return 0;
  5187. }
  5188. static int qeth_core_thaw(struct ccwgroup_device *gdev)
  5189. {
  5190. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5191. if (card->discipline && card->discipline->thaw)
  5192. return card->discipline->thaw(gdev);
  5193. return 0;
  5194. }
  5195. static int qeth_core_restore(struct ccwgroup_device *gdev)
  5196. {
  5197. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5198. if (card->discipline && card->discipline->restore)
  5199. return card->discipline->restore(gdev);
  5200. return 0;
  5201. }
  5202. static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
  5203. .driver = {
  5204. .owner = THIS_MODULE,
  5205. .name = "qeth",
  5206. },
  5207. .ccw_driver = &qeth_ccw_driver,
  5208. .setup = qeth_core_probe_device,
  5209. .remove = qeth_core_remove_device,
  5210. .set_online = qeth_core_set_online,
  5211. .set_offline = qeth_core_set_offline,
  5212. .shutdown = qeth_core_shutdown,
  5213. .prepare = NULL,
  5214. .complete = NULL,
  5215. .freeze = qeth_core_freeze,
  5216. .thaw = qeth_core_thaw,
  5217. .restore = qeth_core_restore,
  5218. };
  5219. static ssize_t group_store(struct device_driver *ddrv, const char *buf,
  5220. size_t count)
  5221. {
  5222. int err;
  5223. err = ccwgroup_create_dev(qeth_core_root_dev,
  5224. &qeth_core_ccwgroup_driver, 3, buf);
  5225. return err ? err : count;
  5226. }
  5227. static DRIVER_ATTR_WO(group);
  5228. static struct attribute *qeth_drv_attrs[] = {
  5229. &driver_attr_group.attr,
  5230. NULL,
  5231. };
  5232. static struct attribute_group qeth_drv_attr_group = {
  5233. .attrs = qeth_drv_attrs,
  5234. };
  5235. static const struct attribute_group *qeth_drv_attr_groups[] = {
  5236. &qeth_drv_attr_group,
  5237. NULL,
  5238. };
  5239. int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  5240. {
  5241. struct qeth_card *card = dev->ml_priv;
  5242. struct mii_ioctl_data *mii_data;
  5243. int rc = 0;
  5244. if (!card)
  5245. return -ENODEV;
  5246. if (!qeth_card_hw_is_reachable(card))
  5247. return -ENODEV;
  5248. if (card->info.type == QETH_CARD_TYPE_OSN)
  5249. return -EPERM;
  5250. switch (cmd) {
  5251. case SIOC_QETH_ADP_SET_SNMP_CONTROL:
  5252. rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
  5253. break;
  5254. case SIOC_QETH_GET_CARD_TYPE:
  5255. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  5256. card->info.type == QETH_CARD_TYPE_OSM ||
  5257. card->info.type == QETH_CARD_TYPE_OSX) &&
  5258. !card->info.guestlan)
  5259. return 1;
  5260. else
  5261. return 0;
  5262. case SIOCGMIIPHY:
  5263. mii_data = if_mii(rq);
  5264. mii_data->phy_id = 0;
  5265. break;
  5266. case SIOCGMIIREG:
  5267. mii_data = if_mii(rq);
  5268. if (mii_data->phy_id != 0)
  5269. rc = -EINVAL;
  5270. else
  5271. mii_data->val_out = qeth_mdio_read(dev,
  5272. mii_data->phy_id, mii_data->reg_num);
  5273. break;
  5274. case SIOC_QETH_QUERY_OAT:
  5275. rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
  5276. break;
  5277. default:
  5278. if (card->discipline->do_ioctl)
  5279. rc = card->discipline->do_ioctl(dev, rq, cmd);
  5280. else
  5281. rc = -EOPNOTSUPP;
  5282. }
  5283. if (rc)
  5284. QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
  5285. return rc;
  5286. }
  5287. EXPORT_SYMBOL_GPL(qeth_do_ioctl);
  5288. static struct {
  5289. const char str[ETH_GSTRING_LEN];
  5290. } qeth_ethtool_stats_keys[] = {
  5291. /* 0 */{"rx skbs"},
  5292. {"rx buffers"},
  5293. {"tx skbs"},
  5294. {"tx buffers"},
  5295. {"tx skbs no packing"},
  5296. {"tx buffers no packing"},
  5297. {"tx skbs packing"},
  5298. {"tx buffers packing"},
  5299. {"tx sg skbs"},
  5300. {"tx sg frags"},
  5301. /* 10 */{"rx sg skbs"},
  5302. {"rx sg frags"},
  5303. {"rx sg page allocs"},
  5304. {"tx large kbytes"},
  5305. {"tx large count"},
  5306. {"tx pk state ch n->p"},
  5307. {"tx pk state ch p->n"},
  5308. {"tx pk watermark low"},
  5309. {"tx pk watermark high"},
  5310. {"queue 0 buffer usage"},
  5311. /* 20 */{"queue 1 buffer usage"},
  5312. {"queue 2 buffer usage"},
  5313. {"queue 3 buffer usage"},
  5314. {"rx poll time"},
  5315. {"rx poll count"},
  5316. {"rx do_QDIO time"},
  5317. {"rx do_QDIO count"},
  5318. {"tx handler time"},
  5319. {"tx handler count"},
  5320. {"tx time"},
  5321. /* 30 */{"tx count"},
  5322. {"tx do_QDIO time"},
  5323. {"tx do_QDIO count"},
  5324. {"tx csum"},
  5325. {"tx lin"},
  5326. {"tx linfail"},
  5327. {"cq handler count"},
  5328. {"cq handler time"},
  5329. {"rx csum"}
  5330. };
  5331. int qeth_core_get_sset_count(struct net_device *dev, int stringset)
  5332. {
  5333. switch (stringset) {
  5334. case ETH_SS_STATS:
  5335. return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
  5336. default:
  5337. return -EINVAL;
  5338. }
  5339. }
  5340. EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
  5341. void qeth_core_get_ethtool_stats(struct net_device *dev,
  5342. struct ethtool_stats *stats, u64 *data)
  5343. {
  5344. struct qeth_card *card = dev->ml_priv;
  5345. data[0] = card->stats.rx_packets -
  5346. card->perf_stats.initial_rx_packets;
  5347. data[1] = card->perf_stats.bufs_rec;
  5348. data[2] = card->stats.tx_packets -
  5349. card->perf_stats.initial_tx_packets;
  5350. data[3] = card->perf_stats.bufs_sent;
  5351. data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
  5352. - card->perf_stats.skbs_sent_pack;
  5353. data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
  5354. data[6] = card->perf_stats.skbs_sent_pack;
  5355. data[7] = card->perf_stats.bufs_sent_pack;
  5356. data[8] = card->perf_stats.sg_skbs_sent;
  5357. data[9] = card->perf_stats.sg_frags_sent;
  5358. data[10] = card->perf_stats.sg_skbs_rx;
  5359. data[11] = card->perf_stats.sg_frags_rx;
  5360. data[12] = card->perf_stats.sg_alloc_page_rx;
  5361. data[13] = (card->perf_stats.large_send_bytes >> 10);
  5362. data[14] = card->perf_stats.large_send_cnt;
  5363. data[15] = card->perf_stats.sc_dp_p;
  5364. data[16] = card->perf_stats.sc_p_dp;
  5365. data[17] = QETH_LOW_WATERMARK_PACK;
  5366. data[18] = QETH_HIGH_WATERMARK_PACK;
  5367. data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
  5368. data[20] = (card->qdio.no_out_queues > 1) ?
  5369. atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
  5370. data[21] = (card->qdio.no_out_queues > 2) ?
  5371. atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
  5372. data[22] = (card->qdio.no_out_queues > 3) ?
  5373. atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
  5374. data[23] = card->perf_stats.inbound_time;
  5375. data[24] = card->perf_stats.inbound_cnt;
  5376. data[25] = card->perf_stats.inbound_do_qdio_time;
  5377. data[26] = card->perf_stats.inbound_do_qdio_cnt;
  5378. data[27] = card->perf_stats.outbound_handler_time;
  5379. data[28] = card->perf_stats.outbound_handler_cnt;
  5380. data[29] = card->perf_stats.outbound_time;
  5381. data[30] = card->perf_stats.outbound_cnt;
  5382. data[31] = card->perf_stats.outbound_do_qdio_time;
  5383. data[32] = card->perf_stats.outbound_do_qdio_cnt;
  5384. data[33] = card->perf_stats.tx_csum;
  5385. data[34] = card->perf_stats.tx_lin;
  5386. data[35] = card->perf_stats.tx_linfail;
  5387. data[36] = card->perf_stats.cq_cnt;
  5388. data[37] = card->perf_stats.cq_time;
  5389. data[38] = card->perf_stats.rx_csum;
  5390. }
  5391. EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
  5392. void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  5393. {
  5394. switch (stringset) {
  5395. case ETH_SS_STATS:
  5396. memcpy(data, &qeth_ethtool_stats_keys,
  5397. sizeof(qeth_ethtool_stats_keys));
  5398. break;
  5399. default:
  5400. WARN_ON(1);
  5401. break;
  5402. }
  5403. }
  5404. EXPORT_SYMBOL_GPL(qeth_core_get_strings);
  5405. void qeth_core_get_drvinfo(struct net_device *dev,
  5406. struct ethtool_drvinfo *info)
  5407. {
  5408. struct qeth_card *card = dev->ml_priv;
  5409. strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
  5410. sizeof(info->driver));
  5411. strlcpy(info->version, "1.0", sizeof(info->version));
  5412. strlcpy(info->fw_version, card->info.mcl_level,
  5413. sizeof(info->fw_version));
  5414. snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
  5415. CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
  5416. }
  5417. EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
  5418. /* Helper function to fill 'advertising' and 'supported' which are the same. */
  5419. /* Autoneg and full-duplex are supported and advertised unconditionally. */
  5420. /* Always advertise and support all speeds up to specified, and only one */
  5421. /* specified port type. */
  5422. static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
  5423. int maxspeed, int porttype)
  5424. {
  5425. ethtool_link_ksettings_zero_link_mode(cmd, supported);
  5426. ethtool_link_ksettings_zero_link_mode(cmd, advertising);
  5427. ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
  5428. ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
  5429. ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
  5430. switch (porttype) {
  5431. case PORT_TP:
  5432. ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
  5433. ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
  5434. break;
  5435. case PORT_FIBRE:
  5436. ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
  5437. ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
  5438. break;
  5439. default:
  5440. ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
  5441. ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
  5442. WARN_ON_ONCE(1);
  5443. }
  5444. /* fallthrough from high to low, to select all legal speeds: */
  5445. switch (maxspeed) {
  5446. case SPEED_10000:
  5447. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5448. 10000baseT_Full);
  5449. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5450. 10000baseT_Full);
  5451. case SPEED_1000:
  5452. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5453. 1000baseT_Full);
  5454. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5455. 1000baseT_Full);
  5456. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5457. 1000baseT_Half);
  5458. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5459. 1000baseT_Half);
  5460. case SPEED_100:
  5461. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5462. 100baseT_Full);
  5463. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5464. 100baseT_Full);
  5465. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5466. 100baseT_Half);
  5467. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5468. 100baseT_Half);
  5469. case SPEED_10:
  5470. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5471. 10baseT_Full);
  5472. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5473. 10baseT_Full);
  5474. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5475. 10baseT_Half);
  5476. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5477. 10baseT_Half);
  5478. /* end fallthrough */
  5479. break;
  5480. default:
  5481. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5482. 10baseT_Full);
  5483. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5484. 10baseT_Full);
  5485. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5486. 10baseT_Half);
  5487. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5488. 10baseT_Half);
  5489. WARN_ON_ONCE(1);
  5490. }
  5491. }
  5492. int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
  5493. struct ethtool_link_ksettings *cmd)
  5494. {
  5495. struct qeth_card *card = netdev->ml_priv;
  5496. enum qeth_link_types link_type;
  5497. struct carrier_info carrier_info;
  5498. int rc;
  5499. if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
  5500. link_type = QETH_LINK_TYPE_10GBIT_ETH;
  5501. else
  5502. link_type = card->info.link_type;
  5503. cmd->base.duplex = DUPLEX_FULL;
  5504. cmd->base.autoneg = AUTONEG_ENABLE;
  5505. cmd->base.phy_address = 0;
  5506. cmd->base.mdio_support = 0;
  5507. cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
  5508. cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
  5509. switch (link_type) {
  5510. case QETH_LINK_TYPE_FAST_ETH:
  5511. case QETH_LINK_TYPE_LANE_ETH100:
  5512. cmd->base.speed = SPEED_100;
  5513. cmd->base.port = PORT_TP;
  5514. break;
  5515. case QETH_LINK_TYPE_GBIT_ETH:
  5516. case QETH_LINK_TYPE_LANE_ETH1000:
  5517. cmd->base.speed = SPEED_1000;
  5518. cmd->base.port = PORT_FIBRE;
  5519. break;
  5520. case QETH_LINK_TYPE_10GBIT_ETH:
  5521. cmd->base.speed = SPEED_10000;
  5522. cmd->base.port = PORT_FIBRE;
  5523. break;
  5524. default:
  5525. cmd->base.speed = SPEED_10;
  5526. cmd->base.port = PORT_TP;
  5527. }
  5528. qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
  5529. /* Check if we can obtain more accurate information. */
  5530. /* If QUERY_CARD_INFO command is not supported or fails, */
  5531. /* just return the heuristics that was filled above. */
  5532. if (!qeth_card_hw_is_reachable(card))
  5533. return -ENODEV;
  5534. rc = qeth_query_card_info(card, &carrier_info);
  5535. if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
  5536. return 0;
  5537. if (rc) /* report error from the hardware operation */
  5538. return rc;
  5539. /* on success, fill in the information got from the hardware */
  5540. netdev_dbg(netdev,
  5541. "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
  5542. carrier_info.card_type,
  5543. carrier_info.port_mode,
  5544. carrier_info.port_speed);
  5545. /* Update attributes for which we've obtained more authoritative */
  5546. /* information, leave the rest the way they where filled above. */
  5547. switch (carrier_info.card_type) {
  5548. case CARD_INFO_TYPE_1G_COPPER_A:
  5549. case CARD_INFO_TYPE_1G_COPPER_B:
  5550. cmd->base.port = PORT_TP;
  5551. qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
  5552. break;
  5553. case CARD_INFO_TYPE_1G_FIBRE_A:
  5554. case CARD_INFO_TYPE_1G_FIBRE_B:
  5555. cmd->base.port = PORT_FIBRE;
  5556. qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
  5557. break;
  5558. case CARD_INFO_TYPE_10G_FIBRE_A:
  5559. case CARD_INFO_TYPE_10G_FIBRE_B:
  5560. cmd->base.port = PORT_FIBRE;
  5561. qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
  5562. break;
  5563. }
  5564. switch (carrier_info.port_mode) {
  5565. case CARD_INFO_PORTM_FULLDUPLEX:
  5566. cmd->base.duplex = DUPLEX_FULL;
  5567. break;
  5568. case CARD_INFO_PORTM_HALFDUPLEX:
  5569. cmd->base.duplex = DUPLEX_HALF;
  5570. break;
  5571. }
  5572. switch (carrier_info.port_speed) {
  5573. case CARD_INFO_PORTS_10M:
  5574. cmd->base.speed = SPEED_10;
  5575. break;
  5576. case CARD_INFO_PORTS_100M:
  5577. cmd->base.speed = SPEED_100;
  5578. break;
  5579. case CARD_INFO_PORTS_1G:
  5580. cmd->base.speed = SPEED_1000;
  5581. break;
  5582. case CARD_INFO_PORTS_10G:
  5583. cmd->base.speed = SPEED_10000;
  5584. break;
  5585. }
  5586. return 0;
  5587. }
  5588. EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
  5589. /* Callback to handle checksum offload command reply from OSA card.
  5590. * Verify that required features have been enabled on the card.
  5591. * Return error in hdr->return_code as this value is checked by caller.
  5592. *
  5593. * Always returns zero to indicate no further messages from the OSA card.
  5594. */
  5595. static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
  5596. struct qeth_reply *reply,
  5597. unsigned long data)
  5598. {
  5599. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  5600. struct qeth_checksum_cmd *chksum_cb =
  5601. (struct qeth_checksum_cmd *)reply->param;
  5602. QETH_CARD_TEXT(card, 4, "chkdoccb");
  5603. if (qeth_setassparms_inspect_rc(cmd))
  5604. return 0;
  5605. memset(chksum_cb, 0, sizeof(*chksum_cb));
  5606. if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
  5607. chksum_cb->supported =
  5608. cmd->data.setassparms.data.chksum.supported;
  5609. QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
  5610. }
  5611. if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
  5612. chksum_cb->supported =
  5613. cmd->data.setassparms.data.chksum.supported;
  5614. chksum_cb->enabled =
  5615. cmd->data.setassparms.data.chksum.enabled;
  5616. QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
  5617. QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
  5618. }
  5619. return 0;
  5620. }
  5621. /* Send command to OSA card and check results. */
  5622. static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
  5623. enum qeth_ipa_funcs ipa_func,
  5624. __u16 cmd_code, long data,
  5625. struct qeth_checksum_cmd *chksum_cb,
  5626. enum qeth_prot_versions prot)
  5627. {
  5628. struct qeth_cmd_buffer *iob;
  5629. int rc = -ENOMEM;
  5630. QETH_CARD_TEXT(card, 4, "chkdocmd");
  5631. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
  5632. sizeof(__u32), prot);
  5633. if (iob)
  5634. rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
  5635. qeth_ipa_checksum_run_cmd_cb,
  5636. chksum_cb);
  5637. return rc;
  5638. }
  5639. static int qeth_send_checksum_on(struct qeth_card *card, int cstype,
  5640. enum qeth_prot_versions prot)
  5641. {
  5642. u32 required_features = QETH_IPA_CHECKSUM_UDP | QETH_IPA_CHECKSUM_TCP;
  5643. struct qeth_checksum_cmd chksum_cb;
  5644. int rc;
  5645. if (prot == QETH_PROT_IPV4)
  5646. required_features |= QETH_IPA_CHECKSUM_IP_HDR;
  5647. rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
  5648. &chksum_cb, prot);
  5649. if (!rc) {
  5650. if ((required_features & chksum_cb.supported) !=
  5651. required_features)
  5652. rc = -EIO;
  5653. else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
  5654. cstype == IPA_INBOUND_CHECKSUM)
  5655. dev_warn(&card->gdev->dev,
  5656. "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
  5657. QETH_CARD_IFNAME(card));
  5658. }
  5659. if (rc) {
  5660. qeth_send_simple_setassparms_prot(card, cstype,
  5661. IPA_CMD_ASS_STOP, 0, prot);
  5662. dev_warn(&card->gdev->dev,
  5663. "Starting HW IPv%d checksumming for %s failed, using SW checksumming\n",
  5664. prot, QETH_CARD_IFNAME(card));
  5665. return rc;
  5666. }
  5667. rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
  5668. chksum_cb.supported, &chksum_cb,
  5669. prot);
  5670. if (!rc) {
  5671. if ((required_features & chksum_cb.enabled) !=
  5672. required_features)
  5673. rc = -EIO;
  5674. }
  5675. if (rc) {
  5676. qeth_send_simple_setassparms_prot(card, cstype,
  5677. IPA_CMD_ASS_STOP, 0, prot);
  5678. dev_warn(&card->gdev->dev,
  5679. "Enabling HW IPv%d checksumming for %s failed, using SW checksumming\n",
  5680. prot, QETH_CARD_IFNAME(card));
  5681. return rc;
  5682. }
  5683. dev_info(&card->gdev->dev, "HW Checksumming (%sbound IPv%d) enabled\n",
  5684. cstype == IPA_INBOUND_CHECKSUM ? "in" : "out", prot);
  5685. return 0;
  5686. }
  5687. static int qeth_set_ipa_csum(struct qeth_card *card, bool on, int cstype,
  5688. enum qeth_prot_versions prot)
  5689. {
  5690. int rc = (on) ? qeth_send_checksum_on(card, cstype, prot)
  5691. : qeth_send_simple_setassparms_prot(card, cstype,
  5692. IPA_CMD_ASS_STOP, 0,
  5693. prot);
  5694. return rc ? -EIO : 0;
  5695. }
  5696. static int qeth_set_ipa_tso(struct qeth_card *card, int on)
  5697. {
  5698. int rc;
  5699. QETH_CARD_TEXT(card, 3, "sttso");
  5700. if (on) {
  5701. rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
  5702. IPA_CMD_ASS_START, 0);
  5703. if (rc) {
  5704. dev_warn(&card->gdev->dev,
  5705. "Starting outbound TCP segmentation offload for %s failed\n",
  5706. QETH_CARD_IFNAME(card));
  5707. return -EIO;
  5708. }
  5709. dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
  5710. } else {
  5711. rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
  5712. IPA_CMD_ASS_STOP, 0);
  5713. }
  5714. return rc;
  5715. }
  5716. static int qeth_set_ipa_rx_csum(struct qeth_card *card, bool on)
  5717. {
  5718. int rc_ipv4 = (on) ? -EOPNOTSUPP : 0;
  5719. int rc_ipv6;
  5720. if (qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
  5721. rc_ipv4 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
  5722. QETH_PROT_IPV4);
  5723. if (!qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
  5724. /* no/one Offload Assist available, so the rc is trivial */
  5725. return rc_ipv4;
  5726. rc_ipv6 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
  5727. QETH_PROT_IPV6);
  5728. if (on)
  5729. /* enable: success if any Assist is active */
  5730. return (rc_ipv6) ? rc_ipv4 : 0;
  5731. /* disable: failure if any Assist is still active */
  5732. return (rc_ipv6) ? rc_ipv6 : rc_ipv4;
  5733. }
  5734. #define QETH_HW_FEATURES (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_TSO | \
  5735. NETIF_F_IPV6_CSUM)
  5736. /**
  5737. * qeth_enable_hw_features() - (Re-)Enable HW functions for device features
  5738. * @dev: a net_device
  5739. */
  5740. void qeth_enable_hw_features(struct net_device *dev)
  5741. {
  5742. struct qeth_card *card = dev->ml_priv;
  5743. netdev_features_t features;
  5744. rtnl_lock();
  5745. features = dev->features;
  5746. /* force-off any feature that needs an IPA sequence.
  5747. * netdev_update_features() will restart them.
  5748. */
  5749. dev->features &= ~QETH_HW_FEATURES;
  5750. netdev_update_features(dev);
  5751. if (features != dev->features)
  5752. dev_warn(&card->gdev->dev,
  5753. "Device recovery failed to restore all offload features\n");
  5754. rtnl_unlock();
  5755. }
  5756. EXPORT_SYMBOL_GPL(qeth_enable_hw_features);
  5757. int qeth_set_features(struct net_device *dev, netdev_features_t features)
  5758. {
  5759. struct qeth_card *card = dev->ml_priv;
  5760. netdev_features_t changed = dev->features ^ features;
  5761. int rc = 0;
  5762. QETH_DBF_TEXT(SETUP, 2, "setfeat");
  5763. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5764. if ((changed & NETIF_F_IP_CSUM)) {
  5765. rc = qeth_set_ipa_csum(card, features & NETIF_F_IP_CSUM,
  5766. IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV4);
  5767. if (rc)
  5768. changed ^= NETIF_F_IP_CSUM;
  5769. }
  5770. if (changed & NETIF_F_IPV6_CSUM) {
  5771. rc = qeth_set_ipa_csum(card, features & NETIF_F_IPV6_CSUM,
  5772. IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV6);
  5773. if (rc)
  5774. changed ^= NETIF_F_IPV6_CSUM;
  5775. }
  5776. if (changed & NETIF_F_RXCSUM) {
  5777. rc = qeth_set_ipa_rx_csum(card, features & NETIF_F_RXCSUM);
  5778. if (rc)
  5779. changed ^= NETIF_F_RXCSUM;
  5780. }
  5781. if ((changed & NETIF_F_TSO)) {
  5782. rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
  5783. if (rc)
  5784. changed ^= NETIF_F_TSO;
  5785. }
  5786. /* everything changed successfully? */
  5787. if ((dev->features ^ features) == changed)
  5788. return 0;
  5789. /* something went wrong. save changed features and return error */
  5790. dev->features ^= changed;
  5791. return -EIO;
  5792. }
  5793. EXPORT_SYMBOL_GPL(qeth_set_features);
  5794. netdev_features_t qeth_fix_features(struct net_device *dev,
  5795. netdev_features_t features)
  5796. {
  5797. struct qeth_card *card = dev->ml_priv;
  5798. QETH_DBF_TEXT(SETUP, 2, "fixfeat");
  5799. if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
  5800. features &= ~NETIF_F_IP_CSUM;
  5801. if (!qeth_is_supported6(card, IPA_OUTBOUND_CHECKSUM_V6))
  5802. features &= ~NETIF_F_IPV6_CSUM;
  5803. if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM) &&
  5804. !qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
  5805. features &= ~NETIF_F_RXCSUM;
  5806. if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
  5807. features &= ~NETIF_F_TSO;
  5808. /* if the card isn't up, remove features that require hw changes */
  5809. if (card->state == CARD_STATE_DOWN ||
  5810. card->state == CARD_STATE_RECOVER)
  5811. features &= ~QETH_HW_FEATURES;
  5812. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5813. return features;
  5814. }
  5815. EXPORT_SYMBOL_GPL(qeth_fix_features);
  5816. netdev_features_t qeth_features_check(struct sk_buff *skb,
  5817. struct net_device *dev,
  5818. netdev_features_t features)
  5819. {
  5820. /* GSO segmentation builds skbs with
  5821. * a (small) linear part for the headers, and
  5822. * page frags for the data.
  5823. * Compared to a linear skb, the header-only part consumes an
  5824. * additional buffer element. This reduces buffer utilization, and
  5825. * hurts throughput. So compress small segments into one element.
  5826. */
  5827. if (netif_needs_gso(skb, features)) {
  5828. /* match skb_segment(): */
  5829. unsigned int doffset = skb->data - skb_mac_header(skb);
  5830. unsigned int hsize = skb_shinfo(skb)->gso_size;
  5831. unsigned int hroom = skb_headroom(skb);
  5832. /* linearize only if resulting skb allocations are order-0: */
  5833. if (SKB_DATA_ALIGN(hroom + doffset + hsize) <= SKB_MAX_HEAD(0))
  5834. features &= ~NETIF_F_SG;
  5835. }
  5836. return vlan_features_check(skb, features);
  5837. }
  5838. EXPORT_SYMBOL_GPL(qeth_features_check);
  5839. static int __init qeth_core_init(void)
  5840. {
  5841. int rc;
  5842. pr_info("loading core functions\n");
  5843. INIT_LIST_HEAD(&qeth_core_card_list.list);
  5844. INIT_LIST_HEAD(&qeth_dbf_list);
  5845. rwlock_init(&qeth_core_card_list.rwlock);
  5846. mutex_init(&qeth_mod_mutex);
  5847. qeth_wq = create_singlethread_workqueue("qeth_wq");
  5848. if (!qeth_wq) {
  5849. rc = -ENOMEM;
  5850. goto out_err;
  5851. }
  5852. rc = qeth_register_dbf_views();
  5853. if (rc)
  5854. goto dbf_err;
  5855. qeth_core_root_dev = root_device_register("qeth");
  5856. rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
  5857. if (rc)
  5858. goto register_err;
  5859. qeth_core_header_cache = kmem_cache_create("qeth_hdr",
  5860. sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
  5861. if (!qeth_core_header_cache) {
  5862. rc = -ENOMEM;
  5863. goto slab_err;
  5864. }
  5865. qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
  5866. sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
  5867. if (!qeth_qdio_outbuf_cache) {
  5868. rc = -ENOMEM;
  5869. goto cqslab_err;
  5870. }
  5871. rc = ccw_driver_register(&qeth_ccw_driver);
  5872. if (rc)
  5873. goto ccw_err;
  5874. qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
  5875. rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
  5876. if (rc)
  5877. goto ccwgroup_err;
  5878. return 0;
  5879. ccwgroup_err:
  5880. ccw_driver_unregister(&qeth_ccw_driver);
  5881. ccw_err:
  5882. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5883. cqslab_err:
  5884. kmem_cache_destroy(qeth_core_header_cache);
  5885. slab_err:
  5886. root_device_unregister(qeth_core_root_dev);
  5887. register_err:
  5888. qeth_unregister_dbf_views();
  5889. dbf_err:
  5890. destroy_workqueue(qeth_wq);
  5891. out_err:
  5892. pr_err("Initializing the qeth device driver failed\n");
  5893. return rc;
  5894. }
  5895. static void __exit qeth_core_exit(void)
  5896. {
  5897. qeth_clear_dbf_list();
  5898. destroy_workqueue(qeth_wq);
  5899. ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
  5900. ccw_driver_unregister(&qeth_ccw_driver);
  5901. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5902. kmem_cache_destroy(qeth_core_header_cache);
  5903. root_device_unregister(qeth_core_root_dev);
  5904. qeth_unregister_dbf_views();
  5905. pr_info("core functions removed\n");
  5906. }
  5907. module_init(qeth_core_init);
  5908. module_exit(qeth_core_exit);
  5909. MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
  5910. MODULE_DESCRIPTION("qeth core functions");
  5911. MODULE_LICENSE("GPL");