virtgpu_display.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377
  1. /*
  2. * Copyright (C) 2015 Red Hat, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Authors:
  6. * Dave Airlie
  7. * Alon Levy
  8. *
  9. * Permission is hereby granted, free of charge, to any person obtaining a
  10. * copy of this software and associated documentation files (the "Software"),
  11. * to deal in the Software without restriction, including without limitation
  12. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13. * and/or sell copies of the Software, and to permit persons to whom the
  14. * Software is furnished to do so, subject to the following conditions:
  15. *
  16. * The above copyright notice and this permission notice shall be included in
  17. * all copies or substantial portions of the Software.
  18. *
  19. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  25. * OTHER DEALINGS IN THE SOFTWARE.
  26. */
  27. #include "virtgpu_drv.h"
  28. #include <drm/drm_crtc_helper.h>
  29. #include <drm/drm_atomic_helper.h>
  30. #include <drm/drm_gem_framebuffer_helper.h>
  31. #define XRES_MIN 32
  32. #define YRES_MIN 32
  33. #define XRES_DEF 1024
  34. #define YRES_DEF 768
  35. #define XRES_MAX 8192
  36. #define YRES_MAX 8192
  37. static const struct drm_crtc_funcs virtio_gpu_crtc_funcs = {
  38. .set_config = drm_atomic_helper_set_config,
  39. .destroy = drm_crtc_cleanup,
  40. .page_flip = drm_atomic_helper_page_flip,
  41. .reset = drm_atomic_helper_crtc_reset,
  42. .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
  43. .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
  44. };
  45. static int
  46. virtio_gpu_framebuffer_surface_dirty(struct drm_framebuffer *fb,
  47. struct drm_file *file_priv,
  48. unsigned int flags, unsigned int color,
  49. struct drm_clip_rect *clips,
  50. unsigned int num_clips)
  51. {
  52. struct virtio_gpu_framebuffer *virtio_gpu_fb
  53. = to_virtio_gpu_framebuffer(fb);
  54. return virtio_gpu_surface_dirty(virtio_gpu_fb, clips, num_clips);
  55. }
  56. static const struct drm_framebuffer_funcs virtio_gpu_fb_funcs = {
  57. .create_handle = drm_gem_fb_create_handle,
  58. .destroy = drm_gem_fb_destroy,
  59. .dirty = virtio_gpu_framebuffer_surface_dirty,
  60. };
  61. int
  62. virtio_gpu_framebuffer_init(struct drm_device *dev,
  63. struct virtio_gpu_framebuffer *vgfb,
  64. const struct drm_mode_fb_cmd2 *mode_cmd,
  65. struct drm_gem_object *obj)
  66. {
  67. int ret;
  68. struct virtio_gpu_object *bo;
  69. vgfb->base.obj[0] = obj;
  70. bo = gem_to_virtio_gpu_obj(obj);
  71. drm_helper_mode_fill_fb_struct(dev, &vgfb->base, mode_cmd);
  72. ret = drm_framebuffer_init(dev, &vgfb->base, &virtio_gpu_fb_funcs);
  73. if (ret) {
  74. vgfb->base.obj[0] = NULL;
  75. return ret;
  76. }
  77. spin_lock_init(&vgfb->dirty_lock);
  78. vgfb->x1 = vgfb->y1 = INT_MAX;
  79. vgfb->x2 = vgfb->y2 = 0;
  80. return 0;
  81. }
  82. static void virtio_gpu_crtc_mode_set_nofb(struct drm_crtc *crtc)
  83. {
  84. struct drm_device *dev = crtc->dev;
  85. struct virtio_gpu_device *vgdev = dev->dev_private;
  86. struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
  87. virtio_gpu_cmd_set_scanout(vgdev, output->index, 0,
  88. crtc->mode.hdisplay,
  89. crtc->mode.vdisplay, 0, 0);
  90. }
  91. static void virtio_gpu_crtc_atomic_enable(struct drm_crtc *crtc,
  92. struct drm_crtc_state *old_state)
  93. {
  94. }
  95. static void virtio_gpu_crtc_atomic_disable(struct drm_crtc *crtc,
  96. struct drm_crtc_state *old_state)
  97. {
  98. struct drm_device *dev = crtc->dev;
  99. struct virtio_gpu_device *vgdev = dev->dev_private;
  100. struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
  101. virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, 0, 0, 0, 0);
  102. }
  103. static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc,
  104. struct drm_crtc_state *state)
  105. {
  106. return 0;
  107. }
  108. static void virtio_gpu_crtc_atomic_flush(struct drm_crtc *crtc,
  109. struct drm_crtc_state *old_state)
  110. {
  111. unsigned long flags;
  112. spin_lock_irqsave(&crtc->dev->event_lock, flags);
  113. if (crtc->state->event)
  114. drm_crtc_send_vblank_event(crtc, crtc->state->event);
  115. crtc->state->event = NULL;
  116. spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
  117. }
  118. static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = {
  119. .mode_set_nofb = virtio_gpu_crtc_mode_set_nofb,
  120. .atomic_check = virtio_gpu_crtc_atomic_check,
  121. .atomic_flush = virtio_gpu_crtc_atomic_flush,
  122. .atomic_enable = virtio_gpu_crtc_atomic_enable,
  123. .atomic_disable = virtio_gpu_crtc_atomic_disable,
  124. };
  125. static void virtio_gpu_enc_mode_set(struct drm_encoder *encoder,
  126. struct drm_display_mode *mode,
  127. struct drm_display_mode *adjusted_mode)
  128. {
  129. }
  130. static void virtio_gpu_enc_enable(struct drm_encoder *encoder)
  131. {
  132. }
  133. static void virtio_gpu_enc_disable(struct drm_encoder *encoder)
  134. {
  135. }
  136. static int virtio_gpu_conn_get_modes(struct drm_connector *connector)
  137. {
  138. struct virtio_gpu_output *output =
  139. drm_connector_to_virtio_gpu_output(connector);
  140. struct drm_display_mode *mode = NULL;
  141. int count, width, height;
  142. width = le32_to_cpu(output->info.r.width);
  143. height = le32_to_cpu(output->info.r.height);
  144. count = drm_add_modes_noedid(connector, XRES_MAX, YRES_MAX);
  145. if (width == 0 || height == 0) {
  146. width = XRES_DEF;
  147. height = YRES_DEF;
  148. drm_set_preferred_mode(connector, XRES_DEF, YRES_DEF);
  149. } else {
  150. DRM_DEBUG("add mode: %dx%d\n", width, height);
  151. mode = drm_cvt_mode(connector->dev, width, height, 60,
  152. false, false, false);
  153. mode->type |= DRM_MODE_TYPE_PREFERRED;
  154. drm_mode_probed_add(connector, mode);
  155. count++;
  156. }
  157. return count;
  158. }
  159. static enum drm_mode_status virtio_gpu_conn_mode_valid(struct drm_connector *connector,
  160. struct drm_display_mode *mode)
  161. {
  162. struct virtio_gpu_output *output =
  163. drm_connector_to_virtio_gpu_output(connector);
  164. int width, height;
  165. width = le32_to_cpu(output->info.r.width);
  166. height = le32_to_cpu(output->info.r.height);
  167. if (!(mode->type & DRM_MODE_TYPE_PREFERRED))
  168. return MODE_OK;
  169. if (mode->hdisplay == XRES_DEF && mode->vdisplay == YRES_DEF)
  170. return MODE_OK;
  171. if (mode->hdisplay <= width && mode->hdisplay >= width - 16 &&
  172. mode->vdisplay <= height && mode->vdisplay >= height - 16)
  173. return MODE_OK;
  174. DRM_DEBUG("del mode: %dx%d\n", mode->hdisplay, mode->vdisplay);
  175. return MODE_BAD;
  176. }
  177. static const struct drm_encoder_helper_funcs virtio_gpu_enc_helper_funcs = {
  178. .mode_set = virtio_gpu_enc_mode_set,
  179. .enable = virtio_gpu_enc_enable,
  180. .disable = virtio_gpu_enc_disable,
  181. };
  182. static const struct drm_connector_helper_funcs virtio_gpu_conn_helper_funcs = {
  183. .get_modes = virtio_gpu_conn_get_modes,
  184. .mode_valid = virtio_gpu_conn_mode_valid,
  185. };
  186. static enum drm_connector_status virtio_gpu_conn_detect(
  187. struct drm_connector *connector,
  188. bool force)
  189. {
  190. struct virtio_gpu_output *output =
  191. drm_connector_to_virtio_gpu_output(connector);
  192. if (output->info.enabled)
  193. return connector_status_connected;
  194. else
  195. return connector_status_disconnected;
  196. }
  197. static void virtio_gpu_conn_destroy(struct drm_connector *connector)
  198. {
  199. struct virtio_gpu_output *virtio_gpu_output =
  200. drm_connector_to_virtio_gpu_output(connector);
  201. drm_connector_unregister(connector);
  202. drm_connector_cleanup(connector);
  203. kfree(virtio_gpu_output);
  204. }
  205. static const struct drm_connector_funcs virtio_gpu_connector_funcs = {
  206. .detect = virtio_gpu_conn_detect,
  207. .fill_modes = drm_helper_probe_single_connector_modes,
  208. .destroy = virtio_gpu_conn_destroy,
  209. .reset = drm_atomic_helper_connector_reset,
  210. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  211. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  212. };
  213. static const struct drm_encoder_funcs virtio_gpu_enc_funcs = {
  214. .destroy = drm_encoder_cleanup,
  215. };
  216. static int vgdev_output_init(struct virtio_gpu_device *vgdev, int index)
  217. {
  218. struct drm_device *dev = vgdev->ddev;
  219. struct virtio_gpu_output *output = vgdev->outputs + index;
  220. struct drm_connector *connector = &output->conn;
  221. struct drm_encoder *encoder = &output->enc;
  222. struct drm_crtc *crtc = &output->crtc;
  223. struct drm_plane *primary, *cursor;
  224. output->index = index;
  225. if (index == 0) {
  226. output->info.enabled = cpu_to_le32(true);
  227. output->info.r.width = cpu_to_le32(XRES_DEF);
  228. output->info.r.height = cpu_to_le32(YRES_DEF);
  229. }
  230. primary = virtio_gpu_plane_init(vgdev, DRM_PLANE_TYPE_PRIMARY, index);
  231. if (IS_ERR(primary))
  232. return PTR_ERR(primary);
  233. cursor = virtio_gpu_plane_init(vgdev, DRM_PLANE_TYPE_CURSOR, index);
  234. if (IS_ERR(cursor))
  235. return PTR_ERR(cursor);
  236. drm_crtc_init_with_planes(dev, crtc, primary, cursor,
  237. &virtio_gpu_crtc_funcs, NULL);
  238. drm_crtc_helper_add(crtc, &virtio_gpu_crtc_helper_funcs);
  239. drm_connector_init(dev, connector, &virtio_gpu_connector_funcs,
  240. DRM_MODE_CONNECTOR_VIRTUAL);
  241. drm_connector_helper_add(connector, &virtio_gpu_conn_helper_funcs);
  242. drm_encoder_init(dev, encoder, &virtio_gpu_enc_funcs,
  243. DRM_MODE_ENCODER_VIRTUAL, NULL);
  244. drm_encoder_helper_add(encoder, &virtio_gpu_enc_helper_funcs);
  245. encoder->possible_crtcs = 1 << index;
  246. drm_mode_connector_attach_encoder(connector, encoder);
  247. drm_connector_register(connector);
  248. return 0;
  249. }
  250. static struct drm_framebuffer *
  251. virtio_gpu_user_framebuffer_create(struct drm_device *dev,
  252. struct drm_file *file_priv,
  253. const struct drm_mode_fb_cmd2 *mode_cmd)
  254. {
  255. struct drm_gem_object *obj = NULL;
  256. struct virtio_gpu_framebuffer *virtio_gpu_fb;
  257. int ret;
  258. /* lookup object associated with res handle */
  259. obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]);
  260. if (!obj)
  261. return ERR_PTR(-EINVAL);
  262. virtio_gpu_fb = kzalloc(sizeof(*virtio_gpu_fb), GFP_KERNEL);
  263. if (virtio_gpu_fb == NULL)
  264. return ERR_PTR(-ENOMEM);
  265. ret = virtio_gpu_framebuffer_init(dev, virtio_gpu_fb, mode_cmd, obj);
  266. if (ret) {
  267. kfree(virtio_gpu_fb);
  268. drm_gem_object_put_unlocked(obj);
  269. return NULL;
  270. }
  271. return &virtio_gpu_fb->base;
  272. }
  273. static void vgdev_atomic_commit_tail(struct drm_atomic_state *state)
  274. {
  275. struct drm_device *dev = state->dev;
  276. drm_atomic_helper_commit_modeset_disables(dev, state);
  277. drm_atomic_helper_commit_modeset_enables(dev, state);
  278. drm_atomic_helper_commit_planes(dev, state, 0);
  279. drm_atomic_helper_commit_hw_done(state);
  280. drm_atomic_helper_wait_for_vblanks(dev, state);
  281. drm_atomic_helper_cleanup_planes(dev, state);
  282. }
  283. static const struct drm_mode_config_helper_funcs virtio_mode_config_helpers = {
  284. .atomic_commit_tail = vgdev_atomic_commit_tail,
  285. };
  286. static const struct drm_mode_config_funcs virtio_gpu_mode_funcs = {
  287. .fb_create = virtio_gpu_user_framebuffer_create,
  288. .atomic_check = drm_atomic_helper_check,
  289. .atomic_commit = drm_atomic_helper_commit,
  290. };
  291. int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev)
  292. {
  293. int i;
  294. drm_mode_config_init(vgdev->ddev);
  295. vgdev->ddev->mode_config.funcs = &virtio_gpu_mode_funcs;
  296. vgdev->ddev->mode_config.helper_private = &virtio_mode_config_helpers;
  297. /* modes will be validated against the framebuffer size */
  298. vgdev->ddev->mode_config.min_width = XRES_MIN;
  299. vgdev->ddev->mode_config.min_height = YRES_MIN;
  300. vgdev->ddev->mode_config.max_width = XRES_MAX;
  301. vgdev->ddev->mode_config.max_height = YRES_MAX;
  302. for (i = 0 ; i < vgdev->num_scanouts; ++i)
  303. vgdev_output_init(vgdev, i);
  304. drm_mode_config_reset(vgdev->ddev);
  305. return 0;
  306. }
  307. void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev)
  308. {
  309. virtio_gpu_fbdev_fini(vgdev);
  310. drm_mode_config_cleanup(vgdev->ddev);
  311. }