intel_atomic.c 12 KB

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  1. /*
  2. * Copyright © 2015 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. */
  23. /**
  24. * DOC: atomic modeset support
  25. *
  26. * The functions here implement the state management and hardware programming
  27. * dispatch required by the atomic modeset infrastructure.
  28. * See intel_atomic_plane.c for the plane-specific atomic functionality.
  29. */
  30. #include <drm/drmP.h>
  31. #include <drm/drm_atomic.h>
  32. #include <drm/drm_atomic_helper.h>
  33. #include <drm/drm_plane_helper.h>
  34. #include "intel_drv.h"
  35. /**
  36. * intel_digital_connector_atomic_get_property - hook for connector->atomic_get_property.
  37. * @connector: Connector to get the property for.
  38. * @state: Connector state to retrieve the property from.
  39. * @property: Property to retrieve.
  40. * @val: Return value for the property.
  41. *
  42. * Returns the atomic property value for a digital connector.
  43. */
  44. int intel_digital_connector_atomic_get_property(struct drm_connector *connector,
  45. const struct drm_connector_state *state,
  46. struct drm_property *property,
  47. uint64_t *val)
  48. {
  49. struct drm_device *dev = connector->dev;
  50. struct drm_i915_private *dev_priv = to_i915(dev);
  51. struct intel_digital_connector_state *intel_conn_state =
  52. to_intel_digital_connector_state(state);
  53. if (property == dev_priv->force_audio_property)
  54. *val = intel_conn_state->force_audio;
  55. else if (property == dev_priv->broadcast_rgb_property)
  56. *val = intel_conn_state->broadcast_rgb;
  57. else {
  58. DRM_DEBUG_ATOMIC("Unknown property %s\n", property->name);
  59. return -EINVAL;
  60. }
  61. return 0;
  62. }
  63. /**
  64. * intel_digital_connector_atomic_set_property - hook for connector->atomic_set_property.
  65. * @connector: Connector to set the property for.
  66. * @state: Connector state to set the property on.
  67. * @property: Property to set.
  68. * @val: New value for the property.
  69. *
  70. * Sets the atomic property value for a digital connector.
  71. */
  72. int intel_digital_connector_atomic_set_property(struct drm_connector *connector,
  73. struct drm_connector_state *state,
  74. struct drm_property *property,
  75. uint64_t val)
  76. {
  77. struct drm_device *dev = connector->dev;
  78. struct drm_i915_private *dev_priv = to_i915(dev);
  79. struct intel_digital_connector_state *intel_conn_state =
  80. to_intel_digital_connector_state(state);
  81. if (property == dev_priv->force_audio_property) {
  82. intel_conn_state->force_audio = val;
  83. return 0;
  84. }
  85. if (property == dev_priv->broadcast_rgb_property) {
  86. intel_conn_state->broadcast_rgb = val;
  87. return 0;
  88. }
  89. DRM_DEBUG_ATOMIC("Unknown property %s\n", property->name);
  90. return -EINVAL;
  91. }
  92. int intel_digital_connector_atomic_check(struct drm_connector *conn,
  93. struct drm_connector_state *new_state)
  94. {
  95. struct intel_digital_connector_state *new_conn_state =
  96. to_intel_digital_connector_state(new_state);
  97. struct drm_connector_state *old_state =
  98. drm_atomic_get_old_connector_state(new_state->state, conn);
  99. struct intel_digital_connector_state *old_conn_state =
  100. to_intel_digital_connector_state(old_state);
  101. struct drm_crtc_state *crtc_state;
  102. intel_hdcp_atomic_check(conn, old_state, new_state);
  103. if (!new_state->crtc)
  104. return 0;
  105. crtc_state = drm_atomic_get_new_crtc_state(new_state->state, new_state->crtc);
  106. /*
  107. * These properties are handled by fastset, and might not end
  108. * up in a modeset.
  109. */
  110. if (new_conn_state->force_audio != old_conn_state->force_audio ||
  111. new_conn_state->broadcast_rgb != old_conn_state->broadcast_rgb ||
  112. new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio ||
  113. new_conn_state->base.content_type != old_conn_state->base.content_type ||
  114. new_conn_state->base.scaling_mode != old_conn_state->base.scaling_mode)
  115. crtc_state->mode_changed = true;
  116. return 0;
  117. }
  118. /**
  119. * intel_digital_connector_duplicate_state - duplicate connector state
  120. * @connector: digital connector
  121. *
  122. * Allocates and returns a copy of the connector state (both common and
  123. * digital connector specific) for the specified connector.
  124. *
  125. * Returns: The newly allocated connector state, or NULL on failure.
  126. */
  127. struct drm_connector_state *
  128. intel_digital_connector_duplicate_state(struct drm_connector *connector)
  129. {
  130. struct intel_digital_connector_state *state;
  131. state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
  132. if (!state)
  133. return NULL;
  134. __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
  135. return &state->base;
  136. }
  137. /**
  138. * intel_crtc_duplicate_state - duplicate crtc state
  139. * @crtc: drm crtc
  140. *
  141. * Allocates and returns a copy of the crtc state (both common and
  142. * Intel-specific) for the specified crtc.
  143. *
  144. * Returns: The newly allocated crtc state, or NULL on failure.
  145. */
  146. struct drm_crtc_state *
  147. intel_crtc_duplicate_state(struct drm_crtc *crtc)
  148. {
  149. struct intel_crtc_state *crtc_state;
  150. crtc_state = kmemdup(crtc->state, sizeof(*crtc_state), GFP_KERNEL);
  151. if (!crtc_state)
  152. return NULL;
  153. __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base);
  154. crtc_state->update_pipe = false;
  155. crtc_state->disable_lp_wm = false;
  156. crtc_state->disable_cxsr = false;
  157. crtc_state->update_wm_pre = false;
  158. crtc_state->update_wm_post = false;
  159. crtc_state->fb_changed = false;
  160. crtc_state->fifo_changed = false;
  161. crtc_state->wm.need_postvbl_update = false;
  162. crtc_state->fb_bits = 0;
  163. return &crtc_state->base;
  164. }
  165. /**
  166. * intel_crtc_destroy_state - destroy crtc state
  167. * @crtc: drm crtc
  168. * @state: the state to destroy
  169. *
  170. * Destroys the crtc state (both common and Intel-specific) for the
  171. * specified crtc.
  172. */
  173. void
  174. intel_crtc_destroy_state(struct drm_crtc *crtc,
  175. struct drm_crtc_state *state)
  176. {
  177. drm_atomic_helper_crtc_destroy_state(crtc, state);
  178. }
  179. /**
  180. * intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
  181. * @dev_priv: i915 device
  182. * @intel_crtc: intel crtc
  183. * @crtc_state: incoming crtc_state to validate and setup scalers
  184. *
  185. * This function sets up scalers based on staged scaling requests for
  186. * a @crtc and its planes. It is called from crtc level check path. If request
  187. * is a supportable request, it attaches scalers to requested planes and crtc.
  188. *
  189. * This function takes into account the current scaler(s) in use by any planes
  190. * not being part of this atomic state
  191. *
  192. * Returns:
  193. * 0 - scalers were setup succesfully
  194. * error code - otherwise
  195. */
  196. int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
  197. struct intel_crtc *intel_crtc,
  198. struct intel_crtc_state *crtc_state)
  199. {
  200. struct drm_plane *plane = NULL;
  201. struct intel_plane *intel_plane;
  202. struct intel_plane_state *plane_state = NULL;
  203. struct intel_crtc_scaler_state *scaler_state =
  204. &crtc_state->scaler_state;
  205. struct drm_atomic_state *drm_state = crtc_state->base.state;
  206. struct intel_atomic_state *intel_state = to_intel_atomic_state(drm_state);
  207. int num_scalers_need;
  208. int i, j;
  209. num_scalers_need = hweight32(scaler_state->scaler_users);
  210. /*
  211. * High level flow:
  212. * - staged scaler requests are already in scaler_state->scaler_users
  213. * - check whether staged scaling requests can be supported
  214. * - add planes using scalers that aren't in current transaction
  215. * - assign scalers to requested users
  216. * - as part of plane commit, scalers will be committed
  217. * (i.e., either attached or detached) to respective planes in hw
  218. * - as part of crtc_commit, scaler will be either attached or detached
  219. * to crtc in hw
  220. */
  221. /* fail if required scalers > available scalers */
  222. if (num_scalers_need > intel_crtc->num_scalers){
  223. DRM_DEBUG_KMS("Too many scaling requests %d > %d\n",
  224. num_scalers_need, intel_crtc->num_scalers);
  225. return -EINVAL;
  226. }
  227. /* walkthrough scaler_users bits and start assigning scalers */
  228. for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) {
  229. int *scaler_id;
  230. const char *name;
  231. int idx;
  232. /* skip if scaler not required */
  233. if (!(scaler_state->scaler_users & (1 << i)))
  234. continue;
  235. if (i == SKL_CRTC_INDEX) {
  236. name = "CRTC";
  237. idx = intel_crtc->base.base.id;
  238. /* panel fitter case: assign as a crtc scaler */
  239. scaler_id = &scaler_state->scaler_id;
  240. } else {
  241. name = "PLANE";
  242. /* plane scaler case: assign as a plane scaler */
  243. /* find the plane that set the bit as scaler_user */
  244. plane = drm_state->planes[i].ptr;
  245. /*
  246. * to enable/disable hq mode, add planes that are using scaler
  247. * into this transaction
  248. */
  249. if (!plane) {
  250. struct drm_plane_state *state;
  251. plane = drm_plane_from_index(&dev_priv->drm, i);
  252. state = drm_atomic_get_plane_state(drm_state, plane);
  253. if (IS_ERR(state)) {
  254. DRM_DEBUG_KMS("Failed to add [PLANE:%d] to drm_state\n",
  255. plane->base.id);
  256. return PTR_ERR(state);
  257. }
  258. /*
  259. * the plane is added after plane checks are run,
  260. * but since this plane is unchanged just do the
  261. * minimum required validation.
  262. */
  263. crtc_state->base.planes_changed = true;
  264. }
  265. intel_plane = to_intel_plane(plane);
  266. idx = plane->base.id;
  267. /* plane on different crtc cannot be a scaler user of this crtc */
  268. if (WARN_ON(intel_plane->pipe != intel_crtc->pipe)) {
  269. continue;
  270. }
  271. plane_state = intel_atomic_get_new_plane_state(intel_state,
  272. intel_plane);
  273. scaler_id = &plane_state->scaler_id;
  274. }
  275. if (*scaler_id < 0) {
  276. /* find a free scaler */
  277. for (j = 0; j < intel_crtc->num_scalers; j++) {
  278. if (!scaler_state->scalers[j].in_use) {
  279. scaler_state->scalers[j].in_use = 1;
  280. *scaler_id = j;
  281. DRM_DEBUG_KMS("Attached scaler id %u.%u to %s:%d\n",
  282. intel_crtc->pipe, *scaler_id, name, idx);
  283. break;
  284. }
  285. }
  286. }
  287. if (WARN_ON(*scaler_id < 0)) {
  288. DRM_DEBUG_KMS("Cannot find scaler for %s:%d\n", name, idx);
  289. continue;
  290. }
  291. /* set scaler mode */
  292. if ((INTEL_GEN(dev_priv) >= 9) &&
  293. plane_state && plane_state->base.fb &&
  294. plane_state->base.fb->format->format ==
  295. DRM_FORMAT_NV12) {
  296. if (INTEL_GEN(dev_priv) == 9 &&
  297. !IS_GEMINILAKE(dev_priv) &&
  298. !IS_SKYLAKE(dev_priv))
  299. scaler_state->scalers[*scaler_id].mode =
  300. SKL_PS_SCALER_MODE_NV12;
  301. else
  302. scaler_state->scalers[*scaler_id].mode =
  303. PS_SCALER_MODE_PLANAR;
  304. } else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {
  305. /*
  306. * when only 1 scaler is in use on either pipe A or B,
  307. * scaler 0 operates in high quality (HQ) mode.
  308. * In this case use scaler 0 to take advantage of HQ mode
  309. */
  310. *scaler_id = 0;
  311. scaler_state->scalers[0].in_use = 1;
  312. scaler_state->scalers[0].mode = PS_SCALER_MODE_HQ;
  313. scaler_state->scalers[1].in_use = 0;
  314. } else {
  315. scaler_state->scalers[*scaler_id].mode = PS_SCALER_MODE_DYN;
  316. }
  317. }
  318. return 0;
  319. }
  320. struct drm_atomic_state *
  321. intel_atomic_state_alloc(struct drm_device *dev)
  322. {
  323. struct intel_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
  324. if (!state || drm_atomic_state_init(dev, &state->base) < 0) {
  325. kfree(state);
  326. return NULL;
  327. }
  328. return &state->base;
  329. }
  330. void intel_atomic_state_clear(struct drm_atomic_state *s)
  331. {
  332. struct intel_atomic_state *state = to_intel_atomic_state(s);
  333. drm_atomic_state_default_clear(&state->base);
  334. state->dpll_set = state->modeset = false;
  335. }