vmwgfx_surface.c 44 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600
  1. /**************************************************************************
  2. *
  3. * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include <drm/ttm/ttm_placement.h>
  28. #include "vmwgfx_drv.h"
  29. #include "vmwgfx_resource_priv.h"
  30. #include "vmwgfx_so.h"
  31. #include "vmwgfx_binding.h"
  32. #include "device_include/svga3d_surfacedefs.h"
  33. /**
  34. * struct vmw_user_surface - User-space visible surface resource
  35. *
  36. * @base: The TTM base object handling user-space visibility.
  37. * @srf: The surface metadata.
  38. * @size: TTM accounting size for the surface.
  39. * @master: master of the creating client. Used for security check.
  40. */
  41. struct vmw_user_surface {
  42. struct ttm_prime_object prime;
  43. struct vmw_surface srf;
  44. uint32_t size;
  45. struct drm_master *master;
  46. struct ttm_base_object *backup_base;
  47. };
  48. /**
  49. * struct vmw_surface_offset - Backing store mip level offset info
  50. *
  51. * @face: Surface face.
  52. * @mip: Mip level.
  53. * @bo_offset: Offset into backing store of this mip level.
  54. *
  55. */
  56. struct vmw_surface_offset {
  57. uint32_t face;
  58. uint32_t mip;
  59. uint32_t bo_offset;
  60. };
  61. static void vmw_user_surface_free(struct vmw_resource *res);
  62. static struct vmw_resource *
  63. vmw_user_surface_base_to_res(struct ttm_base_object *base);
  64. static int vmw_legacy_srf_bind(struct vmw_resource *res,
  65. struct ttm_validate_buffer *val_buf);
  66. static int vmw_legacy_srf_unbind(struct vmw_resource *res,
  67. bool readback,
  68. struct ttm_validate_buffer *val_buf);
  69. static int vmw_legacy_srf_create(struct vmw_resource *res);
  70. static int vmw_legacy_srf_destroy(struct vmw_resource *res);
  71. static int vmw_gb_surface_create(struct vmw_resource *res);
  72. static int vmw_gb_surface_bind(struct vmw_resource *res,
  73. struct ttm_validate_buffer *val_buf);
  74. static int vmw_gb_surface_unbind(struct vmw_resource *res,
  75. bool readback,
  76. struct ttm_validate_buffer *val_buf);
  77. static int vmw_gb_surface_destroy(struct vmw_resource *res);
  78. static const struct vmw_user_resource_conv user_surface_conv = {
  79. .object_type = VMW_RES_SURFACE,
  80. .base_obj_to_res = vmw_user_surface_base_to_res,
  81. .res_free = vmw_user_surface_free
  82. };
  83. const struct vmw_user_resource_conv *user_surface_converter =
  84. &user_surface_conv;
  85. static uint64_t vmw_user_surface_size;
  86. static const struct vmw_res_func vmw_legacy_surface_func = {
  87. .res_type = vmw_res_surface,
  88. .needs_backup = false,
  89. .may_evict = true,
  90. .type_name = "legacy surfaces",
  91. .backup_placement = &vmw_srf_placement,
  92. .create = &vmw_legacy_srf_create,
  93. .destroy = &vmw_legacy_srf_destroy,
  94. .bind = &vmw_legacy_srf_bind,
  95. .unbind = &vmw_legacy_srf_unbind
  96. };
  97. static const struct vmw_res_func vmw_gb_surface_func = {
  98. .res_type = vmw_res_surface,
  99. .needs_backup = true,
  100. .may_evict = true,
  101. .type_name = "guest backed surfaces",
  102. .backup_placement = &vmw_mob_placement,
  103. .create = vmw_gb_surface_create,
  104. .destroy = vmw_gb_surface_destroy,
  105. .bind = vmw_gb_surface_bind,
  106. .unbind = vmw_gb_surface_unbind
  107. };
  108. /**
  109. * struct vmw_surface_dma - SVGA3D DMA command
  110. */
  111. struct vmw_surface_dma {
  112. SVGA3dCmdHeader header;
  113. SVGA3dCmdSurfaceDMA body;
  114. SVGA3dCopyBox cb;
  115. SVGA3dCmdSurfaceDMASuffix suffix;
  116. };
  117. /**
  118. * struct vmw_surface_define - SVGA3D Surface Define command
  119. */
  120. struct vmw_surface_define {
  121. SVGA3dCmdHeader header;
  122. SVGA3dCmdDefineSurface body;
  123. };
  124. /**
  125. * struct vmw_surface_destroy - SVGA3D Surface Destroy command
  126. */
  127. struct vmw_surface_destroy {
  128. SVGA3dCmdHeader header;
  129. SVGA3dCmdDestroySurface body;
  130. };
  131. /**
  132. * vmw_surface_dma_size - Compute fifo size for a dma command.
  133. *
  134. * @srf: Pointer to a struct vmw_surface
  135. *
  136. * Computes the required size for a surface dma command for backup or
  137. * restoration of the surface represented by @srf.
  138. */
  139. static inline uint32_t vmw_surface_dma_size(const struct vmw_surface *srf)
  140. {
  141. return srf->num_sizes * sizeof(struct vmw_surface_dma);
  142. }
  143. /**
  144. * vmw_surface_define_size - Compute fifo size for a surface define command.
  145. *
  146. * @srf: Pointer to a struct vmw_surface
  147. *
  148. * Computes the required size for a surface define command for the definition
  149. * of the surface represented by @srf.
  150. */
  151. static inline uint32_t vmw_surface_define_size(const struct vmw_surface *srf)
  152. {
  153. return sizeof(struct vmw_surface_define) + srf->num_sizes *
  154. sizeof(SVGA3dSize);
  155. }
  156. /**
  157. * vmw_surface_destroy_size - Compute fifo size for a surface destroy command.
  158. *
  159. * Computes the required size for a surface destroy command for the destruction
  160. * of a hw surface.
  161. */
  162. static inline uint32_t vmw_surface_destroy_size(void)
  163. {
  164. return sizeof(struct vmw_surface_destroy);
  165. }
  166. /**
  167. * vmw_surface_destroy_encode - Encode a surface_destroy command.
  168. *
  169. * @id: The surface id
  170. * @cmd_space: Pointer to memory area in which the commands should be encoded.
  171. */
  172. static void vmw_surface_destroy_encode(uint32_t id,
  173. void *cmd_space)
  174. {
  175. struct vmw_surface_destroy *cmd = (struct vmw_surface_destroy *)
  176. cmd_space;
  177. cmd->header.id = SVGA_3D_CMD_SURFACE_DESTROY;
  178. cmd->header.size = sizeof(cmd->body);
  179. cmd->body.sid = id;
  180. }
  181. /**
  182. * vmw_surface_define_encode - Encode a surface_define command.
  183. *
  184. * @srf: Pointer to a struct vmw_surface object.
  185. * @cmd_space: Pointer to memory area in which the commands should be encoded.
  186. */
  187. static void vmw_surface_define_encode(const struct vmw_surface *srf,
  188. void *cmd_space)
  189. {
  190. struct vmw_surface_define *cmd = (struct vmw_surface_define *)
  191. cmd_space;
  192. struct drm_vmw_size *src_size;
  193. SVGA3dSize *cmd_size;
  194. uint32_t cmd_len;
  195. int i;
  196. cmd_len = sizeof(cmd->body) + srf->num_sizes * sizeof(SVGA3dSize);
  197. cmd->header.id = SVGA_3D_CMD_SURFACE_DEFINE;
  198. cmd->header.size = cmd_len;
  199. cmd->body.sid = srf->res.id;
  200. cmd->body.surfaceFlags = srf->flags;
  201. cmd->body.format = srf->format;
  202. for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i)
  203. cmd->body.face[i].numMipLevels = srf->mip_levels[i];
  204. cmd += 1;
  205. cmd_size = (SVGA3dSize *) cmd;
  206. src_size = srf->sizes;
  207. for (i = 0; i < srf->num_sizes; ++i, cmd_size++, src_size++) {
  208. cmd_size->width = src_size->width;
  209. cmd_size->height = src_size->height;
  210. cmd_size->depth = src_size->depth;
  211. }
  212. }
  213. /**
  214. * vmw_surface_dma_encode - Encode a surface_dma command.
  215. *
  216. * @srf: Pointer to a struct vmw_surface object.
  217. * @cmd_space: Pointer to memory area in which the commands should be encoded.
  218. * @ptr: Pointer to an SVGAGuestPtr indicating where the surface contents
  219. * should be placed or read from.
  220. * @to_surface: Boolean whether to DMA to the surface or from the surface.
  221. */
  222. static void vmw_surface_dma_encode(struct vmw_surface *srf,
  223. void *cmd_space,
  224. const SVGAGuestPtr *ptr,
  225. bool to_surface)
  226. {
  227. uint32_t i;
  228. struct vmw_surface_dma *cmd = (struct vmw_surface_dma *)cmd_space;
  229. const struct svga3d_surface_desc *desc =
  230. svga3dsurface_get_desc(srf->format);
  231. for (i = 0; i < srf->num_sizes; ++i) {
  232. SVGA3dCmdHeader *header = &cmd->header;
  233. SVGA3dCmdSurfaceDMA *body = &cmd->body;
  234. SVGA3dCopyBox *cb = &cmd->cb;
  235. SVGA3dCmdSurfaceDMASuffix *suffix = &cmd->suffix;
  236. const struct vmw_surface_offset *cur_offset = &srf->offsets[i];
  237. const struct drm_vmw_size *cur_size = &srf->sizes[i];
  238. header->id = SVGA_3D_CMD_SURFACE_DMA;
  239. header->size = sizeof(*body) + sizeof(*cb) + sizeof(*suffix);
  240. body->guest.ptr = *ptr;
  241. body->guest.ptr.offset += cur_offset->bo_offset;
  242. body->guest.pitch = svga3dsurface_calculate_pitch(desc,
  243. cur_size);
  244. body->host.sid = srf->res.id;
  245. body->host.face = cur_offset->face;
  246. body->host.mipmap = cur_offset->mip;
  247. body->transfer = ((to_surface) ? SVGA3D_WRITE_HOST_VRAM :
  248. SVGA3D_READ_HOST_VRAM);
  249. cb->x = 0;
  250. cb->y = 0;
  251. cb->z = 0;
  252. cb->srcx = 0;
  253. cb->srcy = 0;
  254. cb->srcz = 0;
  255. cb->w = cur_size->width;
  256. cb->h = cur_size->height;
  257. cb->d = cur_size->depth;
  258. suffix->suffixSize = sizeof(*suffix);
  259. suffix->maximumOffset =
  260. svga3dsurface_get_image_buffer_size(desc, cur_size,
  261. body->guest.pitch);
  262. suffix->flags.discard = 0;
  263. suffix->flags.unsynchronized = 0;
  264. suffix->flags.reserved = 0;
  265. ++cmd;
  266. }
  267. };
  268. /**
  269. * vmw_hw_surface_destroy - destroy a Device surface
  270. *
  271. * @res: Pointer to a struct vmw_resource embedded in a struct
  272. * vmw_surface.
  273. *
  274. * Destroys a the device surface associated with a struct vmw_surface if
  275. * any, and adjusts accounting and resource count accordingly.
  276. */
  277. static void vmw_hw_surface_destroy(struct vmw_resource *res)
  278. {
  279. struct vmw_private *dev_priv = res->dev_priv;
  280. struct vmw_surface *srf;
  281. void *cmd;
  282. if (res->func->destroy == vmw_gb_surface_destroy) {
  283. (void) vmw_gb_surface_destroy(res);
  284. return;
  285. }
  286. if (res->id != -1) {
  287. cmd = vmw_fifo_reserve(dev_priv, vmw_surface_destroy_size());
  288. if (unlikely(!cmd)) {
  289. DRM_ERROR("Failed reserving FIFO space for surface "
  290. "destruction.\n");
  291. return;
  292. }
  293. vmw_surface_destroy_encode(res->id, cmd);
  294. vmw_fifo_commit(dev_priv, vmw_surface_destroy_size());
  295. /*
  296. * used_memory_size_atomic, or separate lock
  297. * to avoid taking dev_priv::cmdbuf_mutex in
  298. * the destroy path.
  299. */
  300. mutex_lock(&dev_priv->cmdbuf_mutex);
  301. srf = vmw_res_to_srf(res);
  302. dev_priv->used_memory_size -= res->backup_size;
  303. mutex_unlock(&dev_priv->cmdbuf_mutex);
  304. }
  305. }
  306. /**
  307. * vmw_legacy_srf_create - Create a device surface as part of the
  308. * resource validation process.
  309. *
  310. * @res: Pointer to a struct vmw_surface.
  311. *
  312. * If the surface doesn't have a hw id.
  313. *
  314. * Returns -EBUSY if there wasn't sufficient device resources to
  315. * complete the validation. Retry after freeing up resources.
  316. *
  317. * May return other errors if the kernel is out of guest resources.
  318. */
  319. static int vmw_legacy_srf_create(struct vmw_resource *res)
  320. {
  321. struct vmw_private *dev_priv = res->dev_priv;
  322. struct vmw_surface *srf;
  323. uint32_t submit_size;
  324. uint8_t *cmd;
  325. int ret;
  326. if (likely(res->id != -1))
  327. return 0;
  328. srf = vmw_res_to_srf(res);
  329. if (unlikely(dev_priv->used_memory_size + res->backup_size >=
  330. dev_priv->memory_size))
  331. return -EBUSY;
  332. /*
  333. * Alloc id for the resource.
  334. */
  335. ret = vmw_resource_alloc_id(res);
  336. if (unlikely(ret != 0)) {
  337. DRM_ERROR("Failed to allocate a surface id.\n");
  338. goto out_no_id;
  339. }
  340. if (unlikely(res->id >= SVGA3D_MAX_SURFACE_IDS)) {
  341. ret = -EBUSY;
  342. goto out_no_fifo;
  343. }
  344. /*
  345. * Encode surface define- commands.
  346. */
  347. submit_size = vmw_surface_define_size(srf);
  348. cmd = vmw_fifo_reserve(dev_priv, submit_size);
  349. if (unlikely(!cmd)) {
  350. DRM_ERROR("Failed reserving FIFO space for surface "
  351. "creation.\n");
  352. ret = -ENOMEM;
  353. goto out_no_fifo;
  354. }
  355. vmw_surface_define_encode(srf, cmd);
  356. vmw_fifo_commit(dev_priv, submit_size);
  357. vmw_fifo_resource_inc(dev_priv);
  358. /*
  359. * Surface memory usage accounting.
  360. */
  361. dev_priv->used_memory_size += res->backup_size;
  362. return 0;
  363. out_no_fifo:
  364. vmw_resource_release_id(res);
  365. out_no_id:
  366. return ret;
  367. }
  368. /**
  369. * vmw_legacy_srf_dma - Copy backup data to or from a legacy surface.
  370. *
  371. * @res: Pointer to a struct vmw_res embedded in a struct
  372. * vmw_surface.
  373. * @val_buf: Pointer to a struct ttm_validate_buffer containing
  374. * information about the backup buffer.
  375. * @bind: Boolean wether to DMA to the surface.
  376. *
  377. * Transfer backup data to or from a legacy surface as part of the
  378. * validation process.
  379. * May return other errors if the kernel is out of guest resources.
  380. * The backup buffer will be fenced or idle upon successful completion,
  381. * and if the surface needs persistent backup storage, the backup buffer
  382. * will also be returned reserved iff @bind is true.
  383. */
  384. static int vmw_legacy_srf_dma(struct vmw_resource *res,
  385. struct ttm_validate_buffer *val_buf,
  386. bool bind)
  387. {
  388. SVGAGuestPtr ptr;
  389. struct vmw_fence_obj *fence;
  390. uint32_t submit_size;
  391. struct vmw_surface *srf = vmw_res_to_srf(res);
  392. uint8_t *cmd;
  393. struct vmw_private *dev_priv = res->dev_priv;
  394. BUG_ON(!val_buf->bo);
  395. submit_size = vmw_surface_dma_size(srf);
  396. cmd = vmw_fifo_reserve(dev_priv, submit_size);
  397. if (unlikely(!cmd)) {
  398. DRM_ERROR("Failed reserving FIFO space for surface "
  399. "DMA.\n");
  400. return -ENOMEM;
  401. }
  402. vmw_bo_get_guest_ptr(val_buf->bo, &ptr);
  403. vmw_surface_dma_encode(srf, cmd, &ptr, bind);
  404. vmw_fifo_commit(dev_priv, submit_size);
  405. /*
  406. * Create a fence object and fence the backup buffer.
  407. */
  408. (void) vmw_execbuf_fence_commands(NULL, dev_priv,
  409. &fence, NULL);
  410. vmw_fence_single_bo(val_buf->bo, fence);
  411. if (likely(fence != NULL))
  412. vmw_fence_obj_unreference(&fence);
  413. return 0;
  414. }
  415. /**
  416. * vmw_legacy_srf_bind - Perform a legacy surface bind as part of the
  417. * surface validation process.
  418. *
  419. * @res: Pointer to a struct vmw_res embedded in a struct
  420. * vmw_surface.
  421. * @val_buf: Pointer to a struct ttm_validate_buffer containing
  422. * information about the backup buffer.
  423. *
  424. * This function will copy backup data to the surface if the
  425. * backup buffer is dirty.
  426. */
  427. static int vmw_legacy_srf_bind(struct vmw_resource *res,
  428. struct ttm_validate_buffer *val_buf)
  429. {
  430. if (!res->backup_dirty)
  431. return 0;
  432. return vmw_legacy_srf_dma(res, val_buf, true);
  433. }
  434. /**
  435. * vmw_legacy_srf_unbind - Perform a legacy surface unbind as part of the
  436. * surface eviction process.
  437. *
  438. * @res: Pointer to a struct vmw_res embedded in a struct
  439. * vmw_surface.
  440. * @val_buf: Pointer to a struct ttm_validate_buffer containing
  441. * information about the backup buffer.
  442. *
  443. * This function will copy backup data from the surface.
  444. */
  445. static int vmw_legacy_srf_unbind(struct vmw_resource *res,
  446. bool readback,
  447. struct ttm_validate_buffer *val_buf)
  448. {
  449. if (unlikely(readback))
  450. return vmw_legacy_srf_dma(res, val_buf, false);
  451. return 0;
  452. }
  453. /**
  454. * vmw_legacy_srf_destroy - Destroy a device surface as part of a
  455. * resource eviction process.
  456. *
  457. * @res: Pointer to a struct vmw_res embedded in a struct
  458. * vmw_surface.
  459. */
  460. static int vmw_legacy_srf_destroy(struct vmw_resource *res)
  461. {
  462. struct vmw_private *dev_priv = res->dev_priv;
  463. uint32_t submit_size;
  464. uint8_t *cmd;
  465. BUG_ON(res->id == -1);
  466. /*
  467. * Encode the dma- and surface destroy commands.
  468. */
  469. submit_size = vmw_surface_destroy_size();
  470. cmd = vmw_fifo_reserve(dev_priv, submit_size);
  471. if (unlikely(!cmd)) {
  472. DRM_ERROR("Failed reserving FIFO space for surface "
  473. "eviction.\n");
  474. return -ENOMEM;
  475. }
  476. vmw_surface_destroy_encode(res->id, cmd);
  477. vmw_fifo_commit(dev_priv, submit_size);
  478. /*
  479. * Surface memory usage accounting.
  480. */
  481. dev_priv->used_memory_size -= res->backup_size;
  482. /*
  483. * Release the surface ID.
  484. */
  485. vmw_resource_release_id(res);
  486. vmw_fifo_resource_dec(dev_priv);
  487. return 0;
  488. }
  489. /**
  490. * vmw_surface_init - initialize a struct vmw_surface
  491. *
  492. * @dev_priv: Pointer to a device private struct.
  493. * @srf: Pointer to the struct vmw_surface to initialize.
  494. * @res_free: Pointer to a resource destructor used to free
  495. * the object.
  496. */
  497. static int vmw_surface_init(struct vmw_private *dev_priv,
  498. struct vmw_surface *srf,
  499. void (*res_free) (struct vmw_resource *res))
  500. {
  501. int ret;
  502. struct vmw_resource *res = &srf->res;
  503. BUG_ON(!res_free);
  504. ret = vmw_resource_init(dev_priv, res, true, res_free,
  505. (dev_priv->has_mob) ? &vmw_gb_surface_func :
  506. &vmw_legacy_surface_func);
  507. if (unlikely(ret != 0)) {
  508. res_free(res);
  509. return ret;
  510. }
  511. /*
  512. * The surface won't be visible to hardware until a
  513. * surface validate.
  514. */
  515. INIT_LIST_HEAD(&srf->view_list);
  516. vmw_resource_activate(res, vmw_hw_surface_destroy);
  517. return ret;
  518. }
  519. /**
  520. * vmw_user_surface_base_to_res - TTM base object to resource converter for
  521. * user visible surfaces
  522. *
  523. * @base: Pointer to a TTM base object
  524. *
  525. * Returns the struct vmw_resource embedded in a struct vmw_surface
  526. * for the user-visible object identified by the TTM base object @base.
  527. */
  528. static struct vmw_resource *
  529. vmw_user_surface_base_to_res(struct ttm_base_object *base)
  530. {
  531. return &(container_of(base, struct vmw_user_surface,
  532. prime.base)->srf.res);
  533. }
  534. /**
  535. * vmw_user_surface_free - User visible surface resource destructor
  536. *
  537. * @res: A struct vmw_resource embedded in a struct vmw_surface.
  538. */
  539. static void vmw_user_surface_free(struct vmw_resource *res)
  540. {
  541. struct vmw_surface *srf = vmw_res_to_srf(res);
  542. struct vmw_user_surface *user_srf =
  543. container_of(srf, struct vmw_user_surface, srf);
  544. struct vmw_private *dev_priv = srf->res.dev_priv;
  545. uint32_t size = user_srf->size;
  546. if (user_srf->master)
  547. drm_master_put(&user_srf->master);
  548. kfree(srf->offsets);
  549. kfree(srf->sizes);
  550. kfree(srf->snooper.image);
  551. ttm_prime_object_kfree(user_srf, prime);
  552. ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
  553. }
  554. /**
  555. * vmw_user_surface_free - User visible surface TTM base object destructor
  556. *
  557. * @p_base: Pointer to a pointer to a TTM base object
  558. * embedded in a struct vmw_user_surface.
  559. *
  560. * Drops the base object's reference on its resource, and the
  561. * pointer pointed to by *p_base is set to NULL.
  562. */
  563. static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
  564. {
  565. struct ttm_base_object *base = *p_base;
  566. struct vmw_user_surface *user_srf =
  567. container_of(base, struct vmw_user_surface, prime.base);
  568. struct vmw_resource *res = &user_srf->srf.res;
  569. *p_base = NULL;
  570. if (user_srf->backup_base)
  571. ttm_base_object_unref(&user_srf->backup_base);
  572. vmw_resource_unreference(&res);
  573. }
  574. /**
  575. * vmw_user_surface_destroy_ioctl - Ioctl function implementing
  576. * the user surface destroy functionality.
  577. *
  578. * @dev: Pointer to a struct drm_device.
  579. * @data: Pointer to data copied from / to user-space.
  580. * @file_priv: Pointer to a drm file private structure.
  581. */
  582. int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,
  583. struct drm_file *file_priv)
  584. {
  585. struct drm_vmw_surface_arg *arg = (struct drm_vmw_surface_arg *)data;
  586. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  587. return ttm_ref_object_base_unref(tfile, arg->sid, TTM_REF_USAGE);
  588. }
  589. /**
  590. * vmw_user_surface_define_ioctl - Ioctl function implementing
  591. * the user surface define functionality.
  592. *
  593. * @dev: Pointer to a struct drm_device.
  594. * @data: Pointer to data copied from / to user-space.
  595. * @file_priv: Pointer to a drm file private structure.
  596. */
  597. int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
  598. struct drm_file *file_priv)
  599. {
  600. struct vmw_private *dev_priv = vmw_priv(dev);
  601. struct vmw_user_surface *user_srf;
  602. struct vmw_surface *srf;
  603. struct vmw_resource *res;
  604. struct vmw_resource *tmp;
  605. union drm_vmw_surface_create_arg *arg =
  606. (union drm_vmw_surface_create_arg *)data;
  607. struct drm_vmw_surface_create_req *req = &arg->req;
  608. struct drm_vmw_surface_arg *rep = &arg->rep;
  609. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  610. struct ttm_operation_ctx ctx = {
  611. .interruptible = true,
  612. .no_wait_gpu = false
  613. };
  614. int ret;
  615. int i, j;
  616. uint32_t cur_bo_offset;
  617. struct drm_vmw_size *cur_size;
  618. struct vmw_surface_offset *cur_offset;
  619. uint32_t num_sizes;
  620. uint32_t size;
  621. const struct svga3d_surface_desc *desc;
  622. if (unlikely(vmw_user_surface_size == 0))
  623. vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
  624. 128;
  625. num_sizes = 0;
  626. for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
  627. if (req->mip_levels[i] > DRM_VMW_MAX_MIP_LEVELS)
  628. return -EINVAL;
  629. num_sizes += req->mip_levels[i];
  630. }
  631. if (num_sizes > DRM_VMW_MAX_SURFACE_FACES * DRM_VMW_MAX_MIP_LEVELS ||
  632. num_sizes == 0)
  633. return -EINVAL;
  634. size = vmw_user_surface_size + 128 +
  635. ttm_round_pot(num_sizes * sizeof(struct drm_vmw_size)) +
  636. ttm_round_pot(num_sizes * sizeof(struct vmw_surface_offset));
  637. desc = svga3dsurface_get_desc(req->format);
  638. if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
  639. DRM_ERROR("Invalid surface format for surface creation.\n");
  640. DRM_ERROR("Format requested is: %d\n", req->format);
  641. return -EINVAL;
  642. }
  643. ret = ttm_read_lock(&dev_priv->reservation_sem, true);
  644. if (unlikely(ret != 0))
  645. return ret;
  646. ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
  647. size, &ctx);
  648. if (unlikely(ret != 0)) {
  649. if (ret != -ERESTARTSYS)
  650. DRM_ERROR("Out of graphics memory for surface"
  651. " creation.\n");
  652. goto out_unlock;
  653. }
  654. user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
  655. if (unlikely(!user_srf)) {
  656. ret = -ENOMEM;
  657. goto out_no_user_srf;
  658. }
  659. srf = &user_srf->srf;
  660. res = &srf->res;
  661. srf->flags = req->flags;
  662. srf->format = req->format;
  663. srf->scanout = req->scanout;
  664. memcpy(srf->mip_levels, req->mip_levels, sizeof(srf->mip_levels));
  665. srf->num_sizes = num_sizes;
  666. user_srf->size = size;
  667. srf->sizes = memdup_user((struct drm_vmw_size __user *)(unsigned long)
  668. req->size_addr,
  669. sizeof(*srf->sizes) * srf->num_sizes);
  670. if (IS_ERR(srf->sizes)) {
  671. ret = PTR_ERR(srf->sizes);
  672. goto out_no_sizes;
  673. }
  674. srf->offsets = kmalloc_array(srf->num_sizes,
  675. sizeof(*srf->offsets),
  676. GFP_KERNEL);
  677. if (unlikely(!srf->offsets)) {
  678. ret = -ENOMEM;
  679. goto out_no_offsets;
  680. }
  681. srf->base_size = *srf->sizes;
  682. srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
  683. srf->multisample_count = 0;
  684. cur_bo_offset = 0;
  685. cur_offset = srf->offsets;
  686. cur_size = srf->sizes;
  687. for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
  688. for (j = 0; j < srf->mip_levels[i]; ++j) {
  689. uint32_t stride = svga3dsurface_calculate_pitch
  690. (desc, cur_size);
  691. cur_offset->face = i;
  692. cur_offset->mip = j;
  693. cur_offset->bo_offset = cur_bo_offset;
  694. cur_bo_offset += svga3dsurface_get_image_buffer_size
  695. (desc, cur_size, stride);
  696. ++cur_offset;
  697. ++cur_size;
  698. }
  699. }
  700. res->backup_size = cur_bo_offset;
  701. if (srf->scanout &&
  702. srf->num_sizes == 1 &&
  703. srf->sizes[0].width == 64 &&
  704. srf->sizes[0].height == 64 &&
  705. srf->format == SVGA3D_A8R8G8B8) {
  706. srf->snooper.image = kzalloc(64 * 64 * 4, GFP_KERNEL);
  707. if (!srf->snooper.image) {
  708. DRM_ERROR("Failed to allocate cursor_image\n");
  709. ret = -ENOMEM;
  710. goto out_no_copy;
  711. }
  712. } else {
  713. srf->snooper.image = NULL;
  714. }
  715. user_srf->prime.base.shareable = false;
  716. user_srf->prime.base.tfile = NULL;
  717. if (drm_is_primary_client(file_priv))
  718. user_srf->master = drm_master_get(file_priv->master);
  719. /**
  720. * From this point, the generic resource management functions
  721. * destroy the object on failure.
  722. */
  723. ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
  724. if (unlikely(ret != 0))
  725. goto out_unlock;
  726. /*
  727. * A gb-aware client referencing a shared surface will
  728. * expect a backup buffer to be present.
  729. */
  730. if (dev_priv->has_mob && req->shareable) {
  731. uint32_t backup_handle;
  732. ret = vmw_user_bo_alloc(dev_priv, tfile,
  733. res->backup_size,
  734. true,
  735. &backup_handle,
  736. &res->backup,
  737. &user_srf->backup_base);
  738. if (unlikely(ret != 0)) {
  739. vmw_resource_unreference(&res);
  740. goto out_unlock;
  741. }
  742. }
  743. tmp = vmw_resource_reference(&srf->res);
  744. ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
  745. req->shareable, VMW_RES_SURFACE,
  746. &vmw_user_surface_base_release, NULL);
  747. if (unlikely(ret != 0)) {
  748. vmw_resource_unreference(&tmp);
  749. vmw_resource_unreference(&res);
  750. goto out_unlock;
  751. }
  752. rep->sid = user_srf->prime.base.hash.key;
  753. vmw_resource_unreference(&res);
  754. ttm_read_unlock(&dev_priv->reservation_sem);
  755. return 0;
  756. out_no_copy:
  757. kfree(srf->offsets);
  758. out_no_offsets:
  759. kfree(srf->sizes);
  760. out_no_sizes:
  761. ttm_prime_object_kfree(user_srf, prime);
  762. out_no_user_srf:
  763. ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
  764. out_unlock:
  765. ttm_read_unlock(&dev_priv->reservation_sem);
  766. return ret;
  767. }
  768. static int
  769. vmw_surface_handle_reference(struct vmw_private *dev_priv,
  770. struct drm_file *file_priv,
  771. uint32_t u_handle,
  772. enum drm_vmw_handle_type handle_type,
  773. struct ttm_base_object **base_p)
  774. {
  775. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  776. struct vmw_user_surface *user_srf;
  777. uint32_t handle;
  778. struct ttm_base_object *base;
  779. int ret;
  780. bool require_exist = false;
  781. if (handle_type == DRM_VMW_HANDLE_PRIME) {
  782. ret = ttm_prime_fd_to_handle(tfile, u_handle, &handle);
  783. if (unlikely(ret != 0))
  784. return ret;
  785. } else {
  786. if (unlikely(drm_is_render_client(file_priv)))
  787. require_exist = true;
  788. if (READ_ONCE(vmw_fpriv(file_priv)->locked_master)) {
  789. DRM_ERROR("Locked master refused legacy "
  790. "surface reference.\n");
  791. return -EACCES;
  792. }
  793. handle = u_handle;
  794. }
  795. ret = -EINVAL;
  796. base = ttm_base_object_lookup_for_ref(dev_priv->tdev, handle);
  797. if (unlikely(!base)) {
  798. DRM_ERROR("Could not find surface to reference.\n");
  799. goto out_no_lookup;
  800. }
  801. if (unlikely(ttm_base_object_type(base) != VMW_RES_SURFACE)) {
  802. DRM_ERROR("Referenced object is not a surface.\n");
  803. goto out_bad_resource;
  804. }
  805. if (handle_type != DRM_VMW_HANDLE_PRIME) {
  806. user_srf = container_of(base, struct vmw_user_surface,
  807. prime.base);
  808. /*
  809. * Make sure the surface creator has the same
  810. * authenticating master, or is already registered with us.
  811. */
  812. if (drm_is_primary_client(file_priv) &&
  813. user_srf->master != file_priv->master)
  814. require_exist = true;
  815. ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL,
  816. require_exist);
  817. if (unlikely(ret != 0)) {
  818. DRM_ERROR("Could not add a reference to a surface.\n");
  819. goto out_bad_resource;
  820. }
  821. }
  822. *base_p = base;
  823. return 0;
  824. out_bad_resource:
  825. ttm_base_object_unref(&base);
  826. out_no_lookup:
  827. if (handle_type == DRM_VMW_HANDLE_PRIME)
  828. (void) ttm_ref_object_base_unref(tfile, handle, TTM_REF_USAGE);
  829. return ret;
  830. }
  831. /**
  832. * vmw_user_surface_define_ioctl - Ioctl function implementing
  833. * the user surface reference functionality.
  834. *
  835. * @dev: Pointer to a struct drm_device.
  836. * @data: Pointer to data copied from / to user-space.
  837. * @file_priv: Pointer to a drm file private structure.
  838. */
  839. int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
  840. struct drm_file *file_priv)
  841. {
  842. struct vmw_private *dev_priv = vmw_priv(dev);
  843. union drm_vmw_surface_reference_arg *arg =
  844. (union drm_vmw_surface_reference_arg *)data;
  845. struct drm_vmw_surface_arg *req = &arg->req;
  846. struct drm_vmw_surface_create_req *rep = &arg->rep;
  847. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  848. struct vmw_surface *srf;
  849. struct vmw_user_surface *user_srf;
  850. struct drm_vmw_size __user *user_sizes;
  851. struct ttm_base_object *base;
  852. int ret;
  853. ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
  854. req->handle_type, &base);
  855. if (unlikely(ret != 0))
  856. return ret;
  857. user_srf = container_of(base, struct vmw_user_surface, prime.base);
  858. srf = &user_srf->srf;
  859. rep->flags = srf->flags;
  860. rep->format = srf->format;
  861. memcpy(rep->mip_levels, srf->mip_levels, sizeof(srf->mip_levels));
  862. user_sizes = (struct drm_vmw_size __user *)(unsigned long)
  863. rep->size_addr;
  864. if (user_sizes)
  865. ret = copy_to_user(user_sizes, &srf->base_size,
  866. sizeof(srf->base_size));
  867. if (unlikely(ret != 0)) {
  868. DRM_ERROR("copy_to_user failed %p %u\n",
  869. user_sizes, srf->num_sizes);
  870. ttm_ref_object_base_unref(tfile, base->hash.key, TTM_REF_USAGE);
  871. ret = -EFAULT;
  872. }
  873. ttm_base_object_unref(&base);
  874. return ret;
  875. }
  876. /**
  877. * vmw_surface_define_encode - Encode a surface_define command.
  878. *
  879. * @srf: Pointer to a struct vmw_surface object.
  880. * @cmd_space: Pointer to memory area in which the commands should be encoded.
  881. */
  882. static int vmw_gb_surface_create(struct vmw_resource *res)
  883. {
  884. struct vmw_private *dev_priv = res->dev_priv;
  885. struct vmw_surface *srf = vmw_res_to_srf(res);
  886. uint32_t cmd_len, cmd_id, submit_len;
  887. int ret;
  888. struct {
  889. SVGA3dCmdHeader header;
  890. SVGA3dCmdDefineGBSurface body;
  891. } *cmd;
  892. struct {
  893. SVGA3dCmdHeader header;
  894. SVGA3dCmdDefineGBSurface_v2 body;
  895. } *cmd2;
  896. if (likely(res->id != -1))
  897. return 0;
  898. vmw_fifo_resource_inc(dev_priv);
  899. ret = vmw_resource_alloc_id(res);
  900. if (unlikely(ret != 0)) {
  901. DRM_ERROR("Failed to allocate a surface id.\n");
  902. goto out_no_id;
  903. }
  904. if (unlikely(res->id >= VMWGFX_NUM_GB_SURFACE)) {
  905. ret = -EBUSY;
  906. goto out_no_fifo;
  907. }
  908. if (srf->array_size > 0) {
  909. /* has_dx checked on creation time. */
  910. cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V2;
  911. cmd_len = sizeof(cmd2->body);
  912. submit_len = sizeof(*cmd2);
  913. } else {
  914. cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE;
  915. cmd_len = sizeof(cmd->body);
  916. submit_len = sizeof(*cmd);
  917. }
  918. cmd = vmw_fifo_reserve(dev_priv, submit_len);
  919. cmd2 = (typeof(cmd2))cmd;
  920. if (unlikely(!cmd)) {
  921. DRM_ERROR("Failed reserving FIFO space for surface "
  922. "creation.\n");
  923. ret = -ENOMEM;
  924. goto out_no_fifo;
  925. }
  926. if (srf->array_size > 0) {
  927. cmd2->header.id = cmd_id;
  928. cmd2->header.size = cmd_len;
  929. cmd2->body.sid = srf->res.id;
  930. cmd2->body.surfaceFlags = srf->flags;
  931. cmd2->body.format = cpu_to_le32(srf->format);
  932. cmd2->body.numMipLevels = srf->mip_levels[0];
  933. cmd2->body.multisampleCount = srf->multisample_count;
  934. cmd2->body.autogenFilter = srf->autogen_filter;
  935. cmd2->body.size.width = srf->base_size.width;
  936. cmd2->body.size.height = srf->base_size.height;
  937. cmd2->body.size.depth = srf->base_size.depth;
  938. cmd2->body.arraySize = srf->array_size;
  939. } else {
  940. cmd->header.id = cmd_id;
  941. cmd->header.size = cmd_len;
  942. cmd->body.sid = srf->res.id;
  943. cmd->body.surfaceFlags = srf->flags;
  944. cmd->body.format = cpu_to_le32(srf->format);
  945. cmd->body.numMipLevels = srf->mip_levels[0];
  946. cmd->body.multisampleCount = srf->multisample_count;
  947. cmd->body.autogenFilter = srf->autogen_filter;
  948. cmd->body.size.width = srf->base_size.width;
  949. cmd->body.size.height = srf->base_size.height;
  950. cmd->body.size.depth = srf->base_size.depth;
  951. }
  952. vmw_fifo_commit(dev_priv, submit_len);
  953. return 0;
  954. out_no_fifo:
  955. vmw_resource_release_id(res);
  956. out_no_id:
  957. vmw_fifo_resource_dec(dev_priv);
  958. return ret;
  959. }
  960. static int vmw_gb_surface_bind(struct vmw_resource *res,
  961. struct ttm_validate_buffer *val_buf)
  962. {
  963. struct vmw_private *dev_priv = res->dev_priv;
  964. struct {
  965. SVGA3dCmdHeader header;
  966. SVGA3dCmdBindGBSurface body;
  967. } *cmd1;
  968. struct {
  969. SVGA3dCmdHeader header;
  970. SVGA3dCmdUpdateGBSurface body;
  971. } *cmd2;
  972. uint32_t submit_size;
  973. struct ttm_buffer_object *bo = val_buf->bo;
  974. BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
  975. submit_size = sizeof(*cmd1) + (res->backup_dirty ? sizeof(*cmd2) : 0);
  976. cmd1 = vmw_fifo_reserve(dev_priv, submit_size);
  977. if (unlikely(!cmd1)) {
  978. DRM_ERROR("Failed reserving FIFO space for surface "
  979. "binding.\n");
  980. return -ENOMEM;
  981. }
  982. cmd1->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
  983. cmd1->header.size = sizeof(cmd1->body);
  984. cmd1->body.sid = res->id;
  985. cmd1->body.mobid = bo->mem.start;
  986. if (res->backup_dirty) {
  987. cmd2 = (void *) &cmd1[1];
  988. cmd2->header.id = SVGA_3D_CMD_UPDATE_GB_SURFACE;
  989. cmd2->header.size = sizeof(cmd2->body);
  990. cmd2->body.sid = res->id;
  991. res->backup_dirty = false;
  992. }
  993. vmw_fifo_commit(dev_priv, submit_size);
  994. return 0;
  995. }
  996. static int vmw_gb_surface_unbind(struct vmw_resource *res,
  997. bool readback,
  998. struct ttm_validate_buffer *val_buf)
  999. {
  1000. struct vmw_private *dev_priv = res->dev_priv;
  1001. struct ttm_buffer_object *bo = val_buf->bo;
  1002. struct vmw_fence_obj *fence;
  1003. struct {
  1004. SVGA3dCmdHeader header;
  1005. SVGA3dCmdReadbackGBSurface body;
  1006. } *cmd1;
  1007. struct {
  1008. SVGA3dCmdHeader header;
  1009. SVGA3dCmdInvalidateGBSurface body;
  1010. } *cmd2;
  1011. struct {
  1012. SVGA3dCmdHeader header;
  1013. SVGA3dCmdBindGBSurface body;
  1014. } *cmd3;
  1015. uint32_t submit_size;
  1016. uint8_t *cmd;
  1017. BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
  1018. submit_size = sizeof(*cmd3) + (readback ? sizeof(*cmd1) : sizeof(*cmd2));
  1019. cmd = vmw_fifo_reserve(dev_priv, submit_size);
  1020. if (unlikely(!cmd)) {
  1021. DRM_ERROR("Failed reserving FIFO space for surface "
  1022. "unbinding.\n");
  1023. return -ENOMEM;
  1024. }
  1025. if (readback) {
  1026. cmd1 = (void *) cmd;
  1027. cmd1->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE;
  1028. cmd1->header.size = sizeof(cmd1->body);
  1029. cmd1->body.sid = res->id;
  1030. cmd3 = (void *) &cmd1[1];
  1031. } else {
  1032. cmd2 = (void *) cmd;
  1033. cmd2->header.id = SVGA_3D_CMD_INVALIDATE_GB_SURFACE;
  1034. cmd2->header.size = sizeof(cmd2->body);
  1035. cmd2->body.sid = res->id;
  1036. cmd3 = (void *) &cmd2[1];
  1037. }
  1038. cmd3->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
  1039. cmd3->header.size = sizeof(cmd3->body);
  1040. cmd3->body.sid = res->id;
  1041. cmd3->body.mobid = SVGA3D_INVALID_ID;
  1042. vmw_fifo_commit(dev_priv, submit_size);
  1043. /*
  1044. * Create a fence object and fence the backup buffer.
  1045. */
  1046. (void) vmw_execbuf_fence_commands(NULL, dev_priv,
  1047. &fence, NULL);
  1048. vmw_fence_single_bo(val_buf->bo, fence);
  1049. if (likely(fence != NULL))
  1050. vmw_fence_obj_unreference(&fence);
  1051. return 0;
  1052. }
  1053. static int vmw_gb_surface_destroy(struct vmw_resource *res)
  1054. {
  1055. struct vmw_private *dev_priv = res->dev_priv;
  1056. struct vmw_surface *srf = vmw_res_to_srf(res);
  1057. struct {
  1058. SVGA3dCmdHeader header;
  1059. SVGA3dCmdDestroyGBSurface body;
  1060. } *cmd;
  1061. if (likely(res->id == -1))
  1062. return 0;
  1063. mutex_lock(&dev_priv->binding_mutex);
  1064. vmw_view_surface_list_destroy(dev_priv, &srf->view_list);
  1065. vmw_binding_res_list_scrub(&res->binding_head);
  1066. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  1067. if (unlikely(!cmd)) {
  1068. DRM_ERROR("Failed reserving FIFO space for surface "
  1069. "destruction.\n");
  1070. mutex_unlock(&dev_priv->binding_mutex);
  1071. return -ENOMEM;
  1072. }
  1073. cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SURFACE;
  1074. cmd->header.size = sizeof(cmd->body);
  1075. cmd->body.sid = res->id;
  1076. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  1077. mutex_unlock(&dev_priv->binding_mutex);
  1078. vmw_resource_release_id(res);
  1079. vmw_fifo_resource_dec(dev_priv);
  1080. return 0;
  1081. }
  1082. /**
  1083. * vmw_gb_surface_define_ioctl - Ioctl function implementing
  1084. * the user surface define functionality.
  1085. *
  1086. * @dev: Pointer to a struct drm_device.
  1087. * @data: Pointer to data copied from / to user-space.
  1088. * @file_priv: Pointer to a drm file private structure.
  1089. */
  1090. int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data,
  1091. struct drm_file *file_priv)
  1092. {
  1093. struct vmw_private *dev_priv = vmw_priv(dev);
  1094. struct vmw_user_surface *user_srf;
  1095. struct vmw_surface *srf;
  1096. struct vmw_resource *res;
  1097. struct vmw_resource *tmp;
  1098. union drm_vmw_gb_surface_create_arg *arg =
  1099. (union drm_vmw_gb_surface_create_arg *)data;
  1100. struct drm_vmw_gb_surface_create_req *req = &arg->req;
  1101. struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
  1102. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  1103. int ret;
  1104. uint32_t size;
  1105. uint32_t backup_handle = 0;
  1106. if (req->multisample_count != 0)
  1107. return -EINVAL;
  1108. if (req->mip_levels > DRM_VMW_MAX_MIP_LEVELS)
  1109. return -EINVAL;
  1110. if (unlikely(vmw_user_surface_size == 0))
  1111. vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
  1112. 128;
  1113. size = vmw_user_surface_size + 128;
  1114. /* Define a surface based on the parameters. */
  1115. ret = vmw_surface_gb_priv_define(dev,
  1116. size,
  1117. req->svga3d_flags,
  1118. req->format,
  1119. req->drm_surface_flags & drm_vmw_surface_flag_scanout,
  1120. req->mip_levels,
  1121. req->multisample_count,
  1122. req->array_size,
  1123. req->base_size,
  1124. &srf);
  1125. if (unlikely(ret != 0))
  1126. return ret;
  1127. user_srf = container_of(srf, struct vmw_user_surface, srf);
  1128. if (drm_is_primary_client(file_priv))
  1129. user_srf->master = drm_master_get(file_priv->master);
  1130. ret = ttm_read_lock(&dev_priv->reservation_sem, true);
  1131. if (unlikely(ret != 0))
  1132. return ret;
  1133. res = &user_srf->srf.res;
  1134. if (req->buffer_handle != SVGA3D_INVALID_ID) {
  1135. ret = vmw_user_bo_lookup(tfile, req->buffer_handle,
  1136. &res->backup,
  1137. &user_srf->backup_base);
  1138. if (ret == 0) {
  1139. if (res->backup->base.num_pages * PAGE_SIZE <
  1140. res->backup_size) {
  1141. DRM_ERROR("Surface backup buffer is too small.\n");
  1142. vmw_bo_unreference(&res->backup);
  1143. ret = -EINVAL;
  1144. goto out_unlock;
  1145. } else {
  1146. backup_handle = req->buffer_handle;
  1147. }
  1148. }
  1149. } else if (req->drm_surface_flags & drm_vmw_surface_flag_create_buffer)
  1150. ret = vmw_user_bo_alloc(dev_priv, tfile,
  1151. res->backup_size,
  1152. req->drm_surface_flags &
  1153. drm_vmw_surface_flag_shareable,
  1154. &backup_handle,
  1155. &res->backup,
  1156. &user_srf->backup_base);
  1157. if (unlikely(ret != 0)) {
  1158. vmw_resource_unreference(&res);
  1159. goto out_unlock;
  1160. }
  1161. tmp = vmw_resource_reference(res);
  1162. ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
  1163. req->drm_surface_flags &
  1164. drm_vmw_surface_flag_shareable,
  1165. VMW_RES_SURFACE,
  1166. &vmw_user_surface_base_release, NULL);
  1167. if (unlikely(ret != 0)) {
  1168. vmw_resource_unreference(&tmp);
  1169. vmw_resource_unreference(&res);
  1170. goto out_unlock;
  1171. }
  1172. rep->handle = user_srf->prime.base.hash.key;
  1173. rep->backup_size = res->backup_size;
  1174. if (res->backup) {
  1175. rep->buffer_map_handle =
  1176. drm_vma_node_offset_addr(&res->backup->base.vma_node);
  1177. rep->buffer_size = res->backup->base.num_pages * PAGE_SIZE;
  1178. rep->buffer_handle = backup_handle;
  1179. } else {
  1180. rep->buffer_map_handle = 0;
  1181. rep->buffer_size = 0;
  1182. rep->buffer_handle = SVGA3D_INVALID_ID;
  1183. }
  1184. vmw_resource_unreference(&res);
  1185. out_unlock:
  1186. ttm_read_unlock(&dev_priv->reservation_sem);
  1187. return ret;
  1188. }
  1189. /**
  1190. * vmw_gb_surface_reference_ioctl - Ioctl function implementing
  1191. * the user surface reference functionality.
  1192. *
  1193. * @dev: Pointer to a struct drm_device.
  1194. * @data: Pointer to data copied from / to user-space.
  1195. * @file_priv: Pointer to a drm file private structure.
  1196. */
  1197. int vmw_gb_surface_reference_ioctl(struct drm_device *dev, void *data,
  1198. struct drm_file *file_priv)
  1199. {
  1200. struct vmw_private *dev_priv = vmw_priv(dev);
  1201. union drm_vmw_gb_surface_reference_arg *arg =
  1202. (union drm_vmw_gb_surface_reference_arg *)data;
  1203. struct drm_vmw_surface_arg *req = &arg->req;
  1204. struct drm_vmw_gb_surface_ref_rep *rep = &arg->rep;
  1205. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  1206. struct vmw_surface *srf;
  1207. struct vmw_user_surface *user_srf;
  1208. struct ttm_base_object *base;
  1209. uint32_t backup_handle;
  1210. int ret = -EINVAL;
  1211. ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
  1212. req->handle_type, &base);
  1213. if (unlikely(ret != 0))
  1214. return ret;
  1215. user_srf = container_of(base, struct vmw_user_surface, prime.base);
  1216. srf = &user_srf->srf;
  1217. if (!srf->res.backup) {
  1218. DRM_ERROR("Shared GB surface is missing a backup buffer.\n");
  1219. goto out_bad_resource;
  1220. }
  1221. mutex_lock(&dev_priv->cmdbuf_mutex); /* Protect res->backup */
  1222. ret = vmw_user_bo_reference(tfile, srf->res.backup, &backup_handle);
  1223. mutex_unlock(&dev_priv->cmdbuf_mutex);
  1224. if (unlikely(ret != 0)) {
  1225. DRM_ERROR("Could not add a reference to a GB surface "
  1226. "backup buffer.\n");
  1227. (void) ttm_ref_object_base_unref(tfile, base->hash.key,
  1228. TTM_REF_USAGE);
  1229. goto out_bad_resource;
  1230. }
  1231. rep->creq.svga3d_flags = srf->flags;
  1232. rep->creq.format = srf->format;
  1233. rep->creq.mip_levels = srf->mip_levels[0];
  1234. rep->creq.drm_surface_flags = 0;
  1235. rep->creq.multisample_count = srf->multisample_count;
  1236. rep->creq.autogen_filter = srf->autogen_filter;
  1237. rep->creq.array_size = srf->array_size;
  1238. rep->creq.buffer_handle = backup_handle;
  1239. rep->creq.base_size = srf->base_size;
  1240. rep->crep.handle = user_srf->prime.base.hash.key;
  1241. rep->crep.backup_size = srf->res.backup_size;
  1242. rep->crep.buffer_handle = backup_handle;
  1243. rep->crep.buffer_map_handle =
  1244. drm_vma_node_offset_addr(&srf->res.backup->base.vma_node);
  1245. rep->crep.buffer_size = srf->res.backup->base.num_pages * PAGE_SIZE;
  1246. out_bad_resource:
  1247. ttm_base_object_unref(&base);
  1248. return ret;
  1249. }
  1250. /**
  1251. * vmw_surface_gb_priv_define - Define a private GB surface
  1252. *
  1253. * @dev: Pointer to a struct drm_device
  1254. * @user_accounting_size: Used to track user-space memory usage, set
  1255. * to 0 for kernel mode only memory
  1256. * @svga3d_flags: SVGA3d surface flags for the device
  1257. * @format: requested surface format
  1258. * @for_scanout: true if inteded to be used for scanout buffer
  1259. * @num_mip_levels: number of MIP levels
  1260. * @multisample_count:
  1261. * @array_size: Surface array size.
  1262. * @size: width, heigh, depth of the surface requested
  1263. * @user_srf_out: allocated user_srf. Set to NULL on failure.
  1264. *
  1265. * GB surfaces allocated by this function will not have a user mode handle, and
  1266. * thus will only be visible to vmwgfx. For optimization reasons the
  1267. * surface may later be given a user mode handle by another function to make
  1268. * it available to user mode drivers.
  1269. */
  1270. int vmw_surface_gb_priv_define(struct drm_device *dev,
  1271. uint32_t user_accounting_size,
  1272. uint32_t svga3d_flags,
  1273. SVGA3dSurfaceFormat format,
  1274. bool for_scanout,
  1275. uint32_t num_mip_levels,
  1276. uint32_t multisample_count,
  1277. uint32_t array_size,
  1278. struct drm_vmw_size size,
  1279. struct vmw_surface **srf_out)
  1280. {
  1281. struct vmw_private *dev_priv = vmw_priv(dev);
  1282. struct vmw_user_surface *user_srf;
  1283. struct ttm_operation_ctx ctx = {
  1284. .interruptible = true,
  1285. .no_wait_gpu = false
  1286. };
  1287. struct vmw_surface *srf;
  1288. int ret;
  1289. u32 num_layers;
  1290. *srf_out = NULL;
  1291. if (for_scanout) {
  1292. uint32_t max_width, max_height;
  1293. if (!svga3dsurface_is_screen_target_format(format)) {
  1294. DRM_ERROR("Invalid Screen Target surface format.");
  1295. return -EINVAL;
  1296. }
  1297. max_width = min(dev_priv->texture_max_width,
  1298. dev_priv->stdu_max_width);
  1299. max_height = min(dev_priv->texture_max_height,
  1300. dev_priv->stdu_max_height);
  1301. if (size.width > max_width || size.height > max_height) {
  1302. DRM_ERROR("%ux%u\n, exceeds max surface size %ux%u",
  1303. size.width, size.height,
  1304. max_width, max_height);
  1305. return -EINVAL;
  1306. }
  1307. } else {
  1308. const struct svga3d_surface_desc *desc;
  1309. desc = svga3dsurface_get_desc(format);
  1310. if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
  1311. DRM_ERROR("Invalid surface format.\n");
  1312. return -EINVAL;
  1313. }
  1314. }
  1315. /* array_size must be null for non-GL3 host. */
  1316. if (array_size > 0 && !dev_priv->has_dx) {
  1317. DRM_ERROR("Tried to create DX surface on non-DX host.\n");
  1318. return -EINVAL;
  1319. }
  1320. ret = ttm_read_lock(&dev_priv->reservation_sem, true);
  1321. if (unlikely(ret != 0))
  1322. return ret;
  1323. ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
  1324. user_accounting_size, &ctx);
  1325. if (unlikely(ret != 0)) {
  1326. if (ret != -ERESTARTSYS)
  1327. DRM_ERROR("Out of graphics memory for surface"
  1328. " creation.\n");
  1329. goto out_unlock;
  1330. }
  1331. user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
  1332. if (unlikely(!user_srf)) {
  1333. ret = -ENOMEM;
  1334. goto out_no_user_srf;
  1335. }
  1336. *srf_out = &user_srf->srf;
  1337. user_srf->size = user_accounting_size;
  1338. user_srf->prime.base.shareable = false;
  1339. user_srf->prime.base.tfile = NULL;
  1340. srf = &user_srf->srf;
  1341. srf->flags = svga3d_flags;
  1342. srf->format = format;
  1343. srf->scanout = for_scanout;
  1344. srf->mip_levels[0] = num_mip_levels;
  1345. srf->num_sizes = 1;
  1346. srf->sizes = NULL;
  1347. srf->offsets = NULL;
  1348. srf->base_size = size;
  1349. srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
  1350. srf->array_size = array_size;
  1351. srf->multisample_count = multisample_count;
  1352. if (array_size)
  1353. num_layers = array_size;
  1354. else if (svga3d_flags & SVGA3D_SURFACE_CUBEMAP)
  1355. num_layers = SVGA3D_MAX_SURFACE_FACES;
  1356. else
  1357. num_layers = 1;
  1358. srf->res.backup_size =
  1359. svga3dsurface_get_serialized_size(srf->format,
  1360. srf->base_size,
  1361. srf->mip_levels[0],
  1362. num_layers);
  1363. if (srf->flags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT)
  1364. srf->res.backup_size += sizeof(SVGA3dDXSOState);
  1365. if (dev_priv->active_display_unit == vmw_du_screen_target &&
  1366. for_scanout)
  1367. srf->flags |= SVGA3D_SURFACE_SCREENTARGET;
  1368. /*
  1369. * From this point, the generic resource management functions
  1370. * destroy the object on failure.
  1371. */
  1372. ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
  1373. ttm_read_unlock(&dev_priv->reservation_sem);
  1374. return ret;
  1375. out_no_user_srf:
  1376. ttm_mem_global_free(vmw_mem_glob(dev_priv), user_accounting_size);
  1377. out_unlock:
  1378. ttm_read_unlock(&dev_priv->reservation_sem);
  1379. return ret;
  1380. }