imx6ul_tsc.c 13 KB

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  1. /*
  2. * Freescale i.MX6UL touchscreen controller driver
  3. *
  4. * Copyright (C) 2015 Freescale Semiconductor, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/errno.h>
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/gpio/consumer.h>
  14. #include <linux/input.h>
  15. #include <linux/slab.h>
  16. #include <linux/completion.h>
  17. #include <linux/delay.h>
  18. #include <linux/of.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/clk.h>
  22. #include <linux/io.h>
  23. /* ADC configuration registers field define */
  24. #define ADC_AIEN (0x1 << 7)
  25. #define ADC_CONV_DISABLE 0x1F
  26. #define ADC_CAL (0x1 << 7)
  27. #define ADC_CALF 0x2
  28. #define ADC_12BIT_MODE (0x2 << 2)
  29. #define ADC_IPG_CLK 0x00
  30. #define ADC_CLK_DIV_8 (0x03 << 5)
  31. #define ADC_SHORT_SAMPLE_MODE (0x0 << 4)
  32. #define ADC_HARDWARE_TRIGGER (0x1 << 13)
  33. #define SELECT_CHANNEL_4 0x04
  34. #define SELECT_CHANNEL_1 0x01
  35. #define DISABLE_CONVERSION_INT (0x0 << 7)
  36. /* ADC registers */
  37. #define REG_ADC_HC0 0x00
  38. #define REG_ADC_HC1 0x04
  39. #define REG_ADC_HC2 0x08
  40. #define REG_ADC_HC3 0x0C
  41. #define REG_ADC_HC4 0x10
  42. #define REG_ADC_HS 0x14
  43. #define REG_ADC_R0 0x18
  44. #define REG_ADC_CFG 0x2C
  45. #define REG_ADC_GC 0x30
  46. #define REG_ADC_GS 0x34
  47. #define ADC_TIMEOUT msecs_to_jiffies(100)
  48. /* TSC registers */
  49. #define REG_TSC_BASIC_SETING 0x00
  50. #define REG_TSC_PRE_CHARGE_TIME 0x10
  51. #define REG_TSC_FLOW_CONTROL 0x20
  52. #define REG_TSC_MEASURE_VALUE 0x30
  53. #define REG_TSC_INT_EN 0x40
  54. #define REG_TSC_INT_SIG_EN 0x50
  55. #define REG_TSC_INT_STATUS 0x60
  56. #define REG_TSC_DEBUG_MODE 0x70
  57. #define REG_TSC_DEBUG_MODE2 0x80
  58. /* TSC configuration registers field define */
  59. #define DETECT_4_WIRE_MODE (0x0 << 4)
  60. #define AUTO_MEASURE 0x1
  61. #define MEASURE_SIGNAL 0x1
  62. #define DETECT_SIGNAL (0x1 << 4)
  63. #define VALID_SIGNAL (0x1 << 8)
  64. #define MEASURE_INT_EN 0x1
  65. #define MEASURE_SIG_EN 0x1
  66. #define VALID_SIG_EN (0x1 << 8)
  67. #define DE_GLITCH_2 (0x2 << 29)
  68. #define START_SENSE (0x1 << 12)
  69. #define TSC_DISABLE (0x1 << 16)
  70. #define DETECT_MODE 0x2
  71. struct imx6ul_tsc {
  72. struct device *dev;
  73. struct input_dev *input;
  74. void __iomem *tsc_regs;
  75. void __iomem *adc_regs;
  76. struct clk *tsc_clk;
  77. struct clk *adc_clk;
  78. struct gpio_desc *xnur_gpio;
  79. int measure_delay_time;
  80. int pre_charge_time;
  81. struct completion completion;
  82. };
  83. /*
  84. * TSC module need ADC to get the measure value. So
  85. * before config TSC, we should initialize ADC module.
  86. */
  87. static void imx6ul_adc_init(struct imx6ul_tsc *tsc)
  88. {
  89. int adc_hc = 0;
  90. int adc_gc;
  91. int adc_gs;
  92. int adc_cfg;
  93. int timeout;
  94. reinit_completion(&tsc->completion);
  95. adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
  96. adc_cfg |= ADC_12BIT_MODE | ADC_IPG_CLK;
  97. adc_cfg |= ADC_CLK_DIV_8 | ADC_SHORT_SAMPLE_MODE;
  98. adc_cfg &= ~ADC_HARDWARE_TRIGGER;
  99. writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
  100. /* enable calibration interrupt */
  101. adc_hc |= ADC_AIEN;
  102. adc_hc |= ADC_CONV_DISABLE;
  103. writel(adc_hc, tsc->adc_regs + REG_ADC_HC0);
  104. /* start ADC calibration */
  105. adc_gc = readl(tsc->adc_regs + REG_ADC_GC);
  106. adc_gc |= ADC_CAL;
  107. writel(adc_gc, tsc->adc_regs + REG_ADC_GC);
  108. timeout = wait_for_completion_timeout
  109. (&tsc->completion, ADC_TIMEOUT);
  110. if (timeout == 0)
  111. dev_err(tsc->dev, "Timeout for adc calibration\n");
  112. adc_gs = readl(tsc->adc_regs + REG_ADC_GS);
  113. if (adc_gs & ADC_CALF)
  114. dev_err(tsc->dev, "ADC calibration failed\n");
  115. /* TSC need the ADC work in hardware trigger */
  116. adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
  117. adc_cfg |= ADC_HARDWARE_TRIGGER;
  118. writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
  119. }
  120. /*
  121. * This is a TSC workaround. Currently TSC misconnect two
  122. * ADC channels, this function remap channel configure for
  123. * hardware trigger.
  124. */
  125. static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc)
  126. {
  127. int adc_hc0, adc_hc1, adc_hc2, adc_hc3, adc_hc4;
  128. adc_hc0 = DISABLE_CONVERSION_INT;
  129. writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0);
  130. adc_hc1 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_4;
  131. writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1);
  132. adc_hc2 = DISABLE_CONVERSION_INT;
  133. writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2);
  134. adc_hc3 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_1;
  135. writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3);
  136. adc_hc4 = DISABLE_CONVERSION_INT;
  137. writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4);
  138. }
  139. /*
  140. * TSC setting, confige the pre-charge time and measure delay time.
  141. * different touch screen may need different pre-charge time and
  142. * measure delay time.
  143. */
  144. static void imx6ul_tsc_set(struct imx6ul_tsc *tsc)
  145. {
  146. int basic_setting = 0;
  147. int start;
  148. basic_setting |= tsc->measure_delay_time << 8;
  149. basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE;
  150. writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETING);
  151. writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
  152. writel(tsc->pre_charge_time, tsc->tsc_regs + REG_TSC_PRE_CHARGE_TIME);
  153. writel(MEASURE_INT_EN, tsc->tsc_regs + REG_TSC_INT_EN);
  154. writel(MEASURE_SIG_EN | VALID_SIG_EN,
  155. tsc->tsc_regs + REG_TSC_INT_SIG_EN);
  156. /* start sense detection */
  157. start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  158. start |= START_SENSE;
  159. start &= ~TSC_DISABLE;
  160. writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  161. }
  162. static void imx6ul_tsc_init(struct imx6ul_tsc *tsc)
  163. {
  164. imx6ul_adc_init(tsc);
  165. imx6ul_tsc_channel_config(tsc);
  166. imx6ul_tsc_set(tsc);
  167. }
  168. static void imx6ul_tsc_disable(struct imx6ul_tsc *tsc)
  169. {
  170. int tsc_flow;
  171. int adc_cfg;
  172. /* TSC controller enters to idle status */
  173. tsc_flow = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  174. tsc_flow |= TSC_DISABLE;
  175. writel(tsc_flow, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  176. /* ADC controller enters to stop mode */
  177. adc_cfg = readl(tsc->adc_regs + REG_ADC_HC0);
  178. adc_cfg |= ADC_CONV_DISABLE;
  179. writel(adc_cfg, tsc->adc_regs + REG_ADC_HC0);
  180. }
  181. /* Delay some time (max 2ms), wait the pre-charge done. */
  182. static bool tsc_wait_detect_mode(struct imx6ul_tsc *tsc)
  183. {
  184. unsigned long timeout = jiffies + msecs_to_jiffies(2);
  185. int state_machine;
  186. int debug_mode2;
  187. do {
  188. if (time_after(jiffies, timeout))
  189. return false;
  190. usleep_range(200, 400);
  191. debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
  192. state_machine = (debug_mode2 >> 20) & 0x7;
  193. } while (state_machine != DETECT_MODE);
  194. usleep_range(200, 400);
  195. return true;
  196. }
  197. static irqreturn_t tsc_irq_fn(int irq, void *dev_id)
  198. {
  199. struct imx6ul_tsc *tsc = dev_id;
  200. int status;
  201. int value;
  202. int x, y;
  203. int start;
  204. status = readl(tsc->tsc_regs + REG_TSC_INT_STATUS);
  205. /* write 1 to clear the bit measure-signal */
  206. writel(MEASURE_SIGNAL | DETECT_SIGNAL,
  207. tsc->tsc_regs + REG_TSC_INT_STATUS);
  208. /* It's a HW self-clean bit. Set this bit and start sense detection */
  209. start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  210. start |= START_SENSE;
  211. writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  212. if (status & MEASURE_SIGNAL) {
  213. value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE);
  214. x = (value >> 16) & 0x0fff;
  215. y = value & 0x0fff;
  216. /*
  217. * In detect mode, we can get the xnur gpio value,
  218. * otherwise assume contact is stiull active.
  219. */
  220. if (!tsc_wait_detect_mode(tsc) ||
  221. gpiod_get_value_cansleep(tsc->xnur_gpio)) {
  222. input_report_key(tsc->input, BTN_TOUCH, 1);
  223. input_report_abs(tsc->input, ABS_X, x);
  224. input_report_abs(tsc->input, ABS_Y, y);
  225. } else {
  226. input_report_key(tsc->input, BTN_TOUCH, 0);
  227. }
  228. input_sync(tsc->input);
  229. }
  230. return IRQ_HANDLED;
  231. }
  232. static irqreturn_t adc_irq_fn(int irq, void *dev_id)
  233. {
  234. struct imx6ul_tsc *tsc = dev_id;
  235. int coco;
  236. int value;
  237. coco = readl(tsc->adc_regs + REG_ADC_HS);
  238. if (coco & 0x01) {
  239. value = readl(tsc->adc_regs + REG_ADC_R0);
  240. complete(&tsc->completion);
  241. }
  242. return IRQ_HANDLED;
  243. }
  244. static int imx6ul_tsc_open(struct input_dev *input_dev)
  245. {
  246. struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
  247. int err;
  248. err = clk_prepare_enable(tsc->adc_clk);
  249. if (err) {
  250. dev_err(tsc->dev,
  251. "Could not prepare or enable the adc clock: %d\n",
  252. err);
  253. return err;
  254. }
  255. err = clk_prepare_enable(tsc->tsc_clk);
  256. if (err) {
  257. dev_err(tsc->dev,
  258. "Could not prepare or enable the tsc clock: %d\n",
  259. err);
  260. clk_disable_unprepare(tsc->adc_clk);
  261. return err;
  262. }
  263. imx6ul_tsc_init(tsc);
  264. return 0;
  265. }
  266. static void imx6ul_tsc_close(struct input_dev *input_dev)
  267. {
  268. struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
  269. imx6ul_tsc_disable(tsc);
  270. clk_disable_unprepare(tsc->tsc_clk);
  271. clk_disable_unprepare(tsc->adc_clk);
  272. }
  273. static int imx6ul_tsc_probe(struct platform_device *pdev)
  274. {
  275. struct device_node *np = pdev->dev.of_node;
  276. struct imx6ul_tsc *tsc;
  277. struct input_dev *input_dev;
  278. struct resource *tsc_mem;
  279. struct resource *adc_mem;
  280. int err;
  281. int tsc_irq;
  282. int adc_irq;
  283. tsc = devm_kzalloc(&pdev->dev, sizeof(struct imx6ul_tsc), GFP_KERNEL);
  284. if (!tsc)
  285. return -ENOMEM;
  286. input_dev = devm_input_allocate_device(&pdev->dev);
  287. if (!input_dev)
  288. return -ENOMEM;
  289. input_dev->name = "iMX6UL TouchScreen Controller";
  290. input_dev->id.bustype = BUS_HOST;
  291. input_dev->open = imx6ul_tsc_open;
  292. input_dev->close = imx6ul_tsc_close;
  293. input_set_capability(input_dev, EV_KEY, BTN_TOUCH);
  294. input_set_abs_params(input_dev, ABS_X, 0, 0xFFF, 0, 0);
  295. input_set_abs_params(input_dev, ABS_Y, 0, 0xFFF, 0, 0);
  296. input_set_drvdata(input_dev, tsc);
  297. tsc->dev = &pdev->dev;
  298. tsc->input = input_dev;
  299. init_completion(&tsc->completion);
  300. tsc->xnur_gpio = devm_gpiod_get(&pdev->dev, "xnur", GPIOD_IN);
  301. if (IS_ERR(tsc->xnur_gpio)) {
  302. err = PTR_ERR(tsc->xnur_gpio);
  303. dev_err(&pdev->dev,
  304. "failed to request GPIO tsc_X- (xnur): %d\n", err);
  305. return err;
  306. }
  307. tsc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  308. tsc->tsc_regs = devm_ioremap_resource(&pdev->dev, tsc_mem);
  309. if (IS_ERR(tsc->tsc_regs)) {
  310. err = PTR_ERR(tsc->tsc_regs);
  311. dev_err(&pdev->dev, "failed to remap tsc memory: %d\n", err);
  312. return err;
  313. }
  314. adc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  315. tsc->adc_regs = devm_ioremap_resource(&pdev->dev, adc_mem);
  316. if (IS_ERR(tsc->adc_regs)) {
  317. err = PTR_ERR(tsc->adc_regs);
  318. dev_err(&pdev->dev, "failed to remap adc memory: %d\n", err);
  319. return err;
  320. }
  321. tsc->tsc_clk = devm_clk_get(&pdev->dev, "tsc");
  322. if (IS_ERR(tsc->tsc_clk)) {
  323. err = PTR_ERR(tsc->tsc_clk);
  324. dev_err(&pdev->dev, "failed getting tsc clock: %d\n", err);
  325. return err;
  326. }
  327. tsc->adc_clk = devm_clk_get(&pdev->dev, "adc");
  328. if (IS_ERR(tsc->adc_clk)) {
  329. err = PTR_ERR(tsc->adc_clk);
  330. dev_err(&pdev->dev, "failed getting adc clock: %d\n", err);
  331. return err;
  332. }
  333. tsc_irq = platform_get_irq(pdev, 0);
  334. if (tsc_irq < 0) {
  335. dev_err(&pdev->dev, "no tsc irq resource?\n");
  336. return tsc_irq;
  337. }
  338. adc_irq = platform_get_irq(pdev, 1);
  339. if (adc_irq <= 0) {
  340. dev_err(&pdev->dev, "no adc irq resource?\n");
  341. return adc_irq;
  342. }
  343. err = devm_request_threaded_irq(tsc->dev, tsc_irq,
  344. NULL, tsc_irq_fn, IRQF_ONESHOT,
  345. dev_name(&pdev->dev), tsc);
  346. if (err) {
  347. dev_err(&pdev->dev,
  348. "failed requesting tsc irq %d: %d\n",
  349. tsc_irq, err);
  350. return err;
  351. }
  352. err = devm_request_irq(tsc->dev, adc_irq, adc_irq_fn, 0,
  353. dev_name(&pdev->dev), tsc);
  354. if (err) {
  355. dev_err(&pdev->dev,
  356. "failed requesting adc irq %d: %d\n",
  357. adc_irq, err);
  358. return err;
  359. }
  360. err = of_property_read_u32(np, "measure-delay-time",
  361. &tsc->measure_delay_time);
  362. if (err)
  363. tsc->measure_delay_time = 0xffff;
  364. err = of_property_read_u32(np, "pre-charge-time",
  365. &tsc->pre_charge_time);
  366. if (err)
  367. tsc->pre_charge_time = 0xfff;
  368. err = input_register_device(tsc->input);
  369. if (err) {
  370. dev_err(&pdev->dev,
  371. "failed to register input device: %d\n", err);
  372. return err;
  373. }
  374. platform_set_drvdata(pdev, tsc);
  375. return 0;
  376. }
  377. static int __maybe_unused imx6ul_tsc_suspend(struct device *dev)
  378. {
  379. struct platform_device *pdev = to_platform_device(dev);
  380. struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
  381. struct input_dev *input_dev = tsc->input;
  382. mutex_lock(&input_dev->mutex);
  383. if (input_dev->users) {
  384. imx6ul_tsc_disable(tsc);
  385. clk_disable_unprepare(tsc->tsc_clk);
  386. clk_disable_unprepare(tsc->adc_clk);
  387. }
  388. mutex_unlock(&input_dev->mutex);
  389. return 0;
  390. }
  391. static int __maybe_unused imx6ul_tsc_resume(struct device *dev)
  392. {
  393. struct platform_device *pdev = to_platform_device(dev);
  394. struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
  395. struct input_dev *input_dev = tsc->input;
  396. int retval = 0;
  397. mutex_lock(&input_dev->mutex);
  398. if (input_dev->users) {
  399. retval = clk_prepare_enable(tsc->adc_clk);
  400. if (retval)
  401. goto out;
  402. retval = clk_prepare_enable(tsc->tsc_clk);
  403. if (retval) {
  404. clk_disable_unprepare(tsc->adc_clk);
  405. goto out;
  406. }
  407. imx6ul_tsc_init(tsc);
  408. }
  409. out:
  410. mutex_unlock(&input_dev->mutex);
  411. return retval;
  412. }
  413. static SIMPLE_DEV_PM_OPS(imx6ul_tsc_pm_ops,
  414. imx6ul_tsc_suspend, imx6ul_tsc_resume);
  415. static const struct of_device_id imx6ul_tsc_match[] = {
  416. { .compatible = "fsl,imx6ul-tsc", },
  417. { /* sentinel */ }
  418. };
  419. MODULE_DEVICE_TABLE(of, imx6ul_tsc_match);
  420. static struct platform_driver imx6ul_tsc_driver = {
  421. .driver = {
  422. .name = "imx6ul-tsc",
  423. .of_match_table = imx6ul_tsc_match,
  424. .pm = &imx6ul_tsc_pm_ops,
  425. },
  426. .probe = imx6ul_tsc_probe,
  427. };
  428. module_platform_driver(imx6ul_tsc_driver);
  429. MODULE_AUTHOR("Haibo Chen <haibo.chen@freescale.com>");
  430. MODULE_DESCRIPTION("Freescale i.MX6UL Touchscreen controller driver");
  431. MODULE_LICENSE("GPL v2");