intel_th.h 9.7 KB

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  1. /*
  2. * Intel(R) Trace Hub data structures
  3. *
  4. * Copyright (C) 2014-2015 Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. */
  15. #ifndef __INTEL_TH_H__
  16. #define __INTEL_TH_H__
  17. /* intel_th_device device types */
  18. enum {
  19. /* Devices that generate trace data */
  20. INTEL_TH_SOURCE = 0,
  21. /* Output ports (MSC, PTI) */
  22. INTEL_TH_OUTPUT,
  23. /* Switch, the Global Trace Hub (GTH) */
  24. INTEL_TH_SWITCH,
  25. };
  26. /**
  27. * struct intel_th_output - descriptor INTEL_TH_OUTPUT type devices
  28. * @port: output port number, assigned by the switch
  29. * @type: GTH_{MSU,CTP,PTI}
  30. * @scratchpad: scratchpad bits to flag when this output is enabled
  31. * @multiblock: true for multiblock output configuration
  32. * @active: true when this output is enabled
  33. *
  34. * Output port descriptor, used by switch driver to tell which output
  35. * port this output device corresponds to. Filled in at output device's
  36. * probe time by switch::assign(). Passed from output device driver to
  37. * switch related code to enable/disable its port.
  38. */
  39. struct intel_th_output {
  40. int port;
  41. unsigned int type;
  42. unsigned int scratchpad;
  43. bool multiblock;
  44. bool active;
  45. };
  46. /**
  47. * struct intel_th_device - device on the intel_th bus
  48. * @dev: device
  49. * @resource: array of resources available to this device
  50. * @num_resources: number of resources in @resource array
  51. * @type: INTEL_TH_{SOURCE,OUTPUT,SWITCH}
  52. * @id: device instance or -1
  53. * @host_mode: Intel TH is controlled by an external debug host
  54. * @output: output descriptor for INTEL_TH_OUTPUT devices
  55. * @name: device name to match the driver
  56. */
  57. struct intel_th_device {
  58. struct device dev;
  59. struct resource *resource;
  60. unsigned int num_resources;
  61. unsigned int type;
  62. int id;
  63. /* INTEL_TH_SWITCH specific */
  64. bool host_mode;
  65. /* INTEL_TH_OUTPUT specific */
  66. struct intel_th_output output;
  67. char name[];
  68. };
  69. #define to_intel_th_device(_d) \
  70. container_of((_d), struct intel_th_device, dev)
  71. /**
  72. * intel_th_device_get_resource() - obtain @num'th resource of type @type
  73. * @thdev: the device to search the resource for
  74. * @type: resource type
  75. * @num: number of the resource
  76. */
  77. static inline struct resource *
  78. intel_th_device_get_resource(struct intel_th_device *thdev, unsigned int type,
  79. unsigned int num)
  80. {
  81. int i;
  82. for (i = 0; i < thdev->num_resources; i++)
  83. if (resource_type(&thdev->resource[i]) == type && !num--)
  84. return &thdev->resource[i];
  85. return NULL;
  86. }
  87. /*
  88. * GTH, output ports configuration
  89. */
  90. enum {
  91. GTH_NONE = 0,
  92. GTH_MSU, /* memory/usb */
  93. GTH_CTP, /* Common Trace Port */
  94. GTH_LPP, /* Low Power Path */
  95. GTH_PTI, /* MIPI-PTI */
  96. };
  97. /**
  98. * intel_th_output_assigned() - if an output device is assigned to a switch port
  99. * @thdev: the output device
  100. *
  101. * Return: true if the device is INTEL_TH_OUTPUT *and* is assigned a port
  102. */
  103. static inline bool
  104. intel_th_output_assigned(struct intel_th_device *thdev)
  105. {
  106. return thdev->type == INTEL_TH_OUTPUT &&
  107. (thdev->output.port >= 0 ||
  108. thdev->output.type == GTH_NONE);
  109. }
  110. /**
  111. * struct intel_th_driver - driver for an intel_th_device device
  112. * @driver: generic driver
  113. * @probe: probe method
  114. * @remove: remove method
  115. * @assign: match a given output type device against available outputs
  116. * @unassign: deassociate an output type device from an output port
  117. * @enable: enable tracing for a given output device
  118. * @disable: disable tracing for a given output device
  119. * @irq: interrupt callback
  120. * @activate: enable tracing on the output's side
  121. * @deactivate: disable tracing on the output's side
  122. * @fops: file operations for device nodes
  123. * @attr_group: attributes provided by the driver
  124. *
  125. * Callbacks @probe and @remove are required for all device types.
  126. * Switch device driver needs to fill in @assign, @enable and @disable
  127. * callbacks.
  128. */
  129. struct intel_th_driver {
  130. struct device_driver driver;
  131. int (*probe)(struct intel_th_device *thdev);
  132. void (*remove)(struct intel_th_device *thdev);
  133. /* switch (GTH) ops */
  134. int (*assign)(struct intel_th_device *thdev,
  135. struct intel_th_device *othdev);
  136. void (*unassign)(struct intel_th_device *thdev,
  137. struct intel_th_device *othdev);
  138. void (*enable)(struct intel_th_device *thdev,
  139. struct intel_th_output *output);
  140. void (*disable)(struct intel_th_device *thdev,
  141. struct intel_th_output *output);
  142. /* output ops */
  143. void (*irq)(struct intel_th_device *thdev);
  144. int (*activate)(struct intel_th_device *thdev);
  145. void (*deactivate)(struct intel_th_device *thdev);
  146. /* file_operations for those who want a device node */
  147. const struct file_operations *fops;
  148. /* optional attributes */
  149. struct attribute_group *attr_group;
  150. /* source ops */
  151. int (*set_output)(struct intel_th_device *thdev,
  152. unsigned int master);
  153. };
  154. #define to_intel_th_driver(_d) \
  155. container_of((_d), struct intel_th_driver, driver)
  156. #define to_intel_th_driver_or_null(_d) \
  157. ((_d) ? to_intel_th_driver(_d) : NULL)
  158. /*
  159. * Subdevice tree structure is as follows:
  160. * + struct intel_th device (pci; dev_{get,set}_drvdata()
  161. * + struct intel_th_device INTEL_TH_SWITCH (GTH)
  162. * + struct intel_th_device INTEL_TH_OUTPUT (MSU, PTI)
  163. * + struct intel_th_device INTEL_TH_SOURCE (STH)
  164. *
  165. * In other words, INTEL_TH_OUTPUT devices are children of INTEL_TH_SWITCH;
  166. * INTEL_TH_SWITCH and INTEL_TH_SOURCE are children of the intel_th device.
  167. */
  168. static inline struct intel_th_device *
  169. to_intel_th_parent(struct intel_th_device *thdev)
  170. {
  171. struct device *parent = thdev->dev.parent;
  172. if (!parent)
  173. return NULL;
  174. return to_intel_th_device(parent);
  175. }
  176. static inline struct intel_th *to_intel_th(struct intel_th_device *thdev)
  177. {
  178. if (thdev->type == INTEL_TH_OUTPUT)
  179. thdev = to_intel_th_parent(thdev);
  180. if (WARN_ON_ONCE(!thdev || thdev->type == INTEL_TH_OUTPUT))
  181. return NULL;
  182. return dev_get_drvdata(thdev->dev.parent);
  183. }
  184. struct intel_th *
  185. intel_th_alloc(struct device *dev, struct resource *devres,
  186. unsigned int ndevres, int irq);
  187. void intel_th_free(struct intel_th *th);
  188. int intel_th_driver_register(struct intel_th_driver *thdrv);
  189. void intel_th_driver_unregister(struct intel_th_driver *thdrv);
  190. int intel_th_trace_enable(struct intel_th_device *thdev);
  191. int intel_th_trace_disable(struct intel_th_device *thdev);
  192. int intel_th_set_output(struct intel_th_device *thdev,
  193. unsigned int master);
  194. int intel_th_output_enable(struct intel_th *th, unsigned int otype);
  195. enum {
  196. TH_MMIO_CONFIG = 0,
  197. TH_MMIO_SW = 2,
  198. TH_MMIO_END,
  199. };
  200. #define TH_POSSIBLE_OUTPUTS 8
  201. /* Total number of possible subdevices: outputs + GTH + STH */
  202. #define TH_SUBDEVICE_MAX (TH_POSSIBLE_OUTPUTS + 2)
  203. #define TH_CONFIGURABLE_MASTERS 256
  204. #define TH_MSC_MAX 2
  205. /**
  206. * struct intel_th - Intel TH controller
  207. * @dev: driver core's device
  208. * @thdev: subdevices
  209. * @hub: "switch" subdevice (GTH)
  210. * @resource: resources of the entire controller
  211. * @num_thdevs: number of devices in the @thdev array
  212. * @num_resources: number or resources in the @resource array
  213. * @irq: irq number
  214. * @id: this Intel TH controller's device ID in the system
  215. * @major: device node major for output devices
  216. */
  217. struct intel_th {
  218. struct device *dev;
  219. struct intel_th_device *thdev[TH_SUBDEVICE_MAX];
  220. struct intel_th_device *hub;
  221. struct resource *resource;
  222. unsigned int num_thdevs;
  223. unsigned int num_resources;
  224. int irq;
  225. int id;
  226. int major;
  227. #ifdef CONFIG_MODULES
  228. struct work_struct request_module_work;
  229. #endif /* CONFIG_MODULES */
  230. #ifdef CONFIG_INTEL_TH_DEBUG
  231. struct dentry *dbg;
  232. #endif
  233. };
  234. static inline struct intel_th_device *
  235. to_intel_th_hub(struct intel_th_device *thdev)
  236. {
  237. if (thdev->type == INTEL_TH_SWITCH)
  238. return thdev;
  239. else if (thdev->type == INTEL_TH_OUTPUT)
  240. return to_intel_th_parent(thdev);
  241. return to_intel_th(thdev)->hub;
  242. }
  243. /*
  244. * Register windows
  245. */
  246. enum {
  247. /* Global Trace Hub (GTH) */
  248. REG_GTH_OFFSET = 0x0000,
  249. REG_GTH_LENGTH = 0x2000,
  250. /* Software Trace Hub (STH) [0x4000..0x4fff] */
  251. REG_STH_OFFSET = 0x4000,
  252. REG_STH_LENGTH = 0x2000,
  253. /* Memory Storage Unit (MSU) [0xa0000..0xa1fff] */
  254. REG_MSU_OFFSET = 0xa0000,
  255. REG_MSU_LENGTH = 0x02000,
  256. /* Internal MSU trace buffer [0x80000..0x9ffff] */
  257. BUF_MSU_OFFSET = 0x80000,
  258. BUF_MSU_LENGTH = 0x20000,
  259. /* PTI output == same window as GTH */
  260. REG_PTI_OFFSET = REG_GTH_OFFSET,
  261. REG_PTI_LENGTH = REG_GTH_LENGTH,
  262. /* DCI Handler (DCIH) == some window as MSU */
  263. REG_DCIH_OFFSET = REG_MSU_OFFSET,
  264. REG_DCIH_LENGTH = REG_MSU_LENGTH,
  265. };
  266. /*
  267. * Scratchpad bits: tell firmware and external debuggers
  268. * what we are up to.
  269. */
  270. enum {
  271. /* Memory is the primary destination */
  272. SCRPD_MEM_IS_PRIM_DEST = BIT(0),
  273. /* XHCI DbC is the primary destination */
  274. SCRPD_DBC_IS_PRIM_DEST = BIT(1),
  275. /* PTI is the primary destination */
  276. SCRPD_PTI_IS_PRIM_DEST = BIT(2),
  277. /* BSSB is the primary destination */
  278. SCRPD_BSSB_IS_PRIM_DEST = BIT(3),
  279. /* PTI is the alternate destination */
  280. SCRPD_PTI_IS_ALT_DEST = BIT(4),
  281. /* BSSB is the alternate destination */
  282. SCRPD_BSSB_IS_ALT_DEST = BIT(5),
  283. /* DeepSx exit occurred */
  284. SCRPD_DEEPSX_EXIT = BIT(6),
  285. /* S4 exit occurred */
  286. SCRPD_S4_EXIT = BIT(7),
  287. /* S5 exit occurred */
  288. SCRPD_S5_EXIT = BIT(8),
  289. /* MSU controller 0/1 is enabled */
  290. SCRPD_MSC0_IS_ENABLED = BIT(9),
  291. SCRPD_MSC1_IS_ENABLED = BIT(10),
  292. /* Sx exit occurred */
  293. SCRPD_SX_EXIT = BIT(11),
  294. /* Trigger Unit is enabled */
  295. SCRPD_TRIGGER_IS_ENABLED = BIT(12),
  296. SCRPD_ODLA_IS_ENABLED = BIT(13),
  297. SCRPD_SOCHAP_IS_ENABLED = BIT(14),
  298. SCRPD_STH_IS_ENABLED = BIT(15),
  299. SCRPD_DCIH_IS_ENABLED = BIT(16),
  300. SCRPD_VER_IS_ENABLED = BIT(17),
  301. /* External debugger is using Intel TH */
  302. SCRPD_DEBUGGER_IN_USE = BIT(24),
  303. };
  304. #endif