omap3-overo-base.dtsi 7.7 KB

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  1. /*
  2. * Copyright (C) 2012 Florian Vaussard, EPFL Mobots group
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /*
  9. * The Gumstix Overo must be combined with an expansion board.
  10. */
  11. / {
  12. pwmleds {
  13. compatible = "pwm-leds";
  14. overo {
  15. label = "overo:blue:COM";
  16. pwms = <&twl_pwmled 1 7812500>;
  17. max-brightness = <127>;
  18. linux,default-trigger = "mmc0";
  19. };
  20. };
  21. sound {
  22. compatible = "ti,omap-twl4030";
  23. ti,model = "overo";
  24. ti,mcbsp = <&mcbsp2>;
  25. };
  26. /* HS USB Port 2 Power */
  27. hsusb2_power: hsusb2_power_reg {
  28. compatible = "regulator-fixed";
  29. regulator-name = "hsusb2_vbus";
  30. regulator-min-microvolt = <5000000>;
  31. regulator-max-microvolt = <5000000>;
  32. gpio = <&gpio6 8 GPIO_ACTIVE_HIGH>; /* gpio_168: vbus enable */
  33. startup-delay-us = <70000>;
  34. enable-active-high;
  35. };
  36. /* HS USB Host PHY on PORT 2 */
  37. hsusb2_phy: hsusb2_phy {
  38. compatible = "usb-nop-xceiv";
  39. reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>; /* gpio_183 */
  40. vcc-supply = <&hsusb2_power>;
  41. };
  42. /* Regulator to trigger the nPoweron signal of the Wifi module */
  43. w3cbw003c_npoweron: regulator-w3cbw003c-npoweron {
  44. compatible = "regulator-fixed";
  45. regulator-name = "regulator-w3cbw003c-npoweron";
  46. regulator-min-microvolt = <3300000>;
  47. regulator-max-microvolt = <3300000>;
  48. gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* gpio_54: nPoweron */
  49. enable-active-high;
  50. };
  51. /* Regulator to trigger the nReset signal of the Wifi module */
  52. w3cbw003c_wifi_nreset: regulator-w3cbw003c-wifi-nreset {
  53. pinctrl-names = "default";
  54. pinctrl-0 = <&w3cbw003c_pins &w3cbw003c_2_pins>;
  55. compatible = "regulator-fixed";
  56. regulator-name = "regulator-w3cbw003c-wifi-nreset";
  57. regulator-min-microvolt = <3300000>;
  58. regulator-max-microvolt = <3300000>;
  59. gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>; /* gpio_16: WiFi nReset */
  60. startup-delay-us = <10000>;
  61. };
  62. /* Regulator to trigger the nReset signal of the Bluetooth module */
  63. w3cbw003c_bt_nreset: regulator-w3cbw003c-bt-nreset {
  64. compatible = "regulator-fixed";
  65. regulator-name = "regulator-w3cbw003c-bt-nreset";
  66. regulator-min-microvolt = <3300000>;
  67. regulator-max-microvolt = <3300000>;
  68. gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio_164: BT nReset */
  69. startup-delay-us = <10000>;
  70. };
  71. };
  72. &omap3_pmx_core {
  73. pinctrl-names = "default";
  74. pinctrl-0 = <
  75. &hsusb2_pins
  76. >;
  77. uart2_pins: pinmux_uart2_pins {
  78. pinctrl-single,pins = <
  79. OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1) /* mcbsp3_dx.uart2_cts */
  80. OMAP3_CORE1_IOPAD(0x216e, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_dr.uart2_rts */
  81. OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_clk.uart2_tx */
  82. OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1) /* mcbsp3_fsx.uart2_rx */
  83. >;
  84. };
  85. i2c1_pins: pinmux_i2c1_pins {
  86. pinctrl-single,pins = <
  87. OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
  88. OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
  89. >;
  90. };
  91. mmc1_pins: pinmux_mmc1_pins {
  92. pinctrl-single,pins = <
  93. OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
  94. OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
  95. OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
  96. OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
  97. OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
  98. OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
  99. >;
  100. };
  101. mmc2_pins: pinmux_mmc2_pins {
  102. pinctrl-single,pins = <
  103. OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
  104. OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
  105. OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
  106. OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
  107. OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
  108. OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
  109. >;
  110. };
  111. /* WiFi/BT combo */
  112. w3cbw003c_pins: pinmux_w3cbw003c_pins {
  113. pinctrl-single,pins = <
  114. OMAP3_CORE1_IOPAD(0x20b4, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs3.gpio_54 */
  115. OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4) /* uart3_rts_sd.gpio_164 */
  116. >;
  117. };
  118. hsusb2_pins: pinmux_hsusb2_pins {
  119. pinctrl-single,pins = <
  120. OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
  121. OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
  122. OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
  123. OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
  124. OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
  125. OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
  126. OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4) /* i2c2_scl.gpio_168 */
  127. OMAP3_CORE1_IOPAD(0x21c0, PIN_OUTPUT | MUX_MODE4) /* i2c2_sda.gpio_183 */
  128. >;
  129. };
  130. };
  131. &i2c1 {
  132. pinctrl-names = "default";
  133. pinctrl-0 = <&i2c1_pins>;
  134. clock-frequency = <2600000>;
  135. twl: twl@48 {
  136. reg = <0x48>;
  137. interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  138. interrupt-parent = <&intc>;
  139. twl_audio: audio {
  140. compatible = "ti,twl4030-audio";
  141. codec {
  142. };
  143. };
  144. };
  145. };
  146. #include "twl4030.dtsi"
  147. #include "twl4030_omap3.dtsi"
  148. /* i2c2 pins are used for gpio */
  149. &i2c2 {
  150. status = "disabled";
  151. };
  152. /* on board microSD slot */
  153. &mmc1 {
  154. pinctrl-names = "default";
  155. pinctrl-0 = <&mmc1_pins>;
  156. vmmc-supply = <&vmmc1>;
  157. bus-width = <4>;
  158. };
  159. /* optional on board WiFi */
  160. &mmc2 {
  161. pinctrl-names = "default";
  162. pinctrl-0 = <&mmc2_pins>;
  163. vmmc-supply = <&w3cbw003c_npoweron>;
  164. vqmmc-supply = <&w3cbw003c_bt_nreset>;
  165. vmmc_aux-supply = <&w3cbw003c_wifi_nreset>;
  166. bus-width = <4>;
  167. cap-sdio-irq;
  168. non-removable;
  169. };
  170. &twl_gpio {
  171. ti,use-leds;
  172. };
  173. &usb_otg_hs {
  174. interface-type = <0>;
  175. usb-phy = <&usb2_phy>;
  176. phys = <&usb2_phy>;
  177. phy-names = "usb2-phy";
  178. mode = <3>;
  179. power = <50>;
  180. };
  181. &usbhshost {
  182. port2-mode = "ehci-phy";
  183. };
  184. &usbhsehci {
  185. phys = <0 &hsusb2_phy>;
  186. };
  187. &uart2 {
  188. pinctrl-names = "default";
  189. pinctrl-0 = <&uart2_pins>;
  190. };
  191. &mcbsp2 {
  192. status = "okay";
  193. };
  194. &gpmc {
  195. ranges = <0 0 0x30000000 0x1000000>, /* CS0 */
  196. <4 0 0x2b000000 0x1000000>, /* CS4 */
  197. <5 0 0x2c000000 0x1000000>; /* CS5 */
  198. nand@0,0 {
  199. compatible = "ti,omap2-nand";
  200. linux,mtd-name= "micron,mt29c4g96maz";
  201. reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
  202. interrupt-parent = <&gpmc>;
  203. interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
  204. <1 IRQ_TYPE_NONE>; /* termcount */
  205. nand-bus-width = <16>;
  206. gpmc,device-width = <2>;
  207. ti,nand-ecc-opt = "bch8";
  208. gpmc,sync-clk-ps = <0>;
  209. gpmc,cs-on-ns = <0>;
  210. gpmc,cs-rd-off-ns = <44>;
  211. gpmc,cs-wr-off-ns = <44>;
  212. gpmc,adv-on-ns = <6>;
  213. gpmc,adv-rd-off-ns = <34>;
  214. gpmc,adv-wr-off-ns = <44>;
  215. gpmc,we-off-ns = <40>;
  216. gpmc,oe-off-ns = <54>;
  217. gpmc,access-ns = <64>;
  218. gpmc,rd-cycle-ns = <82>;
  219. gpmc,wr-cycle-ns = <82>;
  220. gpmc,wr-access-ns = <40>;
  221. gpmc,wr-data-mux-bus-ns = <0>;
  222. #address-cells = <1>;
  223. #size-cells = <1>;
  224. partition@0 {
  225. label = "SPL";
  226. reg = <0 0x80000>; /* 512KiB */
  227. };
  228. partition@80000 {
  229. label = "U-Boot";
  230. reg = <0x80000 0x1C0000>; /* 1792KiB */
  231. };
  232. partition@1c0000 {
  233. label = "Environment";
  234. reg = <0x240000 0x40000>; /* 256KiB */
  235. };
  236. partition@280000 {
  237. label = "Kernel";
  238. reg = <0x280000 0x800000>; /* 8192KiB */
  239. };
  240. partition@780000 {
  241. label = "Filesystem";
  242. reg = <0xA80000 0>;
  243. /* HACK: MTDPART_SIZ_FULL=0 so fill to end */
  244. };
  245. };
  246. };