smp_tlb.c 6.1 KB

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  1. /*
  2. * linux/arch/arm/kernel/smp_tlb.c
  3. *
  4. * Copyright (C) 2002 ARM Limited, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/preempt.h>
  11. #include <linux/smp.h>
  12. #include <asm/smp_plat.h>
  13. #include <asm/tlbflush.h>
  14. #include <asm/mmu_context.h>
  15. /**********************************************************************/
  16. /*
  17. * TLB operations
  18. */
  19. struct tlb_args {
  20. struct vm_area_struct *ta_vma;
  21. unsigned long ta_start;
  22. unsigned long ta_end;
  23. };
  24. static inline void ipi_flush_tlb_all(void *ignored)
  25. {
  26. local_flush_tlb_all();
  27. }
  28. static inline void ipi_flush_tlb_mm(void *arg)
  29. {
  30. struct mm_struct *mm = (struct mm_struct *)arg;
  31. local_flush_tlb_mm(mm);
  32. }
  33. static inline void ipi_flush_tlb_page(void *arg)
  34. {
  35. struct tlb_args *ta = (struct tlb_args *)arg;
  36. local_flush_tlb_page(ta->ta_vma, ta->ta_start);
  37. }
  38. static inline void ipi_flush_tlb_kernel_page(void *arg)
  39. {
  40. struct tlb_args *ta = (struct tlb_args *)arg;
  41. local_flush_tlb_kernel_page(ta->ta_start);
  42. }
  43. static inline void ipi_flush_tlb_range(void *arg)
  44. {
  45. struct tlb_args *ta = (struct tlb_args *)arg;
  46. local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end);
  47. }
  48. static inline void ipi_flush_tlb_kernel_range(void *arg)
  49. {
  50. struct tlb_args *ta = (struct tlb_args *)arg;
  51. local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end);
  52. }
  53. static inline void ipi_flush_bp_all(void *ignored)
  54. {
  55. local_flush_bp_all();
  56. }
  57. #ifdef CONFIG_ARM_ERRATA_798181
  58. bool (*erratum_a15_798181_handler)(void);
  59. static bool erratum_a15_798181_partial(void)
  60. {
  61. asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
  62. dsb(ish);
  63. return false;
  64. }
  65. static bool erratum_a15_798181_broadcast(void)
  66. {
  67. asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
  68. dsb(ish);
  69. return true;
  70. }
  71. void erratum_a15_798181_init(void)
  72. {
  73. unsigned int midr = read_cpuid_id();
  74. unsigned int revidr = read_cpuid(CPUID_REVIDR);
  75. /* Brahma-B15 r0p0..r0p2 affected
  76. * Cortex-A15 r0p0..r3p3 w/o ECO fix affected
  77. * Fixes applied to A15 with respect to the revision and revidr are:
  78. *
  79. * r0p0-r2p1: No fixes applied
  80. * r2p2,r2p3:
  81. * REVIDR[4]: 798181 Moving a virtual page that is being accessed
  82. * by an active process can lead to unexpected behavior
  83. * REVIDR[9]: Not defined
  84. * r2p4,r3p0,r3p1,r3p2:
  85. * REVIDR[4]: 798181 Moving a virtual page that is being accessed
  86. * by an active process can lead to unexpected behavior
  87. * REVIDR[9]: 798181 Moving a virtual page that is being accessed
  88. * by an active process can lead to unexpected behavior
  89. * - This is an update to a previously released ECO.
  90. * r3p3:
  91. * REVIDR[4]: Reserved
  92. * REVIDR[9]: 798181 Moving a virtual page that is being accessed
  93. * by an active process can lead to unexpected behavior
  94. * - This is an update to a previously released ECO.
  95. *
  96. * Handling:
  97. * REVIDR[9] set -> No WA
  98. * REVIDR[4] set, REVIDR[9] cleared -> Partial WA
  99. * Both cleared -> Full WA
  100. */
  101. if ((midr & 0xff0ffff0) == 0x420f00f0 && midr <= 0x420f00f2) {
  102. erratum_a15_798181_handler = erratum_a15_798181_broadcast;
  103. } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f2) {
  104. erratum_a15_798181_handler = erratum_a15_798181_broadcast;
  105. } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f4) {
  106. if (revidr & 0x10)
  107. erratum_a15_798181_handler =
  108. erratum_a15_798181_partial;
  109. else
  110. erratum_a15_798181_handler =
  111. erratum_a15_798181_broadcast;
  112. } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x413fc0f3) {
  113. if ((revidr & 0x210) == 0)
  114. erratum_a15_798181_handler =
  115. erratum_a15_798181_broadcast;
  116. else if (revidr & 0x10)
  117. erratum_a15_798181_handler =
  118. erratum_a15_798181_partial;
  119. } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x414fc0f0) {
  120. if ((revidr & 0x200) == 0)
  121. erratum_a15_798181_handler =
  122. erratum_a15_798181_partial;
  123. }
  124. }
  125. #endif
  126. static void ipi_flush_tlb_a15_erratum(void *arg)
  127. {
  128. dmb();
  129. }
  130. static void broadcast_tlb_a15_erratum(void)
  131. {
  132. if (!erratum_a15_798181())
  133. return;
  134. smp_call_function(ipi_flush_tlb_a15_erratum, NULL, 1);
  135. }
  136. static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm)
  137. {
  138. int this_cpu;
  139. cpumask_t mask = { CPU_BITS_NONE };
  140. if (!erratum_a15_798181())
  141. return;
  142. this_cpu = get_cpu();
  143. a15_erratum_get_cpumask(this_cpu, mm, &mask);
  144. smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1);
  145. put_cpu();
  146. }
  147. void flush_tlb_all(void)
  148. {
  149. if (tlb_ops_need_broadcast())
  150. on_each_cpu(ipi_flush_tlb_all, NULL, 1);
  151. else
  152. __flush_tlb_all();
  153. broadcast_tlb_a15_erratum();
  154. }
  155. void flush_tlb_mm(struct mm_struct *mm)
  156. {
  157. if (tlb_ops_need_broadcast())
  158. on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_mm, mm, 1);
  159. else
  160. __flush_tlb_mm(mm);
  161. broadcast_tlb_mm_a15_erratum(mm);
  162. }
  163. void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
  164. {
  165. if (tlb_ops_need_broadcast()) {
  166. struct tlb_args ta;
  167. ta.ta_vma = vma;
  168. ta.ta_start = uaddr;
  169. on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_page,
  170. &ta, 1);
  171. } else
  172. __flush_tlb_page(vma, uaddr);
  173. broadcast_tlb_mm_a15_erratum(vma->vm_mm);
  174. }
  175. void flush_tlb_kernel_page(unsigned long kaddr)
  176. {
  177. if (tlb_ops_need_broadcast()) {
  178. struct tlb_args ta;
  179. ta.ta_start = kaddr;
  180. on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1);
  181. } else
  182. __flush_tlb_kernel_page(kaddr);
  183. broadcast_tlb_a15_erratum();
  184. }
  185. void flush_tlb_range(struct vm_area_struct *vma,
  186. unsigned long start, unsigned long end)
  187. {
  188. if (tlb_ops_need_broadcast()) {
  189. struct tlb_args ta;
  190. ta.ta_vma = vma;
  191. ta.ta_start = start;
  192. ta.ta_end = end;
  193. on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_range,
  194. &ta, 1);
  195. } else
  196. local_flush_tlb_range(vma, start, end);
  197. broadcast_tlb_mm_a15_erratum(vma->vm_mm);
  198. }
  199. void flush_tlb_kernel_range(unsigned long start, unsigned long end)
  200. {
  201. if (tlb_ops_need_broadcast()) {
  202. struct tlb_args ta;
  203. ta.ta_start = start;
  204. ta.ta_end = end;
  205. on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1);
  206. } else
  207. local_flush_tlb_kernel_range(start, end);
  208. broadcast_tlb_a15_erratum();
  209. }
  210. void flush_bp_all(void)
  211. {
  212. if (tlb_ops_need_broadcast())
  213. on_each_cpu(ipi_flush_bp_all, NULL, 1);
  214. else
  215. __flush_bp_all();
  216. }