fpga-region.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645
  1. /*
  2. * FPGA Region - Device Tree support for FPGA programming under Linux
  3. *
  4. * Copyright (C) 2013-2016 Altera Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #include <linux/fpga/fpga-bridge.h>
  19. #include <linux/fpga/fpga-mgr.h>
  20. #include <linux/idr.h>
  21. #include <linux/kernel.h>
  22. #include <linux/list.h>
  23. #include <linux/module.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/slab.h>
  26. #include <linux/spinlock.h>
  27. /**
  28. * struct fpga_region - FPGA Region structure
  29. * @dev: FPGA Region device
  30. * @mutex: enforces exclusive reference to region
  31. * @bridge_list: list of FPGA bridges specified in region
  32. * @mgr: FPGA manager
  33. * @info: fpga image specific information
  34. */
  35. struct fpga_region {
  36. struct device dev;
  37. struct mutex mutex; /* for exclusive reference to region */
  38. struct list_head bridge_list;
  39. struct fpga_manager *mgr;
  40. struct fpga_image_info *info;
  41. };
  42. #define to_fpga_region(d) container_of(d, struct fpga_region, dev)
  43. static DEFINE_IDA(fpga_region_ida);
  44. static struct class *fpga_region_class;
  45. static const struct of_device_id fpga_region_of_match[] = {
  46. { .compatible = "fpga-region", },
  47. {},
  48. };
  49. MODULE_DEVICE_TABLE(of, fpga_region_of_match);
  50. static int fpga_region_of_node_match(struct device *dev, const void *data)
  51. {
  52. return dev->of_node == data;
  53. }
  54. /**
  55. * fpga_region_find - find FPGA region
  56. * @np: device node of FPGA Region
  57. * Caller will need to put_device(&region->dev) when done.
  58. * Returns FPGA Region struct or NULL
  59. */
  60. static struct fpga_region *fpga_region_find(struct device_node *np)
  61. {
  62. struct device *dev;
  63. dev = class_find_device(fpga_region_class, NULL, np,
  64. fpga_region_of_node_match);
  65. if (!dev)
  66. return NULL;
  67. return to_fpga_region(dev);
  68. }
  69. /**
  70. * fpga_region_get - get an exclusive reference to a fpga region
  71. * @region: FPGA Region struct
  72. *
  73. * Caller should call fpga_region_put() when done with region.
  74. *
  75. * Return fpga_region struct if successful.
  76. * Return -EBUSY if someone already has a reference to the region.
  77. * Return -ENODEV if @np is not a FPGA Region.
  78. */
  79. static struct fpga_region *fpga_region_get(struct fpga_region *region)
  80. {
  81. struct device *dev = &region->dev;
  82. if (!mutex_trylock(&region->mutex)) {
  83. dev_dbg(dev, "%s: FPGA Region already in use\n", __func__);
  84. return ERR_PTR(-EBUSY);
  85. }
  86. get_device(dev);
  87. if (!try_module_get(dev->parent->driver->owner)) {
  88. put_device(dev);
  89. mutex_unlock(&region->mutex);
  90. return ERR_PTR(-ENODEV);
  91. }
  92. dev_dbg(dev, "get\n");
  93. return region;
  94. }
  95. /**
  96. * fpga_region_put - release a reference to a region
  97. *
  98. * @region: FPGA region
  99. */
  100. static void fpga_region_put(struct fpga_region *region)
  101. {
  102. struct device *dev = &region->dev;
  103. dev_dbg(dev, "put\n");
  104. module_put(dev->parent->driver->owner);
  105. put_device(dev);
  106. mutex_unlock(&region->mutex);
  107. }
  108. /**
  109. * fpga_region_get_manager - get reference for FPGA manager
  110. * @np: device node of FPGA region
  111. *
  112. * Get FPGA Manager from "fpga-mgr" property or from ancestor region.
  113. *
  114. * Caller should call fpga_mgr_put() when done with manager.
  115. *
  116. * Return: fpga manager struct or IS_ERR() condition containing error code.
  117. */
  118. static struct fpga_manager *fpga_region_get_manager(struct device_node *np)
  119. {
  120. struct device_node *mgr_node;
  121. struct fpga_manager *mgr;
  122. of_node_get(np);
  123. while (np) {
  124. if (of_device_is_compatible(np, "fpga-region")) {
  125. mgr_node = of_parse_phandle(np, "fpga-mgr", 0);
  126. if (mgr_node) {
  127. mgr = of_fpga_mgr_get(mgr_node);
  128. of_node_put(np);
  129. return mgr;
  130. }
  131. }
  132. np = of_get_next_parent(np);
  133. }
  134. of_node_put(np);
  135. return ERR_PTR(-EINVAL);
  136. }
  137. /**
  138. * fpga_region_get_bridges - create a list of bridges
  139. * @region: FPGA region
  140. * @overlay: device node of the overlay
  141. *
  142. * Create a list of bridges including the parent bridge and the bridges
  143. * specified by "fpga-bridges" property. Note that the
  144. * fpga_bridges_enable/disable/put functions are all fine with an empty list
  145. * if that happens.
  146. *
  147. * Caller should call fpga_bridges_put(&region->bridge_list) when
  148. * done with the bridges.
  149. *
  150. * Return 0 for success (even if there are no bridges specified)
  151. * or -EBUSY if any of the bridges are in use.
  152. */
  153. static int fpga_region_get_bridges(struct fpga_region *region,
  154. struct device_node *overlay)
  155. {
  156. struct device *dev = &region->dev;
  157. struct device_node *region_np = dev->of_node;
  158. struct device_node *br, *np, *parent_br = NULL;
  159. int i, ret;
  160. /* If parent is a bridge, add to list */
  161. ret = of_fpga_bridge_get_to_list(region_np->parent, region->info,
  162. &region->bridge_list);
  163. /* -EBUSY means parent is a bridge that is under use. Give up. */
  164. if (ret == -EBUSY)
  165. return ret;
  166. /* Zero return code means parent was a bridge and was added to list. */
  167. if (!ret)
  168. parent_br = region_np->parent;
  169. /* If overlay has a list of bridges, use it. */
  170. if (of_parse_phandle(overlay, "fpga-bridges", 0))
  171. np = overlay;
  172. else
  173. np = region_np;
  174. for (i = 0; ; i++) {
  175. br = of_parse_phandle(np, "fpga-bridges", i);
  176. if (!br)
  177. break;
  178. /* If parent bridge is in list, skip it. */
  179. if (br == parent_br)
  180. continue;
  181. /* If node is a bridge, get it and add to list */
  182. ret = of_fpga_bridge_get_to_list(br, region->info,
  183. &region->bridge_list);
  184. /* If any of the bridges are in use, give up */
  185. if (ret == -EBUSY) {
  186. fpga_bridges_put(&region->bridge_list);
  187. return -EBUSY;
  188. }
  189. }
  190. return 0;
  191. }
  192. /**
  193. * fpga_region_program_fpga - program FPGA
  194. * @region: FPGA region
  195. * @overlay: device node of the overlay
  196. * Program an FPGA using information in the region's fpga image info.
  197. * Return 0 for success or negative error code.
  198. */
  199. static int fpga_region_program_fpga(struct fpga_region *region,
  200. struct device_node *overlay)
  201. {
  202. struct device *dev = &region->dev;
  203. int ret;
  204. region = fpga_region_get(region);
  205. if (IS_ERR(region)) {
  206. dev_err(dev, "failed to get FPGA region\n");
  207. return PTR_ERR(region);
  208. }
  209. ret = fpga_mgr_lock(region->mgr);
  210. if (ret) {
  211. dev_err(dev, "FPGA manager is busy\n");
  212. goto err_put_region;
  213. }
  214. ret = fpga_region_get_bridges(region, overlay);
  215. if (ret) {
  216. dev_err(dev, "failed to get FPGA bridges\n");
  217. goto err_unlock_mgr;
  218. }
  219. ret = fpga_bridges_disable(&region->bridge_list);
  220. if (ret) {
  221. dev_err(dev, "failed to disable bridges\n");
  222. goto err_put_br;
  223. }
  224. ret = fpga_mgr_load(region->mgr, region->info);
  225. if (ret) {
  226. dev_err(dev, "failed to load FPGA image\n");
  227. goto err_put_br;
  228. }
  229. ret = fpga_bridges_enable(&region->bridge_list);
  230. if (ret) {
  231. dev_err(dev, "failed to enable region bridges\n");
  232. goto err_put_br;
  233. }
  234. fpga_mgr_unlock(region->mgr);
  235. fpga_region_put(region);
  236. return 0;
  237. err_put_br:
  238. fpga_bridges_put(&region->bridge_list);
  239. err_unlock_mgr:
  240. fpga_mgr_unlock(region->mgr);
  241. err_put_region:
  242. fpga_region_put(region);
  243. return ret;
  244. }
  245. /**
  246. * child_regions_with_firmware
  247. * @overlay: device node of the overlay
  248. *
  249. * If the overlay adds child FPGA regions, they are not allowed to have
  250. * firmware-name property.
  251. *
  252. * Return 0 for OK or -EINVAL if child FPGA region adds firmware-name.
  253. */
  254. static int child_regions_with_firmware(struct device_node *overlay)
  255. {
  256. struct device_node *child_region;
  257. const char *child_firmware_name;
  258. int ret = 0;
  259. of_node_get(overlay);
  260. child_region = of_find_matching_node(overlay, fpga_region_of_match);
  261. while (child_region) {
  262. if (!of_property_read_string(child_region, "firmware-name",
  263. &child_firmware_name)) {
  264. ret = -EINVAL;
  265. break;
  266. }
  267. child_region = of_find_matching_node(child_region,
  268. fpga_region_of_match);
  269. }
  270. of_node_put(child_region);
  271. if (ret)
  272. pr_err("firmware-name not allowed in child FPGA region: %pOF",
  273. child_region);
  274. return ret;
  275. }
  276. /**
  277. * fpga_region_notify_pre_apply - pre-apply overlay notification
  278. *
  279. * @region: FPGA region that the overlay was applied to
  280. * @nd: overlay notification data
  281. *
  282. * Called after when an overlay targeted to a FPGA Region is about to be
  283. * applied. Function will check the properties that will be added to the FPGA
  284. * region. If the checks pass, it will program the FPGA.
  285. *
  286. * The checks are:
  287. * The overlay must add either firmware-name or external-fpga-config property
  288. * to the FPGA Region.
  289. *
  290. * firmware-name : program the FPGA
  291. * external-fpga-config : FPGA is already programmed
  292. * encrypted-fpga-config : FPGA bitstream is encrypted
  293. *
  294. * The overlay can add other FPGA regions, but child FPGA regions cannot have a
  295. * firmware-name property since those regions don't exist yet.
  296. *
  297. * If the overlay that breaks the rules, notifier returns an error and the
  298. * overlay is rejected before it goes into the main tree.
  299. *
  300. * Returns 0 for success or negative error code for failure.
  301. */
  302. static int fpga_region_notify_pre_apply(struct fpga_region *region,
  303. struct of_overlay_notify_data *nd)
  304. {
  305. struct device *dev = &region->dev;
  306. struct fpga_image_info *info;
  307. const char *firmware_name;
  308. int ret;
  309. if (region->info) {
  310. dev_err(dev, "Region already has overlay applied.\n");
  311. return -EINVAL;
  312. }
  313. /*
  314. * Reject overlay if child FPGA Regions added in the overlay have
  315. * firmware-name property (would mean that an FPGA region that has
  316. * not been added to the live tree yet is doing FPGA programming).
  317. */
  318. ret = child_regions_with_firmware(nd->overlay);
  319. if (ret)
  320. return ret;
  321. info = fpga_image_info_alloc(dev);
  322. if (!info)
  323. return -ENOMEM;
  324. /* Read FPGA region properties from the overlay */
  325. if (of_property_read_bool(nd->overlay, "partial-fpga-config"))
  326. info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
  327. if (of_property_read_bool(nd->overlay, "external-fpga-config"))
  328. info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
  329. if (of_property_read_bool(nd->overlay, "encrypted-fpga-config"))
  330. info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
  331. if (!of_property_read_string(nd->overlay, "firmware-name",
  332. &firmware_name)) {
  333. info->firmware_name = devm_kstrdup(dev, firmware_name,
  334. GFP_KERNEL);
  335. if (!info->firmware_name)
  336. return -ENOMEM;
  337. }
  338. of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us",
  339. &info->enable_timeout_us);
  340. of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
  341. &info->disable_timeout_us);
  342. of_property_read_u32(nd->overlay, "config-complete-timeout-us",
  343. &info->config_complete_timeout_us);
  344. /* If FPGA was externally programmed, don't specify firmware */
  345. if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && info->firmware_name) {
  346. dev_err(dev, "error: specified firmware and external-fpga-config");
  347. fpga_image_info_free(info);
  348. return -EINVAL;
  349. }
  350. /* FPGA is already configured externally. We're done. */
  351. if (info->flags & FPGA_MGR_EXTERNAL_CONFIG) {
  352. fpga_image_info_free(info);
  353. return 0;
  354. }
  355. /* If we got this far, we should be programming the FPGA */
  356. if (!info->firmware_name) {
  357. dev_err(dev, "should specify firmware-name or external-fpga-config\n");
  358. fpga_image_info_free(info);
  359. return -EINVAL;
  360. }
  361. region->info = info;
  362. ret = fpga_region_program_fpga(region, nd->overlay);
  363. if (ret) {
  364. fpga_image_info_free(info);
  365. region->info = NULL;
  366. }
  367. return ret;
  368. }
  369. /**
  370. * fpga_region_notify_post_remove - post-remove overlay notification
  371. *
  372. * @region: FPGA region that was targeted by the overlay that was removed
  373. * @nd: overlay notification data
  374. *
  375. * Called after an overlay has been removed if the overlay's target was a
  376. * FPGA region.
  377. */
  378. static void fpga_region_notify_post_remove(struct fpga_region *region,
  379. struct of_overlay_notify_data *nd)
  380. {
  381. fpga_bridges_disable(&region->bridge_list);
  382. fpga_bridges_put(&region->bridge_list);
  383. fpga_image_info_free(region->info);
  384. region->info = NULL;
  385. }
  386. /**
  387. * of_fpga_region_notify - reconfig notifier for dynamic DT changes
  388. * @nb: notifier block
  389. * @action: notifier action
  390. * @arg: reconfig data
  391. *
  392. * This notifier handles programming a FPGA when a "firmware-name" property is
  393. * added to a fpga-region.
  394. *
  395. * Returns NOTIFY_OK or error if FPGA programming fails.
  396. */
  397. static int of_fpga_region_notify(struct notifier_block *nb,
  398. unsigned long action, void *arg)
  399. {
  400. struct of_overlay_notify_data *nd = arg;
  401. struct fpga_region *region;
  402. int ret;
  403. switch (action) {
  404. case OF_OVERLAY_PRE_APPLY:
  405. pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__);
  406. break;
  407. case OF_OVERLAY_POST_APPLY:
  408. pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__);
  409. return NOTIFY_OK; /* not for us */
  410. case OF_OVERLAY_PRE_REMOVE:
  411. pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__);
  412. return NOTIFY_OK; /* not for us */
  413. case OF_OVERLAY_POST_REMOVE:
  414. pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__);
  415. break;
  416. default: /* should not happen */
  417. return NOTIFY_OK;
  418. }
  419. region = fpga_region_find(nd->target);
  420. if (!region)
  421. return NOTIFY_OK;
  422. ret = 0;
  423. switch (action) {
  424. case OF_OVERLAY_PRE_APPLY:
  425. ret = fpga_region_notify_pre_apply(region, nd);
  426. break;
  427. case OF_OVERLAY_POST_REMOVE:
  428. fpga_region_notify_post_remove(region, nd);
  429. break;
  430. }
  431. put_device(&region->dev);
  432. if (ret)
  433. return notifier_from_errno(ret);
  434. return NOTIFY_OK;
  435. }
  436. static struct notifier_block fpga_region_of_nb = {
  437. .notifier_call = of_fpga_region_notify,
  438. };
  439. static int fpga_region_probe(struct platform_device *pdev)
  440. {
  441. struct device *dev = &pdev->dev;
  442. struct device_node *np = dev->of_node;
  443. struct fpga_region *region;
  444. struct fpga_manager *mgr;
  445. int id, ret = 0;
  446. mgr = fpga_region_get_manager(np);
  447. if (IS_ERR(mgr))
  448. return -EPROBE_DEFER;
  449. region = kzalloc(sizeof(*region), GFP_KERNEL);
  450. if (!region) {
  451. ret = -ENOMEM;
  452. goto err_put_mgr;
  453. }
  454. region->mgr = mgr;
  455. id = ida_simple_get(&fpga_region_ida, 0, 0, GFP_KERNEL);
  456. if (id < 0) {
  457. ret = id;
  458. goto err_kfree;
  459. }
  460. mutex_init(&region->mutex);
  461. INIT_LIST_HEAD(&region->bridge_list);
  462. device_initialize(&region->dev);
  463. region->dev.class = fpga_region_class;
  464. region->dev.parent = dev;
  465. region->dev.of_node = np;
  466. region->dev.id = id;
  467. dev_set_drvdata(dev, region);
  468. ret = dev_set_name(&region->dev, "region%d", id);
  469. if (ret)
  470. goto err_remove;
  471. ret = device_add(&region->dev);
  472. if (ret)
  473. goto err_remove;
  474. of_platform_populate(np, fpga_region_of_match, NULL, &region->dev);
  475. dev_info(dev, "FPGA Region probed\n");
  476. return 0;
  477. err_remove:
  478. ida_simple_remove(&fpga_region_ida, id);
  479. err_kfree:
  480. kfree(region);
  481. err_put_mgr:
  482. fpga_mgr_put(mgr);
  483. return ret;
  484. }
  485. static int fpga_region_remove(struct platform_device *pdev)
  486. {
  487. struct fpga_region *region = platform_get_drvdata(pdev);
  488. device_unregister(&region->dev);
  489. fpga_mgr_put(region->mgr);
  490. return 0;
  491. }
  492. static struct platform_driver fpga_region_driver = {
  493. .probe = fpga_region_probe,
  494. .remove = fpga_region_remove,
  495. .driver = {
  496. .name = "fpga-region",
  497. .of_match_table = of_match_ptr(fpga_region_of_match),
  498. },
  499. };
  500. static void fpga_region_dev_release(struct device *dev)
  501. {
  502. struct fpga_region *region = to_fpga_region(dev);
  503. ida_simple_remove(&fpga_region_ida, region->dev.id);
  504. kfree(region);
  505. }
  506. /**
  507. * fpga_region_init - init function for fpga_region class
  508. * Creates the fpga_region class and registers a reconfig notifier.
  509. */
  510. static int __init fpga_region_init(void)
  511. {
  512. int ret;
  513. fpga_region_class = class_create(THIS_MODULE, "fpga_region");
  514. if (IS_ERR(fpga_region_class))
  515. return PTR_ERR(fpga_region_class);
  516. fpga_region_class->dev_release = fpga_region_dev_release;
  517. ret = of_overlay_notifier_register(&fpga_region_of_nb);
  518. if (ret)
  519. goto err_class;
  520. ret = platform_driver_register(&fpga_region_driver);
  521. if (ret)
  522. goto err_plat;
  523. return 0;
  524. err_plat:
  525. of_overlay_notifier_unregister(&fpga_region_of_nb);
  526. err_class:
  527. class_destroy(fpga_region_class);
  528. ida_destroy(&fpga_region_ida);
  529. return ret;
  530. }
  531. static void __exit fpga_region_exit(void)
  532. {
  533. platform_driver_unregister(&fpga_region_driver);
  534. of_overlay_notifier_unregister(&fpga_region_of_nb);
  535. class_destroy(fpga_region_class);
  536. ida_destroy(&fpga_region_ida);
  537. }
  538. subsys_initcall(fpga_region_init);
  539. module_exit(fpga_region_exit);
  540. MODULE_DESCRIPTION("FPGA Region");
  541. MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
  542. MODULE_LICENSE("GPL v2");