gpu_scheduler.c 20 KB

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  1. /*
  2. * Copyright 2015 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. #include <linux/kthread.h>
  24. #include <linux/wait.h>
  25. #include <linux/sched.h>
  26. #include <uapi/linux/sched/types.h>
  27. #include <drm/drmP.h>
  28. #include <drm/gpu_scheduler.h>
  29. #include <drm/spsc_queue.h>
  30. #define CREATE_TRACE_POINTS
  31. #include <drm/gpu_scheduler_trace.h>
  32. #define to_drm_sched_job(sched_job) \
  33. container_of((sched_job), struct drm_sched_job, queue_node)
  34. static bool drm_sched_entity_is_ready(struct drm_sched_entity *entity);
  35. static void drm_sched_wakeup(struct drm_gpu_scheduler *sched);
  36. static void drm_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb);
  37. /* Initialize a given run queue struct */
  38. static void drm_sched_rq_init(struct drm_sched_rq *rq)
  39. {
  40. spin_lock_init(&rq->lock);
  41. INIT_LIST_HEAD(&rq->entities);
  42. rq->current_entity = NULL;
  43. }
  44. static void drm_sched_rq_add_entity(struct drm_sched_rq *rq,
  45. struct drm_sched_entity *entity)
  46. {
  47. if (!list_empty(&entity->list))
  48. return;
  49. spin_lock(&rq->lock);
  50. list_add_tail(&entity->list, &rq->entities);
  51. spin_unlock(&rq->lock);
  52. }
  53. static void drm_sched_rq_remove_entity(struct drm_sched_rq *rq,
  54. struct drm_sched_entity *entity)
  55. {
  56. if (list_empty(&entity->list))
  57. return;
  58. spin_lock(&rq->lock);
  59. list_del_init(&entity->list);
  60. if (rq->current_entity == entity)
  61. rq->current_entity = NULL;
  62. spin_unlock(&rq->lock);
  63. }
  64. /**
  65. * Select an entity which could provide a job to run
  66. *
  67. * @rq The run queue to check.
  68. *
  69. * Try to find a ready entity, returns NULL if none found.
  70. */
  71. static struct drm_sched_entity *
  72. drm_sched_rq_select_entity(struct drm_sched_rq *rq)
  73. {
  74. struct drm_sched_entity *entity;
  75. spin_lock(&rq->lock);
  76. entity = rq->current_entity;
  77. if (entity) {
  78. list_for_each_entry_continue(entity, &rq->entities, list) {
  79. if (drm_sched_entity_is_ready(entity)) {
  80. rq->current_entity = entity;
  81. spin_unlock(&rq->lock);
  82. return entity;
  83. }
  84. }
  85. }
  86. list_for_each_entry(entity, &rq->entities, list) {
  87. if (drm_sched_entity_is_ready(entity)) {
  88. rq->current_entity = entity;
  89. spin_unlock(&rq->lock);
  90. return entity;
  91. }
  92. if (entity == rq->current_entity)
  93. break;
  94. }
  95. spin_unlock(&rq->lock);
  96. return NULL;
  97. }
  98. /**
  99. * Init a context entity used by scheduler when submit to HW ring.
  100. *
  101. * @sched The pointer to the scheduler
  102. * @entity The pointer to a valid drm_sched_entity
  103. * @rq The run queue this entity belongs
  104. * @kernel If this is an entity for the kernel
  105. * @jobs The max number of jobs in the job queue
  106. *
  107. * return 0 if succeed. negative error code on failure
  108. */
  109. int drm_sched_entity_init(struct drm_gpu_scheduler *sched,
  110. struct drm_sched_entity *entity,
  111. struct drm_sched_rq *rq,
  112. uint32_t jobs, atomic_t *guilty)
  113. {
  114. if (!(sched && entity && rq))
  115. return -EINVAL;
  116. memset(entity, 0, sizeof(struct drm_sched_entity));
  117. INIT_LIST_HEAD(&entity->list);
  118. entity->rq = rq;
  119. entity->sched = sched;
  120. entity->guilty = guilty;
  121. spin_lock_init(&entity->rq_lock);
  122. spin_lock_init(&entity->queue_lock);
  123. spsc_queue_init(&entity->job_queue);
  124. atomic_set(&entity->fence_seq, 0);
  125. entity->fence_context = dma_fence_context_alloc(2);
  126. return 0;
  127. }
  128. EXPORT_SYMBOL(drm_sched_entity_init);
  129. /**
  130. * Query if entity is initialized
  131. *
  132. * @sched Pointer to scheduler instance
  133. * @entity The pointer to a valid scheduler entity
  134. *
  135. * return true if entity is initialized, false otherwise
  136. */
  137. static bool drm_sched_entity_is_initialized(struct drm_gpu_scheduler *sched,
  138. struct drm_sched_entity *entity)
  139. {
  140. return entity->sched == sched &&
  141. entity->rq != NULL;
  142. }
  143. /**
  144. * Check if entity is idle
  145. *
  146. * @entity The pointer to a valid scheduler entity
  147. *
  148. * Return true if entity don't has any unscheduled jobs.
  149. */
  150. static bool drm_sched_entity_is_idle(struct drm_sched_entity *entity)
  151. {
  152. rmb();
  153. if (spsc_queue_peek(&entity->job_queue) == NULL)
  154. return true;
  155. return false;
  156. }
  157. /**
  158. * Check if entity is ready
  159. *
  160. * @entity The pointer to a valid scheduler entity
  161. *
  162. * Return true if entity could provide a job.
  163. */
  164. static bool drm_sched_entity_is_ready(struct drm_sched_entity *entity)
  165. {
  166. if (spsc_queue_peek(&entity->job_queue) == NULL)
  167. return false;
  168. if (READ_ONCE(entity->dependency))
  169. return false;
  170. return true;
  171. }
  172. /**
  173. * Destroy a context entity
  174. *
  175. * @sched Pointer to scheduler instance
  176. * @entity The pointer to a valid scheduler entity
  177. *
  178. * Cleanup and free the allocated resources.
  179. */
  180. void drm_sched_entity_fini(struct drm_gpu_scheduler *sched,
  181. struct drm_sched_entity *entity)
  182. {
  183. int r;
  184. if (!drm_sched_entity_is_initialized(sched, entity))
  185. return;
  186. /**
  187. * The client will not queue more IBs during this fini, consume existing
  188. * queued IBs or discard them on SIGKILL
  189. */
  190. if ((current->flags & PF_SIGNALED) && current->exit_code == SIGKILL)
  191. r = -ERESTARTSYS;
  192. else
  193. r = wait_event_killable(sched->job_scheduled,
  194. drm_sched_entity_is_idle(entity));
  195. drm_sched_entity_set_rq(entity, NULL);
  196. if (r) {
  197. struct drm_sched_job *job;
  198. /* Park the kernel for a moment to make sure it isn't processing
  199. * our enity.
  200. */
  201. kthread_park(sched->thread);
  202. kthread_unpark(sched->thread);
  203. if (entity->dependency) {
  204. dma_fence_remove_callback(entity->dependency,
  205. &entity->cb);
  206. dma_fence_put(entity->dependency);
  207. entity->dependency = NULL;
  208. }
  209. while ((job = to_drm_sched_job(spsc_queue_pop(&entity->job_queue)))) {
  210. struct drm_sched_fence *s_fence = job->s_fence;
  211. drm_sched_fence_scheduled(s_fence);
  212. dma_fence_set_error(&s_fence->finished, -ESRCH);
  213. drm_sched_fence_finished(s_fence);
  214. WARN_ON(s_fence->parent);
  215. dma_fence_put(&s_fence->finished);
  216. sched->ops->free_job(job);
  217. }
  218. }
  219. }
  220. EXPORT_SYMBOL(drm_sched_entity_fini);
  221. static void drm_sched_entity_wakeup(struct dma_fence *f, struct dma_fence_cb *cb)
  222. {
  223. struct drm_sched_entity *entity =
  224. container_of(cb, struct drm_sched_entity, cb);
  225. entity->dependency = NULL;
  226. dma_fence_put(f);
  227. drm_sched_wakeup(entity->sched);
  228. }
  229. static void drm_sched_entity_clear_dep(struct dma_fence *f, struct dma_fence_cb *cb)
  230. {
  231. struct drm_sched_entity *entity =
  232. container_of(cb, struct drm_sched_entity, cb);
  233. entity->dependency = NULL;
  234. dma_fence_put(f);
  235. }
  236. void drm_sched_entity_set_rq(struct drm_sched_entity *entity,
  237. struct drm_sched_rq *rq)
  238. {
  239. if (entity->rq == rq)
  240. return;
  241. spin_lock(&entity->rq_lock);
  242. if (entity->rq)
  243. drm_sched_rq_remove_entity(entity->rq, entity);
  244. entity->rq = rq;
  245. if (rq)
  246. drm_sched_rq_add_entity(rq, entity);
  247. spin_unlock(&entity->rq_lock);
  248. }
  249. EXPORT_SYMBOL(drm_sched_entity_set_rq);
  250. bool drm_sched_dependency_optimized(struct dma_fence* fence,
  251. struct drm_sched_entity *entity)
  252. {
  253. struct drm_gpu_scheduler *sched = entity->sched;
  254. struct drm_sched_fence *s_fence;
  255. if (!fence || dma_fence_is_signaled(fence))
  256. return false;
  257. if (fence->context == entity->fence_context)
  258. return true;
  259. s_fence = to_drm_sched_fence(fence);
  260. if (s_fence && s_fence->sched == sched)
  261. return true;
  262. return false;
  263. }
  264. EXPORT_SYMBOL(drm_sched_dependency_optimized);
  265. static bool drm_sched_entity_add_dependency_cb(struct drm_sched_entity *entity)
  266. {
  267. struct drm_gpu_scheduler *sched = entity->sched;
  268. struct dma_fence * fence = entity->dependency;
  269. struct drm_sched_fence *s_fence;
  270. if (fence->context == entity->fence_context) {
  271. /* We can ignore fences from ourself */
  272. dma_fence_put(entity->dependency);
  273. return false;
  274. }
  275. s_fence = to_drm_sched_fence(fence);
  276. if (s_fence && s_fence->sched == sched) {
  277. /*
  278. * Fence is from the same scheduler, only need to wait for
  279. * it to be scheduled
  280. */
  281. fence = dma_fence_get(&s_fence->scheduled);
  282. dma_fence_put(entity->dependency);
  283. entity->dependency = fence;
  284. if (!dma_fence_add_callback(fence, &entity->cb,
  285. drm_sched_entity_clear_dep))
  286. return true;
  287. /* Ignore it when it is already scheduled */
  288. dma_fence_put(fence);
  289. return false;
  290. }
  291. if (!dma_fence_add_callback(entity->dependency, &entity->cb,
  292. drm_sched_entity_wakeup))
  293. return true;
  294. dma_fence_put(entity->dependency);
  295. return false;
  296. }
  297. static struct drm_sched_job *
  298. drm_sched_entity_pop_job(struct drm_sched_entity *entity)
  299. {
  300. struct drm_gpu_scheduler *sched = entity->sched;
  301. struct drm_sched_job *sched_job = to_drm_sched_job(
  302. spsc_queue_peek(&entity->job_queue));
  303. if (!sched_job)
  304. return NULL;
  305. while ((entity->dependency = sched->ops->dependency(sched_job, entity)))
  306. if (drm_sched_entity_add_dependency_cb(entity))
  307. return NULL;
  308. /* skip jobs from entity that marked guilty */
  309. if (entity->guilty && atomic_read(entity->guilty))
  310. dma_fence_set_error(&sched_job->s_fence->finished, -ECANCELED);
  311. spsc_queue_pop(&entity->job_queue);
  312. return sched_job;
  313. }
  314. /**
  315. * Submit a job to the job queue
  316. *
  317. * @sched_job The pointer to job required to submit
  318. *
  319. * Returns 0 for success, negative error code otherwise.
  320. */
  321. void drm_sched_entity_push_job(struct drm_sched_job *sched_job,
  322. struct drm_sched_entity *entity)
  323. {
  324. struct drm_gpu_scheduler *sched = sched_job->sched;
  325. bool first = false;
  326. trace_drm_sched_job(sched_job, entity);
  327. spin_lock(&entity->queue_lock);
  328. first = spsc_queue_push(&entity->job_queue, &sched_job->queue_node);
  329. spin_unlock(&entity->queue_lock);
  330. /* first job wakes up scheduler */
  331. if (first) {
  332. /* Add the entity to the run queue */
  333. spin_lock(&entity->rq_lock);
  334. drm_sched_rq_add_entity(entity->rq, entity);
  335. spin_unlock(&entity->rq_lock);
  336. drm_sched_wakeup(sched);
  337. }
  338. }
  339. EXPORT_SYMBOL(drm_sched_entity_push_job);
  340. /* job_finish is called after hw fence signaled
  341. */
  342. static void drm_sched_job_finish(struct work_struct *work)
  343. {
  344. struct drm_sched_job *s_job = container_of(work, struct drm_sched_job,
  345. finish_work);
  346. struct drm_gpu_scheduler *sched = s_job->sched;
  347. /* remove job from ring_mirror_list */
  348. spin_lock(&sched->job_list_lock);
  349. list_del_init(&s_job->node);
  350. if (sched->timeout != MAX_SCHEDULE_TIMEOUT) {
  351. struct drm_sched_job *next;
  352. spin_unlock(&sched->job_list_lock);
  353. cancel_delayed_work_sync(&s_job->work_tdr);
  354. spin_lock(&sched->job_list_lock);
  355. /* queue TDR for next job */
  356. next = list_first_entry_or_null(&sched->ring_mirror_list,
  357. struct drm_sched_job, node);
  358. if (next)
  359. schedule_delayed_work(&next->work_tdr, sched->timeout);
  360. }
  361. spin_unlock(&sched->job_list_lock);
  362. dma_fence_put(&s_job->s_fence->finished);
  363. sched->ops->free_job(s_job);
  364. }
  365. static void drm_sched_job_finish_cb(struct dma_fence *f,
  366. struct dma_fence_cb *cb)
  367. {
  368. struct drm_sched_job *job = container_of(cb, struct drm_sched_job,
  369. finish_cb);
  370. schedule_work(&job->finish_work);
  371. }
  372. static void drm_sched_job_begin(struct drm_sched_job *s_job)
  373. {
  374. struct drm_gpu_scheduler *sched = s_job->sched;
  375. dma_fence_add_callback(&s_job->s_fence->finished, &s_job->finish_cb,
  376. drm_sched_job_finish_cb);
  377. spin_lock(&sched->job_list_lock);
  378. list_add_tail(&s_job->node, &sched->ring_mirror_list);
  379. if (sched->timeout != MAX_SCHEDULE_TIMEOUT &&
  380. list_first_entry_or_null(&sched->ring_mirror_list,
  381. struct drm_sched_job, node) == s_job)
  382. schedule_delayed_work(&s_job->work_tdr, sched->timeout);
  383. spin_unlock(&sched->job_list_lock);
  384. }
  385. static void drm_sched_job_timedout(struct work_struct *work)
  386. {
  387. struct drm_sched_job *job = container_of(work, struct drm_sched_job,
  388. work_tdr.work);
  389. job->sched->ops->timedout_job(job);
  390. }
  391. void drm_sched_hw_job_reset(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad)
  392. {
  393. struct drm_sched_job *s_job;
  394. struct drm_sched_entity *entity, *tmp;
  395. int i;
  396. spin_lock(&sched->job_list_lock);
  397. list_for_each_entry_reverse(s_job, &sched->ring_mirror_list, node) {
  398. if (s_job->s_fence->parent &&
  399. dma_fence_remove_callback(s_job->s_fence->parent,
  400. &s_job->s_fence->cb)) {
  401. dma_fence_put(s_job->s_fence->parent);
  402. s_job->s_fence->parent = NULL;
  403. atomic_dec(&sched->hw_rq_count);
  404. }
  405. }
  406. spin_unlock(&sched->job_list_lock);
  407. if (bad && bad->s_priority != DRM_SCHED_PRIORITY_KERNEL) {
  408. atomic_inc(&bad->karma);
  409. /* don't increase @bad's karma if it's from KERNEL RQ,
  410. * becuase sometimes GPU hang would cause kernel jobs (like VM updating jobs)
  411. * corrupt but keep in mind that kernel jobs always considered good.
  412. */
  413. for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_KERNEL; i++ ) {
  414. struct drm_sched_rq *rq = &sched->sched_rq[i];
  415. spin_lock(&rq->lock);
  416. list_for_each_entry_safe(entity, tmp, &rq->entities, list) {
  417. if (bad->s_fence->scheduled.context == entity->fence_context) {
  418. if (atomic_read(&bad->karma) > bad->sched->hang_limit)
  419. if (entity->guilty)
  420. atomic_set(entity->guilty, 1);
  421. break;
  422. }
  423. }
  424. spin_unlock(&rq->lock);
  425. if (&entity->list != &rq->entities)
  426. break;
  427. }
  428. }
  429. }
  430. EXPORT_SYMBOL(drm_sched_hw_job_reset);
  431. void drm_sched_job_recovery(struct drm_gpu_scheduler *sched)
  432. {
  433. struct drm_sched_job *s_job, *tmp;
  434. bool found_guilty = false;
  435. int r;
  436. spin_lock(&sched->job_list_lock);
  437. s_job = list_first_entry_or_null(&sched->ring_mirror_list,
  438. struct drm_sched_job, node);
  439. if (s_job && sched->timeout != MAX_SCHEDULE_TIMEOUT)
  440. schedule_delayed_work(&s_job->work_tdr, sched->timeout);
  441. list_for_each_entry_safe(s_job, tmp, &sched->ring_mirror_list, node) {
  442. struct drm_sched_fence *s_fence = s_job->s_fence;
  443. struct dma_fence *fence;
  444. uint64_t guilty_context;
  445. if (!found_guilty && atomic_read(&s_job->karma) > sched->hang_limit) {
  446. found_guilty = true;
  447. guilty_context = s_job->s_fence->scheduled.context;
  448. }
  449. if (found_guilty && s_job->s_fence->scheduled.context == guilty_context)
  450. dma_fence_set_error(&s_fence->finished, -ECANCELED);
  451. spin_unlock(&sched->job_list_lock);
  452. fence = sched->ops->run_job(s_job);
  453. atomic_inc(&sched->hw_rq_count);
  454. if (fence) {
  455. s_fence->parent = dma_fence_get(fence);
  456. r = dma_fence_add_callback(fence, &s_fence->cb,
  457. drm_sched_process_job);
  458. if (r == -ENOENT)
  459. drm_sched_process_job(fence, &s_fence->cb);
  460. else if (r)
  461. DRM_ERROR("fence add callback failed (%d)\n",
  462. r);
  463. dma_fence_put(fence);
  464. } else {
  465. drm_sched_process_job(NULL, &s_fence->cb);
  466. }
  467. spin_lock(&sched->job_list_lock);
  468. }
  469. spin_unlock(&sched->job_list_lock);
  470. }
  471. EXPORT_SYMBOL(drm_sched_job_recovery);
  472. /* init a sched_job with basic field */
  473. int drm_sched_job_init(struct drm_sched_job *job,
  474. struct drm_gpu_scheduler *sched,
  475. struct drm_sched_entity *entity,
  476. void *owner)
  477. {
  478. job->sched = sched;
  479. job->s_priority = entity->rq - sched->sched_rq;
  480. job->s_fence = drm_sched_fence_create(entity, owner);
  481. if (!job->s_fence)
  482. return -ENOMEM;
  483. job->id = atomic64_inc_return(&sched->job_id_count);
  484. INIT_WORK(&job->finish_work, drm_sched_job_finish);
  485. INIT_LIST_HEAD(&job->node);
  486. INIT_DELAYED_WORK(&job->work_tdr, drm_sched_job_timedout);
  487. return 0;
  488. }
  489. EXPORT_SYMBOL(drm_sched_job_init);
  490. /**
  491. * Return ture if we can push more jobs to the hw.
  492. */
  493. static bool drm_sched_ready(struct drm_gpu_scheduler *sched)
  494. {
  495. return atomic_read(&sched->hw_rq_count) <
  496. sched->hw_submission_limit;
  497. }
  498. /**
  499. * Wake up the scheduler when it is ready
  500. */
  501. static void drm_sched_wakeup(struct drm_gpu_scheduler *sched)
  502. {
  503. if (drm_sched_ready(sched))
  504. wake_up_interruptible(&sched->wake_up_worker);
  505. }
  506. /**
  507. * Select next entity to process
  508. */
  509. static struct drm_sched_entity *
  510. drm_sched_select_entity(struct drm_gpu_scheduler *sched)
  511. {
  512. struct drm_sched_entity *entity;
  513. int i;
  514. if (!drm_sched_ready(sched))
  515. return NULL;
  516. /* Kernel run queue has higher priority than normal run queue*/
  517. for (i = DRM_SCHED_PRIORITY_MAX - 1; i >= DRM_SCHED_PRIORITY_MIN; i--) {
  518. entity = drm_sched_rq_select_entity(&sched->sched_rq[i]);
  519. if (entity)
  520. break;
  521. }
  522. return entity;
  523. }
  524. static void drm_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb)
  525. {
  526. struct drm_sched_fence *s_fence =
  527. container_of(cb, struct drm_sched_fence, cb);
  528. struct drm_gpu_scheduler *sched = s_fence->sched;
  529. dma_fence_get(&s_fence->finished);
  530. atomic_dec(&sched->hw_rq_count);
  531. drm_sched_fence_finished(s_fence);
  532. trace_drm_sched_process_job(s_fence);
  533. dma_fence_put(&s_fence->finished);
  534. wake_up_interruptible(&sched->wake_up_worker);
  535. }
  536. static bool drm_sched_blocked(struct drm_gpu_scheduler *sched)
  537. {
  538. if (kthread_should_park()) {
  539. kthread_parkme();
  540. return true;
  541. }
  542. return false;
  543. }
  544. static int drm_sched_main(void *param)
  545. {
  546. struct sched_param sparam = {.sched_priority = 1};
  547. struct drm_gpu_scheduler *sched = (struct drm_gpu_scheduler *)param;
  548. int r;
  549. sched_setscheduler(current, SCHED_FIFO, &sparam);
  550. while (!kthread_should_stop()) {
  551. struct drm_sched_entity *entity = NULL;
  552. struct drm_sched_fence *s_fence;
  553. struct drm_sched_job *sched_job;
  554. struct dma_fence *fence;
  555. wait_event_interruptible(sched->wake_up_worker,
  556. (!drm_sched_blocked(sched) &&
  557. (entity = drm_sched_select_entity(sched))) ||
  558. kthread_should_stop());
  559. if (!entity)
  560. continue;
  561. sched_job = drm_sched_entity_pop_job(entity);
  562. if (!sched_job)
  563. continue;
  564. s_fence = sched_job->s_fence;
  565. atomic_inc(&sched->hw_rq_count);
  566. drm_sched_job_begin(sched_job);
  567. fence = sched->ops->run_job(sched_job);
  568. drm_sched_fence_scheduled(s_fence);
  569. if (fence) {
  570. s_fence->parent = dma_fence_get(fence);
  571. r = dma_fence_add_callback(fence, &s_fence->cb,
  572. drm_sched_process_job);
  573. if (r == -ENOENT)
  574. drm_sched_process_job(fence, &s_fence->cb);
  575. else if (r)
  576. DRM_ERROR("fence add callback failed (%d)\n",
  577. r);
  578. dma_fence_put(fence);
  579. } else {
  580. drm_sched_process_job(NULL, &s_fence->cb);
  581. }
  582. wake_up(&sched->job_scheduled);
  583. }
  584. return 0;
  585. }
  586. /**
  587. * Init a gpu scheduler instance
  588. *
  589. * @sched The pointer to the scheduler
  590. * @ops The backend operations for this scheduler.
  591. * @hw_submissions Number of hw submissions to do.
  592. * @name Name used for debugging
  593. *
  594. * Return 0 on success, otherwise error code.
  595. */
  596. int drm_sched_init(struct drm_gpu_scheduler *sched,
  597. const struct drm_sched_backend_ops *ops,
  598. unsigned hw_submission,
  599. unsigned hang_limit,
  600. long timeout,
  601. const char *name)
  602. {
  603. int i;
  604. sched->ops = ops;
  605. sched->hw_submission_limit = hw_submission;
  606. sched->name = name;
  607. sched->timeout = timeout;
  608. sched->hang_limit = hang_limit;
  609. for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_MAX; i++)
  610. drm_sched_rq_init(&sched->sched_rq[i]);
  611. init_waitqueue_head(&sched->wake_up_worker);
  612. init_waitqueue_head(&sched->job_scheduled);
  613. INIT_LIST_HEAD(&sched->ring_mirror_list);
  614. spin_lock_init(&sched->job_list_lock);
  615. atomic_set(&sched->hw_rq_count, 0);
  616. atomic64_set(&sched->job_id_count, 0);
  617. /* Each scheduler will run on a seperate kernel thread */
  618. sched->thread = kthread_run(drm_sched_main, sched, sched->name);
  619. if (IS_ERR(sched->thread)) {
  620. DRM_ERROR("Failed to create scheduler for %s.\n", name);
  621. return PTR_ERR(sched->thread);
  622. }
  623. return 0;
  624. }
  625. EXPORT_SYMBOL(drm_sched_init);
  626. /**
  627. * Destroy a gpu scheduler
  628. *
  629. * @sched The pointer to the scheduler
  630. */
  631. void drm_sched_fini(struct drm_gpu_scheduler *sched)
  632. {
  633. if (sched->thread)
  634. kthread_stop(sched->thread);
  635. }
  636. EXPORT_SYMBOL(drm_sched_fini);