cros_ec_lpc.c 7.8 KB

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  1. /*
  2. * cros_ec_lpc - LPC access to the Chrome OS Embedded Controller
  3. *
  4. * Copyright (C) 2012-2015 Google, Inc
  5. *
  6. * This software is licensed under the terms of the GNU General Public
  7. * License version 2, as published by the Free Software Foundation, and
  8. * may be copied, distributed, and modified under those terms.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * This driver uses the Chrome OS EC byte-level message-based protocol for
  16. * communicating the keyboard state (which keys are pressed) from a keyboard EC
  17. * to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
  18. * but everything else (including deghosting) is done here. The main
  19. * motivation for this is to keep the EC firmware as simple as possible, since
  20. * it cannot be easily upgraded and EC flash/IRAM space is relatively
  21. * expensive.
  22. */
  23. #include <linux/dmi.h>
  24. #include <linux/delay.h>
  25. #include <linux/mfd/cros_ec.h>
  26. #include <linux/mfd/cros_ec_commands.h>
  27. #include <linux/module.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/printk.h>
  30. #define DRV_NAME "cros_ec_lpc"
  31. static int ec_response_timed_out(void)
  32. {
  33. unsigned long one_second = jiffies + HZ;
  34. usleep_range(200, 300);
  35. do {
  36. if (!(inb(EC_LPC_ADDR_HOST_CMD) & EC_LPC_STATUS_BUSY_MASK))
  37. return 0;
  38. usleep_range(100, 200);
  39. } while (time_before(jiffies, one_second));
  40. return 1;
  41. }
  42. static int cros_ec_cmd_xfer_lpc(struct cros_ec_device *ec,
  43. struct cros_ec_command *msg)
  44. {
  45. struct ec_lpc_host_args args;
  46. int csum;
  47. int i;
  48. int ret = 0;
  49. if (msg->outsize > EC_PROTO2_MAX_PARAM_SIZE ||
  50. msg->insize > EC_PROTO2_MAX_PARAM_SIZE) {
  51. dev_err(ec->dev,
  52. "invalid buffer sizes (out %d, in %d)\n",
  53. msg->outsize, msg->insize);
  54. return -EINVAL;
  55. }
  56. /* Now actually send the command to the EC and get the result */
  57. args.flags = EC_HOST_ARGS_FLAG_FROM_HOST;
  58. args.command_version = msg->version;
  59. args.data_size = msg->outsize;
  60. /* Initialize checksum */
  61. csum = msg->command + args.flags +
  62. args.command_version + args.data_size;
  63. /* Copy data and update checksum */
  64. for (i = 0; i < msg->outsize; i++) {
  65. outb(msg->outdata[i], EC_LPC_ADDR_HOST_PARAM + i);
  66. csum += msg->outdata[i];
  67. }
  68. /* Finalize checksum and write args */
  69. args.checksum = csum & 0xFF;
  70. outb(args.flags, EC_LPC_ADDR_HOST_ARGS);
  71. outb(args.command_version, EC_LPC_ADDR_HOST_ARGS + 1);
  72. outb(args.data_size, EC_LPC_ADDR_HOST_ARGS + 2);
  73. outb(args.checksum, EC_LPC_ADDR_HOST_ARGS + 3);
  74. /* Here we go */
  75. outb(msg->command, EC_LPC_ADDR_HOST_CMD);
  76. if (ec_response_timed_out()) {
  77. dev_warn(ec->dev, "EC responsed timed out\n");
  78. ret = -EIO;
  79. goto done;
  80. }
  81. /* Check result */
  82. msg->result = inb(EC_LPC_ADDR_HOST_DATA);
  83. switch (msg->result) {
  84. case EC_RES_SUCCESS:
  85. break;
  86. case EC_RES_IN_PROGRESS:
  87. ret = -EAGAIN;
  88. dev_dbg(ec->dev, "command 0x%02x in progress\n",
  89. msg->command);
  90. goto done;
  91. default:
  92. dev_dbg(ec->dev, "command 0x%02x returned %d\n",
  93. msg->command, msg->result);
  94. }
  95. /* Read back args */
  96. args.flags = inb(EC_LPC_ADDR_HOST_ARGS);
  97. args.command_version = inb(EC_LPC_ADDR_HOST_ARGS + 1);
  98. args.data_size = inb(EC_LPC_ADDR_HOST_ARGS + 2);
  99. args.checksum = inb(EC_LPC_ADDR_HOST_ARGS + 3);
  100. if (args.data_size > msg->insize) {
  101. dev_err(ec->dev,
  102. "packet too long (%d bytes, expected %d)",
  103. args.data_size, msg->insize);
  104. ret = -ENOSPC;
  105. goto done;
  106. }
  107. /* Start calculating response checksum */
  108. csum = msg->command + args.flags +
  109. args.command_version + args.data_size;
  110. /* Read response and update checksum */
  111. for (i = 0; i < args.data_size; i++) {
  112. msg->indata[i] = inb(EC_LPC_ADDR_HOST_PARAM + i);
  113. csum += msg->indata[i];
  114. }
  115. /* Verify checksum */
  116. if (args.checksum != (csum & 0xFF)) {
  117. dev_err(ec->dev,
  118. "bad packet checksum, expected %02x, got %02x\n",
  119. args.checksum, csum & 0xFF);
  120. ret = -EBADMSG;
  121. goto done;
  122. }
  123. /* Return actual amount of data received */
  124. ret = args.data_size;
  125. done:
  126. return ret;
  127. }
  128. /* Returns num bytes read, or negative on error. Doesn't need locking. */
  129. static int cros_ec_lpc_readmem(struct cros_ec_device *ec, unsigned int offset,
  130. unsigned int bytes, void *dest)
  131. {
  132. int i = offset;
  133. char *s = dest;
  134. int cnt = 0;
  135. if (offset >= EC_MEMMAP_SIZE - bytes)
  136. return -EINVAL;
  137. /* fixed length */
  138. if (bytes) {
  139. for (; cnt < bytes; i++, s++, cnt++)
  140. *s = inb(EC_LPC_ADDR_MEMMAP + i);
  141. return cnt;
  142. }
  143. /* string */
  144. for (; i < EC_MEMMAP_SIZE; i++, s++) {
  145. *s = inb(EC_LPC_ADDR_MEMMAP + i);
  146. cnt++;
  147. if (!*s)
  148. break;
  149. }
  150. return cnt;
  151. }
  152. static int cros_ec_lpc_probe(struct platform_device *pdev)
  153. {
  154. struct device *dev = &pdev->dev;
  155. struct cros_ec_device *ec_dev;
  156. int ret;
  157. if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,
  158. dev_name(dev))) {
  159. dev_err(dev, "couldn't reserve memmap region\n");
  160. return -EBUSY;
  161. }
  162. if ((inb(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID) != 'E') ||
  163. (inb(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID + 1) != 'C')) {
  164. dev_err(dev, "EC ID not detected\n");
  165. return -ENODEV;
  166. }
  167. if (!devm_request_region(dev, EC_HOST_CMD_REGION0,
  168. EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
  169. dev_err(dev, "couldn't reserve region0\n");
  170. return -EBUSY;
  171. }
  172. if (!devm_request_region(dev, EC_HOST_CMD_REGION1,
  173. EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
  174. dev_err(dev, "couldn't reserve region1\n");
  175. return -EBUSY;
  176. }
  177. ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
  178. if (!ec_dev)
  179. return -ENOMEM;
  180. platform_set_drvdata(pdev, ec_dev);
  181. ec_dev->dev = dev;
  182. ec_dev->ec_name = pdev->name;
  183. ec_dev->phys_name = dev_name(dev);
  184. ec_dev->parent = dev;
  185. ec_dev->cmd_xfer = cros_ec_cmd_xfer_lpc;
  186. ec_dev->cmd_readmem = cros_ec_lpc_readmem;
  187. ret = cros_ec_register(ec_dev);
  188. if (ret) {
  189. dev_err(dev, "couldn't register ec_dev (%d)\n", ret);
  190. return ret;
  191. }
  192. return 0;
  193. }
  194. static int cros_ec_lpc_remove(struct platform_device *pdev)
  195. {
  196. struct cros_ec_device *ec_dev;
  197. ec_dev = platform_get_drvdata(pdev);
  198. cros_ec_remove(ec_dev);
  199. return 0;
  200. }
  201. static struct dmi_system_id cros_ec_lpc_dmi_table[] __initdata = {
  202. {
  203. /*
  204. * Today all Chromebooks/boxes ship with Google_* as version and
  205. * coreboot as bios vendor. No other systems with this
  206. * combination are known to date.
  207. */
  208. .matches = {
  209. DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
  210. DMI_MATCH(DMI_BIOS_VERSION, "Google_"),
  211. },
  212. },
  213. {
  214. /* x86-link, the Chromebook Pixel. */
  215. .matches = {
  216. DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
  217. DMI_MATCH(DMI_PRODUCT_NAME, "Link"),
  218. },
  219. },
  220. {
  221. /* x86-peppy, the Acer C720 Chromebook. */
  222. .matches = {
  223. DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
  224. DMI_MATCH(DMI_PRODUCT_NAME, "Peppy"),
  225. },
  226. },
  227. { /* sentinel */ }
  228. };
  229. MODULE_DEVICE_TABLE(dmi, cros_ec_lpc_dmi_table);
  230. static struct platform_driver cros_ec_lpc_driver = {
  231. .driver = {
  232. .name = DRV_NAME,
  233. .owner = THIS_MODULE,
  234. },
  235. .probe = cros_ec_lpc_probe,
  236. .remove = cros_ec_lpc_remove,
  237. };
  238. static struct platform_device cros_ec_lpc_device = {
  239. .name = DRV_NAME
  240. };
  241. static int __init cros_ec_lpc_init(void)
  242. {
  243. int ret;
  244. if (!dmi_check_system(cros_ec_lpc_dmi_table)) {
  245. pr_err(DRV_NAME ": unsupported system.\n");
  246. return -ENODEV;
  247. }
  248. /* Register the driver */
  249. ret = platform_driver_register(&cros_ec_lpc_driver);
  250. if (ret) {
  251. pr_err(DRV_NAME ": can't register driver: %d\n", ret);
  252. return ret;
  253. }
  254. /* Register the device, and it'll get hooked up automatically */
  255. ret = platform_device_register(&cros_ec_lpc_device);
  256. if (ret) {
  257. pr_err(DRV_NAME ": can't register device: %d\n", ret);
  258. platform_driver_unregister(&cros_ec_lpc_driver);
  259. return ret;
  260. }
  261. return 0;
  262. }
  263. static void __exit cros_ec_lpc_exit(void)
  264. {
  265. platform_device_unregister(&cros_ec_lpc_device);
  266. platform_driver_unregister(&cros_ec_lpc_driver);
  267. }
  268. module_init(cros_ec_lpc_init);
  269. module_exit(cros_ec_lpc_exit);
  270. MODULE_LICENSE("GPL");
  271. MODULE_DESCRIPTION("ChromeOS EC LPC driver");