i40iw.h 15 KB

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  1. /*******************************************************************************
  2. *
  3. * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenFabrics.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. *******************************************************************************/
  34. #ifndef I40IW_IW_H
  35. #define I40IW_IW_H
  36. #include <linux/netdevice.h>
  37. #include <linux/inetdevice.h>
  38. #include <linux/spinlock.h>
  39. #include <linux/kernel.h>
  40. #include <linux/delay.h>
  41. #include <linux/pci.h>
  42. #include <linux/dma-mapping.h>
  43. #include <linux/workqueue.h>
  44. #include <linux/slab.h>
  45. #include <linux/io.h>
  46. #include <linux/crc32c.h>
  47. #include <rdma/ib_smi.h>
  48. #include <rdma/ib_verbs.h>
  49. #include <rdma/ib_pack.h>
  50. #include <rdma/rdma_cm.h>
  51. #include <rdma/iw_cm.h>
  52. #include <rdma/iw_portmap.h>
  53. #include <rdma/rdma_netlink.h>
  54. #include <crypto/hash.h>
  55. #include "i40iw_status.h"
  56. #include "i40iw_osdep.h"
  57. #include "i40iw_d.h"
  58. #include "i40iw_hmc.h"
  59. #include <i40e_client.h>
  60. #include "i40iw_type.h"
  61. #include "i40iw_p.h"
  62. #include "i40iw_ucontext.h"
  63. #include "i40iw_pble.h"
  64. #include "i40iw_verbs.h"
  65. #include "i40iw_cm.h"
  66. #include "i40iw_user.h"
  67. #include "i40iw_puda.h"
  68. #define I40IW_FW_VERSION 2
  69. #define I40IW_HW_VERSION 2
  70. #define I40IW_ARP_ADD 1
  71. #define I40IW_ARP_DELETE 2
  72. #define I40IW_ARP_RESOLVE 3
  73. #define I40IW_MACIP_ADD 1
  74. #define I40IW_MACIP_DELETE 2
  75. #define IW_CCQ_SIZE (I40IW_CQP_SW_SQSIZE_2048 + 1)
  76. #define IW_CEQ_SIZE 2048
  77. #define IW_AEQ_SIZE 2048
  78. #define RX_BUF_SIZE (1536 + 8)
  79. #define IW_REG0_SIZE (4 * 1024)
  80. #define IW_TX_TIMEOUT (6 * HZ)
  81. #define IW_FIRST_QPN 1
  82. #define IW_SW_CONTEXT_ALIGN 1024
  83. #define MAX_DPC_ITERATIONS 128
  84. #define I40IW_EVENT_TIMEOUT 100000
  85. #define I40IW_VCHNL_EVENT_TIMEOUT 100000
  86. #define I40IW_NO_VLAN 0xffff
  87. #define I40IW_NO_QSET 0xffff
  88. /* access to mcast filter list */
  89. #define IW_ADD_MCAST false
  90. #define IW_DEL_MCAST true
  91. #define I40IW_DRV_OPT_ENABLE_MPA_VER_0 0x00000001
  92. #define I40IW_DRV_OPT_DISABLE_MPA_CRC 0x00000002
  93. #define I40IW_DRV_OPT_DISABLE_FIRST_WRITE 0x00000004
  94. #define I40IW_DRV_OPT_DISABLE_INTF 0x00000008
  95. #define I40IW_DRV_OPT_ENABLE_MSI 0x00000010
  96. #define I40IW_DRV_OPT_DUAL_LOGICAL_PORT 0x00000020
  97. #define I40IW_DRV_OPT_NO_INLINE_DATA 0x00000080
  98. #define I40IW_DRV_OPT_DISABLE_INT_MOD 0x00000100
  99. #define I40IW_DRV_OPT_DISABLE_VIRT_WQ 0x00000200
  100. #define I40IW_DRV_OPT_ENABLE_PAU 0x00000400
  101. #define I40IW_DRV_OPT_MCAST_LOGPORT_MAP 0x00000800
  102. #define IW_HMC_OBJ_TYPE_NUM ARRAY_SIZE(iw_hmc_obj_types)
  103. #define IW_CFG_FPM_QP_COUNT 32768
  104. #define I40IW_MTU_TO_MSS 40
  105. #define I40IW_DEFAULT_MSS 1460
  106. struct i40iw_cqp_compl_info {
  107. u32 op_ret_val;
  108. u16 maj_err_code;
  109. u16 min_err_code;
  110. bool error;
  111. u8 op_code;
  112. };
  113. #define i40iw_pr_err(fmt, args ...) pr_err("%s: "fmt, __func__, ## args)
  114. #define i40iw_pr_info(fmt, args ...) pr_info("%s: " fmt, __func__, ## args)
  115. #define i40iw_pr_warn(fmt, args ...) pr_warn("%s: " fmt, __func__, ## args)
  116. struct i40iw_cqp_request {
  117. struct cqp_commands_info info;
  118. wait_queue_head_t waitq;
  119. struct list_head list;
  120. atomic_t refcount;
  121. void (*callback_fcn)(struct i40iw_cqp_request*, u32);
  122. void *param;
  123. struct i40iw_cqp_compl_info compl_info;
  124. bool waiting;
  125. bool request_done;
  126. bool dynamic;
  127. };
  128. struct i40iw_cqp {
  129. struct i40iw_sc_cqp sc_cqp;
  130. spinlock_t req_lock; /*cqp request list */
  131. wait_queue_head_t waitq;
  132. struct i40iw_dma_mem sq;
  133. struct i40iw_dma_mem host_ctx;
  134. u64 *scratch_array;
  135. struct i40iw_cqp_request *cqp_requests;
  136. struct list_head cqp_avail_reqs;
  137. struct list_head cqp_pending_reqs;
  138. };
  139. struct i40iw_device;
  140. struct i40iw_ccq {
  141. struct i40iw_sc_cq sc_cq;
  142. spinlock_t lock; /* ccq control */
  143. wait_queue_head_t waitq;
  144. struct i40iw_dma_mem mem_cq;
  145. struct i40iw_dma_mem shadow_area;
  146. };
  147. struct i40iw_ceq {
  148. struct i40iw_sc_ceq sc_ceq;
  149. struct i40iw_dma_mem mem;
  150. u32 irq;
  151. u32 msix_idx;
  152. struct i40iw_device *iwdev;
  153. struct tasklet_struct dpc_tasklet;
  154. };
  155. struct i40iw_aeq {
  156. struct i40iw_sc_aeq sc_aeq;
  157. struct i40iw_dma_mem mem;
  158. };
  159. struct i40iw_arp_entry {
  160. u32 ip_addr[4];
  161. u8 mac_addr[ETH_ALEN];
  162. };
  163. enum init_completion_state {
  164. INVALID_STATE = 0,
  165. INITIAL_STATE,
  166. CQP_CREATED,
  167. HMC_OBJS_CREATED,
  168. PBLE_CHUNK_MEM,
  169. CCQ_CREATED,
  170. AEQ_CREATED,
  171. CEQ_CREATED,
  172. ILQ_CREATED,
  173. IEQ_CREATED,
  174. INET_NOTIFIER,
  175. IP_ADDR_REGISTERED,
  176. RDMA_DEV_REGISTERED
  177. };
  178. struct i40iw_msix_vector {
  179. u32 idx;
  180. u32 irq;
  181. u32 cpu_affinity;
  182. u32 ceq_id;
  183. };
  184. #define I40IW_MSIX_TABLE_SIZE 65
  185. struct virtchnl_work {
  186. struct work_struct work;
  187. union {
  188. struct i40iw_cqp_request *cqp_request;
  189. struct i40iw_virtchnl_work_info work_info;
  190. };
  191. };
  192. struct i40e_qvlist_info;
  193. struct i40iw_device {
  194. struct i40iw_ib_device *iwibdev;
  195. struct net_device *netdev;
  196. wait_queue_head_t vchnl_waitq;
  197. struct i40iw_sc_dev sc_dev;
  198. struct i40iw_handler *hdl;
  199. struct i40e_info *ldev;
  200. struct i40e_client *client;
  201. struct i40iw_hw hw;
  202. struct i40iw_cm_core cm_core;
  203. unsigned long *mem_resources;
  204. unsigned long *allocated_qps;
  205. unsigned long *allocated_cqs;
  206. unsigned long *allocated_mrs;
  207. unsigned long *allocated_pds;
  208. unsigned long *allocated_arps;
  209. struct i40iw_qp **qp_table;
  210. bool msix_shared;
  211. u32 msix_count;
  212. struct i40iw_msix_vector *iw_msixtbl;
  213. struct i40e_qvlist_info *iw_qvlist;
  214. struct i40iw_hmc_pble_rsrc *pble_rsrc;
  215. struct i40iw_arp_entry *arp_table;
  216. struct i40iw_cqp cqp;
  217. struct i40iw_ccq ccq;
  218. u32 ceqs_count;
  219. struct i40iw_ceq *ceqlist;
  220. struct i40iw_aeq aeq;
  221. u32 arp_table_size;
  222. u32 next_arp_index;
  223. spinlock_t resource_lock; /* hw resource access */
  224. u32 vendor_id;
  225. u32 vendor_part_id;
  226. u32 of_device_registered;
  227. u32 device_cap_flags;
  228. unsigned long db_start;
  229. u8 resource_profile;
  230. u8 max_rdma_vfs;
  231. u8 max_enabled_vfs;
  232. u8 max_sge;
  233. u8 iw_status;
  234. u8 send_term_ok;
  235. bool push_mode; /* Initialized from parameter passed to driver */
  236. /* x710 specific */
  237. struct mutex pbl_mutex;
  238. struct tasklet_struct dpc_tasklet;
  239. struct workqueue_struct *virtchnl_wq;
  240. struct virtchnl_work virtchnl_w[I40IW_MAX_PE_ENABLED_VF_COUNT];
  241. struct i40iw_dma_mem obj_mem;
  242. struct i40iw_dma_mem obj_next;
  243. u8 *hmc_info_mem;
  244. u32 sd_type;
  245. struct workqueue_struct *param_wq;
  246. atomic_t params_busy;
  247. u32 mss;
  248. enum init_completion_state init_state;
  249. u16 mac_ip_table_idx;
  250. atomic_t vchnl_msgs;
  251. u32 max_mr;
  252. u32 max_qp;
  253. u32 max_cq;
  254. u32 max_pd;
  255. u32 next_qp;
  256. u32 next_cq;
  257. u32 next_pd;
  258. u32 max_mr_size;
  259. u32 max_qp_wr;
  260. u32 max_cqe;
  261. u32 mr_stagmask;
  262. u32 mpa_version;
  263. bool dcb;
  264. };
  265. struct i40iw_ib_device {
  266. struct ib_device ibdev;
  267. struct i40iw_device *iwdev;
  268. };
  269. struct i40iw_handler {
  270. struct list_head list;
  271. struct i40e_client *client;
  272. struct i40iw_device device;
  273. struct i40e_info ldev;
  274. };
  275. /**
  276. * to_iwdev - get device
  277. * @ibdev: ib device
  278. **/
  279. static inline struct i40iw_device *to_iwdev(struct ib_device *ibdev)
  280. {
  281. return container_of(ibdev, struct i40iw_ib_device, ibdev)->iwdev;
  282. }
  283. /**
  284. * to_ucontext - get user context
  285. * @ibucontext: ib user context
  286. **/
  287. static inline struct i40iw_ucontext *to_ucontext(struct ib_ucontext *ibucontext)
  288. {
  289. return container_of(ibucontext, struct i40iw_ucontext, ibucontext);
  290. }
  291. /**
  292. * to_iwpd - get protection domain
  293. * @ibpd: ib pd
  294. **/
  295. static inline struct i40iw_pd *to_iwpd(struct ib_pd *ibpd)
  296. {
  297. return container_of(ibpd, struct i40iw_pd, ibpd);
  298. }
  299. /**
  300. * to_iwmr - get device memory region
  301. * @ibdev: ib memory region
  302. **/
  303. static inline struct i40iw_mr *to_iwmr(struct ib_mr *ibmr)
  304. {
  305. return container_of(ibmr, struct i40iw_mr, ibmr);
  306. }
  307. /**
  308. * to_iwmr_from_ibfmr - get device memory region
  309. * @ibfmr: ib fmr
  310. **/
  311. static inline struct i40iw_mr *to_iwmr_from_ibfmr(struct ib_fmr *ibfmr)
  312. {
  313. return container_of(ibfmr, struct i40iw_mr, ibfmr);
  314. }
  315. /**
  316. * to_iwmw - get device memory window
  317. * @ibmw: ib memory window
  318. **/
  319. static inline struct i40iw_mr *to_iwmw(struct ib_mw *ibmw)
  320. {
  321. return container_of(ibmw, struct i40iw_mr, ibmw);
  322. }
  323. /**
  324. * to_iwcq - get completion queue
  325. * @ibcq: ib cqdevice
  326. **/
  327. static inline struct i40iw_cq *to_iwcq(struct ib_cq *ibcq)
  328. {
  329. return container_of(ibcq, struct i40iw_cq, ibcq);
  330. }
  331. /**
  332. * to_iwqp - get device qp
  333. * @ibqp: ib qp
  334. **/
  335. static inline struct i40iw_qp *to_iwqp(struct ib_qp *ibqp)
  336. {
  337. return container_of(ibqp, struct i40iw_qp, ibqp);
  338. }
  339. /* i40iw.c */
  340. void i40iw_add_ref(struct ib_qp *);
  341. void i40iw_rem_ref(struct ib_qp *);
  342. struct ib_qp *i40iw_get_qp(struct ib_device *, int);
  343. void i40iw_flush_wqes(struct i40iw_device *iwdev,
  344. struct i40iw_qp *qp);
  345. void i40iw_manage_arp_cache(struct i40iw_device *iwdev,
  346. unsigned char *mac_addr,
  347. __be32 *ip_addr,
  348. bool ipv4,
  349. u32 action);
  350. int i40iw_manage_apbvt(struct i40iw_device *iwdev,
  351. u16 accel_local_port,
  352. bool add_port);
  353. struct i40iw_cqp_request *i40iw_get_cqp_request(struct i40iw_cqp *cqp, bool wait);
  354. void i40iw_free_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request);
  355. void i40iw_put_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request);
  356. /**
  357. * i40iw_alloc_resource - allocate a resource
  358. * @iwdev: device pointer
  359. * @resource_array: resource bit array:
  360. * @max_resources: maximum resource number
  361. * @req_resources_num: Allocated resource number
  362. * @next: next free id
  363. **/
  364. static inline int i40iw_alloc_resource(struct i40iw_device *iwdev,
  365. unsigned long *resource_array,
  366. u32 max_resources,
  367. u32 *req_resource_num,
  368. u32 *next)
  369. {
  370. u32 resource_num;
  371. unsigned long flags;
  372. spin_lock_irqsave(&iwdev->resource_lock, flags);
  373. resource_num = find_next_zero_bit(resource_array, max_resources, *next);
  374. if (resource_num >= max_resources) {
  375. resource_num = find_first_zero_bit(resource_array, max_resources);
  376. if (resource_num >= max_resources) {
  377. spin_unlock_irqrestore(&iwdev->resource_lock, flags);
  378. return -EOVERFLOW;
  379. }
  380. }
  381. set_bit(resource_num, resource_array);
  382. *next = resource_num + 1;
  383. if (*next == max_resources)
  384. *next = 0;
  385. spin_unlock_irqrestore(&iwdev->resource_lock, flags);
  386. *req_resource_num = resource_num;
  387. return 0;
  388. }
  389. /**
  390. * i40iw_is_resource_allocated - detrmine if resource is
  391. * allocated
  392. * @iwdev: device pointer
  393. * @resource_array: resource array for the resource_num
  394. * @resource_num: resource number to check
  395. **/
  396. static inline bool i40iw_is_resource_allocated(struct i40iw_device *iwdev,
  397. unsigned long *resource_array,
  398. u32 resource_num)
  399. {
  400. bool bit_is_set;
  401. unsigned long flags;
  402. spin_lock_irqsave(&iwdev->resource_lock, flags);
  403. bit_is_set = test_bit(resource_num, resource_array);
  404. spin_unlock_irqrestore(&iwdev->resource_lock, flags);
  405. return bit_is_set;
  406. }
  407. /**
  408. * i40iw_free_resource - free a resource
  409. * @iwdev: device pointer
  410. * @resource_array: resource array for the resource_num
  411. * @resource_num: resource number to free
  412. **/
  413. static inline void i40iw_free_resource(struct i40iw_device *iwdev,
  414. unsigned long *resource_array,
  415. u32 resource_num)
  416. {
  417. unsigned long flags;
  418. spin_lock_irqsave(&iwdev->resource_lock, flags);
  419. clear_bit(resource_num, resource_array);
  420. spin_unlock_irqrestore(&iwdev->resource_lock, flags);
  421. }
  422. /**
  423. * to_iwhdl - Get the handler from the device pointer
  424. * @iwdev: device pointer
  425. **/
  426. static inline struct i40iw_handler *to_iwhdl(struct i40iw_device *iw_dev)
  427. {
  428. return container_of(iw_dev, struct i40iw_handler, device);
  429. }
  430. struct i40iw_handler *i40iw_find_netdev(struct net_device *netdev);
  431. /**
  432. * iw_init_resources -
  433. */
  434. u32 i40iw_initialize_hw_resources(struct i40iw_device *iwdev);
  435. int i40iw_register_rdma_device(struct i40iw_device *iwdev);
  436. void i40iw_port_ibevent(struct i40iw_device *iwdev);
  437. int i40iw_cm_disconn(struct i40iw_qp *);
  438. void i40iw_cm_disconn_worker(void *);
  439. int mini_cm_recv_pkt(struct i40iw_cm_core *, struct i40iw_device *,
  440. struct sk_buff *);
  441. enum i40iw_status_code i40iw_handle_cqp_op(struct i40iw_device *iwdev,
  442. struct i40iw_cqp_request *cqp_request);
  443. enum i40iw_status_code i40iw_add_mac_addr(struct i40iw_device *iwdev,
  444. u8 *mac_addr, u8 *mac_index);
  445. int i40iw_modify_qp(struct ib_qp *, struct ib_qp_attr *, int, struct ib_udata *);
  446. void i40iw_rem_pdusecount(struct i40iw_pd *iwpd, struct i40iw_device *iwdev);
  447. void i40iw_add_pdusecount(struct i40iw_pd *iwpd);
  448. void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
  449. struct i40iw_modify_qp_info *info, bool wait);
  450. enum i40iw_status_code i40iw_manage_qhash(struct i40iw_device *iwdev,
  451. struct i40iw_cm_info *cminfo,
  452. enum i40iw_quad_entry_type etype,
  453. enum i40iw_quad_hash_manage_type mtype,
  454. void *cmnode,
  455. bool wait);
  456. void i40iw_receive_ilq(struct i40iw_sc_dev *dev, struct i40iw_puda_buf *rbuf);
  457. void i40iw_free_sqbuf(struct i40iw_sc_dev *dev, void *bufp);
  458. void i40iw_free_qp_resources(struct i40iw_device *iwdev,
  459. struct i40iw_qp *iwqp,
  460. u32 qp_num);
  461. enum i40iw_status_code i40iw_obj_aligned_mem(struct i40iw_device *iwdev,
  462. struct i40iw_dma_mem *memptr,
  463. u32 size, u32 mask);
  464. void i40iw_request_reset(struct i40iw_device *iwdev);
  465. void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev);
  466. void i40iw_setup_cm_core(struct i40iw_device *iwdev);
  467. void i40iw_cleanup_cm_core(struct i40iw_cm_core *cm_core);
  468. void i40iw_process_ceq(struct i40iw_device *, struct i40iw_ceq *iwceq);
  469. void i40iw_process_aeq(struct i40iw_device *);
  470. void i40iw_next_iw_state(struct i40iw_qp *iwqp,
  471. u8 state, u8 del_hash,
  472. u8 term, u8 term_len);
  473. int i40iw_send_syn(struct i40iw_cm_node *cm_node, u32 sendack);
  474. struct i40iw_cm_node *i40iw_find_node(struct i40iw_cm_core *cm_core,
  475. u16 rem_port,
  476. u32 *rem_addr,
  477. u16 loc_port,
  478. u32 *loc_addr,
  479. bool add_refcnt);
  480. enum i40iw_status_code i40iw_hw_flush_wqes(struct i40iw_device *iwdev,
  481. struct i40iw_sc_qp *qp,
  482. struct i40iw_qp_flush_info *info,
  483. bool wait);
  484. void i40iw_copy_ip_ntohl(u32 *dst, u32 *src);
  485. struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *ib_pd,
  486. u64 addr,
  487. u64 size,
  488. int acc,
  489. u64 *iova_start);
  490. int i40iw_inetaddr_event(struct notifier_block *notifier,
  491. unsigned long event,
  492. void *ptr);
  493. int i40iw_inet6addr_event(struct notifier_block *notifier,
  494. unsigned long event,
  495. void *ptr);
  496. int i40iw_net_event(struct notifier_block *notifier,
  497. unsigned long event,
  498. void *ptr);
  499. #endif