rcar_du_plane.c 23 KB

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  1. /*
  2. * rcar_du_plane.c -- R-Car Display Unit Planes
  3. *
  4. * Copyright (C) 2013-2015 Renesas Electronics Corporation
  5. *
  6. * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <drm/drmP.h>
  14. #include <drm/drm_atomic.h>
  15. #include <drm/drm_atomic_helper.h>
  16. #include <drm/drm_crtc.h>
  17. #include <drm/drm_crtc_helper.h>
  18. #include <drm/drm_fb_cma_helper.h>
  19. #include <drm/drm_gem_cma_helper.h>
  20. #include <drm/drm_plane_helper.h>
  21. #include "rcar_du_drv.h"
  22. #include "rcar_du_group.h"
  23. #include "rcar_du_kms.h"
  24. #include "rcar_du_plane.h"
  25. #include "rcar_du_regs.h"
  26. /* -----------------------------------------------------------------------------
  27. * Atomic hardware plane allocator
  28. *
  29. * The hardware plane allocator is solely based on the atomic plane states
  30. * without keeping any external state to avoid races between .atomic_check()
  31. * and .atomic_commit().
  32. *
  33. * The core idea is to avoid using a free planes bitmask that would need to be
  34. * shared between check and commit handlers with a collective knowledge based on
  35. * the allocated hardware plane(s) for each KMS plane. The allocator then loops
  36. * over all plane states to compute the free planes bitmask, allocates hardware
  37. * planes based on that bitmask, and stores the result back in the plane states.
  38. *
  39. * For this to work we need to access the current state of planes not touched by
  40. * the atomic update. To ensure that it won't be modified, we need to lock all
  41. * planes using drm_atomic_get_plane_state(). This effectively serializes atomic
  42. * updates from .atomic_check() up to completion (when swapping the states if
  43. * the check step has succeeded) or rollback (when freeing the states if the
  44. * check step has failed).
  45. *
  46. * Allocation is performed in the .atomic_check() handler and applied
  47. * automatically when the core swaps the old and new states.
  48. */
  49. static bool rcar_du_plane_needs_realloc(struct rcar_du_plane *plane,
  50. struct rcar_du_plane_state *new_state)
  51. {
  52. struct rcar_du_plane_state *cur_state;
  53. cur_state = to_rcar_plane_state(plane->plane.state);
  54. /* Lowering the number of planes doesn't strictly require reallocation
  55. * as the extra hardware plane will be freed when committing, but doing
  56. * so could lead to more fragmentation.
  57. */
  58. if (!cur_state->format ||
  59. cur_state->format->planes != new_state->format->planes)
  60. return true;
  61. /* Reallocate hardware planes if the source has changed. */
  62. if (cur_state->source != new_state->source)
  63. return true;
  64. return false;
  65. }
  66. static unsigned int rcar_du_plane_hwmask(struct rcar_du_plane_state *state)
  67. {
  68. unsigned int mask;
  69. if (state->hwindex == -1)
  70. return 0;
  71. mask = 1 << state->hwindex;
  72. if (state->format->planes == 2)
  73. mask |= 1 << ((state->hwindex + 1) % 8);
  74. return mask;
  75. }
  76. /*
  77. * The R8A7790 DU can source frames directly from the VSP1 devices VSPD0 and
  78. * VSPD1. VSPD0 feeds DU0/1 plane 0, and VSPD1 feeds either DU2 plane 0 or
  79. * DU0/1 plane 1.
  80. *
  81. * Allocate the correct fixed plane when sourcing frames from VSPD0 or VSPD1,
  82. * and allocate planes in reverse index order otherwise to ensure maximum
  83. * availability of planes 0 and 1.
  84. *
  85. * The caller is responsible for ensuring that the requested source is
  86. * compatible with the DU revision.
  87. */
  88. static int rcar_du_plane_hwalloc(struct rcar_du_plane *plane,
  89. struct rcar_du_plane_state *state,
  90. unsigned int free)
  91. {
  92. unsigned int num_planes = state->format->planes;
  93. int fixed = -1;
  94. int i;
  95. if (state->source == RCAR_DU_PLANE_VSPD0) {
  96. /* VSPD0 feeds plane 0 on DU0/1. */
  97. if (plane->group->index != 0)
  98. return -EINVAL;
  99. fixed = 0;
  100. } else if (state->source == RCAR_DU_PLANE_VSPD1) {
  101. /* VSPD1 feeds plane 1 on DU0/1 or plane 0 on DU2. */
  102. fixed = plane->group->index == 0 ? 1 : 0;
  103. }
  104. if (fixed >= 0)
  105. return free & (1 << fixed) ? fixed : -EBUSY;
  106. for (i = RCAR_DU_NUM_HW_PLANES - 1; i >= 0; --i) {
  107. if (!(free & (1 << i)))
  108. continue;
  109. if (num_planes == 1 || free & (1 << ((i + 1) % 8)))
  110. break;
  111. }
  112. return i < 0 ? -EBUSY : i;
  113. }
  114. int rcar_du_atomic_check_planes(struct drm_device *dev,
  115. struct drm_atomic_state *state)
  116. {
  117. struct rcar_du_device *rcdu = dev->dev_private;
  118. unsigned int group_freed_planes[RCAR_DU_MAX_GROUPS] = { 0, };
  119. unsigned int group_free_planes[RCAR_DU_MAX_GROUPS] = { 0, };
  120. bool needs_realloc = false;
  121. unsigned int groups = 0;
  122. unsigned int i;
  123. /* Check if hardware planes need to be reallocated. */
  124. for (i = 0; i < dev->mode_config.num_total_plane; ++i) {
  125. struct rcar_du_plane_state *plane_state;
  126. struct rcar_du_plane *plane;
  127. unsigned int index;
  128. if (!state->planes[i])
  129. continue;
  130. plane = to_rcar_plane(state->planes[i]);
  131. plane_state = to_rcar_plane_state(state->plane_states[i]);
  132. dev_dbg(rcdu->dev, "%s: checking plane (%u,%tu)\n", __func__,
  133. plane->group->index, plane - plane->group->planes);
  134. /* If the plane is being disabled we don't need to go through
  135. * the full reallocation procedure. Just mark the hardware
  136. * plane(s) as freed.
  137. */
  138. if (!plane_state->format) {
  139. dev_dbg(rcdu->dev, "%s: plane is being disabled\n",
  140. __func__);
  141. index = plane - plane->group->planes;
  142. group_freed_planes[plane->group->index] |= 1 << index;
  143. plane_state->hwindex = -1;
  144. continue;
  145. }
  146. /* If the plane needs to be reallocated mark it as such, and
  147. * mark the hardware plane(s) as free.
  148. */
  149. if (rcar_du_plane_needs_realloc(plane, plane_state)) {
  150. dev_dbg(rcdu->dev, "%s: plane needs reallocation\n",
  151. __func__);
  152. groups |= 1 << plane->group->index;
  153. needs_realloc = true;
  154. index = plane - plane->group->planes;
  155. group_freed_planes[plane->group->index] |= 1 << index;
  156. plane_state->hwindex = -1;
  157. }
  158. }
  159. if (!needs_realloc)
  160. return 0;
  161. /* Grab all plane states for the groups that need reallocation to ensure
  162. * locking and avoid racy updates. This serializes the update operation,
  163. * but there's not much we can do about it as that's the hardware
  164. * design.
  165. *
  166. * Compute the used planes mask for each group at the same time to avoid
  167. * looping over the planes separately later.
  168. */
  169. while (groups) {
  170. unsigned int index = ffs(groups) - 1;
  171. struct rcar_du_group *group = &rcdu->groups[index];
  172. unsigned int used_planes = 0;
  173. dev_dbg(rcdu->dev, "%s: finding free planes for group %u\n",
  174. __func__, index);
  175. for (i = 0; i < group->num_planes; ++i) {
  176. struct rcar_du_plane *plane = &group->planes[i];
  177. struct rcar_du_plane_state *plane_state;
  178. struct drm_plane_state *s;
  179. s = drm_atomic_get_plane_state(state, &plane->plane);
  180. if (IS_ERR(s))
  181. return PTR_ERR(s);
  182. /* If the plane has been freed in the above loop its
  183. * hardware planes must not be added to the used planes
  184. * bitmask. However, the current state doesn't reflect
  185. * the free state yet, as we've modified the new state
  186. * above. Use the local freed planes list to check for
  187. * that condition instead.
  188. */
  189. if (group_freed_planes[index] & (1 << i)) {
  190. dev_dbg(rcdu->dev,
  191. "%s: plane (%u,%tu) has been freed, skipping\n",
  192. __func__, plane->group->index,
  193. plane - plane->group->planes);
  194. continue;
  195. }
  196. plane_state = to_rcar_plane_state(plane->plane.state);
  197. used_planes |= rcar_du_plane_hwmask(plane_state);
  198. dev_dbg(rcdu->dev,
  199. "%s: plane (%u,%tu) uses %u hwplanes (index %d)\n",
  200. __func__, plane->group->index,
  201. plane - plane->group->planes,
  202. plane_state->format ?
  203. plane_state->format->planes : 0,
  204. plane_state->hwindex);
  205. }
  206. group_free_planes[index] = 0xff & ~used_planes;
  207. groups &= ~(1 << index);
  208. dev_dbg(rcdu->dev, "%s: group %u free planes mask 0x%02x\n",
  209. __func__, index, group_free_planes[index]);
  210. }
  211. /* Reallocate hardware planes for each plane that needs it. */
  212. for (i = 0; i < dev->mode_config.num_total_plane; ++i) {
  213. struct rcar_du_plane_state *plane_state;
  214. struct rcar_du_plane *plane;
  215. unsigned int crtc_planes;
  216. unsigned int free;
  217. int idx;
  218. if (!state->planes[i])
  219. continue;
  220. plane = to_rcar_plane(state->planes[i]);
  221. plane_state = to_rcar_plane_state(state->plane_states[i]);
  222. dev_dbg(rcdu->dev, "%s: allocating plane (%u,%tu)\n", __func__,
  223. plane->group->index, plane - plane->group->planes);
  224. /* Skip planes that are being disabled or don't need to be
  225. * reallocated.
  226. */
  227. if (!plane_state->format ||
  228. !rcar_du_plane_needs_realloc(plane, plane_state))
  229. continue;
  230. /* Try to allocate the plane from the free planes currently
  231. * associated with the target CRTC to avoid restarting the CRTC
  232. * group and thus minimize flicker. If it fails fall back to
  233. * allocating from all free planes.
  234. */
  235. crtc_planes = to_rcar_crtc(plane_state->state.crtc)->index % 2
  236. ? plane->group->dptsr_planes
  237. : ~plane->group->dptsr_planes;
  238. free = group_free_planes[plane->group->index];
  239. idx = rcar_du_plane_hwalloc(plane, plane_state,
  240. free & crtc_planes);
  241. if (idx < 0)
  242. idx = rcar_du_plane_hwalloc(plane, plane_state,
  243. free);
  244. if (idx < 0) {
  245. dev_dbg(rcdu->dev, "%s: no available hardware plane\n",
  246. __func__);
  247. return idx;
  248. }
  249. dev_dbg(rcdu->dev, "%s: allocated %u hwplanes (index %u)\n",
  250. __func__, plane_state->format->planes, idx);
  251. plane_state->hwindex = idx;
  252. group_free_planes[plane->group->index] &=
  253. ~rcar_du_plane_hwmask(plane_state);
  254. dev_dbg(rcdu->dev, "%s: group %u free planes mask 0x%02x\n",
  255. __func__, plane->group->index,
  256. group_free_planes[plane->group->index]);
  257. }
  258. return 0;
  259. }
  260. /* -----------------------------------------------------------------------------
  261. * Plane Setup
  262. */
  263. #define RCAR_DU_COLORKEY_NONE (0 << 24)
  264. #define RCAR_DU_COLORKEY_SOURCE (1 << 24)
  265. #define RCAR_DU_COLORKEY_MASK (1 << 24)
  266. static void rcar_du_plane_write(struct rcar_du_group *rgrp,
  267. unsigned int index, u32 reg, u32 data)
  268. {
  269. rcar_du_write(rgrp->dev, rgrp->mmio_offset + index * PLANE_OFF + reg,
  270. data);
  271. }
  272. static void rcar_du_plane_setup_scanout(struct rcar_du_group *rgrp,
  273. const struct rcar_du_plane_state *state)
  274. {
  275. unsigned int src_x = state->state.src_x >> 16;
  276. unsigned int src_y = state->state.src_y >> 16;
  277. unsigned int index = state->hwindex;
  278. unsigned int pitch;
  279. bool interlaced;
  280. u32 dma[2];
  281. interlaced = state->state.crtc->state->adjusted_mode.flags
  282. & DRM_MODE_FLAG_INTERLACE;
  283. if (state->source == RCAR_DU_PLANE_MEMORY) {
  284. struct drm_framebuffer *fb = state->state.fb;
  285. struct drm_gem_cma_object *gem;
  286. unsigned int i;
  287. if (state->format->planes == 2)
  288. pitch = fb->pitches[0];
  289. else
  290. pitch = fb->pitches[0] * 8 / state->format->bpp;
  291. for (i = 0; i < state->format->planes; ++i) {
  292. gem = drm_fb_cma_get_gem_obj(fb, i);
  293. dma[i] = gem->paddr + fb->offsets[i];
  294. }
  295. } else {
  296. pitch = state->state.src_w >> 16;
  297. dma[0] = 0;
  298. dma[1] = 0;
  299. }
  300. /* Memory pitch (expressed in pixels). Must be doubled for interlaced
  301. * operation with 32bpp formats.
  302. */
  303. rcar_du_plane_write(rgrp, index, PnMWR,
  304. (interlaced && state->format->bpp == 32) ?
  305. pitch * 2 : pitch);
  306. /* The Y position is expressed in raster line units and must be doubled
  307. * for 32bpp formats, according to the R8A7790 datasheet. No mention of
  308. * doubling the Y position is found in the R8A7779 datasheet, but the
  309. * rule seems to apply there as well.
  310. *
  311. * Despite not being documented, doubling seem not to be needed when
  312. * operating in interlaced mode.
  313. *
  314. * Similarly, for the second plane, NV12 and NV21 formats seem to
  315. * require a halved Y position value, in both progressive and interlaced
  316. * modes.
  317. */
  318. rcar_du_plane_write(rgrp, index, PnSPXR, src_x);
  319. rcar_du_plane_write(rgrp, index, PnSPYR, src_y *
  320. (!interlaced && state->format->bpp == 32 ? 2 : 1));
  321. rcar_du_plane_write(rgrp, index, PnDSA0R, dma[0]);
  322. if (state->format->planes == 2) {
  323. index = (index + 1) % 8;
  324. rcar_du_plane_write(rgrp, index, PnMWR, pitch);
  325. rcar_du_plane_write(rgrp, index, PnSPXR, src_x);
  326. rcar_du_plane_write(rgrp, index, PnSPYR, src_y *
  327. (state->format->bpp == 16 ? 2 : 1) / 2);
  328. rcar_du_plane_write(rgrp, index, PnDSA0R, dma[1]);
  329. }
  330. }
  331. static void rcar_du_plane_setup_mode(struct rcar_du_group *rgrp,
  332. unsigned int index,
  333. const struct rcar_du_plane_state *state)
  334. {
  335. u32 colorkey;
  336. u32 pnmr;
  337. /* The PnALPHAR register controls alpha-blending in 16bpp formats
  338. * (ARGB1555 and XRGB1555).
  339. *
  340. * For ARGB, set the alpha value to 0, and enable alpha-blending when
  341. * the A bit is 0. This maps A=0 to alpha=0 and A=1 to alpha=255.
  342. *
  343. * For XRGB, set the alpha value to the plane-wide alpha value and
  344. * enable alpha-blending regardless of the X bit value.
  345. */
  346. if (state->format->fourcc != DRM_FORMAT_XRGB1555)
  347. rcar_du_plane_write(rgrp, index, PnALPHAR, PnALPHAR_ABIT_0);
  348. else
  349. rcar_du_plane_write(rgrp, index, PnALPHAR,
  350. PnALPHAR_ABIT_X | state->alpha);
  351. pnmr = PnMR_BM_MD | state->format->pnmr;
  352. /* Disable color keying when requested. YUV formats have the
  353. * PnMR_SPIM_TP_OFF bit set in their pnmr field, disabling color keying
  354. * automatically.
  355. */
  356. if ((state->colorkey & RCAR_DU_COLORKEY_MASK) == RCAR_DU_COLORKEY_NONE)
  357. pnmr |= PnMR_SPIM_TP_OFF;
  358. /* For packed YUV formats we need to select the U/V order. */
  359. if (state->format->fourcc == DRM_FORMAT_YUYV)
  360. pnmr |= PnMR_YCDF_YUYV;
  361. rcar_du_plane_write(rgrp, index, PnMR, pnmr);
  362. switch (state->format->fourcc) {
  363. case DRM_FORMAT_RGB565:
  364. colorkey = ((state->colorkey & 0xf80000) >> 8)
  365. | ((state->colorkey & 0x00fc00) >> 5)
  366. | ((state->colorkey & 0x0000f8) >> 3);
  367. rcar_du_plane_write(rgrp, index, PnTC2R, colorkey);
  368. break;
  369. case DRM_FORMAT_ARGB1555:
  370. case DRM_FORMAT_XRGB1555:
  371. colorkey = ((state->colorkey & 0xf80000) >> 9)
  372. | ((state->colorkey & 0x00f800) >> 6)
  373. | ((state->colorkey & 0x0000f8) >> 3);
  374. rcar_du_plane_write(rgrp, index, PnTC2R, colorkey);
  375. break;
  376. case DRM_FORMAT_XRGB8888:
  377. case DRM_FORMAT_ARGB8888:
  378. rcar_du_plane_write(rgrp, index, PnTC3R,
  379. PnTC3R_CODE | (state->colorkey & 0xffffff));
  380. break;
  381. }
  382. }
  383. static void rcar_du_plane_setup_format_gen2(struct rcar_du_group *rgrp,
  384. unsigned int index,
  385. const struct rcar_du_plane_state *state)
  386. {
  387. u32 ddcr2 = PnDDCR2_CODE;
  388. u32 ddcr4;
  389. /* Data format
  390. *
  391. * The data format is selected by the DDDF field in PnMR and the EDF
  392. * field in DDCR4.
  393. */
  394. rcar_du_plane_setup_mode(rgrp, index, state);
  395. if (state->format->planes == 2) {
  396. if (state->hwindex != index) {
  397. if (state->format->fourcc == DRM_FORMAT_NV12 ||
  398. state->format->fourcc == DRM_FORMAT_NV21)
  399. ddcr2 |= PnDDCR2_Y420;
  400. if (state->format->fourcc == DRM_FORMAT_NV21)
  401. ddcr2 |= PnDDCR2_NV21;
  402. ddcr2 |= PnDDCR2_DIVU;
  403. } else {
  404. ddcr2 |= PnDDCR2_DIVY;
  405. }
  406. }
  407. rcar_du_plane_write(rgrp, index, PnDDCR2, ddcr2);
  408. ddcr4 = state->format->edf | PnDDCR4_CODE;
  409. if (state->source != RCAR_DU_PLANE_MEMORY)
  410. ddcr4 |= PnDDCR4_VSPS;
  411. rcar_du_plane_write(rgrp, index, PnDDCR4, ddcr4);
  412. }
  413. static void rcar_du_plane_setup_format_gen3(struct rcar_du_group *rgrp,
  414. unsigned int index,
  415. const struct rcar_du_plane_state *state)
  416. {
  417. rcar_du_plane_write(rgrp, index, PnMR,
  418. PnMR_SPIM_TP_OFF | state->format->pnmr);
  419. rcar_du_plane_write(rgrp, index, PnDDCR4,
  420. state->format->edf | PnDDCR4_CODE);
  421. }
  422. static void rcar_du_plane_setup_format(struct rcar_du_group *rgrp,
  423. unsigned int index,
  424. const struct rcar_du_plane_state *state)
  425. {
  426. struct rcar_du_device *rcdu = rgrp->dev;
  427. if (rcdu->info->gen < 3)
  428. rcar_du_plane_setup_format_gen2(rgrp, index, state);
  429. else
  430. rcar_du_plane_setup_format_gen3(rgrp, index, state);
  431. /* Destination position and size */
  432. rcar_du_plane_write(rgrp, index, PnDSXR, state->state.crtc_w);
  433. rcar_du_plane_write(rgrp, index, PnDSYR, state->state.crtc_h);
  434. rcar_du_plane_write(rgrp, index, PnDPXR, state->state.crtc_x);
  435. rcar_du_plane_write(rgrp, index, PnDPYR, state->state.crtc_y);
  436. if (rcdu->info->gen < 3) {
  437. /* Wrap-around and blinking, disabled */
  438. rcar_du_plane_write(rgrp, index, PnWASPR, 0);
  439. rcar_du_plane_write(rgrp, index, PnWAMWR, 4095);
  440. rcar_du_plane_write(rgrp, index, PnBTR, 0);
  441. rcar_du_plane_write(rgrp, index, PnMLR, 0);
  442. }
  443. }
  444. void __rcar_du_plane_setup(struct rcar_du_group *rgrp,
  445. const struct rcar_du_plane_state *state)
  446. {
  447. struct rcar_du_device *rcdu = rgrp->dev;
  448. rcar_du_plane_setup_format(rgrp, state->hwindex, state);
  449. if (state->format->planes == 2)
  450. rcar_du_plane_setup_format(rgrp, (state->hwindex + 1) % 8,
  451. state);
  452. if (rcdu->info->gen < 3)
  453. rcar_du_plane_setup_scanout(rgrp, state);
  454. if (state->source == RCAR_DU_PLANE_VSPD1) {
  455. unsigned int vspd1_sink = rgrp->index ? 2 : 0;
  456. if (rcdu->vspd1_sink != vspd1_sink) {
  457. rcdu->vspd1_sink = vspd1_sink;
  458. rcar_du_set_dpad0_vsp1_routing(rcdu);
  459. }
  460. }
  461. }
  462. static int rcar_du_plane_atomic_check(struct drm_plane *plane,
  463. struct drm_plane_state *state)
  464. {
  465. struct rcar_du_plane_state *rstate = to_rcar_plane_state(state);
  466. struct rcar_du_plane *rplane = to_rcar_plane(plane);
  467. struct rcar_du_device *rcdu = rplane->group->dev;
  468. if (!state->fb || !state->crtc) {
  469. rstate->format = NULL;
  470. return 0;
  471. }
  472. if (state->src_w >> 16 != state->crtc_w ||
  473. state->src_h >> 16 != state->crtc_h) {
  474. dev_dbg(rcdu->dev, "%s: scaling not supported\n", __func__);
  475. return -EINVAL;
  476. }
  477. rstate->format = rcar_du_format_info(state->fb->pixel_format);
  478. if (rstate->format == NULL) {
  479. dev_dbg(rcdu->dev, "%s: unsupported format %08x\n", __func__,
  480. state->fb->pixel_format);
  481. return -EINVAL;
  482. }
  483. return 0;
  484. }
  485. static void rcar_du_plane_atomic_update(struct drm_plane *plane,
  486. struct drm_plane_state *old_state)
  487. {
  488. struct rcar_du_plane *rplane = to_rcar_plane(plane);
  489. struct rcar_du_plane_state *old_rstate;
  490. struct rcar_du_plane_state *new_rstate;
  491. if (!plane->state->crtc)
  492. return;
  493. rcar_du_plane_setup(rplane);
  494. /* Check whether the source has changed from memory to live source or
  495. * from live source to memory. The source has been configured by the
  496. * VSPS bit in the PnDDCR4 register. Although the datasheet states that
  497. * the bit is updated during vertical blanking, it seems that updates
  498. * only occur when the DU group is held in reset through the DSYSR.DRES
  499. * bit. We thus need to restart the group if the source changes.
  500. */
  501. old_rstate = to_rcar_plane_state(old_state);
  502. new_rstate = to_rcar_plane_state(plane->state);
  503. if ((old_rstate->source == RCAR_DU_PLANE_MEMORY) !=
  504. (new_rstate->source == RCAR_DU_PLANE_MEMORY))
  505. rplane->group->need_restart = true;
  506. }
  507. static const struct drm_plane_helper_funcs rcar_du_plane_helper_funcs = {
  508. .atomic_check = rcar_du_plane_atomic_check,
  509. .atomic_update = rcar_du_plane_atomic_update,
  510. };
  511. static struct drm_plane_state *
  512. rcar_du_plane_atomic_duplicate_state(struct drm_plane *plane)
  513. {
  514. struct rcar_du_plane_state *state;
  515. struct rcar_du_plane_state *copy;
  516. if (WARN_ON(!plane->state))
  517. return NULL;
  518. state = to_rcar_plane_state(plane->state);
  519. copy = kmemdup(state, sizeof(*state), GFP_KERNEL);
  520. if (copy == NULL)
  521. return NULL;
  522. __drm_atomic_helper_plane_duplicate_state(plane, &copy->state);
  523. return &copy->state;
  524. }
  525. static void rcar_du_plane_atomic_destroy_state(struct drm_plane *plane,
  526. struct drm_plane_state *state)
  527. {
  528. __drm_atomic_helper_plane_destroy_state(plane, state);
  529. kfree(to_rcar_plane_state(state));
  530. }
  531. static void rcar_du_plane_reset(struct drm_plane *plane)
  532. {
  533. struct rcar_du_plane_state *state;
  534. if (plane->state) {
  535. rcar_du_plane_atomic_destroy_state(plane, plane->state);
  536. plane->state = NULL;
  537. }
  538. state = kzalloc(sizeof(*state), GFP_KERNEL);
  539. if (state == NULL)
  540. return;
  541. state->hwindex = -1;
  542. state->source = RCAR_DU_PLANE_MEMORY;
  543. state->alpha = 255;
  544. state->colorkey = RCAR_DU_COLORKEY_NONE;
  545. state->zpos = plane->type == DRM_PLANE_TYPE_PRIMARY ? 0 : 1;
  546. plane->state = &state->state;
  547. plane->state->plane = plane;
  548. }
  549. static int rcar_du_plane_atomic_set_property(struct drm_plane *plane,
  550. struct drm_plane_state *state,
  551. struct drm_property *property,
  552. uint64_t val)
  553. {
  554. struct rcar_du_plane_state *rstate = to_rcar_plane_state(state);
  555. struct rcar_du_device *rcdu = to_rcar_plane(plane)->group->dev;
  556. if (property == rcdu->props.alpha)
  557. rstate->alpha = val;
  558. else if (property == rcdu->props.colorkey)
  559. rstate->colorkey = val;
  560. else if (property == rcdu->props.zpos)
  561. rstate->zpos = val;
  562. else
  563. return -EINVAL;
  564. return 0;
  565. }
  566. static int rcar_du_plane_atomic_get_property(struct drm_plane *plane,
  567. const struct drm_plane_state *state, struct drm_property *property,
  568. uint64_t *val)
  569. {
  570. const struct rcar_du_plane_state *rstate =
  571. container_of(state, const struct rcar_du_plane_state, state);
  572. struct rcar_du_device *rcdu = to_rcar_plane(plane)->group->dev;
  573. if (property == rcdu->props.alpha)
  574. *val = rstate->alpha;
  575. else if (property == rcdu->props.colorkey)
  576. *val = rstate->colorkey;
  577. else if (property == rcdu->props.zpos)
  578. *val = rstate->zpos;
  579. else
  580. return -EINVAL;
  581. return 0;
  582. }
  583. static const struct drm_plane_funcs rcar_du_plane_funcs = {
  584. .update_plane = drm_atomic_helper_update_plane,
  585. .disable_plane = drm_atomic_helper_disable_plane,
  586. .reset = rcar_du_plane_reset,
  587. .set_property = drm_atomic_helper_plane_set_property,
  588. .destroy = drm_plane_cleanup,
  589. .atomic_duplicate_state = rcar_du_plane_atomic_duplicate_state,
  590. .atomic_destroy_state = rcar_du_plane_atomic_destroy_state,
  591. .atomic_set_property = rcar_du_plane_atomic_set_property,
  592. .atomic_get_property = rcar_du_plane_atomic_get_property,
  593. };
  594. static const uint32_t formats[] = {
  595. DRM_FORMAT_RGB565,
  596. DRM_FORMAT_ARGB1555,
  597. DRM_FORMAT_XRGB1555,
  598. DRM_FORMAT_XRGB8888,
  599. DRM_FORMAT_ARGB8888,
  600. DRM_FORMAT_UYVY,
  601. DRM_FORMAT_YUYV,
  602. DRM_FORMAT_NV12,
  603. DRM_FORMAT_NV21,
  604. DRM_FORMAT_NV16,
  605. };
  606. int rcar_du_planes_init(struct rcar_du_group *rgrp)
  607. {
  608. struct rcar_du_device *rcdu = rgrp->dev;
  609. unsigned int crtcs;
  610. unsigned int i;
  611. int ret;
  612. /* Create one primary plane per CRTC in this group and seven overlay
  613. * planes.
  614. */
  615. rgrp->num_planes = rgrp->num_crtcs + 7;
  616. crtcs = ((1 << rcdu->num_crtcs) - 1) & (3 << (2 * rgrp->index));
  617. for (i = 0; i < rgrp->num_planes; ++i) {
  618. enum drm_plane_type type = i < rgrp->num_crtcs
  619. ? DRM_PLANE_TYPE_PRIMARY
  620. : DRM_PLANE_TYPE_OVERLAY;
  621. struct rcar_du_plane *plane = &rgrp->planes[i];
  622. plane->group = rgrp;
  623. ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs,
  624. &rcar_du_plane_funcs, formats,
  625. ARRAY_SIZE(formats), type,
  626. NULL);
  627. if (ret < 0)
  628. return ret;
  629. drm_plane_helper_add(&plane->plane,
  630. &rcar_du_plane_helper_funcs);
  631. if (type == DRM_PLANE_TYPE_PRIMARY)
  632. continue;
  633. drm_object_attach_property(&plane->plane.base,
  634. rcdu->props.alpha, 255);
  635. drm_object_attach_property(&plane->plane.base,
  636. rcdu->props.colorkey,
  637. RCAR_DU_COLORKEY_NONE);
  638. drm_object_attach_property(&plane->plane.base,
  639. rcdu->props.zpos, 1);
  640. }
  641. return 0;
  642. }