nouveau_drm.c 28 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/apple-gmux.h>
  25. #include <linux/console.h>
  26. #include <linux/delay.h>
  27. #include <linux/module.h>
  28. #include <linux/pci.h>
  29. #include <linux/pm_runtime.h>
  30. #include <linux/vgaarb.h>
  31. #include <linux/vga_switcheroo.h>
  32. #include "drmP.h"
  33. #include "drm_crtc_helper.h"
  34. #include <core/gpuobj.h>
  35. #include <core/option.h>
  36. #include <core/pci.h>
  37. #include <core/tegra.h>
  38. #include <nvif/class.h>
  39. #include <nvif/cl0002.h>
  40. #include <nvif/cla06f.h>
  41. #include <nvif/if0004.h>
  42. #include "nouveau_drm.h"
  43. #include "nouveau_dma.h"
  44. #include "nouveau_ttm.h"
  45. #include "nouveau_gem.h"
  46. #include "nouveau_vga.h"
  47. #include "nouveau_hwmon.h"
  48. #include "nouveau_acpi.h"
  49. #include "nouveau_bios.h"
  50. #include "nouveau_ioctl.h"
  51. #include "nouveau_abi16.h"
  52. #include "nouveau_fbcon.h"
  53. #include "nouveau_fence.h"
  54. #include "nouveau_debugfs.h"
  55. #include "nouveau_usif.h"
  56. #include "nouveau_connector.h"
  57. #include "nouveau_platform.h"
  58. MODULE_PARM_DESC(config, "option string to pass to driver core");
  59. static char *nouveau_config;
  60. module_param_named(config, nouveau_config, charp, 0400);
  61. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  62. static char *nouveau_debug;
  63. module_param_named(debug, nouveau_debug, charp, 0400);
  64. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  65. static int nouveau_noaccel = 0;
  66. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  67. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  68. "0 = disabled, 1 = enabled, 2 = headless)");
  69. int nouveau_modeset = -1;
  70. module_param_named(modeset, nouveau_modeset, int, 0400);
  71. MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
  72. int nouveau_runtime_pm = -1;
  73. module_param_named(runpm, nouveau_runtime_pm, int, 0400);
  74. static struct drm_driver driver_stub;
  75. static struct drm_driver driver_pci;
  76. static struct drm_driver driver_platform;
  77. static u64
  78. nouveau_pci_name(struct pci_dev *pdev)
  79. {
  80. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  81. name |= pdev->bus->number << 16;
  82. name |= PCI_SLOT(pdev->devfn) << 8;
  83. return name | PCI_FUNC(pdev->devfn);
  84. }
  85. static u64
  86. nouveau_platform_name(struct platform_device *platformdev)
  87. {
  88. return platformdev->id;
  89. }
  90. static u64
  91. nouveau_name(struct drm_device *dev)
  92. {
  93. if (dev->pdev)
  94. return nouveau_pci_name(dev->pdev);
  95. else
  96. return nouveau_platform_name(dev->platformdev);
  97. }
  98. static int
  99. nouveau_cli_create(struct drm_device *dev, const char *sname,
  100. int size, void **pcli)
  101. {
  102. struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
  103. int ret;
  104. if (cli) {
  105. snprintf(cli->name, sizeof(cli->name), "%s", sname);
  106. cli->dev = dev;
  107. ret = nvif_client_init(NULL, cli->name, nouveau_name(dev),
  108. nouveau_config, nouveau_debug,
  109. &cli->base);
  110. if (ret == 0) {
  111. mutex_init(&cli->mutex);
  112. usif_client_init(cli);
  113. }
  114. return ret;
  115. }
  116. return -ENOMEM;
  117. }
  118. static void
  119. nouveau_cli_destroy(struct nouveau_cli *cli)
  120. {
  121. nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
  122. nvif_client_fini(&cli->base);
  123. usif_client_fini(cli);
  124. kfree(cli);
  125. }
  126. static void
  127. nouveau_accel_fini(struct nouveau_drm *drm)
  128. {
  129. nouveau_channel_idle(drm->channel);
  130. nvif_object_fini(&drm->ntfy);
  131. nvkm_gpuobj_del(&drm->notify);
  132. nvif_notify_fini(&drm->flip);
  133. nvif_object_fini(&drm->nvsw);
  134. nouveau_channel_del(&drm->channel);
  135. nouveau_channel_idle(drm->cechan);
  136. nvif_object_fini(&drm->ttm.copy);
  137. nouveau_channel_del(&drm->cechan);
  138. if (drm->fence)
  139. nouveau_fence(drm)->dtor(drm);
  140. }
  141. static void
  142. nouveau_accel_init(struct nouveau_drm *drm)
  143. {
  144. struct nvif_device *device = &drm->device;
  145. struct nvif_sclass *sclass;
  146. u32 arg0, arg1;
  147. int ret, i, n;
  148. if (nouveau_noaccel)
  149. return;
  150. /* initialise synchronisation routines */
  151. /*XXX: this is crap, but the fence/channel stuff is a little
  152. * backwards in some places. this will be fixed.
  153. */
  154. ret = n = nvif_object_sclass_get(&device->object, &sclass);
  155. if (ret < 0)
  156. return;
  157. for (ret = -ENOSYS, i = 0; i < n; i++) {
  158. switch (sclass[i].oclass) {
  159. case NV03_CHANNEL_DMA:
  160. ret = nv04_fence_create(drm);
  161. break;
  162. case NV10_CHANNEL_DMA:
  163. ret = nv10_fence_create(drm);
  164. break;
  165. case NV17_CHANNEL_DMA:
  166. case NV40_CHANNEL_DMA:
  167. ret = nv17_fence_create(drm);
  168. break;
  169. case NV50_CHANNEL_GPFIFO:
  170. ret = nv50_fence_create(drm);
  171. break;
  172. case G82_CHANNEL_GPFIFO:
  173. ret = nv84_fence_create(drm);
  174. break;
  175. case FERMI_CHANNEL_GPFIFO:
  176. case KEPLER_CHANNEL_GPFIFO_A:
  177. case KEPLER_CHANNEL_GPFIFO_B:
  178. case MAXWELL_CHANNEL_GPFIFO_A:
  179. ret = nvc0_fence_create(drm);
  180. break;
  181. default:
  182. break;
  183. }
  184. }
  185. nvif_object_sclass_put(&sclass);
  186. if (ret) {
  187. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  188. nouveau_accel_fini(drm);
  189. return;
  190. }
  191. if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
  192. ret = nouveau_channel_new(drm, &drm->device,
  193. NVA06F_V0_ENGINE_CE0 |
  194. NVA06F_V0_ENGINE_CE1,
  195. 0, &drm->cechan);
  196. if (ret)
  197. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  198. arg0 = NVA06F_V0_ENGINE_GR;
  199. arg1 = 1;
  200. } else
  201. if (device->info.chipset >= 0xa3 &&
  202. device->info.chipset != 0xaa &&
  203. device->info.chipset != 0xac) {
  204. ret = nouveau_channel_new(drm, &drm->device,
  205. NvDmaFB, NvDmaTT, &drm->cechan);
  206. if (ret)
  207. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  208. arg0 = NvDmaFB;
  209. arg1 = NvDmaTT;
  210. } else {
  211. arg0 = NvDmaFB;
  212. arg1 = NvDmaTT;
  213. }
  214. ret = nouveau_channel_new(drm, &drm->device, arg0, arg1, &drm->channel);
  215. if (ret) {
  216. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  217. nouveau_accel_fini(drm);
  218. return;
  219. }
  220. ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
  221. nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
  222. if (ret == 0) {
  223. ret = RING_SPACE(drm->channel, 2);
  224. if (ret == 0) {
  225. if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
  226. BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
  227. OUT_RING (drm->channel, NVDRM_NVSW);
  228. } else
  229. if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
  230. BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
  231. OUT_RING (drm->channel, 0x001f0000);
  232. }
  233. }
  234. ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
  235. false, NV04_NVSW_NTFY_UEVENT,
  236. NULL, 0, 0, &drm->flip);
  237. if (ret == 0)
  238. ret = nvif_notify_get(&drm->flip);
  239. if (ret) {
  240. nouveau_accel_fini(drm);
  241. return;
  242. }
  243. }
  244. if (ret) {
  245. NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
  246. nouveau_accel_fini(drm);
  247. return;
  248. }
  249. if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
  250. ret = nvkm_gpuobj_new(nvxx_device(&drm->device), 32, 0, false,
  251. NULL, &drm->notify);
  252. if (ret) {
  253. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  254. nouveau_accel_fini(drm);
  255. return;
  256. }
  257. ret = nvif_object_init(&drm->channel->user, NvNotify0,
  258. NV_DMA_IN_MEMORY,
  259. &(struct nv_dma_v0) {
  260. .target = NV_DMA_V0_TARGET_VRAM,
  261. .access = NV_DMA_V0_ACCESS_RDWR,
  262. .start = drm->notify->addr,
  263. .limit = drm->notify->addr + 31
  264. }, sizeof(struct nv_dma_v0),
  265. &drm->ntfy);
  266. if (ret) {
  267. nouveau_accel_fini(drm);
  268. return;
  269. }
  270. }
  271. nouveau_bo_move_init(drm);
  272. }
  273. static int nouveau_drm_probe(struct pci_dev *pdev,
  274. const struct pci_device_id *pent)
  275. {
  276. struct nvkm_device *device;
  277. struct apertures_struct *aper;
  278. bool boot = false;
  279. int ret;
  280. /*
  281. * apple-gmux is needed on dual GPU MacBook Pro
  282. * to probe the panel if we're the inactive GPU.
  283. */
  284. if (IS_ENABLED(CONFIG_VGA_ARB) && IS_ENABLED(CONFIG_VGA_SWITCHEROO) &&
  285. apple_gmux_present() && pdev != vga_default_device() &&
  286. !vga_switcheroo_handler_flags())
  287. return -EPROBE_DEFER;
  288. /* remove conflicting drivers (vesafb, efifb etc) */
  289. aper = alloc_apertures(3);
  290. if (!aper)
  291. return -ENOMEM;
  292. aper->ranges[0].base = pci_resource_start(pdev, 1);
  293. aper->ranges[0].size = pci_resource_len(pdev, 1);
  294. aper->count = 1;
  295. if (pci_resource_len(pdev, 2)) {
  296. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  297. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  298. aper->count++;
  299. }
  300. if (pci_resource_len(pdev, 3)) {
  301. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  302. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  303. aper->count++;
  304. }
  305. #ifdef CONFIG_X86
  306. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  307. #endif
  308. if (nouveau_modeset != 2)
  309. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  310. kfree(aper);
  311. ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
  312. true, true, ~0ULL, &device);
  313. if (ret)
  314. return ret;
  315. pci_set_master(pdev);
  316. ret = drm_get_pci_dev(pdev, pent, &driver_pci);
  317. if (ret) {
  318. nvkm_device_del(&device);
  319. return ret;
  320. }
  321. return 0;
  322. }
  323. #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
  324. static void
  325. nouveau_get_hdmi_dev(struct nouveau_drm *drm)
  326. {
  327. struct pci_dev *pdev = drm->dev->pdev;
  328. if (!pdev) {
  329. NV_DEBUG(drm, "not a PCI device; no HDMI\n");
  330. drm->hdmi_device = NULL;
  331. return;
  332. }
  333. /* subfunction one is a hdmi audio device? */
  334. drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
  335. PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
  336. if (!drm->hdmi_device) {
  337. NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
  338. return;
  339. }
  340. if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
  341. NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
  342. pci_dev_put(drm->hdmi_device);
  343. drm->hdmi_device = NULL;
  344. return;
  345. }
  346. }
  347. static int
  348. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  349. {
  350. struct nouveau_drm *drm;
  351. int ret;
  352. ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm);
  353. if (ret)
  354. return ret;
  355. dev->dev_private = drm;
  356. drm->dev = dev;
  357. nvxx_client(&drm->client.base)->debug =
  358. nvkm_dbgopt(nouveau_debug, "DRM");
  359. INIT_LIST_HEAD(&drm->clients);
  360. spin_lock_init(&drm->tile.lock);
  361. nouveau_get_hdmi_dev(drm);
  362. ret = nvif_device_init(&drm->client.base.object, 0, NV_DEVICE,
  363. &(struct nv_device_v0) {
  364. .device = ~0,
  365. }, sizeof(struct nv_device_v0),
  366. &drm->device);
  367. if (ret)
  368. goto fail_device;
  369. dev->irq_enabled = true;
  370. /* workaround an odd issue on nvc1 by disabling the device's
  371. * nosnoop capability. hopefully won't cause issues until a
  372. * better fix is found - assuming there is one...
  373. */
  374. if (drm->device.info.chipset == 0xc1)
  375. nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000);
  376. nouveau_vga_init(drm);
  377. if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
  378. ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
  379. 0x1000, NULL, &drm->client.vm);
  380. if (ret)
  381. goto fail_device;
  382. nvxx_client(&drm->client.base)->vm = drm->client.vm;
  383. }
  384. ret = nouveau_ttm_init(drm);
  385. if (ret)
  386. goto fail_ttm;
  387. ret = nouveau_bios_init(dev);
  388. if (ret)
  389. goto fail_bios;
  390. ret = nouveau_display_create(dev);
  391. if (ret)
  392. goto fail_dispctor;
  393. if (dev->mode_config.num_crtc) {
  394. ret = nouveau_display_init(dev);
  395. if (ret)
  396. goto fail_dispinit;
  397. }
  398. nouveau_debugfs_init(drm);
  399. nouveau_hwmon_init(dev);
  400. nouveau_accel_init(drm);
  401. nouveau_fbcon_init(dev);
  402. if (nouveau_runtime_pm != 0) {
  403. pm_runtime_use_autosuspend(dev->dev);
  404. pm_runtime_set_autosuspend_delay(dev->dev, 5000);
  405. pm_runtime_set_active(dev->dev);
  406. pm_runtime_allow(dev->dev);
  407. pm_runtime_mark_last_busy(dev->dev);
  408. pm_runtime_put(dev->dev);
  409. }
  410. return 0;
  411. fail_dispinit:
  412. nouveau_display_destroy(dev);
  413. fail_dispctor:
  414. nouveau_bios_takedown(dev);
  415. fail_bios:
  416. nouveau_ttm_fini(drm);
  417. fail_ttm:
  418. nouveau_vga_fini(drm);
  419. fail_device:
  420. nvif_device_fini(&drm->device);
  421. nouveau_cli_destroy(&drm->client);
  422. return ret;
  423. }
  424. static int
  425. nouveau_drm_unload(struct drm_device *dev)
  426. {
  427. struct nouveau_drm *drm = nouveau_drm(dev);
  428. pm_runtime_get_sync(dev->dev);
  429. nouveau_fbcon_fini(dev);
  430. nouveau_accel_fini(drm);
  431. nouveau_hwmon_fini(dev);
  432. nouveau_debugfs_fini(drm);
  433. if (dev->mode_config.num_crtc)
  434. nouveau_display_fini(dev);
  435. nouveau_display_destroy(dev);
  436. nouveau_bios_takedown(dev);
  437. nouveau_ttm_fini(drm);
  438. nouveau_vga_fini(drm);
  439. nvif_device_fini(&drm->device);
  440. if (drm->hdmi_device)
  441. pci_dev_put(drm->hdmi_device);
  442. nouveau_cli_destroy(&drm->client);
  443. return 0;
  444. }
  445. void
  446. nouveau_drm_device_remove(struct drm_device *dev)
  447. {
  448. struct nouveau_drm *drm = nouveau_drm(dev);
  449. struct nvkm_client *client;
  450. struct nvkm_device *device;
  451. dev->irq_enabled = false;
  452. client = nvxx_client(&drm->client.base);
  453. device = nvkm_device_find(client->device);
  454. drm_put_dev(dev);
  455. nvkm_device_del(&device);
  456. }
  457. static void
  458. nouveau_drm_remove(struct pci_dev *pdev)
  459. {
  460. struct drm_device *dev = pci_get_drvdata(pdev);
  461. nouveau_drm_device_remove(dev);
  462. }
  463. static int
  464. nouveau_do_suspend(struct drm_device *dev, bool runtime)
  465. {
  466. struct nouveau_drm *drm = nouveau_drm(dev);
  467. struct nouveau_cli *cli;
  468. int ret;
  469. if (dev->mode_config.num_crtc) {
  470. NV_INFO(drm, "suspending console...\n");
  471. nouveau_fbcon_set_suspend(dev, 1);
  472. NV_INFO(drm, "suspending display...\n");
  473. ret = nouveau_display_suspend(dev, runtime);
  474. if (ret)
  475. return ret;
  476. }
  477. NV_INFO(drm, "evicting buffers...\n");
  478. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  479. NV_INFO(drm, "waiting for kernel channels to go idle...\n");
  480. if (drm->cechan) {
  481. ret = nouveau_channel_idle(drm->cechan);
  482. if (ret)
  483. goto fail_display;
  484. }
  485. if (drm->channel) {
  486. ret = nouveau_channel_idle(drm->channel);
  487. if (ret)
  488. goto fail_display;
  489. }
  490. NV_INFO(drm, "suspending client object trees...\n");
  491. if (drm->fence && nouveau_fence(drm)->suspend) {
  492. if (!nouveau_fence(drm)->suspend(drm)) {
  493. ret = -ENOMEM;
  494. goto fail_display;
  495. }
  496. }
  497. list_for_each_entry(cli, &drm->clients, head) {
  498. ret = nvif_client_suspend(&cli->base);
  499. if (ret)
  500. goto fail_client;
  501. }
  502. NV_INFO(drm, "suspending kernel object tree...\n");
  503. ret = nvif_client_suspend(&drm->client.base);
  504. if (ret)
  505. goto fail_client;
  506. return 0;
  507. fail_client:
  508. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  509. nvif_client_resume(&cli->base);
  510. }
  511. if (drm->fence && nouveau_fence(drm)->resume)
  512. nouveau_fence(drm)->resume(drm);
  513. fail_display:
  514. if (dev->mode_config.num_crtc) {
  515. NV_INFO(drm, "resuming display...\n");
  516. nouveau_display_resume(dev, runtime);
  517. }
  518. return ret;
  519. }
  520. static int
  521. nouveau_do_resume(struct drm_device *dev, bool runtime)
  522. {
  523. struct nouveau_drm *drm = nouveau_drm(dev);
  524. struct nouveau_cli *cli;
  525. NV_INFO(drm, "resuming kernel object tree...\n");
  526. nvif_client_resume(&drm->client.base);
  527. NV_INFO(drm, "resuming client object trees...\n");
  528. if (drm->fence && nouveau_fence(drm)->resume)
  529. nouveau_fence(drm)->resume(drm);
  530. list_for_each_entry(cli, &drm->clients, head) {
  531. nvif_client_resume(&cli->base);
  532. }
  533. nouveau_run_vbios_init(dev);
  534. if (dev->mode_config.num_crtc) {
  535. NV_INFO(drm, "resuming display...\n");
  536. nouveau_display_resume(dev, runtime);
  537. NV_INFO(drm, "resuming console...\n");
  538. nouveau_fbcon_set_suspend(dev, 0);
  539. }
  540. return 0;
  541. }
  542. int
  543. nouveau_pmops_suspend(struct device *dev)
  544. {
  545. struct pci_dev *pdev = to_pci_dev(dev);
  546. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  547. int ret;
  548. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  549. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  550. return 0;
  551. ret = nouveau_do_suspend(drm_dev, false);
  552. if (ret)
  553. return ret;
  554. pci_save_state(pdev);
  555. pci_disable_device(pdev);
  556. pci_set_power_state(pdev, PCI_D3hot);
  557. udelay(200);
  558. return 0;
  559. }
  560. int
  561. nouveau_pmops_resume(struct device *dev)
  562. {
  563. struct pci_dev *pdev = to_pci_dev(dev);
  564. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  565. int ret;
  566. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  567. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  568. return 0;
  569. pci_set_power_state(pdev, PCI_D0);
  570. pci_restore_state(pdev);
  571. ret = pci_enable_device(pdev);
  572. if (ret)
  573. return ret;
  574. pci_set_master(pdev);
  575. return nouveau_do_resume(drm_dev, false);
  576. }
  577. static int
  578. nouveau_pmops_freeze(struct device *dev)
  579. {
  580. struct pci_dev *pdev = to_pci_dev(dev);
  581. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  582. return nouveau_do_suspend(drm_dev, false);
  583. }
  584. static int
  585. nouveau_pmops_thaw(struct device *dev)
  586. {
  587. struct pci_dev *pdev = to_pci_dev(dev);
  588. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  589. return nouveau_do_resume(drm_dev, false);
  590. }
  591. static int
  592. nouveau_pmops_runtime_suspend(struct device *dev)
  593. {
  594. struct pci_dev *pdev = to_pci_dev(dev);
  595. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  596. int ret;
  597. if (nouveau_runtime_pm == 0) {
  598. pm_runtime_forbid(dev);
  599. return -EBUSY;
  600. }
  601. /* are we optimus enabled? */
  602. if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
  603. DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
  604. pm_runtime_forbid(dev);
  605. return -EBUSY;
  606. }
  607. drm_kms_helper_poll_disable(drm_dev);
  608. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
  609. nouveau_switcheroo_optimus_dsm();
  610. ret = nouveau_do_suspend(drm_dev, true);
  611. pci_save_state(pdev);
  612. pci_disable_device(pdev);
  613. pci_ignore_hotplug(pdev);
  614. pci_set_power_state(pdev, PCI_D3cold);
  615. drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
  616. return ret;
  617. }
  618. static int
  619. nouveau_pmops_runtime_resume(struct device *dev)
  620. {
  621. struct pci_dev *pdev = to_pci_dev(dev);
  622. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  623. struct nvif_device *device = &nouveau_drm(drm_dev)->device;
  624. int ret;
  625. if (nouveau_runtime_pm == 0)
  626. return -EINVAL;
  627. pci_set_power_state(pdev, PCI_D0);
  628. pci_restore_state(pdev);
  629. ret = pci_enable_device(pdev);
  630. if (ret)
  631. return ret;
  632. pci_set_master(pdev);
  633. ret = nouveau_do_resume(drm_dev, true);
  634. drm_kms_helper_poll_enable(drm_dev);
  635. /* do magic */
  636. nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
  637. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
  638. drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
  639. return ret;
  640. }
  641. static int
  642. nouveau_pmops_runtime_idle(struct device *dev)
  643. {
  644. struct pci_dev *pdev = to_pci_dev(dev);
  645. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  646. struct nouveau_drm *drm = nouveau_drm(drm_dev);
  647. struct drm_crtc *crtc;
  648. if (nouveau_runtime_pm == 0) {
  649. pm_runtime_forbid(dev);
  650. return -EBUSY;
  651. }
  652. /* are we optimus enabled? */
  653. if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
  654. DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
  655. pm_runtime_forbid(dev);
  656. return -EBUSY;
  657. }
  658. /* if we have a hdmi audio device - make sure it has a driver loaded */
  659. if (drm->hdmi_device) {
  660. if (!drm->hdmi_device->driver) {
  661. DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
  662. pm_runtime_mark_last_busy(dev);
  663. return -EBUSY;
  664. }
  665. }
  666. list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
  667. if (crtc->enabled) {
  668. DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
  669. return -EBUSY;
  670. }
  671. }
  672. pm_runtime_mark_last_busy(dev);
  673. pm_runtime_autosuspend(dev);
  674. /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
  675. return 1;
  676. }
  677. static int
  678. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  679. {
  680. struct nouveau_drm *drm = nouveau_drm(dev);
  681. struct nouveau_cli *cli;
  682. char name[32], tmpname[TASK_COMM_LEN];
  683. int ret;
  684. /* need to bring up power immediately if opening device */
  685. ret = pm_runtime_get_sync(dev->dev);
  686. if (ret < 0 && ret != -EACCES)
  687. return ret;
  688. get_task_comm(tmpname, current);
  689. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  690. ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli);
  691. if (ret)
  692. goto out_suspend;
  693. cli->base.super = false;
  694. if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
  695. ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
  696. 0x1000, NULL, &cli->vm);
  697. if (ret) {
  698. nouveau_cli_destroy(cli);
  699. goto out_suspend;
  700. }
  701. nvxx_client(&cli->base)->vm = cli->vm;
  702. }
  703. fpriv->driver_priv = cli;
  704. mutex_lock(&drm->client.mutex);
  705. list_add(&cli->head, &drm->clients);
  706. mutex_unlock(&drm->client.mutex);
  707. out_suspend:
  708. pm_runtime_mark_last_busy(dev->dev);
  709. pm_runtime_put_autosuspend(dev->dev);
  710. return ret;
  711. }
  712. static void
  713. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  714. {
  715. struct nouveau_cli *cli = nouveau_cli(fpriv);
  716. struct nouveau_drm *drm = nouveau_drm(dev);
  717. pm_runtime_get_sync(dev->dev);
  718. mutex_lock(&cli->mutex);
  719. if (cli->abi16)
  720. nouveau_abi16_fini(cli->abi16);
  721. mutex_unlock(&cli->mutex);
  722. mutex_lock(&drm->client.mutex);
  723. list_del(&cli->head);
  724. mutex_unlock(&drm->client.mutex);
  725. }
  726. static void
  727. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  728. {
  729. struct nouveau_cli *cli = nouveau_cli(fpriv);
  730. nouveau_cli_destroy(cli);
  731. pm_runtime_mark_last_busy(dev->dev);
  732. pm_runtime_put_autosuspend(dev->dev);
  733. }
  734. static const struct drm_ioctl_desc
  735. nouveau_ioctls[] = {
  736. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
  737. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  738. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
  739. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
  740. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
  741. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
  742. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
  743. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
  744. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
  745. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
  746. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
  747. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
  748. };
  749. long
  750. nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  751. {
  752. struct drm_file *filp = file->private_data;
  753. struct drm_device *dev = filp->minor->dev;
  754. long ret;
  755. ret = pm_runtime_get_sync(dev->dev);
  756. if (ret < 0 && ret != -EACCES)
  757. return ret;
  758. switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
  759. case DRM_NOUVEAU_NVIF:
  760. ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
  761. break;
  762. default:
  763. ret = drm_ioctl(file, cmd, arg);
  764. break;
  765. }
  766. pm_runtime_mark_last_busy(dev->dev);
  767. pm_runtime_put_autosuspend(dev->dev);
  768. return ret;
  769. }
  770. static const struct file_operations
  771. nouveau_driver_fops = {
  772. .owner = THIS_MODULE,
  773. .open = drm_open,
  774. .release = drm_release,
  775. .unlocked_ioctl = nouveau_drm_ioctl,
  776. .mmap = nouveau_ttm_mmap,
  777. .poll = drm_poll,
  778. .read = drm_read,
  779. #if defined(CONFIG_COMPAT)
  780. .compat_ioctl = nouveau_compat_ioctl,
  781. #endif
  782. .llseek = noop_llseek,
  783. };
  784. static struct drm_driver
  785. driver_stub = {
  786. .driver_features =
  787. DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
  788. DRIVER_KMS_LEGACY_CONTEXT,
  789. .load = nouveau_drm_load,
  790. .unload = nouveau_drm_unload,
  791. .open = nouveau_drm_open,
  792. .preclose = nouveau_drm_preclose,
  793. .postclose = nouveau_drm_postclose,
  794. .lastclose = nouveau_vga_lastclose,
  795. #if defined(CONFIG_DEBUG_FS)
  796. .debugfs_init = nouveau_drm_debugfs_init,
  797. .debugfs_cleanup = nouveau_drm_debugfs_cleanup,
  798. #endif
  799. .get_vblank_counter = drm_vblank_no_hw_counter,
  800. .enable_vblank = nouveau_display_vblank_enable,
  801. .disable_vblank = nouveau_display_vblank_disable,
  802. .get_scanout_position = nouveau_display_scanoutpos,
  803. .get_vblank_timestamp = nouveau_display_vblstamp,
  804. .ioctls = nouveau_ioctls,
  805. .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
  806. .fops = &nouveau_driver_fops,
  807. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  808. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  809. .gem_prime_export = drm_gem_prime_export,
  810. .gem_prime_import = drm_gem_prime_import,
  811. .gem_prime_pin = nouveau_gem_prime_pin,
  812. .gem_prime_res_obj = nouveau_gem_prime_res_obj,
  813. .gem_prime_unpin = nouveau_gem_prime_unpin,
  814. .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
  815. .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
  816. .gem_prime_vmap = nouveau_gem_prime_vmap,
  817. .gem_prime_vunmap = nouveau_gem_prime_vunmap,
  818. .gem_free_object = nouveau_gem_object_del,
  819. .gem_open_object = nouveau_gem_object_open,
  820. .gem_close_object = nouveau_gem_object_close,
  821. .dumb_create = nouveau_display_dumb_create,
  822. .dumb_map_offset = nouveau_display_dumb_map_offset,
  823. .dumb_destroy = drm_gem_dumb_destroy,
  824. .name = DRIVER_NAME,
  825. .desc = DRIVER_DESC,
  826. #ifdef GIT_REVISION
  827. .date = GIT_REVISION,
  828. #else
  829. .date = DRIVER_DATE,
  830. #endif
  831. .major = DRIVER_MAJOR,
  832. .minor = DRIVER_MINOR,
  833. .patchlevel = DRIVER_PATCHLEVEL,
  834. };
  835. static struct pci_device_id
  836. nouveau_drm_pci_table[] = {
  837. {
  838. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  839. .class = PCI_BASE_CLASS_DISPLAY << 16,
  840. .class_mask = 0xff << 16,
  841. },
  842. {
  843. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  844. .class = PCI_BASE_CLASS_DISPLAY << 16,
  845. .class_mask = 0xff << 16,
  846. },
  847. {}
  848. };
  849. static void nouveau_display_options(void)
  850. {
  851. DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
  852. DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
  853. DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
  854. DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
  855. DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
  856. DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
  857. DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
  858. DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
  859. DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
  860. DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
  861. DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
  862. }
  863. static const struct dev_pm_ops nouveau_pm_ops = {
  864. .suspend = nouveau_pmops_suspend,
  865. .resume = nouveau_pmops_resume,
  866. .freeze = nouveau_pmops_freeze,
  867. .thaw = nouveau_pmops_thaw,
  868. .poweroff = nouveau_pmops_freeze,
  869. .restore = nouveau_pmops_resume,
  870. .runtime_suspend = nouveau_pmops_runtime_suspend,
  871. .runtime_resume = nouveau_pmops_runtime_resume,
  872. .runtime_idle = nouveau_pmops_runtime_idle,
  873. };
  874. static struct pci_driver
  875. nouveau_drm_pci_driver = {
  876. .name = "nouveau",
  877. .id_table = nouveau_drm_pci_table,
  878. .probe = nouveau_drm_probe,
  879. .remove = nouveau_drm_remove,
  880. .driver.pm = &nouveau_pm_ops,
  881. };
  882. struct drm_device *
  883. nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
  884. struct platform_device *pdev,
  885. struct nvkm_device **pdevice)
  886. {
  887. struct drm_device *drm;
  888. int err;
  889. err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
  890. true, true, ~0ULL, pdevice);
  891. if (err)
  892. goto err_free;
  893. drm = drm_dev_alloc(&driver_platform, &pdev->dev);
  894. if (!drm) {
  895. err = -ENOMEM;
  896. goto err_free;
  897. }
  898. drm->platformdev = pdev;
  899. platform_set_drvdata(pdev, drm);
  900. return drm;
  901. err_free:
  902. nvkm_device_del(pdevice);
  903. return ERR_PTR(err);
  904. }
  905. static int __init
  906. nouveau_drm_init(void)
  907. {
  908. driver_pci = driver_stub;
  909. driver_pci.set_busid = drm_pci_set_busid;
  910. driver_platform = driver_stub;
  911. driver_platform.set_busid = drm_platform_set_busid;
  912. nouveau_display_options();
  913. if (nouveau_modeset == -1) {
  914. #ifdef CONFIG_VGA_CONSOLE
  915. if (vgacon_text_force())
  916. nouveau_modeset = 0;
  917. #endif
  918. }
  919. if (!nouveau_modeset)
  920. return 0;
  921. #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
  922. platform_driver_register(&nouveau_platform_driver);
  923. #endif
  924. nouveau_register_dsm_handler();
  925. return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
  926. }
  927. static void __exit
  928. nouveau_drm_exit(void)
  929. {
  930. if (!nouveau_modeset)
  931. return;
  932. drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
  933. nouveau_unregister_dsm_handler();
  934. #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
  935. platform_driver_unregister(&nouveau_platform_driver);
  936. #endif
  937. }
  938. module_init(nouveau_drm_init);
  939. module_exit(nouveau_drm_exit);
  940. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  941. MODULE_AUTHOR(DRIVER_AUTHOR);
  942. MODULE_DESCRIPTION(DRIVER_DESC);
  943. MODULE_LICENSE("GPL and additional rights");