clk.h 3.0 KB

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  1. #ifndef __NVKM_CLK_H__
  2. #define __NVKM_CLK_H__
  3. #include <core/subdev.h>
  4. #include <core/notify.h>
  5. #include <subdev/pci.h>
  6. struct nvbios_pll;
  7. struct nvkm_pll_vals;
  8. enum nv_clk_src {
  9. nv_clk_src_crystal,
  10. nv_clk_src_href,
  11. nv_clk_src_hclk,
  12. nv_clk_src_hclkm3,
  13. nv_clk_src_hclkm3d2,
  14. nv_clk_src_hclkm2d3, /* NVAA */
  15. nv_clk_src_hclkm4, /* NVAA */
  16. nv_clk_src_cclk, /* NVAA */
  17. nv_clk_src_host,
  18. nv_clk_src_sppll0,
  19. nv_clk_src_sppll1,
  20. nv_clk_src_mpllsrcref,
  21. nv_clk_src_mpllsrc,
  22. nv_clk_src_mpll,
  23. nv_clk_src_mdiv,
  24. nv_clk_src_core,
  25. nv_clk_src_core_intm,
  26. nv_clk_src_shader,
  27. nv_clk_src_mem,
  28. nv_clk_src_gpc,
  29. nv_clk_src_rop,
  30. nv_clk_src_hubk01,
  31. nv_clk_src_hubk06,
  32. nv_clk_src_hubk07,
  33. nv_clk_src_copy,
  34. nv_clk_src_pmu,
  35. nv_clk_src_disp,
  36. nv_clk_src_vdec,
  37. nv_clk_src_dom6,
  38. nv_clk_src_max,
  39. };
  40. struct nvkm_cstate {
  41. struct list_head head;
  42. u8 voltage;
  43. u32 domain[nv_clk_src_max];
  44. };
  45. struct nvkm_pstate {
  46. struct list_head head;
  47. struct list_head list; /* c-states */
  48. struct nvkm_cstate base;
  49. u8 pstate;
  50. u8 fanspeed;
  51. enum nvkm_pcie_speed pcie_speed;
  52. u8 pcie_width;
  53. };
  54. struct nvkm_domain {
  55. enum nv_clk_src name;
  56. u8 bios; /* 0xff for none */
  57. #define NVKM_CLK_DOM_FLAG_CORE 0x01
  58. u8 flags;
  59. const char *mname;
  60. int mdiv;
  61. };
  62. struct nvkm_clk {
  63. const struct nvkm_clk_func *func;
  64. struct nvkm_subdev subdev;
  65. const struct nvkm_domain *domains;
  66. struct nvkm_pstate bstate;
  67. struct list_head states;
  68. int state_nr;
  69. struct work_struct work;
  70. wait_queue_head_t wait;
  71. atomic_t waiting;
  72. struct nvkm_notify pwrsrc_ntfy;
  73. int pwrsrc;
  74. int pstate; /* current */
  75. int ustate_ac; /* user-requested (-1 disabled, -2 perfmon) */
  76. int ustate_dc; /* user-requested (-1 disabled, -2 perfmon) */
  77. int astate; /* perfmon adjustment (base) */
  78. int tstate; /* thermal adjustment (max-) */
  79. int dstate; /* display adjustment (min+) */
  80. bool allow_reclock;
  81. /*XXX: die, these are here *only* to support the completely
  82. * bat-shit insane what-was-nouveau_hw.c code
  83. */
  84. int (*pll_calc)(struct nvkm_clk *, struct nvbios_pll *, int clk,
  85. struct nvkm_pll_vals *pv);
  86. int (*pll_prog)(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *pv);
  87. };
  88. int nvkm_clk_read(struct nvkm_clk *, enum nv_clk_src);
  89. int nvkm_clk_ustate(struct nvkm_clk *, int req, int pwr);
  90. int nvkm_clk_astate(struct nvkm_clk *, int req, int rel, bool wait);
  91. int nvkm_clk_dstate(struct nvkm_clk *, int req, int rel);
  92. int nvkm_clk_tstate(struct nvkm_clk *, int req, int rel);
  93. int nv04_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
  94. int nv40_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
  95. int nv50_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
  96. int g84_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
  97. int mcp77_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
  98. int gt215_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
  99. int gf100_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
  100. int gk104_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
  101. int gk20a_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
  102. int gm20b_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
  103. #endif