edac_mc_sysfs.c 26 KB

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  1. /*
  2. * edac_mc kernel module
  3. * (C) 2005-2007 Linux Networx (http://lnxi.com)
  4. *
  5. * This file may be distributed under the terms of the
  6. * GNU General Public License.
  7. *
  8. * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
  9. *
  10. * (c) 2012-2013 - Mauro Carvalho Chehab
  11. * The entire API were re-written, and ported to use struct device
  12. *
  13. */
  14. #include <linux/ctype.h>
  15. #include <linux/slab.h>
  16. #include <linux/edac.h>
  17. #include <linux/bug.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/uaccess.h>
  20. #include "edac_core.h"
  21. #include "edac_module.h"
  22. /* MC EDAC Controls, setable by module parameter, and sysfs */
  23. static int edac_mc_log_ue = 1;
  24. static int edac_mc_log_ce = 1;
  25. static int edac_mc_panic_on_ue;
  26. static int edac_mc_poll_msec = 1000;
  27. /* Getter functions for above */
  28. int edac_mc_get_log_ue(void)
  29. {
  30. return edac_mc_log_ue;
  31. }
  32. int edac_mc_get_log_ce(void)
  33. {
  34. return edac_mc_log_ce;
  35. }
  36. int edac_mc_get_panic_on_ue(void)
  37. {
  38. return edac_mc_panic_on_ue;
  39. }
  40. /* this is temporary */
  41. int edac_mc_get_poll_msec(void)
  42. {
  43. return edac_mc_poll_msec;
  44. }
  45. static int edac_set_poll_msec(const char *val, struct kernel_param *kp)
  46. {
  47. unsigned long l;
  48. int ret;
  49. if (!val)
  50. return -EINVAL;
  51. ret = kstrtoul(val, 0, &l);
  52. if (ret)
  53. return ret;
  54. if (l < 1000)
  55. return -EINVAL;
  56. *((unsigned long *)kp->arg) = l;
  57. /* notify edac_mc engine to reset the poll period */
  58. edac_mc_reset_delay_period(l);
  59. return 0;
  60. }
  61. /* Parameter declarations for above */
  62. module_param(edac_mc_panic_on_ue, int, 0644);
  63. MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
  64. module_param(edac_mc_log_ue, int, 0644);
  65. MODULE_PARM_DESC(edac_mc_log_ue,
  66. "Log uncorrectable error to console: 0=off 1=on");
  67. module_param(edac_mc_log_ce, int, 0644);
  68. MODULE_PARM_DESC(edac_mc_log_ce,
  69. "Log correctable error to console: 0=off 1=on");
  70. module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int,
  71. &edac_mc_poll_msec, 0644);
  72. MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
  73. static struct device *mci_pdev;
  74. /*
  75. * various constants for Memory Controllers
  76. */
  77. static const char * const mem_types[] = {
  78. [MEM_EMPTY] = "Empty",
  79. [MEM_RESERVED] = "Reserved",
  80. [MEM_UNKNOWN] = "Unknown",
  81. [MEM_FPM] = "FPM",
  82. [MEM_EDO] = "EDO",
  83. [MEM_BEDO] = "BEDO",
  84. [MEM_SDR] = "Unbuffered-SDR",
  85. [MEM_RDR] = "Registered-SDR",
  86. [MEM_DDR] = "Unbuffered-DDR",
  87. [MEM_RDDR] = "Registered-DDR",
  88. [MEM_RMBS] = "RMBS",
  89. [MEM_DDR2] = "Unbuffered-DDR2",
  90. [MEM_FB_DDR2] = "FullyBuffered-DDR2",
  91. [MEM_RDDR2] = "Registered-DDR2",
  92. [MEM_XDR] = "XDR",
  93. [MEM_DDR3] = "Unbuffered-DDR3",
  94. [MEM_RDDR3] = "Registered-DDR3",
  95. [MEM_DDR4] = "Unbuffered-DDR4",
  96. [MEM_RDDR4] = "Registered-DDR4"
  97. };
  98. static const char * const dev_types[] = {
  99. [DEV_UNKNOWN] = "Unknown",
  100. [DEV_X1] = "x1",
  101. [DEV_X2] = "x2",
  102. [DEV_X4] = "x4",
  103. [DEV_X8] = "x8",
  104. [DEV_X16] = "x16",
  105. [DEV_X32] = "x32",
  106. [DEV_X64] = "x64"
  107. };
  108. static const char * const edac_caps[] = {
  109. [EDAC_UNKNOWN] = "Unknown",
  110. [EDAC_NONE] = "None",
  111. [EDAC_RESERVED] = "Reserved",
  112. [EDAC_PARITY] = "PARITY",
  113. [EDAC_EC] = "EC",
  114. [EDAC_SECDED] = "SECDED",
  115. [EDAC_S2ECD2ED] = "S2ECD2ED",
  116. [EDAC_S4ECD4ED] = "S4ECD4ED",
  117. [EDAC_S8ECD8ED] = "S8ECD8ED",
  118. [EDAC_S16ECD16ED] = "S16ECD16ED"
  119. };
  120. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  121. /*
  122. * EDAC sysfs CSROW data structures and methods
  123. */
  124. #define to_csrow(k) container_of(k, struct csrow_info, dev)
  125. /*
  126. * We need it to avoid namespace conflicts between the legacy API
  127. * and the per-dimm/per-rank one
  128. */
  129. #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
  130. static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
  131. struct dev_ch_attribute {
  132. struct device_attribute attr;
  133. int channel;
  134. };
  135. #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
  136. static struct dev_ch_attribute dev_attr_legacy_##_name = \
  137. { __ATTR(_name, _mode, _show, _store), (_var) }
  138. #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
  139. /* Set of more default csrow<id> attribute show/store functions */
  140. static ssize_t csrow_ue_count_show(struct device *dev,
  141. struct device_attribute *mattr, char *data)
  142. {
  143. struct csrow_info *csrow = to_csrow(dev);
  144. return sprintf(data, "%u\n", csrow->ue_count);
  145. }
  146. static ssize_t csrow_ce_count_show(struct device *dev,
  147. struct device_attribute *mattr, char *data)
  148. {
  149. struct csrow_info *csrow = to_csrow(dev);
  150. return sprintf(data, "%u\n", csrow->ce_count);
  151. }
  152. static ssize_t csrow_size_show(struct device *dev,
  153. struct device_attribute *mattr, char *data)
  154. {
  155. struct csrow_info *csrow = to_csrow(dev);
  156. int i;
  157. u32 nr_pages = 0;
  158. for (i = 0; i < csrow->nr_channels; i++)
  159. nr_pages += csrow->channels[i]->dimm->nr_pages;
  160. return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
  161. }
  162. static ssize_t csrow_mem_type_show(struct device *dev,
  163. struct device_attribute *mattr, char *data)
  164. {
  165. struct csrow_info *csrow = to_csrow(dev);
  166. return sprintf(data, "%s\n", mem_types[csrow->channels[0]->dimm->mtype]);
  167. }
  168. static ssize_t csrow_dev_type_show(struct device *dev,
  169. struct device_attribute *mattr, char *data)
  170. {
  171. struct csrow_info *csrow = to_csrow(dev);
  172. return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]);
  173. }
  174. static ssize_t csrow_edac_mode_show(struct device *dev,
  175. struct device_attribute *mattr,
  176. char *data)
  177. {
  178. struct csrow_info *csrow = to_csrow(dev);
  179. return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]);
  180. }
  181. /* show/store functions for DIMM Label attributes */
  182. static ssize_t channel_dimm_label_show(struct device *dev,
  183. struct device_attribute *mattr,
  184. char *data)
  185. {
  186. struct csrow_info *csrow = to_csrow(dev);
  187. unsigned chan = to_channel(mattr);
  188. struct rank_info *rank = csrow->channels[chan];
  189. /* if field has not been initialized, there is nothing to send */
  190. if (!rank->dimm->label[0])
  191. return 0;
  192. return snprintf(data, sizeof(rank->dimm->label) + 1, "%s\n",
  193. rank->dimm->label);
  194. }
  195. static ssize_t channel_dimm_label_store(struct device *dev,
  196. struct device_attribute *mattr,
  197. const char *data, size_t count)
  198. {
  199. struct csrow_info *csrow = to_csrow(dev);
  200. unsigned chan = to_channel(mattr);
  201. struct rank_info *rank = csrow->channels[chan];
  202. size_t copy_count = count;
  203. if (count == 0)
  204. return -EINVAL;
  205. if (data[count - 1] == '\0' || data[count - 1] == '\n')
  206. copy_count -= 1;
  207. if (copy_count == 0 || copy_count >= sizeof(rank->dimm->label))
  208. return -EINVAL;
  209. strncpy(rank->dimm->label, data, copy_count);
  210. rank->dimm->label[copy_count] = '\0';
  211. return count;
  212. }
  213. /* show function for dynamic chX_ce_count attribute */
  214. static ssize_t channel_ce_count_show(struct device *dev,
  215. struct device_attribute *mattr, char *data)
  216. {
  217. struct csrow_info *csrow = to_csrow(dev);
  218. unsigned chan = to_channel(mattr);
  219. struct rank_info *rank = csrow->channels[chan];
  220. return sprintf(data, "%u\n", rank->ce_count);
  221. }
  222. /* cwrow<id>/attribute files */
  223. DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
  224. DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
  225. DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
  226. DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
  227. DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
  228. DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
  229. /* default attributes of the CSROW<id> object */
  230. static struct attribute *csrow_attrs[] = {
  231. &dev_attr_legacy_dev_type.attr,
  232. &dev_attr_legacy_mem_type.attr,
  233. &dev_attr_legacy_edac_mode.attr,
  234. &dev_attr_legacy_size_mb.attr,
  235. &dev_attr_legacy_ue_count.attr,
  236. &dev_attr_legacy_ce_count.attr,
  237. NULL,
  238. };
  239. static struct attribute_group csrow_attr_grp = {
  240. .attrs = csrow_attrs,
  241. };
  242. static const struct attribute_group *csrow_attr_groups[] = {
  243. &csrow_attr_grp,
  244. NULL
  245. };
  246. static void csrow_attr_release(struct device *dev)
  247. {
  248. struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
  249. edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
  250. kfree(csrow);
  251. }
  252. static struct device_type csrow_attr_type = {
  253. .groups = csrow_attr_groups,
  254. .release = csrow_attr_release,
  255. };
  256. /*
  257. * possible dynamic channel DIMM Label attribute files
  258. *
  259. */
  260. DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
  261. channel_dimm_label_show, channel_dimm_label_store, 0);
  262. DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
  263. channel_dimm_label_show, channel_dimm_label_store, 1);
  264. DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
  265. channel_dimm_label_show, channel_dimm_label_store, 2);
  266. DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
  267. channel_dimm_label_show, channel_dimm_label_store, 3);
  268. DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
  269. channel_dimm_label_show, channel_dimm_label_store, 4);
  270. DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
  271. channel_dimm_label_show, channel_dimm_label_store, 5);
  272. /* Total possible dynamic DIMM Label attribute file table */
  273. static struct attribute *dynamic_csrow_dimm_attr[] = {
  274. &dev_attr_legacy_ch0_dimm_label.attr.attr,
  275. &dev_attr_legacy_ch1_dimm_label.attr.attr,
  276. &dev_attr_legacy_ch2_dimm_label.attr.attr,
  277. &dev_attr_legacy_ch3_dimm_label.attr.attr,
  278. &dev_attr_legacy_ch4_dimm_label.attr.attr,
  279. &dev_attr_legacy_ch5_dimm_label.attr.attr,
  280. NULL
  281. };
  282. /* possible dynamic channel ce_count attribute files */
  283. DEVICE_CHANNEL(ch0_ce_count, S_IRUGO,
  284. channel_ce_count_show, NULL, 0);
  285. DEVICE_CHANNEL(ch1_ce_count, S_IRUGO,
  286. channel_ce_count_show, NULL, 1);
  287. DEVICE_CHANNEL(ch2_ce_count, S_IRUGO,
  288. channel_ce_count_show, NULL, 2);
  289. DEVICE_CHANNEL(ch3_ce_count, S_IRUGO,
  290. channel_ce_count_show, NULL, 3);
  291. DEVICE_CHANNEL(ch4_ce_count, S_IRUGO,
  292. channel_ce_count_show, NULL, 4);
  293. DEVICE_CHANNEL(ch5_ce_count, S_IRUGO,
  294. channel_ce_count_show, NULL, 5);
  295. /* Total possible dynamic ce_count attribute file table */
  296. static struct attribute *dynamic_csrow_ce_count_attr[] = {
  297. &dev_attr_legacy_ch0_ce_count.attr.attr,
  298. &dev_attr_legacy_ch1_ce_count.attr.attr,
  299. &dev_attr_legacy_ch2_ce_count.attr.attr,
  300. &dev_attr_legacy_ch3_ce_count.attr.attr,
  301. &dev_attr_legacy_ch4_ce_count.attr.attr,
  302. &dev_attr_legacy_ch5_ce_count.attr.attr,
  303. NULL
  304. };
  305. static umode_t csrow_dev_is_visible(struct kobject *kobj,
  306. struct attribute *attr, int idx)
  307. {
  308. struct device *dev = kobj_to_dev(kobj);
  309. struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
  310. if (idx >= csrow->nr_channels)
  311. return 0;
  312. /* Only expose populated DIMMs */
  313. if (!csrow->channels[idx]->dimm->nr_pages)
  314. return 0;
  315. return attr->mode;
  316. }
  317. static const struct attribute_group csrow_dev_dimm_group = {
  318. .attrs = dynamic_csrow_dimm_attr,
  319. .is_visible = csrow_dev_is_visible,
  320. };
  321. static const struct attribute_group csrow_dev_ce_count_group = {
  322. .attrs = dynamic_csrow_ce_count_attr,
  323. .is_visible = csrow_dev_is_visible,
  324. };
  325. static const struct attribute_group *csrow_dev_groups[] = {
  326. &csrow_dev_dimm_group,
  327. &csrow_dev_ce_count_group,
  328. NULL
  329. };
  330. static inline int nr_pages_per_csrow(struct csrow_info *csrow)
  331. {
  332. int chan, nr_pages = 0;
  333. for (chan = 0; chan < csrow->nr_channels; chan++)
  334. nr_pages += csrow->channels[chan]->dimm->nr_pages;
  335. return nr_pages;
  336. }
  337. /* Create a CSROW object under specifed edac_mc_device */
  338. static int edac_create_csrow_object(struct mem_ctl_info *mci,
  339. struct csrow_info *csrow, int index)
  340. {
  341. csrow->dev.type = &csrow_attr_type;
  342. csrow->dev.bus = mci->bus;
  343. csrow->dev.groups = csrow_dev_groups;
  344. device_initialize(&csrow->dev);
  345. csrow->dev.parent = &mci->dev;
  346. csrow->mci = mci;
  347. dev_set_name(&csrow->dev, "csrow%d", index);
  348. dev_set_drvdata(&csrow->dev, csrow);
  349. edac_dbg(0, "creating (virtual) csrow node %s\n",
  350. dev_name(&csrow->dev));
  351. return device_add(&csrow->dev);
  352. }
  353. /* Create a CSROW object under specifed edac_mc_device */
  354. static int edac_create_csrow_objects(struct mem_ctl_info *mci)
  355. {
  356. int err, i;
  357. struct csrow_info *csrow;
  358. for (i = 0; i < mci->nr_csrows; i++) {
  359. csrow = mci->csrows[i];
  360. if (!nr_pages_per_csrow(csrow))
  361. continue;
  362. err = edac_create_csrow_object(mci, mci->csrows[i], i);
  363. if (err < 0) {
  364. edac_dbg(1,
  365. "failure: create csrow objects for csrow %d\n",
  366. i);
  367. goto error;
  368. }
  369. }
  370. return 0;
  371. error:
  372. for (--i; i >= 0; i--) {
  373. csrow = mci->csrows[i];
  374. if (!nr_pages_per_csrow(csrow))
  375. continue;
  376. put_device(&mci->csrows[i]->dev);
  377. }
  378. return err;
  379. }
  380. static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
  381. {
  382. int i;
  383. struct csrow_info *csrow;
  384. for (i = mci->nr_csrows - 1; i >= 0; i--) {
  385. csrow = mci->csrows[i];
  386. if (!nr_pages_per_csrow(csrow))
  387. continue;
  388. device_unregister(&mci->csrows[i]->dev);
  389. }
  390. }
  391. #endif
  392. /*
  393. * Per-dimm (or per-rank) devices
  394. */
  395. #define to_dimm(k) container_of(k, struct dimm_info, dev)
  396. /* show/store functions for DIMM Label attributes */
  397. static ssize_t dimmdev_location_show(struct device *dev,
  398. struct device_attribute *mattr, char *data)
  399. {
  400. struct dimm_info *dimm = to_dimm(dev);
  401. return edac_dimm_info_location(dimm, data, PAGE_SIZE);
  402. }
  403. static ssize_t dimmdev_label_show(struct device *dev,
  404. struct device_attribute *mattr, char *data)
  405. {
  406. struct dimm_info *dimm = to_dimm(dev);
  407. /* if field has not been initialized, there is nothing to send */
  408. if (!dimm->label[0])
  409. return 0;
  410. return snprintf(data, sizeof(dimm->label) + 1, "%s\n", dimm->label);
  411. }
  412. static ssize_t dimmdev_label_store(struct device *dev,
  413. struct device_attribute *mattr,
  414. const char *data,
  415. size_t count)
  416. {
  417. struct dimm_info *dimm = to_dimm(dev);
  418. size_t copy_count = count;
  419. if (count == 0)
  420. return -EINVAL;
  421. if (data[count - 1] == '\0' || data[count - 1] == '\n')
  422. copy_count -= 1;
  423. if (copy_count == 0 || copy_count >= sizeof(dimm->label))
  424. return -EINVAL;
  425. strncpy(dimm->label, data, copy_count);
  426. dimm->label[copy_count] = '\0';
  427. return count;
  428. }
  429. static ssize_t dimmdev_size_show(struct device *dev,
  430. struct device_attribute *mattr, char *data)
  431. {
  432. struct dimm_info *dimm = to_dimm(dev);
  433. return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages));
  434. }
  435. static ssize_t dimmdev_mem_type_show(struct device *dev,
  436. struct device_attribute *mattr, char *data)
  437. {
  438. struct dimm_info *dimm = to_dimm(dev);
  439. return sprintf(data, "%s\n", mem_types[dimm->mtype]);
  440. }
  441. static ssize_t dimmdev_dev_type_show(struct device *dev,
  442. struct device_attribute *mattr, char *data)
  443. {
  444. struct dimm_info *dimm = to_dimm(dev);
  445. return sprintf(data, "%s\n", dev_types[dimm->dtype]);
  446. }
  447. static ssize_t dimmdev_edac_mode_show(struct device *dev,
  448. struct device_attribute *mattr,
  449. char *data)
  450. {
  451. struct dimm_info *dimm = to_dimm(dev);
  452. return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]);
  453. }
  454. /* dimm/rank attribute files */
  455. static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR,
  456. dimmdev_label_show, dimmdev_label_store);
  457. static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL);
  458. static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL);
  459. static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL);
  460. static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL);
  461. static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL);
  462. /* attributes of the dimm<id>/rank<id> object */
  463. static struct attribute *dimm_attrs[] = {
  464. &dev_attr_dimm_label.attr,
  465. &dev_attr_dimm_location.attr,
  466. &dev_attr_size.attr,
  467. &dev_attr_dimm_mem_type.attr,
  468. &dev_attr_dimm_dev_type.attr,
  469. &dev_attr_dimm_edac_mode.attr,
  470. NULL,
  471. };
  472. static struct attribute_group dimm_attr_grp = {
  473. .attrs = dimm_attrs,
  474. };
  475. static const struct attribute_group *dimm_attr_groups[] = {
  476. &dimm_attr_grp,
  477. NULL
  478. };
  479. static void dimm_attr_release(struct device *dev)
  480. {
  481. struct dimm_info *dimm = container_of(dev, struct dimm_info, dev);
  482. edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev));
  483. kfree(dimm);
  484. }
  485. static struct device_type dimm_attr_type = {
  486. .groups = dimm_attr_groups,
  487. .release = dimm_attr_release,
  488. };
  489. /* Create a DIMM object under specifed memory controller device */
  490. static int edac_create_dimm_object(struct mem_ctl_info *mci,
  491. struct dimm_info *dimm,
  492. int index)
  493. {
  494. int err;
  495. dimm->mci = mci;
  496. dimm->dev.type = &dimm_attr_type;
  497. dimm->dev.bus = mci->bus;
  498. device_initialize(&dimm->dev);
  499. dimm->dev.parent = &mci->dev;
  500. if (mci->csbased)
  501. dev_set_name(&dimm->dev, "rank%d", index);
  502. else
  503. dev_set_name(&dimm->dev, "dimm%d", index);
  504. dev_set_drvdata(&dimm->dev, dimm);
  505. pm_runtime_forbid(&mci->dev);
  506. err = device_add(&dimm->dev);
  507. edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm->dev));
  508. return err;
  509. }
  510. /*
  511. * Memory controller device
  512. */
  513. #define to_mci(k) container_of(k, struct mem_ctl_info, dev)
  514. static ssize_t mci_reset_counters_store(struct device *dev,
  515. struct device_attribute *mattr,
  516. const char *data, size_t count)
  517. {
  518. struct mem_ctl_info *mci = to_mci(dev);
  519. int cnt, row, chan, i;
  520. mci->ue_mc = 0;
  521. mci->ce_mc = 0;
  522. mci->ue_noinfo_count = 0;
  523. mci->ce_noinfo_count = 0;
  524. for (row = 0; row < mci->nr_csrows; row++) {
  525. struct csrow_info *ri = mci->csrows[row];
  526. ri->ue_count = 0;
  527. ri->ce_count = 0;
  528. for (chan = 0; chan < ri->nr_channels; chan++)
  529. ri->channels[chan]->ce_count = 0;
  530. }
  531. cnt = 1;
  532. for (i = 0; i < mci->n_layers; i++) {
  533. cnt *= mci->layers[i].size;
  534. memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32));
  535. memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32));
  536. }
  537. mci->start_time = jiffies;
  538. return count;
  539. }
  540. /* Memory scrubbing interface:
  541. *
  542. * A MC driver can limit the scrubbing bandwidth based on the CPU type.
  543. * Therefore, ->set_sdram_scrub_rate should be made to return the actual
  544. * bandwidth that is accepted or 0 when scrubbing is to be disabled.
  545. *
  546. * Negative value still means that an error has occurred while setting
  547. * the scrub rate.
  548. */
  549. static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
  550. struct device_attribute *mattr,
  551. const char *data, size_t count)
  552. {
  553. struct mem_ctl_info *mci = to_mci(dev);
  554. unsigned long bandwidth = 0;
  555. int new_bw = 0;
  556. if (kstrtoul(data, 10, &bandwidth) < 0)
  557. return -EINVAL;
  558. new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
  559. if (new_bw < 0) {
  560. edac_printk(KERN_WARNING, EDAC_MC,
  561. "Error setting scrub rate to: %lu\n", bandwidth);
  562. return -EINVAL;
  563. }
  564. return count;
  565. }
  566. /*
  567. * ->get_sdram_scrub_rate() return value semantics same as above.
  568. */
  569. static ssize_t mci_sdram_scrub_rate_show(struct device *dev,
  570. struct device_attribute *mattr,
  571. char *data)
  572. {
  573. struct mem_ctl_info *mci = to_mci(dev);
  574. int bandwidth = 0;
  575. bandwidth = mci->get_sdram_scrub_rate(mci);
  576. if (bandwidth < 0) {
  577. edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n");
  578. return bandwidth;
  579. }
  580. return sprintf(data, "%d\n", bandwidth);
  581. }
  582. /* default attribute files for the MCI object */
  583. static ssize_t mci_ue_count_show(struct device *dev,
  584. struct device_attribute *mattr,
  585. char *data)
  586. {
  587. struct mem_ctl_info *mci = to_mci(dev);
  588. return sprintf(data, "%d\n", mci->ue_mc);
  589. }
  590. static ssize_t mci_ce_count_show(struct device *dev,
  591. struct device_attribute *mattr,
  592. char *data)
  593. {
  594. struct mem_ctl_info *mci = to_mci(dev);
  595. return sprintf(data, "%d\n", mci->ce_mc);
  596. }
  597. static ssize_t mci_ce_noinfo_show(struct device *dev,
  598. struct device_attribute *mattr,
  599. char *data)
  600. {
  601. struct mem_ctl_info *mci = to_mci(dev);
  602. return sprintf(data, "%d\n", mci->ce_noinfo_count);
  603. }
  604. static ssize_t mci_ue_noinfo_show(struct device *dev,
  605. struct device_attribute *mattr,
  606. char *data)
  607. {
  608. struct mem_ctl_info *mci = to_mci(dev);
  609. return sprintf(data, "%d\n", mci->ue_noinfo_count);
  610. }
  611. static ssize_t mci_seconds_show(struct device *dev,
  612. struct device_attribute *mattr,
  613. char *data)
  614. {
  615. struct mem_ctl_info *mci = to_mci(dev);
  616. return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
  617. }
  618. static ssize_t mci_ctl_name_show(struct device *dev,
  619. struct device_attribute *mattr,
  620. char *data)
  621. {
  622. struct mem_ctl_info *mci = to_mci(dev);
  623. return sprintf(data, "%s\n", mci->ctl_name);
  624. }
  625. static ssize_t mci_size_mb_show(struct device *dev,
  626. struct device_attribute *mattr,
  627. char *data)
  628. {
  629. struct mem_ctl_info *mci = to_mci(dev);
  630. int total_pages = 0, csrow_idx, j;
  631. for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
  632. struct csrow_info *csrow = mci->csrows[csrow_idx];
  633. for (j = 0; j < csrow->nr_channels; j++) {
  634. struct dimm_info *dimm = csrow->channels[j]->dimm;
  635. total_pages += dimm->nr_pages;
  636. }
  637. }
  638. return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
  639. }
  640. static ssize_t mci_max_location_show(struct device *dev,
  641. struct device_attribute *mattr,
  642. char *data)
  643. {
  644. struct mem_ctl_info *mci = to_mci(dev);
  645. int i;
  646. char *p = data;
  647. for (i = 0; i < mci->n_layers; i++) {
  648. p += sprintf(p, "%s %d ",
  649. edac_layer_name[mci->layers[i].type],
  650. mci->layers[i].size - 1);
  651. }
  652. return p - data;
  653. }
  654. /* default Control file */
  655. static DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
  656. /* default Attribute files */
  657. static DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
  658. static DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
  659. static DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
  660. static DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
  661. static DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
  662. static DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
  663. static DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
  664. static DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
  665. /* memory scrubber attribute file */
  666. DEVICE_ATTR(sdram_scrub_rate, 0, mci_sdram_scrub_rate_show,
  667. mci_sdram_scrub_rate_store); /* umode set later in is_visible */
  668. static struct attribute *mci_attrs[] = {
  669. &dev_attr_reset_counters.attr,
  670. &dev_attr_mc_name.attr,
  671. &dev_attr_size_mb.attr,
  672. &dev_attr_seconds_since_reset.attr,
  673. &dev_attr_ue_noinfo_count.attr,
  674. &dev_attr_ce_noinfo_count.attr,
  675. &dev_attr_ue_count.attr,
  676. &dev_attr_ce_count.attr,
  677. &dev_attr_max_location.attr,
  678. &dev_attr_sdram_scrub_rate.attr,
  679. NULL
  680. };
  681. static umode_t mci_attr_is_visible(struct kobject *kobj,
  682. struct attribute *attr, int idx)
  683. {
  684. struct device *dev = kobj_to_dev(kobj);
  685. struct mem_ctl_info *mci = to_mci(dev);
  686. umode_t mode = 0;
  687. if (attr != &dev_attr_sdram_scrub_rate.attr)
  688. return attr->mode;
  689. if (mci->get_sdram_scrub_rate)
  690. mode |= S_IRUGO;
  691. if (mci->set_sdram_scrub_rate)
  692. mode |= S_IWUSR;
  693. return mode;
  694. }
  695. static struct attribute_group mci_attr_grp = {
  696. .attrs = mci_attrs,
  697. .is_visible = mci_attr_is_visible,
  698. };
  699. static const struct attribute_group *mci_attr_groups[] = {
  700. &mci_attr_grp,
  701. NULL
  702. };
  703. static void mci_attr_release(struct device *dev)
  704. {
  705. struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
  706. edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
  707. kfree(mci);
  708. }
  709. static struct device_type mci_attr_type = {
  710. .groups = mci_attr_groups,
  711. .release = mci_attr_release,
  712. };
  713. /*
  714. * Create a new Memory Controller kobject instance,
  715. * mc<id> under the 'mc' directory
  716. *
  717. * Return:
  718. * 0 Success
  719. * !0 Failure
  720. */
  721. int edac_create_sysfs_mci_device(struct mem_ctl_info *mci,
  722. const struct attribute_group **groups)
  723. {
  724. char *name;
  725. int i, err;
  726. /*
  727. * The memory controller needs its own bus, in order to avoid
  728. * namespace conflicts at /sys/bus/edac.
  729. */
  730. name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx);
  731. if (!name)
  732. return -ENOMEM;
  733. mci->bus->name = name;
  734. edac_dbg(0, "creating bus %s\n", mci->bus->name);
  735. err = bus_register(mci->bus);
  736. if (err < 0) {
  737. kfree(name);
  738. return err;
  739. }
  740. /* get the /sys/devices/system/edac subsys reference */
  741. mci->dev.type = &mci_attr_type;
  742. device_initialize(&mci->dev);
  743. mci->dev.parent = mci_pdev;
  744. mci->dev.bus = mci->bus;
  745. mci->dev.groups = groups;
  746. dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
  747. dev_set_drvdata(&mci->dev, mci);
  748. pm_runtime_forbid(&mci->dev);
  749. edac_dbg(0, "creating device %s\n", dev_name(&mci->dev));
  750. err = device_add(&mci->dev);
  751. if (err < 0) {
  752. edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev));
  753. goto fail_unregister_bus;
  754. }
  755. /*
  756. * Create the dimm/rank devices
  757. */
  758. for (i = 0; i < mci->tot_dimms; i++) {
  759. struct dimm_info *dimm = mci->dimms[i];
  760. /* Only expose populated DIMMs */
  761. if (!dimm->nr_pages)
  762. continue;
  763. #ifdef CONFIG_EDAC_DEBUG
  764. edac_dbg(1, "creating dimm%d, located at ", i);
  765. if (edac_debug_level >= 1) {
  766. int lay;
  767. for (lay = 0; lay < mci->n_layers; lay++)
  768. printk(KERN_CONT "%s %d ",
  769. edac_layer_name[mci->layers[lay].type],
  770. dimm->location[lay]);
  771. printk(KERN_CONT "\n");
  772. }
  773. #endif
  774. err = edac_create_dimm_object(mci, dimm, i);
  775. if (err) {
  776. edac_dbg(1, "failure: create dimm %d obj\n", i);
  777. goto fail_unregister_dimm;
  778. }
  779. }
  780. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  781. err = edac_create_csrow_objects(mci);
  782. if (err < 0)
  783. goto fail_unregister_dimm;
  784. #endif
  785. edac_create_debugfs_nodes(mci);
  786. return 0;
  787. fail_unregister_dimm:
  788. for (i--; i >= 0; i--) {
  789. struct dimm_info *dimm = mci->dimms[i];
  790. if (!dimm->nr_pages)
  791. continue;
  792. device_unregister(&dimm->dev);
  793. }
  794. device_unregister(&mci->dev);
  795. fail_unregister_bus:
  796. bus_unregister(mci->bus);
  797. kfree(name);
  798. return err;
  799. }
  800. /*
  801. * remove a Memory Controller instance
  802. */
  803. void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
  804. {
  805. int i;
  806. edac_dbg(0, "\n");
  807. #ifdef CONFIG_EDAC_DEBUG
  808. edac_debugfs_remove_recursive(mci->debugfs);
  809. #endif
  810. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  811. edac_delete_csrow_objects(mci);
  812. #endif
  813. for (i = 0; i < mci->tot_dimms; i++) {
  814. struct dimm_info *dimm = mci->dimms[i];
  815. if (dimm->nr_pages == 0)
  816. continue;
  817. edac_dbg(0, "removing device %s\n", dev_name(&dimm->dev));
  818. device_unregister(&dimm->dev);
  819. }
  820. }
  821. void edac_unregister_sysfs(struct mem_ctl_info *mci)
  822. {
  823. const char *name = mci->bus->name;
  824. edac_dbg(1, "Unregistering device %s\n", dev_name(&mci->dev));
  825. device_unregister(&mci->dev);
  826. bus_unregister(mci->bus);
  827. kfree(name);
  828. }
  829. static void mc_attr_release(struct device *dev)
  830. {
  831. /*
  832. * There's no container structure here, as this is just the mci
  833. * parent device, used to create the /sys/devices/mc sysfs node.
  834. * So, there are no attributes on it.
  835. */
  836. edac_dbg(1, "Releasing device %s\n", dev_name(dev));
  837. kfree(dev);
  838. }
  839. static struct device_type mc_attr_type = {
  840. .release = mc_attr_release,
  841. };
  842. /*
  843. * Init/exit code for the module. Basically, creates/removes /sys/class/rc
  844. */
  845. int __init edac_mc_sysfs_init(void)
  846. {
  847. int err;
  848. mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL);
  849. if (!mci_pdev) {
  850. err = -ENOMEM;
  851. goto out;
  852. }
  853. mci_pdev->bus = edac_get_sysfs_subsys();
  854. mci_pdev->type = &mc_attr_type;
  855. device_initialize(mci_pdev);
  856. dev_set_name(mci_pdev, "mc");
  857. err = device_add(mci_pdev);
  858. if (err < 0)
  859. goto out_dev_free;
  860. edac_dbg(0, "device %s created\n", dev_name(mci_pdev));
  861. return 0;
  862. out_dev_free:
  863. kfree(mci_pdev);
  864. out:
  865. return err;
  866. }
  867. void edac_mc_sysfs_exit(void)
  868. {
  869. device_unregister(mci_pdev);
  870. }