tpm_tis.c 28 KB

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  1. /*
  2. * Copyright (C) 2005, 2006 IBM Corporation
  3. * Copyright (C) 2014, 2015 Intel Corporation
  4. *
  5. * Authors:
  6. * Leendert van Doorn <leendert@watson.ibm.com>
  7. * Kylene Hall <kjhall@us.ibm.com>
  8. *
  9. * Maintained by: <tpmdd-devel@lists.sourceforge.net>
  10. *
  11. * Device driver for TCG/TCPA TPM (trusted platform module).
  12. * Specifications at www.trustedcomputinggroup.org
  13. *
  14. * This device driver implements the TPM interface as defined in
  15. * the TCG TPM Interface Spec version 1.2, revision 1.0.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation, version 2 of the
  20. * License.
  21. */
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/pnp.h>
  26. #include <linux/slab.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/wait.h>
  29. #include <linux/acpi.h>
  30. #include <linux/freezer.h>
  31. #include "tpm.h"
  32. enum tis_access {
  33. TPM_ACCESS_VALID = 0x80,
  34. TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
  35. TPM_ACCESS_REQUEST_PENDING = 0x04,
  36. TPM_ACCESS_REQUEST_USE = 0x02,
  37. };
  38. enum tis_status {
  39. TPM_STS_VALID = 0x80,
  40. TPM_STS_COMMAND_READY = 0x40,
  41. TPM_STS_GO = 0x20,
  42. TPM_STS_DATA_AVAIL = 0x10,
  43. TPM_STS_DATA_EXPECT = 0x08,
  44. };
  45. enum tis_int_flags {
  46. TPM_GLOBAL_INT_ENABLE = 0x80000000,
  47. TPM_INTF_BURST_COUNT_STATIC = 0x100,
  48. TPM_INTF_CMD_READY_INT = 0x080,
  49. TPM_INTF_INT_EDGE_FALLING = 0x040,
  50. TPM_INTF_INT_EDGE_RISING = 0x020,
  51. TPM_INTF_INT_LEVEL_LOW = 0x010,
  52. TPM_INTF_INT_LEVEL_HIGH = 0x008,
  53. TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
  54. TPM_INTF_STS_VALID_INT = 0x002,
  55. TPM_INTF_DATA_AVAIL_INT = 0x001,
  56. };
  57. enum tis_defaults {
  58. TIS_MEM_LEN = 0x5000,
  59. TIS_SHORT_TIMEOUT = 750, /* ms */
  60. TIS_LONG_TIMEOUT = 2000, /* 2 sec */
  61. };
  62. struct tpm_info {
  63. struct resource res;
  64. /* irq > 0 means: use irq $irq;
  65. * irq = 0 means: autoprobe for an irq;
  66. * irq = -1 means: no irq support
  67. */
  68. int irq;
  69. };
  70. /* Some timeout values are needed before it is known whether the chip is
  71. * TPM 1.0 or TPM 2.0.
  72. */
  73. #define TIS_TIMEOUT_A_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_A)
  74. #define TIS_TIMEOUT_B_MAX max(TIS_LONG_TIMEOUT, TPM2_TIMEOUT_B)
  75. #define TIS_TIMEOUT_C_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_C)
  76. #define TIS_TIMEOUT_D_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_D)
  77. #define TPM_ACCESS(l) (0x0000 | ((l) << 12))
  78. #define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
  79. #define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
  80. #define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
  81. #define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
  82. #define TPM_STS(l) (0x0018 | ((l) << 12))
  83. #define TPM_STS3(l) (0x001b | ((l) << 12))
  84. #define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
  85. #define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
  86. #define TPM_RID(l) (0x0F04 | ((l) << 12))
  87. struct priv_data {
  88. bool irq_tested;
  89. };
  90. #if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
  91. static int has_hid(struct acpi_device *dev, const char *hid)
  92. {
  93. struct acpi_hardware_id *id;
  94. list_for_each_entry(id, &dev->pnp.ids, list)
  95. if (!strcmp(hid, id->id))
  96. return 1;
  97. return 0;
  98. }
  99. static inline int is_itpm(struct acpi_device *dev)
  100. {
  101. return has_hid(dev, "INTC0102");
  102. }
  103. #else
  104. static inline int is_itpm(struct acpi_device *dev)
  105. {
  106. return 0;
  107. }
  108. #endif
  109. /* Before we attempt to access the TPM we must see that the valid bit is set.
  110. * The specification says that this bit is 0 at reset and remains 0 until the
  111. * 'TPM has gone through its self test and initialization and has established
  112. * correct values in the other bits.' */
  113. static int wait_startup(struct tpm_chip *chip, int l)
  114. {
  115. unsigned long stop = jiffies + chip->vendor.timeout_a;
  116. do {
  117. if (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
  118. TPM_ACCESS_VALID)
  119. return 0;
  120. msleep(TPM_TIMEOUT);
  121. } while (time_before(jiffies, stop));
  122. return -1;
  123. }
  124. static int check_locality(struct tpm_chip *chip, int l)
  125. {
  126. if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
  127. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
  128. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
  129. return chip->vendor.locality = l;
  130. return -1;
  131. }
  132. static void release_locality(struct tpm_chip *chip, int l, int force)
  133. {
  134. if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
  135. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
  136. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
  137. iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
  138. chip->vendor.iobase + TPM_ACCESS(l));
  139. }
  140. static int request_locality(struct tpm_chip *chip, int l)
  141. {
  142. unsigned long stop, timeout;
  143. long rc;
  144. if (check_locality(chip, l) >= 0)
  145. return l;
  146. iowrite8(TPM_ACCESS_REQUEST_USE,
  147. chip->vendor.iobase + TPM_ACCESS(l));
  148. stop = jiffies + chip->vendor.timeout_a;
  149. if (chip->vendor.irq) {
  150. again:
  151. timeout = stop - jiffies;
  152. if ((long)timeout <= 0)
  153. return -1;
  154. rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
  155. (check_locality
  156. (chip, l) >= 0),
  157. timeout);
  158. if (rc > 0)
  159. return l;
  160. if (rc == -ERESTARTSYS && freezing(current)) {
  161. clear_thread_flag(TIF_SIGPENDING);
  162. goto again;
  163. }
  164. } else {
  165. /* wait for burstcount */
  166. do {
  167. if (check_locality(chip, l) >= 0)
  168. return l;
  169. msleep(TPM_TIMEOUT);
  170. }
  171. while (time_before(jiffies, stop));
  172. }
  173. return -1;
  174. }
  175. static u8 tpm_tis_status(struct tpm_chip *chip)
  176. {
  177. return ioread8(chip->vendor.iobase +
  178. TPM_STS(chip->vendor.locality));
  179. }
  180. static void tpm_tis_ready(struct tpm_chip *chip)
  181. {
  182. /* this causes the current command to be aborted */
  183. iowrite8(TPM_STS_COMMAND_READY,
  184. chip->vendor.iobase + TPM_STS(chip->vendor.locality));
  185. }
  186. static int get_burstcount(struct tpm_chip *chip)
  187. {
  188. unsigned long stop;
  189. int burstcnt;
  190. /* wait for burstcount */
  191. /* which timeout value, spec has 2 answers (c & d) */
  192. stop = jiffies + chip->vendor.timeout_d;
  193. do {
  194. burstcnt = ioread8(chip->vendor.iobase +
  195. TPM_STS(chip->vendor.locality) + 1);
  196. burstcnt += ioread8(chip->vendor.iobase +
  197. TPM_STS(chip->vendor.locality) +
  198. 2) << 8;
  199. if (burstcnt)
  200. return burstcnt;
  201. msleep(TPM_TIMEOUT);
  202. } while (time_before(jiffies, stop));
  203. return -EBUSY;
  204. }
  205. static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
  206. {
  207. int size = 0, burstcnt;
  208. while (size < count &&
  209. wait_for_tpm_stat(chip,
  210. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  211. chip->vendor.timeout_c,
  212. &chip->vendor.read_queue, true)
  213. == 0) {
  214. burstcnt = get_burstcount(chip);
  215. for (; burstcnt > 0 && size < count; burstcnt--)
  216. buf[size++] = ioread8(chip->vendor.iobase +
  217. TPM_DATA_FIFO(chip->vendor.
  218. locality));
  219. }
  220. return size;
  221. }
  222. static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  223. {
  224. int size = 0;
  225. int expected, status;
  226. if (count < TPM_HEADER_SIZE) {
  227. size = -EIO;
  228. goto out;
  229. }
  230. /* read first 10 bytes, including tag, paramsize, and result */
  231. if ((size =
  232. recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
  233. dev_err(chip->pdev, "Unable to read header\n");
  234. goto out;
  235. }
  236. expected = be32_to_cpu(*(__be32 *) (buf + 2));
  237. if (expected > count) {
  238. size = -EIO;
  239. goto out;
  240. }
  241. if ((size +=
  242. recv_data(chip, &buf[TPM_HEADER_SIZE],
  243. expected - TPM_HEADER_SIZE)) < expected) {
  244. dev_err(chip->pdev, "Unable to read remainder of result\n");
  245. size = -ETIME;
  246. goto out;
  247. }
  248. wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
  249. &chip->vendor.int_queue, false);
  250. status = tpm_tis_status(chip);
  251. if (status & TPM_STS_DATA_AVAIL) { /* retry? */
  252. dev_err(chip->pdev, "Error left over data\n");
  253. size = -EIO;
  254. goto out;
  255. }
  256. out:
  257. tpm_tis_ready(chip);
  258. release_locality(chip, chip->vendor.locality, 0);
  259. return size;
  260. }
  261. static bool itpm;
  262. module_param(itpm, bool, 0444);
  263. MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
  264. /*
  265. * If interrupts are used (signaled by an irq set in the vendor structure)
  266. * tpm.c can skip polling for the data to be available as the interrupt is
  267. * waited for here
  268. */
  269. static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
  270. {
  271. int rc, status, burstcnt;
  272. size_t count = 0;
  273. if (request_locality(chip, 0) < 0)
  274. return -EBUSY;
  275. status = tpm_tis_status(chip);
  276. if ((status & TPM_STS_COMMAND_READY) == 0) {
  277. tpm_tis_ready(chip);
  278. if (wait_for_tpm_stat
  279. (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b,
  280. &chip->vendor.int_queue, false) < 0) {
  281. rc = -ETIME;
  282. goto out_err;
  283. }
  284. }
  285. while (count < len - 1) {
  286. burstcnt = get_burstcount(chip);
  287. for (; burstcnt > 0 && count < len - 1; burstcnt--) {
  288. iowrite8(buf[count], chip->vendor.iobase +
  289. TPM_DATA_FIFO(chip->vendor.locality));
  290. count++;
  291. }
  292. wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
  293. &chip->vendor.int_queue, false);
  294. status = tpm_tis_status(chip);
  295. if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
  296. rc = -EIO;
  297. goto out_err;
  298. }
  299. }
  300. /* write last byte */
  301. iowrite8(buf[count],
  302. chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality));
  303. wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
  304. &chip->vendor.int_queue, false);
  305. status = tpm_tis_status(chip);
  306. if ((status & TPM_STS_DATA_EXPECT) != 0) {
  307. rc = -EIO;
  308. goto out_err;
  309. }
  310. return 0;
  311. out_err:
  312. tpm_tis_ready(chip);
  313. release_locality(chip, chip->vendor.locality, 0);
  314. return rc;
  315. }
  316. static void disable_interrupts(struct tpm_chip *chip)
  317. {
  318. u32 intmask;
  319. intmask =
  320. ioread32(chip->vendor.iobase +
  321. TPM_INT_ENABLE(chip->vendor.locality));
  322. intmask &= ~TPM_GLOBAL_INT_ENABLE;
  323. iowrite32(intmask,
  324. chip->vendor.iobase +
  325. TPM_INT_ENABLE(chip->vendor.locality));
  326. devm_free_irq(chip->pdev, chip->vendor.irq, chip);
  327. chip->vendor.irq = 0;
  328. }
  329. /*
  330. * If interrupts are used (signaled by an irq set in the vendor structure)
  331. * tpm.c can skip polling for the data to be available as the interrupt is
  332. * waited for here
  333. */
  334. static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
  335. {
  336. int rc;
  337. u32 ordinal;
  338. unsigned long dur;
  339. rc = tpm_tis_send_data(chip, buf, len);
  340. if (rc < 0)
  341. return rc;
  342. /* go and do it */
  343. iowrite8(TPM_STS_GO,
  344. chip->vendor.iobase + TPM_STS(chip->vendor.locality));
  345. if (chip->vendor.irq) {
  346. ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
  347. if (chip->flags & TPM_CHIP_FLAG_TPM2)
  348. dur = tpm2_calc_ordinal_duration(chip, ordinal);
  349. else
  350. dur = tpm_calc_ordinal_duration(chip, ordinal);
  351. if (wait_for_tpm_stat
  352. (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
  353. &chip->vendor.read_queue, false) < 0) {
  354. rc = -ETIME;
  355. goto out_err;
  356. }
  357. }
  358. return len;
  359. out_err:
  360. tpm_tis_ready(chip);
  361. release_locality(chip, chip->vendor.locality, 0);
  362. return rc;
  363. }
  364. static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
  365. {
  366. int rc, irq;
  367. struct priv_data *priv = chip->vendor.priv;
  368. if (!chip->vendor.irq || priv->irq_tested)
  369. return tpm_tis_send_main(chip, buf, len);
  370. /* Verify receipt of the expected IRQ */
  371. irq = chip->vendor.irq;
  372. chip->vendor.irq = 0;
  373. rc = tpm_tis_send_main(chip, buf, len);
  374. chip->vendor.irq = irq;
  375. if (!priv->irq_tested)
  376. msleep(1);
  377. if (!priv->irq_tested)
  378. disable_interrupts(chip);
  379. priv->irq_tested = true;
  380. return rc;
  381. }
  382. struct tis_vendor_timeout_override {
  383. u32 did_vid;
  384. unsigned long timeout_us[4];
  385. };
  386. static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
  387. /* Atmel 3204 */
  388. { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
  389. (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
  390. };
  391. static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
  392. unsigned long *timeout_cap)
  393. {
  394. int i;
  395. u32 did_vid;
  396. did_vid = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
  397. for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
  398. if (vendor_timeout_overrides[i].did_vid != did_vid)
  399. continue;
  400. memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
  401. sizeof(vendor_timeout_overrides[i].timeout_us));
  402. return true;
  403. }
  404. return false;
  405. }
  406. /*
  407. * Early probing for iTPM with STS_DATA_EXPECT flaw.
  408. * Try sending command without itpm flag set and if that
  409. * fails, repeat with itpm flag set.
  410. */
  411. static int probe_itpm(struct tpm_chip *chip)
  412. {
  413. int rc = 0;
  414. u8 cmd_getticks[] = {
  415. 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
  416. 0x00, 0x00, 0x00, 0xf1
  417. };
  418. size_t len = sizeof(cmd_getticks);
  419. bool rem_itpm = itpm;
  420. u16 vendor = ioread16(chip->vendor.iobase + TPM_DID_VID(0));
  421. /* probe only iTPMS */
  422. if (vendor != TPM_VID_INTEL)
  423. return 0;
  424. itpm = false;
  425. rc = tpm_tis_send_data(chip, cmd_getticks, len);
  426. if (rc == 0)
  427. goto out;
  428. tpm_tis_ready(chip);
  429. release_locality(chip, chip->vendor.locality, 0);
  430. itpm = true;
  431. rc = tpm_tis_send_data(chip, cmd_getticks, len);
  432. if (rc == 0) {
  433. dev_info(chip->pdev, "Detected an iTPM.\n");
  434. rc = 1;
  435. } else
  436. rc = -EFAULT;
  437. out:
  438. itpm = rem_itpm;
  439. tpm_tis_ready(chip);
  440. release_locality(chip, chip->vendor.locality, 0);
  441. return rc;
  442. }
  443. static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
  444. {
  445. switch (chip->vendor.manufacturer_id) {
  446. case TPM_VID_WINBOND:
  447. return ((status == TPM_STS_VALID) ||
  448. (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
  449. case TPM_VID_STM:
  450. return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
  451. default:
  452. return (status == TPM_STS_COMMAND_READY);
  453. }
  454. }
  455. static const struct tpm_class_ops tpm_tis = {
  456. .status = tpm_tis_status,
  457. .recv = tpm_tis_recv,
  458. .send = tpm_tis_send,
  459. .cancel = tpm_tis_ready,
  460. .update_timeouts = tpm_tis_update_timeouts,
  461. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  462. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  463. .req_canceled = tpm_tis_req_canceled,
  464. };
  465. static irqreturn_t tis_int_handler(int dummy, void *dev_id)
  466. {
  467. struct tpm_chip *chip = dev_id;
  468. u32 interrupt;
  469. int i;
  470. interrupt = ioread32(chip->vendor.iobase +
  471. TPM_INT_STATUS(chip->vendor.locality));
  472. if (interrupt == 0)
  473. return IRQ_NONE;
  474. ((struct priv_data *)chip->vendor.priv)->irq_tested = true;
  475. if (interrupt & TPM_INTF_DATA_AVAIL_INT)
  476. wake_up_interruptible(&chip->vendor.read_queue);
  477. if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
  478. for (i = 0; i < 5; i++)
  479. if (check_locality(chip, i) >= 0)
  480. break;
  481. if (interrupt &
  482. (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
  483. TPM_INTF_CMD_READY_INT))
  484. wake_up_interruptible(&chip->vendor.int_queue);
  485. /* Clear interrupts handled with TPM_EOI */
  486. iowrite32(interrupt,
  487. chip->vendor.iobase +
  488. TPM_INT_STATUS(chip->vendor.locality));
  489. ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
  490. return IRQ_HANDLED;
  491. }
  492. /* Register the IRQ and issue a command that will cause an interrupt. If an
  493. * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
  494. * everything and leave in polling mode. Returns 0 on success.
  495. */
  496. static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
  497. int flags, int irq)
  498. {
  499. struct priv_data *priv = chip->vendor.priv;
  500. u8 original_int_vec;
  501. if (devm_request_irq(chip->pdev, irq, tis_int_handler, flags,
  502. chip->devname, chip) != 0) {
  503. dev_info(chip->pdev, "Unable to request irq: %d for probe\n",
  504. irq);
  505. return -1;
  506. }
  507. chip->vendor.irq = irq;
  508. original_int_vec = ioread8(chip->vendor.iobase +
  509. TPM_INT_VECTOR(chip->vendor.locality));
  510. iowrite8(irq,
  511. chip->vendor.iobase + TPM_INT_VECTOR(chip->vendor.locality));
  512. /* Clear all existing */
  513. iowrite32(ioread32(chip->vendor.iobase +
  514. TPM_INT_STATUS(chip->vendor.locality)),
  515. chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
  516. /* Turn on */
  517. iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
  518. chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
  519. priv->irq_tested = false;
  520. /* Generate an interrupt by having the core call through to
  521. * tpm_tis_send
  522. */
  523. if (chip->flags & TPM_CHIP_FLAG_TPM2)
  524. tpm2_gen_interrupt(chip);
  525. else
  526. tpm_gen_interrupt(chip);
  527. /* tpm_tis_send will either confirm the interrupt is working or it
  528. * will call disable_irq which undoes all of the above.
  529. */
  530. if (!chip->vendor.irq) {
  531. iowrite8(original_int_vec,
  532. chip->vendor.iobase +
  533. TPM_INT_VECTOR(chip->vendor.locality));
  534. return 1;
  535. }
  536. return 0;
  537. }
  538. /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
  539. * do not have ACPI/etc. We typically expect the interrupt to be declared if
  540. * present.
  541. */
  542. static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
  543. {
  544. u8 original_int_vec;
  545. int i;
  546. original_int_vec = ioread8(chip->vendor.iobase +
  547. TPM_INT_VECTOR(chip->vendor.locality));
  548. if (!original_int_vec) {
  549. if (IS_ENABLED(CONFIG_X86))
  550. for (i = 3; i <= 15; i++)
  551. if (!tpm_tis_probe_irq_single(chip, intmask, 0,
  552. i))
  553. return;
  554. } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
  555. original_int_vec))
  556. return;
  557. }
  558. static bool interrupts = true;
  559. module_param(interrupts, bool, 0444);
  560. MODULE_PARM_DESC(interrupts, "Enable interrupts");
  561. static void tpm_tis_remove(struct tpm_chip *chip)
  562. {
  563. if (chip->flags & TPM_CHIP_FLAG_TPM2)
  564. tpm2_shutdown(chip, TPM2_SU_CLEAR);
  565. iowrite32(~TPM_GLOBAL_INT_ENABLE &
  566. ioread32(chip->vendor.iobase +
  567. TPM_INT_ENABLE(chip->vendor.
  568. locality)),
  569. chip->vendor.iobase +
  570. TPM_INT_ENABLE(chip->vendor.locality));
  571. release_locality(chip, chip->vendor.locality, 1);
  572. }
  573. static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
  574. acpi_handle acpi_dev_handle)
  575. {
  576. u32 vendor, intfcaps, intmask;
  577. int rc, probe;
  578. struct tpm_chip *chip;
  579. struct priv_data *priv;
  580. priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
  581. if (priv == NULL)
  582. return -ENOMEM;
  583. chip = tpmm_chip_alloc(dev, &tpm_tis);
  584. if (IS_ERR(chip))
  585. return PTR_ERR(chip);
  586. chip->vendor.priv = priv;
  587. #ifdef CONFIG_ACPI
  588. chip->acpi_dev_handle = acpi_dev_handle;
  589. #endif
  590. chip->vendor.iobase = devm_ioremap_resource(dev, &tpm_info->res);
  591. if (IS_ERR(chip->vendor.iobase))
  592. return PTR_ERR(chip->vendor.iobase);
  593. /* Maximum timeouts */
  594. chip->vendor.timeout_a = TIS_TIMEOUT_A_MAX;
  595. chip->vendor.timeout_b = TIS_TIMEOUT_B_MAX;
  596. chip->vendor.timeout_c = TIS_TIMEOUT_C_MAX;
  597. chip->vendor.timeout_d = TIS_TIMEOUT_D_MAX;
  598. if (wait_startup(chip, 0) != 0) {
  599. rc = -ENODEV;
  600. goto out_err;
  601. }
  602. /* Take control of the TPM's interrupt hardware and shut it off */
  603. intmask = ioread32(chip->vendor.iobase +
  604. TPM_INT_ENABLE(chip->vendor.locality));
  605. intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
  606. TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
  607. intmask &= ~TPM_GLOBAL_INT_ENABLE;
  608. iowrite32(intmask,
  609. chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
  610. if (request_locality(chip, 0) != 0) {
  611. rc = -ENODEV;
  612. goto out_err;
  613. }
  614. rc = tpm2_probe(chip);
  615. if (rc)
  616. goto out_err;
  617. vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
  618. chip->vendor.manufacturer_id = vendor;
  619. dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
  620. (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
  621. vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
  622. if (!itpm) {
  623. probe = probe_itpm(chip);
  624. if (probe < 0) {
  625. rc = -ENODEV;
  626. goto out_err;
  627. }
  628. itpm = !!probe;
  629. }
  630. if (itpm)
  631. dev_info(dev, "Intel iTPM workaround enabled\n");
  632. /* Figure out the capabilities */
  633. intfcaps =
  634. ioread32(chip->vendor.iobase +
  635. TPM_INTF_CAPS(chip->vendor.locality));
  636. dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
  637. intfcaps);
  638. if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
  639. dev_dbg(dev, "\tBurst Count Static\n");
  640. if (intfcaps & TPM_INTF_CMD_READY_INT)
  641. dev_dbg(dev, "\tCommand Ready Int Support\n");
  642. if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
  643. dev_dbg(dev, "\tInterrupt Edge Falling\n");
  644. if (intfcaps & TPM_INTF_INT_EDGE_RISING)
  645. dev_dbg(dev, "\tInterrupt Edge Rising\n");
  646. if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
  647. dev_dbg(dev, "\tInterrupt Level Low\n");
  648. if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
  649. dev_dbg(dev, "\tInterrupt Level High\n");
  650. if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
  651. dev_dbg(dev, "\tLocality Change Int Support\n");
  652. if (intfcaps & TPM_INTF_STS_VALID_INT)
  653. dev_dbg(dev, "\tSts Valid Int Support\n");
  654. if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
  655. dev_dbg(dev, "\tData Avail Int Support\n");
  656. /* Very early on issue a command to the TPM in polling mode to make
  657. * sure it works. May as well use that command to set the proper
  658. * timeouts for the driver.
  659. */
  660. if (tpm_get_timeouts(chip)) {
  661. dev_err(dev, "Could not get TPM timeouts and durations\n");
  662. rc = -ENODEV;
  663. goto out_err;
  664. }
  665. /* INTERRUPT Setup */
  666. init_waitqueue_head(&chip->vendor.read_queue);
  667. init_waitqueue_head(&chip->vendor.int_queue);
  668. if (interrupts && tpm_info->irq != -1) {
  669. if (tpm_info->irq) {
  670. tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
  671. tpm_info->irq);
  672. if (!chip->vendor.irq)
  673. dev_err(chip->pdev, FW_BUG
  674. "TPM interrupt not working, polling instead\n");
  675. } else
  676. tpm_tis_probe_irq(chip, intmask);
  677. }
  678. if (chip->flags & TPM_CHIP_FLAG_TPM2) {
  679. rc = tpm2_do_selftest(chip);
  680. if (rc == TPM2_RC_INITIALIZE) {
  681. dev_warn(dev, "Firmware has not started TPM\n");
  682. rc = tpm2_startup(chip, TPM2_SU_CLEAR);
  683. if (!rc)
  684. rc = tpm2_do_selftest(chip);
  685. }
  686. if (rc) {
  687. dev_err(dev, "TPM self test failed\n");
  688. if (rc > 0)
  689. rc = -ENODEV;
  690. goto out_err;
  691. }
  692. } else {
  693. if (tpm_do_selftest(chip)) {
  694. dev_err(dev, "TPM self test failed\n");
  695. rc = -ENODEV;
  696. goto out_err;
  697. }
  698. }
  699. return tpm_chip_register(chip);
  700. out_err:
  701. tpm_tis_remove(chip);
  702. return rc;
  703. }
  704. #ifdef CONFIG_PM_SLEEP
  705. static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
  706. {
  707. u32 intmask;
  708. /* reenable interrupts that device may have lost or
  709. BIOS/firmware may have disabled */
  710. iowrite8(chip->vendor.irq, chip->vendor.iobase +
  711. TPM_INT_VECTOR(chip->vendor.locality));
  712. intmask =
  713. ioread32(chip->vendor.iobase +
  714. TPM_INT_ENABLE(chip->vendor.locality));
  715. intmask |= TPM_INTF_CMD_READY_INT
  716. | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
  717. | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
  718. iowrite32(intmask,
  719. chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
  720. }
  721. static int tpm_tis_resume(struct device *dev)
  722. {
  723. struct tpm_chip *chip = dev_get_drvdata(dev);
  724. int ret;
  725. if (chip->vendor.irq)
  726. tpm_tis_reenable_interrupts(chip);
  727. ret = tpm_pm_resume(dev);
  728. if (ret)
  729. return ret;
  730. /* TPM 1.2 requires self-test on resume. This function actually returns
  731. * an error code but for unknown reason it isn't handled.
  732. */
  733. if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
  734. tpm_do_selftest(chip);
  735. return 0;
  736. }
  737. #endif
  738. static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume);
  739. static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
  740. const struct pnp_device_id *pnp_id)
  741. {
  742. struct tpm_info tpm_info = {};
  743. acpi_handle acpi_dev_handle = NULL;
  744. struct resource *res;
  745. res = pnp_get_resource(pnp_dev, IORESOURCE_MEM, 0);
  746. if (!res)
  747. return -ENODEV;
  748. tpm_info.res = *res;
  749. if (pnp_irq_valid(pnp_dev, 0))
  750. tpm_info.irq = pnp_irq(pnp_dev, 0);
  751. else
  752. tpm_info.irq = -1;
  753. if (pnp_acpi_device(pnp_dev)) {
  754. if (is_itpm(pnp_acpi_device(pnp_dev)))
  755. itpm = true;
  756. acpi_dev_handle = ACPI_HANDLE(&pnp_dev->dev);
  757. }
  758. return tpm_tis_init(&pnp_dev->dev, &tpm_info, acpi_dev_handle);
  759. }
  760. static struct pnp_device_id tpm_pnp_tbl[] = {
  761. {"PNP0C31", 0}, /* TPM */
  762. {"ATM1200", 0}, /* Atmel */
  763. {"IFX0102", 0}, /* Infineon */
  764. {"BCM0101", 0}, /* Broadcom */
  765. {"BCM0102", 0}, /* Broadcom */
  766. {"NSC1200", 0}, /* National */
  767. {"ICO0102", 0}, /* Intel */
  768. /* Add new here */
  769. {"", 0}, /* User Specified */
  770. {"", 0} /* Terminator */
  771. };
  772. MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
  773. static void tpm_tis_pnp_remove(struct pnp_dev *dev)
  774. {
  775. struct tpm_chip *chip = pnp_get_drvdata(dev);
  776. tpm_chip_unregister(chip);
  777. tpm_tis_remove(chip);
  778. }
  779. static struct pnp_driver tis_pnp_driver = {
  780. .name = "tpm_tis",
  781. .id_table = tpm_pnp_tbl,
  782. .probe = tpm_tis_pnp_init,
  783. .remove = tpm_tis_pnp_remove,
  784. .driver = {
  785. .pm = &tpm_tis_pm,
  786. },
  787. };
  788. #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2
  789. module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id,
  790. sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444);
  791. MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe");
  792. #ifdef CONFIG_ACPI
  793. static int tpm_check_resource(struct acpi_resource *ares, void *data)
  794. {
  795. struct tpm_info *tpm_info = (struct tpm_info *) data;
  796. struct resource res;
  797. if (acpi_dev_resource_interrupt(ares, 0, &res))
  798. tpm_info->irq = res.start;
  799. else if (acpi_dev_resource_memory(ares, &res)) {
  800. tpm_info->res = res;
  801. tpm_info->res.name = NULL;
  802. }
  803. return 1;
  804. }
  805. static int tpm_tis_acpi_init(struct acpi_device *acpi_dev)
  806. {
  807. struct acpi_table_tpm2 *tbl;
  808. acpi_status st;
  809. struct list_head resources;
  810. struct tpm_info tpm_info = {};
  811. int ret;
  812. st = acpi_get_table(ACPI_SIG_TPM2, 1,
  813. (struct acpi_table_header **) &tbl);
  814. if (ACPI_FAILURE(st) || tbl->header.length < sizeof(*tbl)) {
  815. dev_err(&acpi_dev->dev,
  816. FW_BUG "failed to get TPM2 ACPI table\n");
  817. return -EINVAL;
  818. }
  819. if (tbl->start_method != ACPI_TPM2_MEMORY_MAPPED)
  820. return -ENODEV;
  821. INIT_LIST_HEAD(&resources);
  822. tpm_info.irq = -1;
  823. ret = acpi_dev_get_resources(acpi_dev, &resources, tpm_check_resource,
  824. &tpm_info);
  825. if (ret < 0)
  826. return ret;
  827. acpi_dev_free_resource_list(&resources);
  828. if (resource_type(&tpm_info.res) != IORESOURCE_MEM) {
  829. dev_err(&acpi_dev->dev,
  830. FW_BUG "TPM2 ACPI table does not define a memory resource\n");
  831. return -EINVAL;
  832. }
  833. if (is_itpm(acpi_dev))
  834. itpm = true;
  835. return tpm_tis_init(&acpi_dev->dev, &tpm_info, acpi_dev->handle);
  836. }
  837. static int tpm_tis_acpi_remove(struct acpi_device *dev)
  838. {
  839. struct tpm_chip *chip = dev_get_drvdata(&dev->dev);
  840. tpm_chip_unregister(chip);
  841. tpm_tis_remove(chip);
  842. return 0;
  843. }
  844. static struct acpi_device_id tpm_acpi_tbl[] = {
  845. {"MSFT0101", 0}, /* TPM 2.0 */
  846. /* Add new here */
  847. {"", 0}, /* User Specified */
  848. {"", 0} /* Terminator */
  849. };
  850. MODULE_DEVICE_TABLE(acpi, tpm_acpi_tbl);
  851. static struct acpi_driver tis_acpi_driver = {
  852. .name = "tpm_tis",
  853. .ids = tpm_acpi_tbl,
  854. .ops = {
  855. .add = tpm_tis_acpi_init,
  856. .remove = tpm_tis_acpi_remove,
  857. },
  858. .drv = {
  859. .pm = &tpm_tis_pm,
  860. },
  861. };
  862. #endif
  863. static struct platform_device *force_pdev;
  864. static int tpm_tis_plat_probe(struct platform_device *pdev)
  865. {
  866. struct tpm_info tpm_info = {};
  867. struct resource *res;
  868. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  869. if (res == NULL) {
  870. dev_err(&pdev->dev, "no memory resource defined\n");
  871. return -ENODEV;
  872. }
  873. tpm_info.res = *res;
  874. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  875. if (res) {
  876. tpm_info.irq = res->start;
  877. } else {
  878. if (pdev == force_pdev)
  879. tpm_info.irq = -1;
  880. else
  881. /* When forcing auto probe the IRQ */
  882. tpm_info.irq = 0;
  883. }
  884. return tpm_tis_init(&pdev->dev, &tpm_info, NULL);
  885. }
  886. static int tpm_tis_plat_remove(struct platform_device *pdev)
  887. {
  888. struct tpm_chip *chip = dev_get_drvdata(&pdev->dev);
  889. tpm_chip_unregister(chip);
  890. tpm_tis_remove(chip);
  891. return 0;
  892. }
  893. static struct platform_driver tis_drv = {
  894. .probe = tpm_tis_plat_probe,
  895. .remove = tpm_tis_plat_remove,
  896. .driver = {
  897. .name = "tpm_tis",
  898. .pm = &tpm_tis_pm,
  899. },
  900. };
  901. static bool force;
  902. #ifdef CONFIG_X86
  903. module_param(force, bool, 0444);
  904. MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
  905. #endif
  906. static int tpm_tis_force_device(void)
  907. {
  908. struct platform_device *pdev;
  909. static const struct resource x86_resources[] = {
  910. {
  911. .start = 0xFED40000,
  912. .end = 0xFED40000 + TIS_MEM_LEN - 1,
  913. .flags = IORESOURCE_MEM,
  914. },
  915. };
  916. if (!force)
  917. return 0;
  918. /* The driver core will match the name tpm_tis of the device to
  919. * the tpm_tis platform driver and complete the setup via
  920. * tpm_tis_plat_probe
  921. */
  922. pdev = platform_device_register_simple("tpm_tis", -1, x86_resources,
  923. ARRAY_SIZE(x86_resources));
  924. if (IS_ERR(pdev))
  925. return PTR_ERR(pdev);
  926. force_pdev = pdev;
  927. return 0;
  928. }
  929. static int __init init_tis(void)
  930. {
  931. int rc;
  932. rc = tpm_tis_force_device();
  933. if (rc)
  934. goto err_force;
  935. rc = platform_driver_register(&tis_drv);
  936. if (rc)
  937. goto err_platform;
  938. #ifdef CONFIG_ACPI
  939. rc = acpi_bus_register_driver(&tis_acpi_driver);
  940. if (rc)
  941. goto err_acpi;
  942. #endif
  943. if (IS_ENABLED(CONFIG_PNP)) {
  944. rc = pnp_register_driver(&tis_pnp_driver);
  945. if (rc)
  946. goto err_pnp;
  947. }
  948. return 0;
  949. err_pnp:
  950. #ifdef CONFIG_ACPI
  951. acpi_bus_unregister_driver(&tis_acpi_driver);
  952. err_acpi:
  953. #endif
  954. platform_device_unregister(force_pdev);
  955. err_platform:
  956. if (force_pdev)
  957. platform_device_unregister(force_pdev);
  958. err_force:
  959. return rc;
  960. }
  961. static void __exit cleanup_tis(void)
  962. {
  963. pnp_unregister_driver(&tis_pnp_driver);
  964. #ifdef CONFIG_ACPI
  965. acpi_bus_unregister_driver(&tis_acpi_driver);
  966. #endif
  967. platform_driver_unregister(&tis_drv);
  968. if (force_pdev)
  969. platform_device_unregister(force_pdev);
  970. }
  971. module_init(init_tis);
  972. module_exit(cleanup_tis);
  973. MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
  974. MODULE_DESCRIPTION("TPM Driver");
  975. MODULE_VERSION("2.0");
  976. MODULE_LICENSE("GPL");