gpmc-nand.c 4.0 KB

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  1. /*
  2. * gpmc-nand.c
  3. *
  4. * Copyright (C) 2009 Texas Instruments
  5. * Vimal Singh <vimalsingh@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/io.h>
  14. #include <linux/mtd/nand.h>
  15. #include <linux/platform_data/mtd-nand-omap2.h>
  16. #include <asm/mach/flash.h>
  17. #include "gpmc.h"
  18. #include "soc.h"
  19. #include "gpmc-nand.h"
  20. /* minimum size for IO mapping */
  21. #define NAND_IO_SIZE 4
  22. static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
  23. {
  24. /* platforms which support all ECC schemes */
  25. if (soc_is_am33xx() || soc_is_am43xx() || cpu_is_omap44xx() ||
  26. soc_is_omap54xx() || soc_is_dra7xx())
  27. return 1;
  28. if (ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW ||
  29. ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW) {
  30. if (cpu_is_omap24xx())
  31. return 0;
  32. else if (cpu_is_omap3630() && (GET_OMAP_REVISION() == 0))
  33. return 0;
  34. else
  35. return 1;
  36. }
  37. /* OMAP3xxx do not have ELM engine, so cannot support ECC schemes
  38. * which require H/W based ECC error detection */
  39. if ((cpu_is_omap34xx() || cpu_is_omap3630()) &&
  40. ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
  41. (ecc_opt == OMAP_ECC_BCH8_CODE_HW)))
  42. return 0;
  43. /* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
  44. if (ecc_opt == OMAP_ECC_HAM1_CODE_HW ||
  45. ecc_opt == OMAP_ECC_HAM1_CODE_SW)
  46. return 1;
  47. else
  48. return 0;
  49. }
  50. /* This function will go away once the device-tree convertion is complete */
  51. static void gpmc_set_legacy(struct omap_nand_platform_data *gpmc_nand_data,
  52. struct gpmc_settings *s)
  53. {
  54. /* Enable RD PIN Monitoring Reg */
  55. if (gpmc_nand_data->dev_ready) {
  56. s->wait_on_read = true;
  57. s->wait_on_write = true;
  58. }
  59. if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
  60. s->device_width = GPMC_DEVWIDTH_16BIT;
  61. else
  62. s->device_width = GPMC_DEVWIDTH_8BIT;
  63. }
  64. int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
  65. struct gpmc_timings *gpmc_t)
  66. {
  67. int err = 0;
  68. struct gpmc_settings s;
  69. struct platform_device *pdev;
  70. struct resource gpmc_nand_res[] = {
  71. { .flags = IORESOURCE_MEM, },
  72. { .flags = IORESOURCE_IRQ, },
  73. { .flags = IORESOURCE_IRQ, },
  74. };
  75. BUG_ON(gpmc_nand_data->cs >= GPMC_CS_NUM);
  76. err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
  77. (unsigned long *)&gpmc_nand_res[0].start);
  78. if (err < 0) {
  79. pr_err("omap2-gpmc: Cannot request GPMC CS %d, error %d\n",
  80. gpmc_nand_data->cs, err);
  81. return err;
  82. }
  83. gpmc_nand_res[0].end = gpmc_nand_res[0].start + NAND_IO_SIZE - 1;
  84. gpmc_nand_res[1].start = gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
  85. gpmc_nand_res[2].start = gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
  86. if (gpmc_t) {
  87. err = gpmc_cs_set_timings(gpmc_nand_data->cs, gpmc_t);
  88. if (err < 0) {
  89. pr_err("omap2-gpmc: Unable to set gpmc timings: %d\n", err);
  90. return err;
  91. }
  92. }
  93. memset(&s, 0, sizeof(struct gpmc_settings));
  94. if (gpmc_nand_data->of_node)
  95. gpmc_read_settings_dt(gpmc_nand_data->of_node, &s);
  96. else
  97. gpmc_set_legacy(gpmc_nand_data, &s);
  98. s.device_nand = true;
  99. err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s);
  100. if (err < 0)
  101. goto out_free_cs;
  102. err = gpmc_configure(GPMC_CONFIG_WP, 0);
  103. if (err < 0)
  104. goto out_free_cs;
  105. gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
  106. if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) {
  107. pr_err("omap2-nand: Unsupported NAND ECC scheme selected\n");
  108. err = -EINVAL;
  109. goto out_free_cs;
  110. }
  111. pdev = platform_device_alloc("omap2-nand", gpmc_nand_data->cs);
  112. if (pdev) {
  113. err = platform_device_add_resources(pdev, gpmc_nand_res,
  114. ARRAY_SIZE(gpmc_nand_res));
  115. if (!err)
  116. pdev->dev.platform_data = gpmc_nand_data;
  117. } else {
  118. err = -ENOMEM;
  119. }
  120. if (err)
  121. goto out_free_pdev;
  122. err = platform_device_add(pdev);
  123. if (err) {
  124. dev_err(&pdev->dev, "Unable to register NAND device\n");
  125. goto out_free_pdev;
  126. }
  127. return 0;
  128. out_free_pdev:
  129. platform_device_put(pdev);
  130. out_free_cs:
  131. gpmc_cs_free(gpmc_nand_data->cs);
  132. return err;
  133. }