vfio_pci.c 37 KB

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  1. /*
  2. * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
  3. * Author: Alex Williamson <alex.williamson@redhat.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * Derived from original vfio:
  10. * Copyright 2010 Cisco Systems, Inc. All rights reserved.
  11. * Author: Tom Lyon, pugs@cisco.com
  12. */
  13. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14. #include <linux/device.h>
  15. #include <linux/eventfd.h>
  16. #include <linux/file.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/iommu.h>
  19. #include <linux/module.h>
  20. #include <linux/mutex.h>
  21. #include <linux/notifier.h>
  22. #include <linux/pci.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/slab.h>
  25. #include <linux/types.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/vfio.h>
  28. #include <linux/vgaarb.h>
  29. #include "vfio_pci_private.h"
  30. #define DRIVER_VERSION "0.2"
  31. #define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
  32. #define DRIVER_DESC "VFIO PCI - User Level meta-driver"
  33. static char ids[1024] __initdata;
  34. module_param_string(ids, ids, sizeof(ids), 0);
  35. MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the vfio driver, format is \"vendor:device[:subvendor[:subdevice[:class[:class_mask]]]]\" and multiple comma separated entries can be specified");
  36. static bool nointxmask;
  37. module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
  38. MODULE_PARM_DESC(nointxmask,
  39. "Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");
  40. #ifdef CONFIG_VFIO_PCI_VGA
  41. static bool disable_vga;
  42. module_param(disable_vga, bool, S_IRUGO);
  43. MODULE_PARM_DESC(disable_vga, "Disable VGA resource access through vfio-pci");
  44. #endif
  45. static bool disable_idle_d3;
  46. module_param(disable_idle_d3, bool, S_IRUGO | S_IWUSR);
  47. MODULE_PARM_DESC(disable_idle_d3,
  48. "Disable using the PCI D3 low power state for idle, unused devices");
  49. static DEFINE_MUTEX(driver_lock);
  50. static inline bool vfio_vga_disabled(void)
  51. {
  52. #ifdef CONFIG_VFIO_PCI_VGA
  53. return disable_vga;
  54. #else
  55. return true;
  56. #endif
  57. }
  58. /*
  59. * Our VGA arbiter participation is limited since we don't know anything
  60. * about the device itself. However, if the device is the only VGA device
  61. * downstream of a bridge and VFIO VGA support is disabled, then we can
  62. * safely return legacy VGA IO and memory as not decoded since the user
  63. * has no way to get to it and routing can be disabled externally at the
  64. * bridge.
  65. */
  66. static unsigned int vfio_pci_set_vga_decode(void *opaque, bool single_vga)
  67. {
  68. struct vfio_pci_device *vdev = opaque;
  69. struct pci_dev *tmp = NULL, *pdev = vdev->pdev;
  70. unsigned char max_busnr;
  71. unsigned int decodes;
  72. if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
  73. return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  74. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  75. max_busnr = pci_bus_max_busnr(pdev->bus);
  76. decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
  77. while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
  78. if (tmp == pdev ||
  79. pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
  80. pci_is_root_bus(tmp->bus))
  81. continue;
  82. if (tmp->bus->number >= pdev->bus->number &&
  83. tmp->bus->number <= max_busnr) {
  84. pci_dev_put(tmp);
  85. decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  86. break;
  87. }
  88. }
  89. return decodes;
  90. }
  91. static inline bool vfio_pci_is_vga(struct pci_dev *pdev)
  92. {
  93. return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA;
  94. }
  95. static void vfio_pci_probe_mmaps(struct vfio_pci_device *vdev)
  96. {
  97. struct resource *res;
  98. int bar;
  99. struct vfio_pci_dummy_resource *dummy_res;
  100. INIT_LIST_HEAD(&vdev->dummy_resources_list);
  101. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  102. res = vdev->pdev->resource + bar;
  103. if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP))
  104. goto no_mmap;
  105. if (!(res->flags & IORESOURCE_MEM))
  106. goto no_mmap;
  107. /*
  108. * The PCI core shouldn't set up a resource with a
  109. * type but zero size. But there may be bugs that
  110. * cause us to do that.
  111. */
  112. if (!resource_size(res))
  113. goto no_mmap;
  114. if (resource_size(res) >= PAGE_SIZE) {
  115. vdev->bar_mmap_supported[bar] = true;
  116. continue;
  117. }
  118. if (!(res->start & ~PAGE_MASK)) {
  119. /*
  120. * Add a dummy resource to reserve the remainder
  121. * of the exclusive page in case that hot-add
  122. * device's bar is assigned into it.
  123. */
  124. dummy_res = kzalloc(sizeof(*dummy_res), GFP_KERNEL);
  125. if (dummy_res == NULL)
  126. goto no_mmap;
  127. dummy_res->resource.name = "vfio sub-page reserved";
  128. dummy_res->resource.start = res->end + 1;
  129. dummy_res->resource.end = res->start + PAGE_SIZE - 1;
  130. dummy_res->resource.flags = res->flags;
  131. if (request_resource(res->parent,
  132. &dummy_res->resource)) {
  133. kfree(dummy_res);
  134. goto no_mmap;
  135. }
  136. dummy_res->index = bar;
  137. list_add(&dummy_res->res_next,
  138. &vdev->dummy_resources_list);
  139. vdev->bar_mmap_supported[bar] = true;
  140. continue;
  141. }
  142. /*
  143. * Here we don't handle the case when the BAR is not page
  144. * aligned because we can't expect the BAR will be
  145. * assigned into the same location in a page in guest
  146. * when we passthrough the BAR. And it's hard to access
  147. * this BAR in userspace because we have no way to get
  148. * the BAR's location in a page.
  149. */
  150. no_mmap:
  151. vdev->bar_mmap_supported[bar] = false;
  152. }
  153. }
  154. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
  155. static void vfio_pci_disable(struct vfio_pci_device *vdev);
  156. /*
  157. * INTx masking requires the ability to disable INTx signaling via PCI_COMMAND
  158. * _and_ the ability detect when the device is asserting INTx via PCI_STATUS.
  159. * If a device implements the former but not the latter we would typically
  160. * expect broken_intx_masking be set and require an exclusive interrupt.
  161. * However since we do have control of the device's ability to assert INTx,
  162. * we can instead pretend that the device does not implement INTx, virtualizing
  163. * the pin register to report zero and maintaining DisINTx set on the host.
  164. */
  165. static bool vfio_pci_nointx(struct pci_dev *pdev)
  166. {
  167. switch (pdev->vendor) {
  168. case PCI_VENDOR_ID_INTEL:
  169. switch (pdev->device) {
  170. /* All i40e (XL710/X710/XXV710) 10/20/25/40GbE NICs */
  171. case 0x1572:
  172. case 0x1574:
  173. case 0x1580 ... 0x1581:
  174. case 0x1583 ... 0x158b:
  175. case 0x37d0 ... 0x37d2:
  176. return true;
  177. default:
  178. return false;
  179. }
  180. }
  181. return false;
  182. }
  183. static int vfio_pci_enable(struct vfio_pci_device *vdev)
  184. {
  185. struct pci_dev *pdev = vdev->pdev;
  186. int ret;
  187. u16 cmd;
  188. u8 msix_pos;
  189. pci_set_power_state(pdev, PCI_D0);
  190. /* Don't allow our initial saved state to include busmaster */
  191. pci_clear_master(pdev);
  192. ret = pci_enable_device(pdev);
  193. if (ret)
  194. return ret;
  195. /* If reset fails because of the device lock, fail this path entirely */
  196. ret = pci_try_reset_function(pdev);
  197. if (ret == -EAGAIN) {
  198. pci_disable_device(pdev);
  199. return ret;
  200. }
  201. vdev->reset_works = !ret;
  202. pci_save_state(pdev);
  203. vdev->pci_saved_state = pci_store_saved_state(pdev);
  204. if (!vdev->pci_saved_state)
  205. pr_debug("%s: Couldn't store %s saved state\n",
  206. __func__, dev_name(&pdev->dev));
  207. if (likely(!nointxmask)) {
  208. if (vfio_pci_nointx(pdev)) {
  209. dev_info(&pdev->dev, "Masking broken INTx support\n");
  210. vdev->nointx = true;
  211. pci_intx(pdev, 0);
  212. } else
  213. vdev->pci_2_3 = pci_intx_mask_supported(pdev);
  214. }
  215. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  216. if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
  217. cmd &= ~PCI_COMMAND_INTX_DISABLE;
  218. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  219. }
  220. ret = vfio_config_init(vdev);
  221. if (ret) {
  222. kfree(vdev->pci_saved_state);
  223. vdev->pci_saved_state = NULL;
  224. pci_disable_device(pdev);
  225. return ret;
  226. }
  227. msix_pos = pdev->msix_cap;
  228. if (msix_pos) {
  229. u16 flags;
  230. u32 table;
  231. pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
  232. pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
  233. vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
  234. vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
  235. vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
  236. } else
  237. vdev->msix_bar = 0xFF;
  238. if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
  239. vdev->has_vga = true;
  240. if (vfio_pci_is_vga(pdev) &&
  241. pdev->vendor == PCI_VENDOR_ID_INTEL &&
  242. IS_ENABLED(CONFIG_VFIO_PCI_IGD)) {
  243. ret = vfio_pci_igd_init(vdev);
  244. if (ret) {
  245. dev_warn(&vdev->pdev->dev,
  246. "Failed to setup Intel IGD regions\n");
  247. vfio_pci_disable(vdev);
  248. return ret;
  249. }
  250. }
  251. vfio_pci_probe_mmaps(vdev);
  252. return 0;
  253. }
  254. static void vfio_pci_disable(struct vfio_pci_device *vdev)
  255. {
  256. struct pci_dev *pdev = vdev->pdev;
  257. struct vfio_pci_dummy_resource *dummy_res, *tmp;
  258. int i, bar;
  259. /* Stop the device from further DMA */
  260. pci_clear_master(pdev);
  261. vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
  262. VFIO_IRQ_SET_ACTION_TRIGGER,
  263. vdev->irq_type, 0, 0, NULL);
  264. vdev->virq_disabled = false;
  265. for (i = 0; i < vdev->num_regions; i++)
  266. vdev->region[i].ops->release(vdev, &vdev->region[i]);
  267. vdev->num_regions = 0;
  268. kfree(vdev->region);
  269. vdev->region = NULL; /* don't krealloc a freed pointer */
  270. vfio_config_free(vdev);
  271. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  272. if (!vdev->barmap[bar])
  273. continue;
  274. pci_iounmap(pdev, vdev->barmap[bar]);
  275. pci_release_selected_regions(pdev, 1 << bar);
  276. vdev->barmap[bar] = NULL;
  277. }
  278. list_for_each_entry_safe(dummy_res, tmp,
  279. &vdev->dummy_resources_list, res_next) {
  280. list_del(&dummy_res->res_next);
  281. release_resource(&dummy_res->resource);
  282. kfree(dummy_res);
  283. }
  284. vdev->needs_reset = true;
  285. /*
  286. * If we have saved state, restore it. If we can reset the device,
  287. * even better. Resetting with current state seems better than
  288. * nothing, but saving and restoring current state without reset
  289. * is just busy work.
  290. */
  291. if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
  292. pr_info("%s: Couldn't reload %s saved state\n",
  293. __func__, dev_name(&pdev->dev));
  294. if (!vdev->reset_works)
  295. goto out;
  296. pci_save_state(pdev);
  297. }
  298. /*
  299. * Disable INTx and MSI, presumably to avoid spurious interrupts
  300. * during reset. Stolen from pci_reset_function()
  301. */
  302. pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
  303. /*
  304. * Try to reset the device. The success of this is dependent on
  305. * being able to lock the device, which is not always possible.
  306. */
  307. if (vdev->reset_works && !pci_try_reset_function(pdev))
  308. vdev->needs_reset = false;
  309. pci_restore_state(pdev);
  310. out:
  311. pci_disable_device(pdev);
  312. vfio_pci_try_bus_reset(vdev);
  313. if (!disable_idle_d3)
  314. pci_set_power_state(pdev, PCI_D3hot);
  315. }
  316. static void vfio_pci_release(void *device_data)
  317. {
  318. struct vfio_pci_device *vdev = device_data;
  319. mutex_lock(&driver_lock);
  320. if (!(--vdev->refcnt)) {
  321. vfio_spapr_pci_eeh_release(vdev->pdev);
  322. vfio_pci_disable(vdev);
  323. }
  324. mutex_unlock(&driver_lock);
  325. module_put(THIS_MODULE);
  326. }
  327. static int vfio_pci_open(void *device_data)
  328. {
  329. struct vfio_pci_device *vdev = device_data;
  330. int ret = 0;
  331. if (!try_module_get(THIS_MODULE))
  332. return -ENODEV;
  333. mutex_lock(&driver_lock);
  334. if (!vdev->refcnt) {
  335. ret = vfio_pci_enable(vdev);
  336. if (ret)
  337. goto error;
  338. vfio_spapr_pci_eeh_open(vdev->pdev);
  339. }
  340. vdev->refcnt++;
  341. error:
  342. mutex_unlock(&driver_lock);
  343. if (ret)
  344. module_put(THIS_MODULE);
  345. return ret;
  346. }
  347. static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
  348. {
  349. if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
  350. u8 pin;
  351. pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
  352. if (IS_ENABLED(CONFIG_VFIO_PCI_INTX) && !vdev->nointx && pin)
  353. return 1;
  354. } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
  355. u8 pos;
  356. u16 flags;
  357. pos = vdev->pdev->msi_cap;
  358. if (pos) {
  359. pci_read_config_word(vdev->pdev,
  360. pos + PCI_MSI_FLAGS, &flags);
  361. return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
  362. }
  363. } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
  364. u8 pos;
  365. u16 flags;
  366. pos = vdev->pdev->msix_cap;
  367. if (pos) {
  368. pci_read_config_word(vdev->pdev,
  369. pos + PCI_MSIX_FLAGS, &flags);
  370. return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
  371. }
  372. } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
  373. if (pci_is_pcie(vdev->pdev))
  374. return 1;
  375. } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
  376. return 1;
  377. }
  378. return 0;
  379. }
  380. static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
  381. {
  382. (*(int *)data)++;
  383. return 0;
  384. }
  385. struct vfio_pci_fill_info {
  386. int max;
  387. int cur;
  388. struct vfio_pci_dependent_device *devices;
  389. };
  390. static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
  391. {
  392. struct vfio_pci_fill_info *fill = data;
  393. struct iommu_group *iommu_group;
  394. if (fill->cur == fill->max)
  395. return -EAGAIN; /* Something changed, try again */
  396. iommu_group = iommu_group_get(&pdev->dev);
  397. if (!iommu_group)
  398. return -EPERM; /* Cannot reset non-isolated devices */
  399. fill->devices[fill->cur].group_id = iommu_group_id(iommu_group);
  400. fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus);
  401. fill->devices[fill->cur].bus = pdev->bus->number;
  402. fill->devices[fill->cur].devfn = pdev->devfn;
  403. fill->cur++;
  404. iommu_group_put(iommu_group);
  405. return 0;
  406. }
  407. struct vfio_pci_group_entry {
  408. struct vfio_group *group;
  409. int id;
  410. };
  411. struct vfio_pci_group_info {
  412. int count;
  413. struct vfio_pci_group_entry *groups;
  414. };
  415. static int vfio_pci_validate_devs(struct pci_dev *pdev, void *data)
  416. {
  417. struct vfio_pci_group_info *info = data;
  418. struct iommu_group *group;
  419. int id, i;
  420. group = iommu_group_get(&pdev->dev);
  421. if (!group)
  422. return -EPERM;
  423. id = iommu_group_id(group);
  424. for (i = 0; i < info->count; i++)
  425. if (info->groups[i].id == id)
  426. break;
  427. iommu_group_put(group);
  428. return (i == info->count) ? -EINVAL : 0;
  429. }
  430. static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
  431. {
  432. for (; pdev; pdev = pdev->bus->self)
  433. if (pdev->bus == slot->bus)
  434. return (pdev->slot == slot);
  435. return false;
  436. }
  437. struct vfio_pci_walk_info {
  438. int (*fn)(struct pci_dev *, void *data);
  439. void *data;
  440. struct pci_dev *pdev;
  441. bool slot;
  442. int ret;
  443. };
  444. static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
  445. {
  446. struct vfio_pci_walk_info *walk = data;
  447. if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
  448. walk->ret = walk->fn(pdev, walk->data);
  449. return walk->ret;
  450. }
  451. static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
  452. int (*fn)(struct pci_dev *,
  453. void *data), void *data,
  454. bool slot)
  455. {
  456. struct vfio_pci_walk_info walk = {
  457. .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
  458. };
  459. pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
  460. return walk.ret;
  461. }
  462. static int msix_sparse_mmap_cap(struct vfio_pci_device *vdev,
  463. struct vfio_info_cap *caps)
  464. {
  465. struct vfio_region_info_cap_sparse_mmap *sparse;
  466. size_t end, size;
  467. int nr_areas = 2, i = 0, ret;
  468. end = pci_resource_len(vdev->pdev, vdev->msix_bar);
  469. /* If MSI-X table is aligned to the start or end, only one area */
  470. if (((vdev->msix_offset & PAGE_MASK) == 0) ||
  471. (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) >= end))
  472. nr_areas = 1;
  473. size = sizeof(*sparse) + (nr_areas * sizeof(*sparse->areas));
  474. sparse = kzalloc(size, GFP_KERNEL);
  475. if (!sparse)
  476. return -ENOMEM;
  477. sparse->nr_areas = nr_areas;
  478. if (vdev->msix_offset & PAGE_MASK) {
  479. sparse->areas[i].offset = 0;
  480. sparse->areas[i].size = vdev->msix_offset & PAGE_MASK;
  481. i++;
  482. }
  483. if (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) < end) {
  484. sparse->areas[i].offset = PAGE_ALIGN(vdev->msix_offset +
  485. vdev->msix_size);
  486. sparse->areas[i].size = end - sparse->areas[i].offset;
  487. i++;
  488. }
  489. ret = vfio_info_add_capability(caps, VFIO_REGION_INFO_CAP_SPARSE_MMAP,
  490. sparse);
  491. kfree(sparse);
  492. return ret;
  493. }
  494. int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
  495. unsigned int type, unsigned int subtype,
  496. const struct vfio_pci_regops *ops,
  497. size_t size, u32 flags, void *data)
  498. {
  499. struct vfio_pci_region *region;
  500. region = krealloc(vdev->region,
  501. (vdev->num_regions + 1) * sizeof(*region),
  502. GFP_KERNEL);
  503. if (!region)
  504. return -ENOMEM;
  505. vdev->region = region;
  506. vdev->region[vdev->num_regions].type = type;
  507. vdev->region[vdev->num_regions].subtype = subtype;
  508. vdev->region[vdev->num_regions].ops = ops;
  509. vdev->region[vdev->num_regions].size = size;
  510. vdev->region[vdev->num_regions].flags = flags;
  511. vdev->region[vdev->num_regions].data = data;
  512. vdev->num_regions++;
  513. return 0;
  514. }
  515. static long vfio_pci_ioctl(void *device_data,
  516. unsigned int cmd, unsigned long arg)
  517. {
  518. struct vfio_pci_device *vdev = device_data;
  519. unsigned long minsz;
  520. if (cmd == VFIO_DEVICE_GET_INFO) {
  521. struct vfio_device_info info;
  522. minsz = offsetofend(struct vfio_device_info, num_irqs);
  523. if (copy_from_user(&info, (void __user *)arg, minsz))
  524. return -EFAULT;
  525. if (info.argsz < minsz)
  526. return -EINVAL;
  527. info.flags = VFIO_DEVICE_FLAGS_PCI;
  528. if (vdev->reset_works)
  529. info.flags |= VFIO_DEVICE_FLAGS_RESET;
  530. info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
  531. info.num_irqs = VFIO_PCI_NUM_IRQS;
  532. return copy_to_user((void __user *)arg, &info, minsz) ?
  533. -EFAULT : 0;
  534. } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
  535. struct pci_dev *pdev = vdev->pdev;
  536. struct vfio_region_info info;
  537. struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
  538. int i, ret;
  539. minsz = offsetofend(struct vfio_region_info, offset);
  540. if (copy_from_user(&info, (void __user *)arg, minsz))
  541. return -EFAULT;
  542. if (info.argsz < minsz)
  543. return -EINVAL;
  544. switch (info.index) {
  545. case VFIO_PCI_CONFIG_REGION_INDEX:
  546. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  547. info.size = pdev->cfg_size;
  548. info.flags = VFIO_REGION_INFO_FLAG_READ |
  549. VFIO_REGION_INFO_FLAG_WRITE;
  550. break;
  551. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  552. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  553. info.size = pci_resource_len(pdev, info.index);
  554. if (!info.size) {
  555. info.flags = 0;
  556. break;
  557. }
  558. info.flags = VFIO_REGION_INFO_FLAG_READ |
  559. VFIO_REGION_INFO_FLAG_WRITE;
  560. if (vdev->bar_mmap_supported[info.index]) {
  561. info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
  562. if (info.index == vdev->msix_bar) {
  563. ret = msix_sparse_mmap_cap(vdev, &caps);
  564. if (ret)
  565. return ret;
  566. }
  567. }
  568. break;
  569. case VFIO_PCI_ROM_REGION_INDEX:
  570. {
  571. void __iomem *io;
  572. size_t size;
  573. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  574. info.flags = 0;
  575. /* Report the BAR size, not the ROM size */
  576. info.size = pci_resource_len(pdev, info.index);
  577. if (!info.size) {
  578. /* Shadow ROMs appear as PCI option ROMs */
  579. if (pdev->resource[PCI_ROM_RESOURCE].flags &
  580. IORESOURCE_ROM_SHADOW)
  581. info.size = 0x20000;
  582. else
  583. break;
  584. }
  585. /* Is it really there? */
  586. io = pci_map_rom(pdev, &size);
  587. if (!io || !size) {
  588. info.size = 0;
  589. break;
  590. }
  591. pci_unmap_rom(pdev, io);
  592. info.flags = VFIO_REGION_INFO_FLAG_READ;
  593. break;
  594. }
  595. case VFIO_PCI_VGA_REGION_INDEX:
  596. if (!vdev->has_vga)
  597. return -EINVAL;
  598. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  599. info.size = 0xc0000;
  600. info.flags = VFIO_REGION_INFO_FLAG_READ |
  601. VFIO_REGION_INFO_FLAG_WRITE;
  602. break;
  603. default:
  604. {
  605. struct vfio_region_info_cap_type cap_type;
  606. if (info.index >=
  607. VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  608. return -EINVAL;
  609. i = info.index - VFIO_PCI_NUM_REGIONS;
  610. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  611. info.size = vdev->region[i].size;
  612. info.flags = vdev->region[i].flags;
  613. cap_type.type = vdev->region[i].type;
  614. cap_type.subtype = vdev->region[i].subtype;
  615. ret = vfio_info_add_capability(&caps,
  616. VFIO_REGION_INFO_CAP_TYPE,
  617. &cap_type);
  618. if (ret)
  619. return ret;
  620. }
  621. }
  622. if (caps.size) {
  623. info.flags |= VFIO_REGION_INFO_FLAG_CAPS;
  624. if (info.argsz < sizeof(info) + caps.size) {
  625. info.argsz = sizeof(info) + caps.size;
  626. info.cap_offset = 0;
  627. } else {
  628. vfio_info_cap_shift(&caps, sizeof(info));
  629. if (copy_to_user((void __user *)arg +
  630. sizeof(info), caps.buf,
  631. caps.size)) {
  632. kfree(caps.buf);
  633. return -EFAULT;
  634. }
  635. info.cap_offset = sizeof(info);
  636. }
  637. kfree(caps.buf);
  638. }
  639. return copy_to_user((void __user *)arg, &info, minsz) ?
  640. -EFAULT : 0;
  641. } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
  642. struct vfio_irq_info info;
  643. minsz = offsetofend(struct vfio_irq_info, count);
  644. if (copy_from_user(&info, (void __user *)arg, minsz))
  645. return -EFAULT;
  646. if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
  647. return -EINVAL;
  648. switch (info.index) {
  649. case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
  650. case VFIO_PCI_REQ_IRQ_INDEX:
  651. break;
  652. case VFIO_PCI_ERR_IRQ_INDEX:
  653. if (pci_is_pcie(vdev->pdev))
  654. break;
  655. /* pass thru to return error */
  656. default:
  657. return -EINVAL;
  658. }
  659. info.flags = VFIO_IRQ_INFO_EVENTFD;
  660. info.count = vfio_pci_get_irq_count(vdev, info.index);
  661. if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
  662. info.flags |= (VFIO_IRQ_INFO_MASKABLE |
  663. VFIO_IRQ_INFO_AUTOMASKED);
  664. else
  665. info.flags |= VFIO_IRQ_INFO_NORESIZE;
  666. return copy_to_user((void __user *)arg, &info, minsz) ?
  667. -EFAULT : 0;
  668. } else if (cmd == VFIO_DEVICE_SET_IRQS) {
  669. struct vfio_irq_set hdr;
  670. u8 *data = NULL;
  671. int max, ret = 0;
  672. size_t data_size = 0;
  673. minsz = offsetofend(struct vfio_irq_set, count);
  674. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  675. return -EFAULT;
  676. max = vfio_pci_get_irq_count(vdev, hdr.index);
  677. ret = vfio_set_irqs_validate_and_prepare(&hdr, max,
  678. VFIO_PCI_NUM_IRQS, &data_size);
  679. if (ret)
  680. return ret;
  681. if (data_size) {
  682. data = memdup_user((void __user *)(arg + minsz),
  683. data_size);
  684. if (IS_ERR(data))
  685. return PTR_ERR(data);
  686. }
  687. mutex_lock(&vdev->igate);
  688. ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
  689. hdr.start, hdr.count, data);
  690. mutex_unlock(&vdev->igate);
  691. kfree(data);
  692. return ret;
  693. } else if (cmd == VFIO_DEVICE_RESET) {
  694. return vdev->reset_works ?
  695. pci_try_reset_function(vdev->pdev) : -EINVAL;
  696. } else if (cmd == VFIO_DEVICE_GET_PCI_HOT_RESET_INFO) {
  697. struct vfio_pci_hot_reset_info hdr;
  698. struct vfio_pci_fill_info fill = { 0 };
  699. struct vfio_pci_dependent_device *devices = NULL;
  700. bool slot = false;
  701. int ret = 0;
  702. minsz = offsetofend(struct vfio_pci_hot_reset_info, count);
  703. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  704. return -EFAULT;
  705. if (hdr.argsz < minsz)
  706. return -EINVAL;
  707. hdr.flags = 0;
  708. /* Can we do a slot or bus reset or neither? */
  709. if (!pci_probe_reset_slot(vdev->pdev->slot))
  710. slot = true;
  711. else if (pci_probe_reset_bus(vdev->pdev->bus))
  712. return -ENODEV;
  713. /* How many devices are affected? */
  714. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  715. vfio_pci_count_devs,
  716. &fill.max, slot);
  717. if (ret)
  718. return ret;
  719. WARN_ON(!fill.max); /* Should always be at least one */
  720. /*
  721. * If there's enough space, fill it now, otherwise return
  722. * -ENOSPC and the number of devices affected.
  723. */
  724. if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*devices))) {
  725. ret = -ENOSPC;
  726. hdr.count = fill.max;
  727. goto reset_info_exit;
  728. }
  729. devices = kcalloc(fill.max, sizeof(*devices), GFP_KERNEL);
  730. if (!devices)
  731. return -ENOMEM;
  732. fill.devices = devices;
  733. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  734. vfio_pci_fill_devs,
  735. &fill, slot);
  736. /*
  737. * If a device was removed between counting and filling,
  738. * we may come up short of fill.max. If a device was
  739. * added, we'll have a return of -EAGAIN above.
  740. */
  741. if (!ret)
  742. hdr.count = fill.cur;
  743. reset_info_exit:
  744. if (copy_to_user((void __user *)arg, &hdr, minsz))
  745. ret = -EFAULT;
  746. if (!ret) {
  747. if (copy_to_user((void __user *)(arg + minsz), devices,
  748. hdr.count * sizeof(*devices)))
  749. ret = -EFAULT;
  750. }
  751. kfree(devices);
  752. return ret;
  753. } else if (cmd == VFIO_DEVICE_PCI_HOT_RESET) {
  754. struct vfio_pci_hot_reset hdr;
  755. int32_t *group_fds;
  756. struct vfio_pci_group_entry *groups;
  757. struct vfio_pci_group_info info;
  758. bool slot = false;
  759. int i, count = 0, ret = 0;
  760. minsz = offsetofend(struct vfio_pci_hot_reset, count);
  761. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  762. return -EFAULT;
  763. if (hdr.argsz < minsz || hdr.flags)
  764. return -EINVAL;
  765. /* Can we do a slot or bus reset or neither? */
  766. if (!pci_probe_reset_slot(vdev->pdev->slot))
  767. slot = true;
  768. else if (pci_probe_reset_bus(vdev->pdev->bus))
  769. return -ENODEV;
  770. /*
  771. * We can't let userspace give us an arbitrarily large
  772. * buffer to copy, so verify how many we think there
  773. * could be. Note groups can have multiple devices so
  774. * one group per device is the max.
  775. */
  776. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  777. vfio_pci_count_devs,
  778. &count, slot);
  779. if (ret)
  780. return ret;
  781. /* Somewhere between 1 and count is OK */
  782. if (!hdr.count || hdr.count > count)
  783. return -EINVAL;
  784. group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL);
  785. groups = kcalloc(hdr.count, sizeof(*groups), GFP_KERNEL);
  786. if (!group_fds || !groups) {
  787. kfree(group_fds);
  788. kfree(groups);
  789. return -ENOMEM;
  790. }
  791. if (copy_from_user(group_fds, (void __user *)(arg + minsz),
  792. hdr.count * sizeof(*group_fds))) {
  793. kfree(group_fds);
  794. kfree(groups);
  795. return -EFAULT;
  796. }
  797. /*
  798. * For each group_fd, get the group through the vfio external
  799. * user interface and store the group and iommu ID. This
  800. * ensures the group is held across the reset.
  801. */
  802. for (i = 0; i < hdr.count; i++) {
  803. struct vfio_group *group;
  804. struct fd f = fdget(group_fds[i]);
  805. if (!f.file) {
  806. ret = -EBADF;
  807. break;
  808. }
  809. group = vfio_group_get_external_user(f.file);
  810. fdput(f);
  811. if (IS_ERR(group)) {
  812. ret = PTR_ERR(group);
  813. break;
  814. }
  815. groups[i].group = group;
  816. groups[i].id = vfio_external_user_iommu_id(group);
  817. }
  818. kfree(group_fds);
  819. /* release reference to groups on error */
  820. if (ret)
  821. goto hot_reset_release;
  822. info.count = hdr.count;
  823. info.groups = groups;
  824. /*
  825. * Test whether all the affected devices are contained
  826. * by the set of groups provided by the user.
  827. */
  828. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  829. vfio_pci_validate_devs,
  830. &info, slot);
  831. if (!ret)
  832. /* User has access, do the reset */
  833. ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
  834. pci_try_reset_bus(vdev->pdev->bus);
  835. hot_reset_release:
  836. for (i--; i >= 0; i--)
  837. vfio_group_put_external_user(groups[i].group);
  838. kfree(groups);
  839. return ret;
  840. }
  841. return -ENOTTY;
  842. }
  843. static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
  844. size_t count, loff_t *ppos, bool iswrite)
  845. {
  846. unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
  847. struct vfio_pci_device *vdev = device_data;
  848. if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  849. return -EINVAL;
  850. switch (index) {
  851. case VFIO_PCI_CONFIG_REGION_INDEX:
  852. return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
  853. case VFIO_PCI_ROM_REGION_INDEX:
  854. if (iswrite)
  855. return -EINVAL;
  856. return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
  857. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  858. return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
  859. case VFIO_PCI_VGA_REGION_INDEX:
  860. return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
  861. default:
  862. index -= VFIO_PCI_NUM_REGIONS;
  863. return vdev->region[index].ops->rw(vdev, buf,
  864. count, ppos, iswrite);
  865. }
  866. return -EINVAL;
  867. }
  868. static ssize_t vfio_pci_read(void *device_data, char __user *buf,
  869. size_t count, loff_t *ppos)
  870. {
  871. if (!count)
  872. return 0;
  873. return vfio_pci_rw(device_data, buf, count, ppos, false);
  874. }
  875. static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
  876. size_t count, loff_t *ppos)
  877. {
  878. if (!count)
  879. return 0;
  880. return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
  881. }
  882. static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
  883. {
  884. struct vfio_pci_device *vdev = device_data;
  885. struct pci_dev *pdev = vdev->pdev;
  886. unsigned int index;
  887. u64 phys_len, req_len, pgoff, req_start;
  888. int ret;
  889. index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
  890. if (vma->vm_end < vma->vm_start)
  891. return -EINVAL;
  892. if ((vma->vm_flags & VM_SHARED) == 0)
  893. return -EINVAL;
  894. if (index >= VFIO_PCI_ROM_REGION_INDEX)
  895. return -EINVAL;
  896. if (!vdev->bar_mmap_supported[index])
  897. return -EINVAL;
  898. phys_len = PAGE_ALIGN(pci_resource_len(pdev, index));
  899. req_len = vma->vm_end - vma->vm_start;
  900. pgoff = vma->vm_pgoff &
  901. ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
  902. req_start = pgoff << PAGE_SHIFT;
  903. if (req_start + req_len > phys_len)
  904. return -EINVAL;
  905. if (index == vdev->msix_bar) {
  906. /*
  907. * Disallow mmaps overlapping the MSI-X table; users don't
  908. * get to touch this directly. We could find somewhere
  909. * else to map the overlap, but page granularity is only
  910. * a recommendation, not a requirement, so the user needs
  911. * to know which bits are real. Requiring them to mmap
  912. * around the table makes that clear.
  913. */
  914. /* If neither entirely above nor below, then it overlaps */
  915. if (!(req_start >= vdev->msix_offset + vdev->msix_size ||
  916. req_start + req_len <= vdev->msix_offset))
  917. return -EINVAL;
  918. }
  919. /*
  920. * Even though we don't make use of the barmap for the mmap,
  921. * we need to request the region and the barmap tracks that.
  922. */
  923. if (!vdev->barmap[index]) {
  924. ret = pci_request_selected_regions(pdev,
  925. 1 << index, "vfio-pci");
  926. if (ret)
  927. return ret;
  928. vdev->barmap[index] = pci_iomap(pdev, index, 0);
  929. if (!vdev->barmap[index]) {
  930. pci_release_selected_regions(pdev, 1 << index);
  931. return -ENOMEM;
  932. }
  933. }
  934. vma->vm_private_data = vdev;
  935. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  936. vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;
  937. return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  938. req_len, vma->vm_page_prot);
  939. }
  940. static void vfio_pci_request(void *device_data, unsigned int count)
  941. {
  942. struct vfio_pci_device *vdev = device_data;
  943. mutex_lock(&vdev->igate);
  944. if (vdev->req_trigger) {
  945. if (!(count % 10))
  946. dev_notice_ratelimited(&vdev->pdev->dev,
  947. "Relaying device request to user (#%u)\n",
  948. count);
  949. eventfd_signal(vdev->req_trigger, 1);
  950. } else if (count == 0) {
  951. dev_warn(&vdev->pdev->dev,
  952. "No device request channel registered, blocked until released by user\n");
  953. }
  954. mutex_unlock(&vdev->igate);
  955. }
  956. static const struct vfio_device_ops vfio_pci_ops = {
  957. .name = "vfio-pci",
  958. .open = vfio_pci_open,
  959. .release = vfio_pci_release,
  960. .ioctl = vfio_pci_ioctl,
  961. .read = vfio_pci_read,
  962. .write = vfio_pci_write,
  963. .mmap = vfio_pci_mmap,
  964. .request = vfio_pci_request,
  965. };
  966. static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  967. {
  968. struct vfio_pci_device *vdev;
  969. struct iommu_group *group;
  970. int ret;
  971. if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
  972. return -EINVAL;
  973. group = vfio_iommu_group_get(&pdev->dev);
  974. if (!group)
  975. return -EINVAL;
  976. vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
  977. if (!vdev) {
  978. vfio_iommu_group_put(group, &pdev->dev);
  979. return -ENOMEM;
  980. }
  981. vdev->pdev = pdev;
  982. vdev->irq_type = VFIO_PCI_NUM_IRQS;
  983. mutex_init(&vdev->igate);
  984. spin_lock_init(&vdev->irqlock);
  985. ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
  986. if (ret) {
  987. vfio_iommu_group_put(group, &pdev->dev);
  988. kfree(vdev);
  989. return ret;
  990. }
  991. if (vfio_pci_is_vga(pdev)) {
  992. vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode);
  993. vga_set_legacy_decoding(pdev,
  994. vfio_pci_set_vga_decode(vdev, false));
  995. }
  996. if (!disable_idle_d3) {
  997. /*
  998. * pci-core sets the device power state to an unknown value at
  999. * bootup and after being removed from a driver. The only
  1000. * transition it allows from this unknown state is to D0, which
  1001. * typically happens when a driver calls pci_enable_device().
  1002. * We're not ready to enable the device yet, but we do want to
  1003. * be able to get to D3. Therefore first do a D0 transition
  1004. * before going to D3.
  1005. */
  1006. pci_set_power_state(pdev, PCI_D0);
  1007. pci_set_power_state(pdev, PCI_D3hot);
  1008. }
  1009. return ret;
  1010. }
  1011. static void vfio_pci_remove(struct pci_dev *pdev)
  1012. {
  1013. struct vfio_pci_device *vdev;
  1014. vdev = vfio_del_group_dev(&pdev->dev);
  1015. if (!vdev)
  1016. return;
  1017. vfio_iommu_group_put(pdev->dev.iommu_group, &pdev->dev);
  1018. kfree(vdev->region);
  1019. kfree(vdev);
  1020. if (vfio_pci_is_vga(pdev)) {
  1021. vga_client_register(pdev, NULL, NULL, NULL);
  1022. vga_set_legacy_decoding(pdev,
  1023. VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  1024. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM);
  1025. }
  1026. if (!disable_idle_d3)
  1027. pci_set_power_state(pdev, PCI_D0);
  1028. }
  1029. static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
  1030. pci_channel_state_t state)
  1031. {
  1032. struct vfio_pci_device *vdev;
  1033. struct vfio_device *device;
  1034. device = vfio_device_get_from_dev(&pdev->dev);
  1035. if (device == NULL)
  1036. return PCI_ERS_RESULT_DISCONNECT;
  1037. vdev = vfio_device_data(device);
  1038. if (vdev == NULL) {
  1039. vfio_device_put(device);
  1040. return PCI_ERS_RESULT_DISCONNECT;
  1041. }
  1042. mutex_lock(&vdev->igate);
  1043. if (vdev->err_trigger)
  1044. eventfd_signal(vdev->err_trigger, 1);
  1045. mutex_unlock(&vdev->igate);
  1046. vfio_device_put(device);
  1047. return PCI_ERS_RESULT_CAN_RECOVER;
  1048. }
  1049. static const struct pci_error_handlers vfio_err_handlers = {
  1050. .error_detected = vfio_pci_aer_err_detected,
  1051. };
  1052. static struct pci_driver vfio_pci_driver = {
  1053. .name = "vfio-pci",
  1054. .id_table = NULL, /* only dynamic ids */
  1055. .probe = vfio_pci_probe,
  1056. .remove = vfio_pci_remove,
  1057. .err_handler = &vfio_err_handlers,
  1058. };
  1059. struct vfio_devices {
  1060. struct vfio_device **devices;
  1061. int cur_index;
  1062. int max_index;
  1063. };
  1064. static int vfio_pci_get_devs(struct pci_dev *pdev, void *data)
  1065. {
  1066. struct vfio_devices *devs = data;
  1067. struct vfio_device *device;
  1068. if (devs->cur_index == devs->max_index)
  1069. return -ENOSPC;
  1070. device = vfio_device_get_from_dev(&pdev->dev);
  1071. if (!device)
  1072. return -EINVAL;
  1073. if (pci_dev_driver(pdev) != &vfio_pci_driver) {
  1074. vfio_device_put(device);
  1075. return -EBUSY;
  1076. }
  1077. devs->devices[devs->cur_index++] = device;
  1078. return 0;
  1079. }
  1080. /*
  1081. * Attempt to do a bus/slot reset if there are devices affected by a reset for
  1082. * this device that are needs_reset and all of the affected devices are unused
  1083. * (!refcnt). Callers are required to hold driver_lock when calling this to
  1084. * prevent device opens and concurrent bus reset attempts. We prevent device
  1085. * unbinds by acquiring and holding a reference to the vfio_device.
  1086. *
  1087. * NB: vfio-core considers a group to be viable even if some devices are
  1088. * bound to drivers like pci-stub or pcieport. Here we require all devices
  1089. * to be bound to vfio_pci since that's the only way we can be sure they
  1090. * stay put.
  1091. */
  1092. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev)
  1093. {
  1094. struct vfio_devices devs = { .cur_index = 0 };
  1095. int i = 0, ret = -EINVAL;
  1096. bool needs_reset = false, slot = false;
  1097. struct vfio_pci_device *tmp;
  1098. if (!pci_probe_reset_slot(vdev->pdev->slot))
  1099. slot = true;
  1100. else if (pci_probe_reset_bus(vdev->pdev->bus))
  1101. return;
  1102. if (vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
  1103. &i, slot) || !i)
  1104. return;
  1105. devs.max_index = i;
  1106. devs.devices = kcalloc(i, sizeof(struct vfio_device *), GFP_KERNEL);
  1107. if (!devs.devices)
  1108. return;
  1109. if (vfio_pci_for_each_slot_or_bus(vdev->pdev,
  1110. vfio_pci_get_devs, &devs, slot))
  1111. goto put_devs;
  1112. for (i = 0; i < devs.cur_index; i++) {
  1113. tmp = vfio_device_data(devs.devices[i]);
  1114. if (tmp->needs_reset)
  1115. needs_reset = true;
  1116. if (tmp->refcnt)
  1117. goto put_devs;
  1118. }
  1119. if (needs_reset)
  1120. ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
  1121. pci_try_reset_bus(vdev->pdev->bus);
  1122. put_devs:
  1123. for (i = 0; i < devs.cur_index; i++) {
  1124. tmp = vfio_device_data(devs.devices[i]);
  1125. if (!ret)
  1126. tmp->needs_reset = false;
  1127. if (!tmp->refcnt && !disable_idle_d3)
  1128. pci_set_power_state(tmp->pdev, PCI_D3hot);
  1129. vfio_device_put(devs.devices[i]);
  1130. }
  1131. kfree(devs.devices);
  1132. }
  1133. static void __exit vfio_pci_cleanup(void)
  1134. {
  1135. pci_unregister_driver(&vfio_pci_driver);
  1136. vfio_pci_uninit_perm_bits();
  1137. }
  1138. static void __init vfio_pci_fill_ids(void)
  1139. {
  1140. char *p, *id;
  1141. int rc;
  1142. /* no ids passed actually */
  1143. if (ids[0] == '\0')
  1144. return;
  1145. /* add ids specified in the module parameter */
  1146. p = ids;
  1147. while ((id = strsep(&p, ","))) {
  1148. unsigned int vendor, device, subvendor = PCI_ANY_ID,
  1149. subdevice = PCI_ANY_ID, class = 0, class_mask = 0;
  1150. int fields;
  1151. if (!strlen(id))
  1152. continue;
  1153. fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
  1154. &vendor, &device, &subvendor, &subdevice,
  1155. &class, &class_mask);
  1156. if (fields < 2) {
  1157. pr_warn("invalid id string \"%s\"\n", id);
  1158. continue;
  1159. }
  1160. rc = pci_add_dynid(&vfio_pci_driver, vendor, device,
  1161. subvendor, subdevice, class, class_mask, 0);
  1162. if (rc)
  1163. pr_warn("failed to add dynamic id [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x (%d)\n",
  1164. vendor, device, subvendor, subdevice,
  1165. class, class_mask, rc);
  1166. else
  1167. pr_info("add [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x\n",
  1168. vendor, device, subvendor, subdevice,
  1169. class, class_mask);
  1170. }
  1171. }
  1172. static int __init vfio_pci_init(void)
  1173. {
  1174. int ret;
  1175. /* Allocate shared config space permision data used by all devices */
  1176. ret = vfio_pci_init_perm_bits();
  1177. if (ret)
  1178. return ret;
  1179. /* Register and scan for devices */
  1180. ret = pci_register_driver(&vfio_pci_driver);
  1181. if (ret)
  1182. goto out_driver;
  1183. vfio_pci_fill_ids();
  1184. return 0;
  1185. out_driver:
  1186. vfio_pci_uninit_perm_bits();
  1187. return ret;
  1188. }
  1189. module_init(vfio_pci_init);
  1190. module_exit(vfio_pci_cleanup);
  1191. MODULE_VERSION(DRIVER_VERSION);
  1192. MODULE_LICENSE("GPL v2");
  1193. MODULE_AUTHOR(DRIVER_AUTHOR);
  1194. MODULE_DESCRIPTION(DRIVER_DESC);