fifo.c 34 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472
  1. /*
  2. * Renesas USB driver
  3. *
  4. * Copyright (C) 2011 Renesas Solutions Corp.
  5. * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  15. *
  16. */
  17. #include <linux/delay.h>
  18. #include <linux/io.h>
  19. #include <linux/scatterlist.h>
  20. #include "common.h"
  21. #include "pipe.h"
  22. #define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo))
  23. #define usbhsf_is_cfifo(p, f) (usbhsf_get_cfifo(p) == f)
  24. #define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */
  25. /*
  26. * packet initialize
  27. */
  28. void usbhs_pkt_init(struct usbhs_pkt *pkt)
  29. {
  30. INIT_LIST_HEAD(&pkt->node);
  31. }
  32. /*
  33. * packet control function
  34. */
  35. static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done)
  36. {
  37. struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
  38. struct device *dev = usbhs_priv_to_dev(priv);
  39. dev_err(dev, "null handler\n");
  40. return -EINVAL;
  41. }
  42. static const struct usbhs_pkt_handle usbhsf_null_handler = {
  43. .prepare = usbhsf_null_handle,
  44. .try_run = usbhsf_null_handle,
  45. };
  46. void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
  47. void (*done)(struct usbhs_priv *priv,
  48. struct usbhs_pkt *pkt),
  49. void *buf, int len, int zero, int sequence)
  50. {
  51. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  52. struct device *dev = usbhs_priv_to_dev(priv);
  53. unsigned long flags;
  54. if (!done) {
  55. dev_err(dev, "no done function\n");
  56. return;
  57. }
  58. /******************** spin lock ********************/
  59. usbhs_lock(priv, flags);
  60. if (!pipe->handler) {
  61. dev_err(dev, "no handler function\n");
  62. pipe->handler = &usbhsf_null_handler;
  63. }
  64. list_move_tail(&pkt->node, &pipe->list);
  65. /*
  66. * each pkt must hold own handler.
  67. * because handler might be changed by its situation.
  68. * dma handler -> pio handler.
  69. */
  70. pkt->pipe = pipe;
  71. pkt->buf = buf;
  72. pkt->handler = pipe->handler;
  73. pkt->length = len;
  74. pkt->zero = zero;
  75. pkt->actual = 0;
  76. pkt->done = done;
  77. pkt->sequence = sequence;
  78. usbhs_unlock(priv, flags);
  79. /******************** spin unlock ******************/
  80. }
  81. static void __usbhsf_pkt_del(struct usbhs_pkt *pkt)
  82. {
  83. list_del_init(&pkt->node);
  84. }
  85. static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
  86. {
  87. return list_first_entry_or_null(&pipe->list, struct usbhs_pkt, node);
  88. }
  89. static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
  90. struct usbhs_fifo *fifo);
  91. static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
  92. struct usbhs_fifo *fifo);
  93. static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
  94. struct usbhs_pkt *pkt);
  95. #define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1)
  96. #define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0)
  97. static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map);
  98. struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt)
  99. {
  100. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  101. struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
  102. unsigned long flags;
  103. /******************** spin lock ********************/
  104. usbhs_lock(priv, flags);
  105. usbhs_pipe_disable(pipe);
  106. if (!pkt)
  107. pkt = __usbhsf_pkt_get(pipe);
  108. if (pkt) {
  109. struct dma_chan *chan = NULL;
  110. if (fifo)
  111. chan = usbhsf_dma_chan_get(fifo, pkt);
  112. if (chan) {
  113. dmaengine_terminate_all(chan);
  114. usbhsf_fifo_clear(pipe, fifo);
  115. usbhsf_dma_unmap(pkt);
  116. }
  117. __usbhsf_pkt_del(pkt);
  118. }
  119. if (fifo)
  120. usbhsf_fifo_unselect(pipe, fifo);
  121. usbhs_unlock(priv, flags);
  122. /******************** spin unlock ******************/
  123. return pkt;
  124. }
  125. enum {
  126. USBHSF_PKT_PREPARE,
  127. USBHSF_PKT_TRY_RUN,
  128. USBHSF_PKT_DMA_DONE,
  129. };
  130. static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type)
  131. {
  132. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  133. struct usbhs_pkt *pkt;
  134. struct device *dev = usbhs_priv_to_dev(priv);
  135. int (*func)(struct usbhs_pkt *pkt, int *is_done);
  136. unsigned long flags;
  137. int ret = 0;
  138. int is_done = 0;
  139. /******************** spin lock ********************/
  140. usbhs_lock(priv, flags);
  141. pkt = __usbhsf_pkt_get(pipe);
  142. if (!pkt)
  143. goto __usbhs_pkt_handler_end;
  144. switch (type) {
  145. case USBHSF_PKT_PREPARE:
  146. func = pkt->handler->prepare;
  147. break;
  148. case USBHSF_PKT_TRY_RUN:
  149. func = pkt->handler->try_run;
  150. break;
  151. case USBHSF_PKT_DMA_DONE:
  152. func = pkt->handler->dma_done;
  153. break;
  154. default:
  155. dev_err(dev, "unknown pkt handler\n");
  156. goto __usbhs_pkt_handler_end;
  157. }
  158. if (likely(func))
  159. ret = func(pkt, &is_done);
  160. if (is_done)
  161. __usbhsf_pkt_del(pkt);
  162. __usbhs_pkt_handler_end:
  163. usbhs_unlock(priv, flags);
  164. /******************** spin unlock ******************/
  165. if (is_done) {
  166. pkt->done(priv, pkt);
  167. usbhs_pkt_start(pipe);
  168. }
  169. return ret;
  170. }
  171. void usbhs_pkt_start(struct usbhs_pipe *pipe)
  172. {
  173. usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE);
  174. }
  175. /*
  176. * irq enable/disable function
  177. */
  178. #define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_bempsts, e)
  179. #define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_brdysts, e)
  180. #define usbhsf_irq_callback_ctrl(pipe, status, enable) \
  181. ({ \
  182. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \
  183. struct usbhs_mod *mod = usbhs_mod_get_current(priv); \
  184. u16 status = (1 << usbhs_pipe_number(pipe)); \
  185. if (!mod) \
  186. return; \
  187. if (enable) \
  188. mod->status |= status; \
  189. else \
  190. mod->status &= ~status; \
  191. usbhs_irq_callback_update(priv, mod); \
  192. })
  193. static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
  194. {
  195. /*
  196. * And DCP pipe can NOT use "ready interrupt" for "send"
  197. * it should use "empty" interrupt.
  198. * see
  199. * "Operation" - "Interrupt Function" - "BRDY Interrupt"
  200. *
  201. * on the other hand, normal pipe can use "ready interrupt" for "send"
  202. * even though it is single/double buffer
  203. */
  204. if (usbhs_pipe_is_dcp(pipe))
  205. usbhsf_irq_empty_ctrl(pipe, enable);
  206. else
  207. usbhsf_irq_ready_ctrl(pipe, enable);
  208. }
  209. static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
  210. {
  211. usbhsf_irq_ready_ctrl(pipe, enable);
  212. }
  213. /*
  214. * FIFO ctrl
  215. */
  216. static void usbhsf_send_terminator(struct usbhs_pipe *pipe,
  217. struct usbhs_fifo *fifo)
  218. {
  219. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  220. usbhs_bset(priv, fifo->ctr, BVAL, BVAL);
  221. }
  222. static int usbhsf_fifo_barrier(struct usbhs_priv *priv,
  223. struct usbhs_fifo *fifo)
  224. {
  225. int timeout = 1024;
  226. do {
  227. /* The FIFO port is accessible */
  228. if (usbhs_read(priv, fifo->ctr) & FRDY)
  229. return 0;
  230. udelay(10);
  231. } while (timeout--);
  232. return -EBUSY;
  233. }
  234. static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
  235. struct usbhs_fifo *fifo)
  236. {
  237. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  238. int ret = 0;
  239. if (!usbhs_pipe_is_dcp(pipe)) {
  240. /*
  241. * This driver checks the pipe condition first to avoid -EBUSY
  242. * from usbhsf_fifo_barrier() with about 10 msec delay in
  243. * the interrupt handler if the pipe is RX direction and empty.
  244. */
  245. if (usbhs_pipe_is_dir_in(pipe))
  246. ret = usbhs_pipe_is_accessible(pipe);
  247. if (!ret)
  248. ret = usbhsf_fifo_barrier(priv, fifo);
  249. }
  250. /*
  251. * if non-DCP pipe, this driver should set BCLR when
  252. * usbhsf_fifo_barrier() returns 0.
  253. */
  254. if (!ret)
  255. usbhs_write(priv, fifo->ctr, BCLR);
  256. }
  257. static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv,
  258. struct usbhs_fifo *fifo)
  259. {
  260. return usbhs_read(priv, fifo->ctr) & DTLN_MASK;
  261. }
  262. static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
  263. struct usbhs_fifo *fifo)
  264. {
  265. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  266. usbhs_pipe_select_fifo(pipe, NULL);
  267. usbhs_write(priv, fifo->sel, 0);
  268. }
  269. static int usbhsf_fifo_select(struct usbhs_pipe *pipe,
  270. struct usbhs_fifo *fifo,
  271. int write)
  272. {
  273. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  274. struct device *dev = usbhs_priv_to_dev(priv);
  275. int timeout = 1024;
  276. u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */
  277. u16 base = usbhs_pipe_number(pipe); /* CURPIPE */
  278. if (usbhs_pipe_is_busy(pipe) ||
  279. usbhsf_fifo_is_busy(fifo))
  280. return -EBUSY;
  281. if (usbhs_pipe_is_dcp(pipe)) {
  282. base |= (1 == write) << 5; /* ISEL */
  283. if (usbhs_mod_is_host(priv))
  284. usbhs_dcp_dir_for_host(pipe, write);
  285. }
  286. /* "base" will be used below */
  287. if (usbhs_get_dparam(priv, has_sudmac) && !usbhsf_is_cfifo(priv, fifo))
  288. usbhs_write(priv, fifo->sel, base);
  289. else
  290. usbhs_write(priv, fifo->sel, base | MBW_32);
  291. /* check ISEL and CURPIPE value */
  292. while (timeout--) {
  293. if (base == (mask & usbhs_read(priv, fifo->sel))) {
  294. usbhs_pipe_select_fifo(pipe, fifo);
  295. return 0;
  296. }
  297. udelay(10);
  298. }
  299. dev_err(dev, "fifo select error\n");
  300. return -EIO;
  301. }
  302. /*
  303. * DCP status stage
  304. */
  305. static int usbhs_dcp_dir_switch_to_write(struct usbhs_pkt *pkt, int *is_done)
  306. {
  307. struct usbhs_pipe *pipe = pkt->pipe;
  308. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  309. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
  310. struct device *dev = usbhs_priv_to_dev(priv);
  311. int ret;
  312. usbhs_pipe_disable(pipe);
  313. ret = usbhsf_fifo_select(pipe, fifo, 1);
  314. if (ret < 0) {
  315. dev_err(dev, "%s() faile\n", __func__);
  316. return ret;
  317. }
  318. usbhs_pipe_sequence_data1(pipe); /* DATA1 */
  319. usbhsf_fifo_clear(pipe, fifo);
  320. usbhsf_send_terminator(pipe, fifo);
  321. usbhsf_fifo_unselect(pipe, fifo);
  322. usbhsf_tx_irq_ctrl(pipe, 1);
  323. usbhs_pipe_enable(pipe);
  324. return ret;
  325. }
  326. static int usbhs_dcp_dir_switch_to_read(struct usbhs_pkt *pkt, int *is_done)
  327. {
  328. struct usbhs_pipe *pipe = pkt->pipe;
  329. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  330. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
  331. struct device *dev = usbhs_priv_to_dev(priv);
  332. int ret;
  333. usbhs_pipe_disable(pipe);
  334. ret = usbhsf_fifo_select(pipe, fifo, 0);
  335. if (ret < 0) {
  336. dev_err(dev, "%s() fail\n", __func__);
  337. return ret;
  338. }
  339. usbhs_pipe_sequence_data1(pipe); /* DATA1 */
  340. usbhsf_fifo_clear(pipe, fifo);
  341. usbhsf_fifo_unselect(pipe, fifo);
  342. usbhsf_rx_irq_ctrl(pipe, 1);
  343. usbhs_pipe_enable(pipe);
  344. return ret;
  345. }
  346. static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done)
  347. {
  348. struct usbhs_pipe *pipe = pkt->pipe;
  349. if (pkt->handler == &usbhs_dcp_status_stage_in_handler)
  350. usbhsf_tx_irq_ctrl(pipe, 0);
  351. else
  352. usbhsf_rx_irq_ctrl(pipe, 0);
  353. pkt->actual = pkt->length;
  354. *is_done = 1;
  355. return 0;
  356. }
  357. const struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = {
  358. .prepare = usbhs_dcp_dir_switch_to_write,
  359. .try_run = usbhs_dcp_dir_switch_done,
  360. };
  361. const struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = {
  362. .prepare = usbhs_dcp_dir_switch_to_read,
  363. .try_run = usbhs_dcp_dir_switch_done,
  364. };
  365. /*
  366. * DCP data stage (push)
  367. */
  368. static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done)
  369. {
  370. struct usbhs_pipe *pipe = pkt->pipe;
  371. usbhs_pipe_sequence_data1(pipe); /* DATA1 */
  372. /*
  373. * change handler to PIO push
  374. */
  375. pkt->handler = &usbhs_fifo_pio_push_handler;
  376. return pkt->handler->prepare(pkt, is_done);
  377. }
  378. const struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = {
  379. .prepare = usbhsf_dcp_data_stage_try_push,
  380. };
  381. /*
  382. * DCP data stage (pop)
  383. */
  384. static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt,
  385. int *is_done)
  386. {
  387. struct usbhs_pipe *pipe = pkt->pipe;
  388. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  389. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
  390. if (usbhs_pipe_is_busy(pipe))
  391. return 0;
  392. /*
  393. * prepare pop for DCP should
  394. * - change DCP direction,
  395. * - clear fifo
  396. * - DATA1
  397. */
  398. usbhs_pipe_disable(pipe);
  399. usbhs_pipe_sequence_data1(pipe); /* DATA1 */
  400. usbhsf_fifo_select(pipe, fifo, 0);
  401. usbhsf_fifo_clear(pipe, fifo);
  402. usbhsf_fifo_unselect(pipe, fifo);
  403. /*
  404. * change handler to PIO pop
  405. */
  406. pkt->handler = &usbhs_fifo_pio_pop_handler;
  407. return pkt->handler->prepare(pkt, is_done);
  408. }
  409. const struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = {
  410. .prepare = usbhsf_dcp_data_stage_prepare_pop,
  411. };
  412. /*
  413. * PIO push handler
  414. */
  415. static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done)
  416. {
  417. struct usbhs_pipe *pipe = pkt->pipe;
  418. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  419. struct device *dev = usbhs_priv_to_dev(priv);
  420. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
  421. void __iomem *addr = priv->base + fifo->port;
  422. u8 *buf;
  423. int maxp = usbhs_pipe_get_maxpacket(pipe);
  424. int total_len;
  425. int i, ret, len;
  426. int is_short;
  427. usbhs_pipe_data_sequence(pipe, pkt->sequence);
  428. pkt->sequence = -1; /* -1 sequence will be ignored */
  429. usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
  430. ret = usbhsf_fifo_select(pipe, fifo, 1);
  431. if (ret < 0)
  432. return 0;
  433. ret = usbhs_pipe_is_accessible(pipe);
  434. if (ret < 0) {
  435. /* inaccessible pipe is not an error */
  436. ret = 0;
  437. goto usbhs_fifo_write_busy;
  438. }
  439. ret = usbhsf_fifo_barrier(priv, fifo);
  440. if (ret < 0)
  441. goto usbhs_fifo_write_busy;
  442. buf = pkt->buf + pkt->actual;
  443. len = pkt->length - pkt->actual;
  444. len = min(len, maxp);
  445. total_len = len;
  446. is_short = total_len < maxp;
  447. /*
  448. * FIXME
  449. *
  450. * 32-bit access only
  451. */
  452. if (len >= 4 && !((unsigned long)buf & 0x03)) {
  453. iowrite32_rep(addr, buf, len / 4);
  454. len %= 4;
  455. buf += total_len - len;
  456. }
  457. /* the rest operation */
  458. for (i = 0; i < len; i++)
  459. iowrite8(buf[i], addr + (0x03 - (i & 0x03)));
  460. /*
  461. * variable update
  462. */
  463. pkt->actual += total_len;
  464. if (pkt->actual < pkt->length)
  465. *is_done = 0; /* there are remainder data */
  466. else if (is_short)
  467. *is_done = 1; /* short packet */
  468. else
  469. *is_done = !pkt->zero; /* send zero packet ? */
  470. /*
  471. * pipe/irq handling
  472. */
  473. if (is_short)
  474. usbhsf_send_terminator(pipe, fifo);
  475. usbhsf_tx_irq_ctrl(pipe, !*is_done);
  476. usbhs_pipe_running(pipe, !*is_done);
  477. usbhs_pipe_enable(pipe);
  478. dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n",
  479. usbhs_pipe_number(pipe),
  480. pkt->length, pkt->actual, *is_done, pkt->zero);
  481. usbhsf_fifo_unselect(pipe, fifo);
  482. return 0;
  483. usbhs_fifo_write_busy:
  484. usbhsf_fifo_unselect(pipe, fifo);
  485. /*
  486. * pipe is busy.
  487. * retry in interrupt
  488. */
  489. usbhsf_tx_irq_ctrl(pipe, 1);
  490. usbhs_pipe_running(pipe, 1);
  491. return ret;
  492. }
  493. static int usbhsf_pio_prepare_push(struct usbhs_pkt *pkt, int *is_done)
  494. {
  495. if (usbhs_pipe_is_running(pkt->pipe))
  496. return 0;
  497. return usbhsf_pio_try_push(pkt, is_done);
  498. }
  499. const struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = {
  500. .prepare = usbhsf_pio_prepare_push,
  501. .try_run = usbhsf_pio_try_push,
  502. };
  503. /*
  504. * PIO pop handler
  505. */
  506. static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
  507. {
  508. struct usbhs_pipe *pipe = pkt->pipe;
  509. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  510. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
  511. if (usbhs_pipe_is_busy(pipe))
  512. return 0;
  513. if (usbhs_pipe_is_running(pipe))
  514. return 0;
  515. /*
  516. * pipe enable to prepare packet receive
  517. */
  518. usbhs_pipe_data_sequence(pipe, pkt->sequence);
  519. pkt->sequence = -1; /* -1 sequence will be ignored */
  520. if (usbhs_pipe_is_dcp(pipe))
  521. usbhsf_fifo_clear(pipe, fifo);
  522. usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
  523. usbhs_pipe_enable(pipe);
  524. usbhs_pipe_running(pipe, 1);
  525. usbhsf_rx_irq_ctrl(pipe, 1);
  526. return 0;
  527. }
  528. static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done)
  529. {
  530. struct usbhs_pipe *pipe = pkt->pipe;
  531. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  532. struct device *dev = usbhs_priv_to_dev(priv);
  533. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
  534. void __iomem *addr = priv->base + fifo->port;
  535. u8 *buf;
  536. u32 data = 0;
  537. int maxp = usbhs_pipe_get_maxpacket(pipe);
  538. int rcv_len, len;
  539. int i, ret;
  540. int total_len = 0;
  541. ret = usbhsf_fifo_select(pipe, fifo, 0);
  542. if (ret < 0)
  543. return 0;
  544. ret = usbhsf_fifo_barrier(priv, fifo);
  545. if (ret < 0)
  546. goto usbhs_fifo_read_busy;
  547. rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
  548. buf = pkt->buf + pkt->actual;
  549. len = pkt->length - pkt->actual;
  550. len = min(len, rcv_len);
  551. total_len = len;
  552. /*
  553. * update actual length first here to decide disable pipe.
  554. * if this pipe keeps BUF status and all data were popped,
  555. * then, next interrupt/token will be issued again
  556. */
  557. pkt->actual += total_len;
  558. if ((pkt->actual == pkt->length) || /* receive all data */
  559. (total_len < maxp)) { /* short packet */
  560. *is_done = 1;
  561. usbhsf_rx_irq_ctrl(pipe, 0);
  562. usbhs_pipe_running(pipe, 0);
  563. /*
  564. * If function mode, since this controller is possible to enter
  565. * Control Write status stage at this timing, this driver
  566. * should not disable the pipe. If such a case happens, this
  567. * controller is not able to complete the status stage.
  568. */
  569. if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe))
  570. usbhs_pipe_disable(pipe); /* disable pipe first */
  571. }
  572. /*
  573. * Buffer clear if Zero-Length packet
  574. *
  575. * see
  576. * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function"
  577. */
  578. if (0 == rcv_len) {
  579. pkt->zero = 1;
  580. usbhsf_fifo_clear(pipe, fifo);
  581. goto usbhs_fifo_read_end;
  582. }
  583. /*
  584. * FIXME
  585. *
  586. * 32-bit access only
  587. */
  588. if (len >= 4 && !((unsigned long)buf & 0x03)) {
  589. ioread32_rep(addr, buf, len / 4);
  590. len %= 4;
  591. buf += total_len - len;
  592. }
  593. /* the rest operation */
  594. for (i = 0; i < len; i++) {
  595. if (!(i & 0x03))
  596. data = ioread32(addr);
  597. buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
  598. }
  599. usbhs_fifo_read_end:
  600. dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n",
  601. usbhs_pipe_number(pipe),
  602. pkt->length, pkt->actual, *is_done, pkt->zero);
  603. usbhs_fifo_read_busy:
  604. usbhsf_fifo_unselect(pipe, fifo);
  605. return ret;
  606. }
  607. const struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = {
  608. .prepare = usbhsf_prepare_pop,
  609. .try_run = usbhsf_pio_try_pop,
  610. };
  611. /*
  612. * DCP ctrol statge handler
  613. */
  614. static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done)
  615. {
  616. usbhs_dcp_control_transfer_done(pkt->pipe);
  617. *is_done = 1;
  618. return 0;
  619. }
  620. const struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = {
  621. .prepare = usbhsf_ctrl_stage_end,
  622. .try_run = usbhsf_ctrl_stage_end,
  623. };
  624. /*
  625. * DMA fifo functions
  626. */
  627. static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
  628. struct usbhs_pkt *pkt)
  629. {
  630. if (&usbhs_fifo_dma_push_handler == pkt->handler)
  631. return fifo->tx_chan;
  632. if (&usbhs_fifo_dma_pop_handler == pkt->handler)
  633. return fifo->rx_chan;
  634. return NULL;
  635. }
  636. static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv,
  637. struct usbhs_pkt *pkt)
  638. {
  639. struct usbhs_fifo *fifo;
  640. int i;
  641. usbhs_for_each_dfifo(priv, fifo, i) {
  642. if (usbhsf_dma_chan_get(fifo, pkt) &&
  643. !usbhsf_fifo_is_busy(fifo))
  644. return fifo;
  645. }
  646. return NULL;
  647. }
  648. #define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE)
  649. #define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0)
  650. static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe,
  651. struct usbhs_fifo *fifo,
  652. u16 dreqe)
  653. {
  654. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  655. usbhs_bset(priv, fifo->sel, DREQE, dreqe);
  656. }
  657. static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map)
  658. {
  659. struct usbhs_pipe *pipe = pkt->pipe;
  660. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  661. struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv);
  662. struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
  663. struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
  664. return info->dma_map_ctrl(chan->device->dev, pkt, map);
  665. }
  666. static void usbhsf_dma_complete(void *arg);
  667. static void xfer_work(struct work_struct *work)
  668. {
  669. struct usbhs_pkt *pkt = container_of(work, struct usbhs_pkt, work);
  670. struct usbhs_pipe *pipe = pkt->pipe;
  671. struct usbhs_fifo *fifo;
  672. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  673. struct dma_async_tx_descriptor *desc;
  674. struct dma_chan *chan;
  675. struct device *dev = usbhs_priv_to_dev(priv);
  676. enum dma_transfer_direction dir;
  677. unsigned long flags;
  678. usbhs_lock(priv, flags);
  679. fifo = usbhs_pipe_to_fifo(pipe);
  680. if (!fifo)
  681. goto xfer_work_end;
  682. chan = usbhsf_dma_chan_get(fifo, pkt);
  683. dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV;
  684. desc = dmaengine_prep_slave_single(chan, pkt->dma + pkt->actual,
  685. pkt->trans, dir,
  686. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  687. if (!desc)
  688. goto xfer_work_end;
  689. desc->callback = usbhsf_dma_complete;
  690. desc->callback_param = pipe;
  691. pkt->cookie = dmaengine_submit(desc);
  692. if (pkt->cookie < 0) {
  693. dev_err(dev, "Failed to submit dma descriptor\n");
  694. goto xfer_work_end;
  695. }
  696. dev_dbg(dev, " %s %d (%d/ %d)\n",
  697. fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero);
  698. usbhs_pipe_running(pipe, 1);
  699. usbhsf_dma_start(pipe, fifo);
  700. usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans);
  701. dma_async_issue_pending(chan);
  702. usbhs_pipe_enable(pipe);
  703. xfer_work_end:
  704. usbhs_unlock(priv, flags);
  705. }
  706. /*
  707. * DMA push handler
  708. */
  709. static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done)
  710. {
  711. struct usbhs_pipe *pipe = pkt->pipe;
  712. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  713. struct usbhs_fifo *fifo;
  714. int len = pkt->length - pkt->actual;
  715. int ret;
  716. uintptr_t align_mask;
  717. if (usbhs_pipe_is_busy(pipe))
  718. return 0;
  719. /* use PIO if packet is less than pio_dma_border or pipe is DCP */
  720. if ((len < usbhs_get_dparam(priv, pio_dma_border)) ||
  721. usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
  722. goto usbhsf_pio_prepare_push;
  723. /* check data length if this driver don't use USB-DMAC */
  724. if (!usbhs_get_dparam(priv, has_usb_dmac) && len & 0x7)
  725. goto usbhsf_pio_prepare_push;
  726. /* check buffer alignment */
  727. align_mask = usbhs_get_dparam(priv, has_usb_dmac) ?
  728. USBHS_USB_DMAC_XFER_SIZE - 1 : 0x7;
  729. if ((uintptr_t)(pkt->buf + pkt->actual) & align_mask)
  730. goto usbhsf_pio_prepare_push;
  731. /* return at this time if the pipe is running */
  732. if (usbhs_pipe_is_running(pipe))
  733. return 0;
  734. /* get enable DMA fifo */
  735. fifo = usbhsf_get_dma_fifo(priv, pkt);
  736. if (!fifo)
  737. goto usbhsf_pio_prepare_push;
  738. ret = usbhsf_fifo_select(pipe, fifo, 0);
  739. if (ret < 0)
  740. goto usbhsf_pio_prepare_push;
  741. if (usbhsf_dma_map(pkt) < 0)
  742. goto usbhsf_pio_prepare_push_unselect;
  743. pkt->trans = len;
  744. usbhsf_tx_irq_ctrl(pipe, 0);
  745. INIT_WORK(&pkt->work, xfer_work);
  746. schedule_work(&pkt->work);
  747. return 0;
  748. usbhsf_pio_prepare_push_unselect:
  749. usbhsf_fifo_unselect(pipe, fifo);
  750. usbhsf_pio_prepare_push:
  751. /*
  752. * change handler to PIO
  753. */
  754. pkt->handler = &usbhs_fifo_pio_push_handler;
  755. return pkt->handler->prepare(pkt, is_done);
  756. }
  757. static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done)
  758. {
  759. struct usbhs_pipe *pipe = pkt->pipe;
  760. int is_short = pkt->trans % usbhs_pipe_get_maxpacket(pipe);
  761. pkt->actual += pkt->trans;
  762. if (pkt->actual < pkt->length)
  763. *is_done = 0; /* there are remainder data */
  764. else if (is_short)
  765. *is_done = 1; /* short packet */
  766. else
  767. *is_done = !pkt->zero; /* send zero packet? */
  768. usbhs_pipe_running(pipe, !*is_done);
  769. usbhsf_dma_stop(pipe, pipe->fifo);
  770. usbhsf_dma_unmap(pkt);
  771. usbhsf_fifo_unselect(pipe, pipe->fifo);
  772. if (!*is_done) {
  773. /* change handler to PIO */
  774. pkt->handler = &usbhs_fifo_pio_push_handler;
  775. return pkt->handler->try_run(pkt, is_done);
  776. }
  777. return 0;
  778. }
  779. const struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = {
  780. .prepare = usbhsf_dma_prepare_push,
  781. .dma_done = usbhsf_dma_push_done,
  782. };
  783. /*
  784. * DMA pop handler
  785. */
  786. static int usbhsf_dma_prepare_pop_with_rx_irq(struct usbhs_pkt *pkt,
  787. int *is_done)
  788. {
  789. return usbhsf_prepare_pop(pkt, is_done);
  790. }
  791. static int usbhsf_dma_prepare_pop_with_usb_dmac(struct usbhs_pkt *pkt,
  792. int *is_done)
  793. {
  794. struct usbhs_pipe *pipe = pkt->pipe;
  795. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  796. struct usbhs_fifo *fifo;
  797. int ret;
  798. if (usbhs_pipe_is_busy(pipe))
  799. return 0;
  800. /* use PIO if packet is less than pio_dma_border or pipe is DCP */
  801. if ((pkt->length < usbhs_get_dparam(priv, pio_dma_border)) ||
  802. usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
  803. goto usbhsf_pio_prepare_pop;
  804. fifo = usbhsf_get_dma_fifo(priv, pkt);
  805. if (!fifo)
  806. goto usbhsf_pio_prepare_pop;
  807. if ((uintptr_t)pkt->buf & (USBHS_USB_DMAC_XFER_SIZE - 1))
  808. goto usbhsf_pio_prepare_pop;
  809. usbhs_pipe_config_change_bfre(pipe, 1);
  810. ret = usbhsf_fifo_select(pipe, fifo, 0);
  811. if (ret < 0)
  812. goto usbhsf_pio_prepare_pop;
  813. if (usbhsf_dma_map(pkt) < 0)
  814. goto usbhsf_pio_prepare_pop_unselect;
  815. /* DMA */
  816. /*
  817. * usbhs_fifo_dma_pop_handler :: prepare
  818. * enabled irq to come here.
  819. * but it is no longer needed for DMA. disable it.
  820. */
  821. usbhsf_rx_irq_ctrl(pipe, 0);
  822. pkt->trans = pkt->length;
  823. INIT_WORK(&pkt->work, xfer_work);
  824. schedule_work(&pkt->work);
  825. return 0;
  826. usbhsf_pio_prepare_pop_unselect:
  827. usbhsf_fifo_unselect(pipe, fifo);
  828. usbhsf_pio_prepare_pop:
  829. /*
  830. * change handler to PIO
  831. */
  832. pkt->handler = &usbhs_fifo_pio_pop_handler;
  833. usbhs_pipe_config_change_bfre(pipe, 0);
  834. return pkt->handler->prepare(pkt, is_done);
  835. }
  836. static int usbhsf_dma_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
  837. {
  838. struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
  839. if (usbhs_get_dparam(priv, has_usb_dmac))
  840. return usbhsf_dma_prepare_pop_with_usb_dmac(pkt, is_done);
  841. else
  842. return usbhsf_dma_prepare_pop_with_rx_irq(pkt, is_done);
  843. }
  844. static int usbhsf_dma_try_pop_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
  845. {
  846. struct usbhs_pipe *pipe = pkt->pipe;
  847. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  848. struct usbhs_fifo *fifo;
  849. int len, ret;
  850. if (usbhs_pipe_is_busy(pipe))
  851. return 0;
  852. if (usbhs_pipe_is_dcp(pipe))
  853. goto usbhsf_pio_prepare_pop;
  854. /* get enable DMA fifo */
  855. fifo = usbhsf_get_dma_fifo(priv, pkt);
  856. if (!fifo)
  857. goto usbhsf_pio_prepare_pop;
  858. if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */
  859. goto usbhsf_pio_prepare_pop;
  860. ret = usbhsf_fifo_select(pipe, fifo, 0);
  861. if (ret < 0)
  862. goto usbhsf_pio_prepare_pop;
  863. /* use PIO if packet is less than pio_dma_border */
  864. len = usbhsf_fifo_rcv_len(priv, fifo);
  865. len = min(pkt->length - pkt->actual, len);
  866. if (len & 0x7) /* 8byte alignment */
  867. goto usbhsf_pio_prepare_pop_unselect;
  868. if (len < usbhs_get_dparam(priv, pio_dma_border))
  869. goto usbhsf_pio_prepare_pop_unselect;
  870. ret = usbhsf_fifo_barrier(priv, fifo);
  871. if (ret < 0)
  872. goto usbhsf_pio_prepare_pop_unselect;
  873. if (usbhsf_dma_map(pkt) < 0)
  874. goto usbhsf_pio_prepare_pop_unselect;
  875. /* DMA */
  876. /*
  877. * usbhs_fifo_dma_pop_handler :: prepare
  878. * enabled irq to come here.
  879. * but it is no longer needed for DMA. disable it.
  880. */
  881. usbhsf_rx_irq_ctrl(pipe, 0);
  882. pkt->trans = len;
  883. INIT_WORK(&pkt->work, xfer_work);
  884. schedule_work(&pkt->work);
  885. return 0;
  886. usbhsf_pio_prepare_pop_unselect:
  887. usbhsf_fifo_unselect(pipe, fifo);
  888. usbhsf_pio_prepare_pop:
  889. /*
  890. * change handler to PIO
  891. */
  892. pkt->handler = &usbhs_fifo_pio_pop_handler;
  893. return pkt->handler->try_run(pkt, is_done);
  894. }
  895. static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done)
  896. {
  897. struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
  898. BUG_ON(usbhs_get_dparam(priv, has_usb_dmac));
  899. return usbhsf_dma_try_pop_with_rx_irq(pkt, is_done);
  900. }
  901. static int usbhsf_dma_pop_done_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
  902. {
  903. struct usbhs_pipe *pipe = pkt->pipe;
  904. int maxp = usbhs_pipe_get_maxpacket(pipe);
  905. usbhsf_dma_stop(pipe, pipe->fifo);
  906. usbhsf_dma_unmap(pkt);
  907. usbhsf_fifo_unselect(pipe, pipe->fifo);
  908. pkt->actual += pkt->trans;
  909. if ((pkt->actual == pkt->length) || /* receive all data */
  910. (pkt->trans < maxp)) { /* short packet */
  911. *is_done = 1;
  912. usbhs_pipe_running(pipe, 0);
  913. } else {
  914. /* re-enable */
  915. usbhs_pipe_running(pipe, 0);
  916. usbhsf_prepare_pop(pkt, is_done);
  917. }
  918. return 0;
  919. }
  920. static size_t usbhs_dma_calc_received_size(struct usbhs_pkt *pkt,
  921. struct dma_chan *chan, int dtln)
  922. {
  923. struct usbhs_pipe *pipe = pkt->pipe;
  924. struct dma_tx_state state;
  925. size_t received_size;
  926. int maxp = usbhs_pipe_get_maxpacket(pipe);
  927. dmaengine_tx_status(chan, pkt->cookie, &state);
  928. received_size = pkt->length - state.residue;
  929. if (dtln) {
  930. received_size -= USBHS_USB_DMAC_XFER_SIZE;
  931. received_size &= ~(maxp - 1);
  932. received_size += dtln;
  933. }
  934. return received_size;
  935. }
  936. static int usbhsf_dma_pop_done_with_usb_dmac(struct usbhs_pkt *pkt,
  937. int *is_done)
  938. {
  939. struct usbhs_pipe *pipe = pkt->pipe;
  940. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  941. struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
  942. struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
  943. int rcv_len;
  944. /*
  945. * Since the driver disables rx_irq in DMA mode, the interrupt handler
  946. * cannot the BRDYSTS. So, the function clears it here because the
  947. * driver may use PIO mode next time.
  948. */
  949. usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe));
  950. rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
  951. usbhsf_fifo_clear(pipe, fifo);
  952. pkt->actual = usbhs_dma_calc_received_size(pkt, chan, rcv_len);
  953. usbhsf_dma_stop(pipe, fifo);
  954. usbhsf_dma_unmap(pkt);
  955. usbhsf_fifo_unselect(pipe, pipe->fifo);
  956. /* The driver can assume the rx transaction is always "done" */
  957. *is_done = 1;
  958. return 0;
  959. }
  960. static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done)
  961. {
  962. struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
  963. if (usbhs_get_dparam(priv, has_usb_dmac))
  964. return usbhsf_dma_pop_done_with_usb_dmac(pkt, is_done);
  965. else
  966. return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done);
  967. }
  968. const struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = {
  969. .prepare = usbhsf_dma_prepare_pop,
  970. .try_run = usbhsf_dma_try_pop,
  971. .dma_done = usbhsf_dma_pop_done
  972. };
  973. /*
  974. * DMA setting
  975. */
  976. static bool usbhsf_dma_filter(struct dma_chan *chan, void *param)
  977. {
  978. struct sh_dmae_slave *slave = param;
  979. /*
  980. * FIXME
  981. *
  982. * usbhs doesn't recognize id = 0 as valid DMA
  983. */
  984. if (0 == slave->shdma_slave.slave_id)
  985. return false;
  986. chan->private = slave;
  987. return true;
  988. }
  989. static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo)
  990. {
  991. if (fifo->tx_chan)
  992. dma_release_channel(fifo->tx_chan);
  993. if (fifo->rx_chan)
  994. dma_release_channel(fifo->rx_chan);
  995. fifo->tx_chan = NULL;
  996. fifo->rx_chan = NULL;
  997. }
  998. static void usbhsf_dma_init_pdev(struct usbhs_fifo *fifo)
  999. {
  1000. dma_cap_mask_t mask;
  1001. dma_cap_zero(mask);
  1002. dma_cap_set(DMA_SLAVE, mask);
  1003. fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter,
  1004. &fifo->tx_slave);
  1005. dma_cap_zero(mask);
  1006. dma_cap_set(DMA_SLAVE, mask);
  1007. fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter,
  1008. &fifo->rx_slave);
  1009. }
  1010. static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo,
  1011. int channel)
  1012. {
  1013. char name[16];
  1014. /*
  1015. * To avoid complex handing for DnFIFOs, the driver uses each
  1016. * DnFIFO as TX or RX direction (not bi-direction).
  1017. * So, the driver uses odd channels for TX, even channels for RX.
  1018. */
  1019. snprintf(name, sizeof(name), "ch%d", channel);
  1020. if (channel & 1) {
  1021. fifo->tx_chan = dma_request_slave_channel_reason(dev, name);
  1022. if (IS_ERR(fifo->tx_chan))
  1023. fifo->tx_chan = NULL;
  1024. } else {
  1025. fifo->rx_chan = dma_request_slave_channel_reason(dev, name);
  1026. if (IS_ERR(fifo->rx_chan))
  1027. fifo->rx_chan = NULL;
  1028. }
  1029. }
  1030. static void usbhsf_dma_init(struct usbhs_priv *priv, struct usbhs_fifo *fifo,
  1031. int channel)
  1032. {
  1033. struct device *dev = usbhs_priv_to_dev(priv);
  1034. if (dev->of_node)
  1035. usbhsf_dma_init_dt(dev, fifo, channel);
  1036. else
  1037. usbhsf_dma_init_pdev(fifo);
  1038. if (fifo->tx_chan || fifo->rx_chan)
  1039. dev_dbg(dev, "enable DMAEngine (%s%s%s)\n",
  1040. fifo->name,
  1041. fifo->tx_chan ? "[TX]" : " ",
  1042. fifo->rx_chan ? "[RX]" : " ");
  1043. }
  1044. /*
  1045. * irq functions
  1046. */
  1047. static int usbhsf_irq_empty(struct usbhs_priv *priv,
  1048. struct usbhs_irq_state *irq_state)
  1049. {
  1050. struct usbhs_pipe *pipe;
  1051. struct device *dev = usbhs_priv_to_dev(priv);
  1052. int i, ret;
  1053. if (!irq_state->bempsts) {
  1054. dev_err(dev, "debug %s !!\n", __func__);
  1055. return -EIO;
  1056. }
  1057. dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts);
  1058. /*
  1059. * search interrupted "pipe"
  1060. * not "uep".
  1061. */
  1062. usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
  1063. if (!(irq_state->bempsts & (1 << i)))
  1064. continue;
  1065. ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
  1066. if (ret < 0)
  1067. dev_err(dev, "irq_empty run_error %d : %d\n", i, ret);
  1068. }
  1069. return 0;
  1070. }
  1071. static int usbhsf_irq_ready(struct usbhs_priv *priv,
  1072. struct usbhs_irq_state *irq_state)
  1073. {
  1074. struct usbhs_pipe *pipe;
  1075. struct device *dev = usbhs_priv_to_dev(priv);
  1076. int i, ret;
  1077. if (!irq_state->brdysts) {
  1078. dev_err(dev, "debug %s !!\n", __func__);
  1079. return -EIO;
  1080. }
  1081. dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts);
  1082. /*
  1083. * search interrupted "pipe"
  1084. * not "uep".
  1085. */
  1086. usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
  1087. if (!(irq_state->brdysts & (1 << i)))
  1088. continue;
  1089. ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
  1090. if (ret < 0)
  1091. dev_err(dev, "irq_ready run_error %d : %d\n", i, ret);
  1092. }
  1093. return 0;
  1094. }
  1095. static void usbhsf_dma_complete(void *arg)
  1096. {
  1097. struct usbhs_pipe *pipe = arg;
  1098. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  1099. struct device *dev = usbhs_priv_to_dev(priv);
  1100. int ret;
  1101. ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE);
  1102. if (ret < 0)
  1103. dev_err(dev, "dma_complete run_error %d : %d\n",
  1104. usbhs_pipe_number(pipe), ret);
  1105. }
  1106. void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe)
  1107. {
  1108. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  1109. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
  1110. /* clear DCP FIFO of transmission */
  1111. if (usbhsf_fifo_select(pipe, fifo, 1) < 0)
  1112. return;
  1113. usbhsf_fifo_clear(pipe, fifo);
  1114. usbhsf_fifo_unselect(pipe, fifo);
  1115. /* clear DCP FIFO of reception */
  1116. if (usbhsf_fifo_select(pipe, fifo, 0) < 0)
  1117. return;
  1118. usbhsf_fifo_clear(pipe, fifo);
  1119. usbhsf_fifo_unselect(pipe, fifo);
  1120. }
  1121. /*
  1122. * fifo init
  1123. */
  1124. void usbhs_fifo_init(struct usbhs_priv *priv)
  1125. {
  1126. struct usbhs_mod *mod = usbhs_mod_get_current(priv);
  1127. struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv);
  1128. struct usbhs_fifo *dfifo;
  1129. int i;
  1130. mod->irq_empty = usbhsf_irq_empty;
  1131. mod->irq_ready = usbhsf_irq_ready;
  1132. mod->irq_bempsts = 0;
  1133. mod->irq_brdysts = 0;
  1134. cfifo->pipe = NULL;
  1135. usbhs_for_each_dfifo(priv, dfifo, i)
  1136. dfifo->pipe = NULL;
  1137. }
  1138. void usbhs_fifo_quit(struct usbhs_priv *priv)
  1139. {
  1140. struct usbhs_mod *mod = usbhs_mod_get_current(priv);
  1141. mod->irq_empty = NULL;
  1142. mod->irq_ready = NULL;
  1143. mod->irq_bempsts = 0;
  1144. mod->irq_brdysts = 0;
  1145. }
  1146. #define __USBHS_DFIFO_INIT(priv, fifo, channel, fifo_port) \
  1147. do { \
  1148. fifo = usbhsf_get_dnfifo(priv, channel); \
  1149. fifo->name = "D"#channel"FIFO"; \
  1150. fifo->port = fifo_port; \
  1151. fifo->sel = D##channel##FIFOSEL; \
  1152. fifo->ctr = D##channel##FIFOCTR; \
  1153. fifo->tx_slave.shdma_slave.slave_id = \
  1154. usbhs_get_dparam(priv, d##channel##_tx_id); \
  1155. fifo->rx_slave.shdma_slave.slave_id = \
  1156. usbhs_get_dparam(priv, d##channel##_rx_id); \
  1157. usbhsf_dma_init(priv, fifo, channel); \
  1158. } while (0)
  1159. #define USBHS_DFIFO_INIT(priv, fifo, channel) \
  1160. __USBHS_DFIFO_INIT(priv, fifo, channel, D##channel##FIFO)
  1161. #define USBHS_DFIFO_INIT_NO_PORT(priv, fifo, channel) \
  1162. __USBHS_DFIFO_INIT(priv, fifo, channel, 0)
  1163. int usbhs_fifo_probe(struct usbhs_priv *priv)
  1164. {
  1165. struct usbhs_fifo *fifo;
  1166. /* CFIFO */
  1167. fifo = usbhsf_get_cfifo(priv);
  1168. fifo->name = "CFIFO";
  1169. fifo->port = CFIFO;
  1170. fifo->sel = CFIFOSEL;
  1171. fifo->ctr = CFIFOCTR;
  1172. /* DFIFO */
  1173. USBHS_DFIFO_INIT(priv, fifo, 0);
  1174. USBHS_DFIFO_INIT(priv, fifo, 1);
  1175. USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 2);
  1176. USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 3);
  1177. return 0;
  1178. }
  1179. void usbhs_fifo_remove(struct usbhs_priv *priv)
  1180. {
  1181. struct usbhs_fifo *fifo;
  1182. int i;
  1183. usbhs_for_each_dfifo(priv, fifo, i)
  1184. usbhsf_dma_quit(priv, fifo);
  1185. }