phy-mv-usb.c 21 KB

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  1. /*
  2. * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
  3. * Author: Chao Xie <chao.xie@marvell.com>
  4. * Neil Zhang <zhangwm@marvell.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/io.h>
  14. #include <linux/uaccess.h>
  15. #include <linux/device.h>
  16. #include <linux/proc_fs.h>
  17. #include <linux/clk.h>
  18. #include <linux/workqueue.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/usb.h>
  21. #include <linux/usb/ch9.h>
  22. #include <linux/usb/otg.h>
  23. #include <linux/usb/gadget.h>
  24. #include <linux/usb/hcd.h>
  25. #include <linux/platform_data/mv_usb.h>
  26. #include "phy-mv-usb.h"
  27. #define DRIVER_DESC "Marvell USB OTG transceiver driver"
  28. MODULE_DESCRIPTION(DRIVER_DESC);
  29. MODULE_LICENSE("GPL");
  30. static const char driver_name[] = "mv-otg";
  31. static char *state_string[] = {
  32. "undefined",
  33. "b_idle",
  34. "b_srp_init",
  35. "b_peripheral",
  36. "b_wait_acon",
  37. "b_host",
  38. "a_idle",
  39. "a_wait_vrise",
  40. "a_wait_bcon",
  41. "a_host",
  42. "a_suspend",
  43. "a_peripheral",
  44. "a_wait_vfall",
  45. "a_vbus_err"
  46. };
  47. static int mv_otg_set_vbus(struct usb_otg *otg, bool on)
  48. {
  49. struct mv_otg *mvotg = container_of(otg->usb_phy, struct mv_otg, phy);
  50. if (mvotg->pdata->set_vbus == NULL)
  51. return -ENODEV;
  52. return mvotg->pdata->set_vbus(on);
  53. }
  54. static int mv_otg_set_host(struct usb_otg *otg,
  55. struct usb_bus *host)
  56. {
  57. otg->host = host;
  58. return 0;
  59. }
  60. static int mv_otg_set_peripheral(struct usb_otg *otg,
  61. struct usb_gadget *gadget)
  62. {
  63. otg->gadget = gadget;
  64. return 0;
  65. }
  66. static void mv_otg_run_state_machine(struct mv_otg *mvotg,
  67. unsigned long delay)
  68. {
  69. dev_dbg(&mvotg->pdev->dev, "transceiver is updated\n");
  70. if (!mvotg->qwork)
  71. return;
  72. queue_delayed_work(mvotg->qwork, &mvotg->work, delay);
  73. }
  74. static void mv_otg_timer_await_bcon(unsigned long data)
  75. {
  76. struct mv_otg *mvotg = (struct mv_otg *) data;
  77. mvotg->otg_ctrl.a_wait_bcon_timeout = 1;
  78. dev_info(&mvotg->pdev->dev, "B Device No Response!\n");
  79. if (spin_trylock(&mvotg->wq_lock)) {
  80. mv_otg_run_state_machine(mvotg, 0);
  81. spin_unlock(&mvotg->wq_lock);
  82. }
  83. }
  84. static int mv_otg_cancel_timer(struct mv_otg *mvotg, unsigned int id)
  85. {
  86. struct timer_list *timer;
  87. if (id >= OTG_TIMER_NUM)
  88. return -EINVAL;
  89. timer = &mvotg->otg_ctrl.timer[id];
  90. if (timer_pending(timer))
  91. del_timer(timer);
  92. return 0;
  93. }
  94. static int mv_otg_set_timer(struct mv_otg *mvotg, unsigned int id,
  95. unsigned long interval,
  96. void (*callback) (unsigned long))
  97. {
  98. struct timer_list *timer;
  99. if (id >= OTG_TIMER_NUM)
  100. return -EINVAL;
  101. timer = &mvotg->otg_ctrl.timer[id];
  102. if (timer_pending(timer)) {
  103. dev_err(&mvotg->pdev->dev, "Timer%d is already running\n", id);
  104. return -EBUSY;
  105. }
  106. init_timer(timer);
  107. timer->data = (unsigned long) mvotg;
  108. timer->function = callback;
  109. timer->expires = jiffies + interval;
  110. add_timer(timer);
  111. return 0;
  112. }
  113. static int mv_otg_reset(struct mv_otg *mvotg)
  114. {
  115. unsigned int loops;
  116. u32 tmp;
  117. /* Stop the controller */
  118. tmp = readl(&mvotg->op_regs->usbcmd);
  119. tmp &= ~USBCMD_RUN_STOP;
  120. writel(tmp, &mvotg->op_regs->usbcmd);
  121. /* Reset the controller to get default values */
  122. writel(USBCMD_CTRL_RESET, &mvotg->op_regs->usbcmd);
  123. loops = 500;
  124. while (readl(&mvotg->op_regs->usbcmd) & USBCMD_CTRL_RESET) {
  125. if (loops == 0) {
  126. dev_err(&mvotg->pdev->dev,
  127. "Wait for RESET completed TIMEOUT\n");
  128. return -ETIMEDOUT;
  129. }
  130. loops--;
  131. udelay(20);
  132. }
  133. writel(0x0, &mvotg->op_regs->usbintr);
  134. tmp = readl(&mvotg->op_regs->usbsts);
  135. writel(tmp, &mvotg->op_regs->usbsts);
  136. return 0;
  137. }
  138. static void mv_otg_init_irq(struct mv_otg *mvotg)
  139. {
  140. u32 otgsc;
  141. mvotg->irq_en = OTGSC_INTR_A_SESSION_VALID
  142. | OTGSC_INTR_A_VBUS_VALID;
  143. mvotg->irq_status = OTGSC_INTSTS_A_SESSION_VALID
  144. | OTGSC_INTSTS_A_VBUS_VALID;
  145. if (mvotg->pdata->vbus == NULL) {
  146. mvotg->irq_en |= OTGSC_INTR_B_SESSION_VALID
  147. | OTGSC_INTR_B_SESSION_END;
  148. mvotg->irq_status |= OTGSC_INTSTS_B_SESSION_VALID
  149. | OTGSC_INTSTS_B_SESSION_END;
  150. }
  151. if (mvotg->pdata->id == NULL) {
  152. mvotg->irq_en |= OTGSC_INTR_USB_ID;
  153. mvotg->irq_status |= OTGSC_INTSTS_USB_ID;
  154. }
  155. otgsc = readl(&mvotg->op_regs->otgsc);
  156. otgsc |= mvotg->irq_en;
  157. writel(otgsc, &mvotg->op_regs->otgsc);
  158. }
  159. static void mv_otg_start_host(struct mv_otg *mvotg, int on)
  160. {
  161. #ifdef CONFIG_USB
  162. struct usb_otg *otg = mvotg->phy.otg;
  163. struct usb_hcd *hcd;
  164. if (!otg->host)
  165. return;
  166. dev_info(&mvotg->pdev->dev, "%s host\n", on ? "start" : "stop");
  167. hcd = bus_to_hcd(otg->host);
  168. if (on) {
  169. usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
  170. device_wakeup_enable(hcd->self.controller);
  171. } else {
  172. usb_remove_hcd(hcd);
  173. }
  174. #endif /* CONFIG_USB */
  175. }
  176. static void mv_otg_start_periphrals(struct mv_otg *mvotg, int on)
  177. {
  178. struct usb_otg *otg = mvotg->phy.otg;
  179. if (!otg->gadget)
  180. return;
  181. dev_info(mvotg->phy.dev, "gadget %s\n", on ? "on" : "off");
  182. if (on)
  183. usb_gadget_vbus_connect(otg->gadget);
  184. else
  185. usb_gadget_vbus_disconnect(otg->gadget);
  186. }
  187. static void otg_clock_enable(struct mv_otg *mvotg)
  188. {
  189. clk_prepare_enable(mvotg->clk);
  190. }
  191. static void otg_clock_disable(struct mv_otg *mvotg)
  192. {
  193. clk_disable_unprepare(mvotg->clk);
  194. }
  195. static int mv_otg_enable_internal(struct mv_otg *mvotg)
  196. {
  197. int retval = 0;
  198. if (mvotg->active)
  199. return 0;
  200. dev_dbg(&mvotg->pdev->dev, "otg enabled\n");
  201. otg_clock_enable(mvotg);
  202. if (mvotg->pdata->phy_init) {
  203. retval = mvotg->pdata->phy_init(mvotg->phy_regs);
  204. if (retval) {
  205. dev_err(&mvotg->pdev->dev,
  206. "init phy error %d\n", retval);
  207. otg_clock_disable(mvotg);
  208. return retval;
  209. }
  210. }
  211. mvotg->active = 1;
  212. return 0;
  213. }
  214. static int mv_otg_enable(struct mv_otg *mvotg)
  215. {
  216. if (mvotg->clock_gating)
  217. return mv_otg_enable_internal(mvotg);
  218. return 0;
  219. }
  220. static void mv_otg_disable_internal(struct mv_otg *mvotg)
  221. {
  222. if (mvotg->active) {
  223. dev_dbg(&mvotg->pdev->dev, "otg disabled\n");
  224. if (mvotg->pdata->phy_deinit)
  225. mvotg->pdata->phy_deinit(mvotg->phy_regs);
  226. otg_clock_disable(mvotg);
  227. mvotg->active = 0;
  228. }
  229. }
  230. static void mv_otg_disable(struct mv_otg *mvotg)
  231. {
  232. if (mvotg->clock_gating)
  233. mv_otg_disable_internal(mvotg);
  234. }
  235. static void mv_otg_update_inputs(struct mv_otg *mvotg)
  236. {
  237. struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
  238. u32 otgsc;
  239. otgsc = readl(&mvotg->op_regs->otgsc);
  240. if (mvotg->pdata->vbus) {
  241. if (mvotg->pdata->vbus->poll() == VBUS_HIGH) {
  242. otg_ctrl->b_sess_vld = 1;
  243. otg_ctrl->b_sess_end = 0;
  244. } else {
  245. otg_ctrl->b_sess_vld = 0;
  246. otg_ctrl->b_sess_end = 1;
  247. }
  248. } else {
  249. otg_ctrl->b_sess_vld = !!(otgsc & OTGSC_STS_B_SESSION_VALID);
  250. otg_ctrl->b_sess_end = !!(otgsc & OTGSC_STS_B_SESSION_END);
  251. }
  252. if (mvotg->pdata->id)
  253. otg_ctrl->id = !!mvotg->pdata->id->poll();
  254. else
  255. otg_ctrl->id = !!(otgsc & OTGSC_STS_USB_ID);
  256. if (mvotg->pdata->otg_force_a_bus_req && !otg_ctrl->id)
  257. otg_ctrl->a_bus_req = 1;
  258. otg_ctrl->a_sess_vld = !!(otgsc & OTGSC_STS_A_SESSION_VALID);
  259. otg_ctrl->a_vbus_vld = !!(otgsc & OTGSC_STS_A_VBUS_VALID);
  260. dev_dbg(&mvotg->pdev->dev, "%s: ", __func__);
  261. dev_dbg(&mvotg->pdev->dev, "id %d\n", otg_ctrl->id);
  262. dev_dbg(&mvotg->pdev->dev, "b_sess_vld %d\n", otg_ctrl->b_sess_vld);
  263. dev_dbg(&mvotg->pdev->dev, "b_sess_end %d\n", otg_ctrl->b_sess_end);
  264. dev_dbg(&mvotg->pdev->dev, "a_vbus_vld %d\n", otg_ctrl->a_vbus_vld);
  265. dev_dbg(&mvotg->pdev->dev, "a_sess_vld %d\n", otg_ctrl->a_sess_vld);
  266. }
  267. static void mv_otg_update_state(struct mv_otg *mvotg)
  268. {
  269. struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
  270. int old_state = mvotg->phy.otg->state;
  271. switch (old_state) {
  272. case OTG_STATE_UNDEFINED:
  273. mvotg->phy.otg->state = OTG_STATE_B_IDLE;
  274. /* FALL THROUGH */
  275. case OTG_STATE_B_IDLE:
  276. if (otg_ctrl->id == 0)
  277. mvotg->phy.otg->state = OTG_STATE_A_IDLE;
  278. else if (otg_ctrl->b_sess_vld)
  279. mvotg->phy.otg->state = OTG_STATE_B_PERIPHERAL;
  280. break;
  281. case OTG_STATE_B_PERIPHERAL:
  282. if (!otg_ctrl->b_sess_vld || otg_ctrl->id == 0)
  283. mvotg->phy.otg->state = OTG_STATE_B_IDLE;
  284. break;
  285. case OTG_STATE_A_IDLE:
  286. if (otg_ctrl->id)
  287. mvotg->phy.otg->state = OTG_STATE_B_IDLE;
  288. else if (!(otg_ctrl->a_bus_drop) &&
  289. (otg_ctrl->a_bus_req || otg_ctrl->a_srp_det))
  290. mvotg->phy.otg->state = OTG_STATE_A_WAIT_VRISE;
  291. break;
  292. case OTG_STATE_A_WAIT_VRISE:
  293. if (otg_ctrl->a_vbus_vld)
  294. mvotg->phy.otg->state = OTG_STATE_A_WAIT_BCON;
  295. break;
  296. case OTG_STATE_A_WAIT_BCON:
  297. if (otg_ctrl->id || otg_ctrl->a_bus_drop
  298. || otg_ctrl->a_wait_bcon_timeout) {
  299. mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
  300. mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
  301. mvotg->phy.otg->state = OTG_STATE_A_WAIT_VFALL;
  302. otg_ctrl->a_bus_req = 0;
  303. } else if (!otg_ctrl->a_vbus_vld) {
  304. mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
  305. mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
  306. mvotg->phy.otg->state = OTG_STATE_A_VBUS_ERR;
  307. } else if (otg_ctrl->b_conn) {
  308. mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
  309. mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
  310. mvotg->phy.otg->state = OTG_STATE_A_HOST;
  311. }
  312. break;
  313. case OTG_STATE_A_HOST:
  314. if (otg_ctrl->id || !otg_ctrl->b_conn
  315. || otg_ctrl->a_bus_drop)
  316. mvotg->phy.otg->state = OTG_STATE_A_WAIT_BCON;
  317. else if (!otg_ctrl->a_vbus_vld)
  318. mvotg->phy.otg->state = OTG_STATE_A_VBUS_ERR;
  319. break;
  320. case OTG_STATE_A_WAIT_VFALL:
  321. if (otg_ctrl->id
  322. || (!otg_ctrl->b_conn && otg_ctrl->a_sess_vld)
  323. || otg_ctrl->a_bus_req)
  324. mvotg->phy.otg->state = OTG_STATE_A_IDLE;
  325. break;
  326. case OTG_STATE_A_VBUS_ERR:
  327. if (otg_ctrl->id || otg_ctrl->a_clr_err
  328. || otg_ctrl->a_bus_drop) {
  329. otg_ctrl->a_clr_err = 0;
  330. mvotg->phy.otg->state = OTG_STATE_A_WAIT_VFALL;
  331. }
  332. break;
  333. default:
  334. break;
  335. }
  336. }
  337. static void mv_otg_work(struct work_struct *work)
  338. {
  339. struct mv_otg *mvotg;
  340. struct usb_phy *phy;
  341. struct usb_otg *otg;
  342. int old_state;
  343. mvotg = container_of(to_delayed_work(work), struct mv_otg, work);
  344. run:
  345. /* work queue is single thread, or we need spin_lock to protect */
  346. phy = &mvotg->phy;
  347. otg = mvotg->phy.otg;
  348. old_state = otg->state;
  349. if (!mvotg->active)
  350. return;
  351. mv_otg_update_inputs(mvotg);
  352. mv_otg_update_state(mvotg);
  353. if (old_state != mvotg->phy.otg->state) {
  354. dev_info(&mvotg->pdev->dev, "change from state %s to %s\n",
  355. state_string[old_state],
  356. state_string[mvotg->phy.otg->state]);
  357. switch (mvotg->phy.otg->state) {
  358. case OTG_STATE_B_IDLE:
  359. otg->default_a = 0;
  360. if (old_state == OTG_STATE_B_PERIPHERAL)
  361. mv_otg_start_periphrals(mvotg, 0);
  362. mv_otg_reset(mvotg);
  363. mv_otg_disable(mvotg);
  364. usb_phy_set_event(&mvotg->phy, USB_EVENT_NONE);
  365. break;
  366. case OTG_STATE_B_PERIPHERAL:
  367. mv_otg_enable(mvotg);
  368. mv_otg_start_periphrals(mvotg, 1);
  369. usb_phy_set_event(&mvotg->phy, USB_EVENT_ENUMERATED);
  370. break;
  371. case OTG_STATE_A_IDLE:
  372. otg->default_a = 1;
  373. mv_otg_enable(mvotg);
  374. if (old_state == OTG_STATE_A_WAIT_VFALL)
  375. mv_otg_start_host(mvotg, 0);
  376. mv_otg_reset(mvotg);
  377. break;
  378. case OTG_STATE_A_WAIT_VRISE:
  379. mv_otg_set_vbus(otg, 1);
  380. break;
  381. case OTG_STATE_A_WAIT_BCON:
  382. if (old_state != OTG_STATE_A_HOST)
  383. mv_otg_start_host(mvotg, 1);
  384. mv_otg_set_timer(mvotg, A_WAIT_BCON_TIMER,
  385. T_A_WAIT_BCON,
  386. mv_otg_timer_await_bcon);
  387. /*
  388. * Now, we directly enter A_HOST. So set b_conn = 1
  389. * here. In fact, it need host driver to notify us.
  390. */
  391. mvotg->otg_ctrl.b_conn = 1;
  392. break;
  393. case OTG_STATE_A_HOST:
  394. break;
  395. case OTG_STATE_A_WAIT_VFALL:
  396. /*
  397. * Now, we has exited A_HOST. So set b_conn = 0
  398. * here. In fact, it need host driver to notify us.
  399. */
  400. mvotg->otg_ctrl.b_conn = 0;
  401. mv_otg_set_vbus(otg, 0);
  402. break;
  403. case OTG_STATE_A_VBUS_ERR:
  404. break;
  405. default:
  406. break;
  407. }
  408. goto run;
  409. }
  410. }
  411. static irqreturn_t mv_otg_irq(int irq, void *dev)
  412. {
  413. struct mv_otg *mvotg = dev;
  414. u32 otgsc;
  415. otgsc = readl(&mvotg->op_regs->otgsc);
  416. writel(otgsc, &mvotg->op_regs->otgsc);
  417. /*
  418. * if we have vbus, then the vbus detection for B-device
  419. * will be done by mv_otg_inputs_irq().
  420. */
  421. if (mvotg->pdata->vbus)
  422. if ((otgsc & OTGSC_STS_USB_ID) &&
  423. !(otgsc & OTGSC_INTSTS_USB_ID))
  424. return IRQ_NONE;
  425. if ((otgsc & mvotg->irq_status) == 0)
  426. return IRQ_NONE;
  427. mv_otg_run_state_machine(mvotg, 0);
  428. return IRQ_HANDLED;
  429. }
  430. static irqreturn_t mv_otg_inputs_irq(int irq, void *dev)
  431. {
  432. struct mv_otg *mvotg = dev;
  433. /* The clock may disabled at this time */
  434. if (!mvotg->active) {
  435. mv_otg_enable(mvotg);
  436. mv_otg_init_irq(mvotg);
  437. }
  438. mv_otg_run_state_machine(mvotg, 0);
  439. return IRQ_HANDLED;
  440. }
  441. static ssize_t
  442. get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
  443. {
  444. struct mv_otg *mvotg = dev_get_drvdata(dev);
  445. return scnprintf(buf, PAGE_SIZE, "%d\n",
  446. mvotg->otg_ctrl.a_bus_req);
  447. }
  448. static ssize_t
  449. set_a_bus_req(struct device *dev, struct device_attribute *attr,
  450. const char *buf, size_t count)
  451. {
  452. struct mv_otg *mvotg = dev_get_drvdata(dev);
  453. if (count > 2)
  454. return -1;
  455. /* We will use this interface to change to A device */
  456. if (mvotg->phy.otg->state != OTG_STATE_B_IDLE
  457. && mvotg->phy.otg->state != OTG_STATE_A_IDLE)
  458. return -1;
  459. /* The clock may disabled and we need to set irq for ID detected */
  460. mv_otg_enable(mvotg);
  461. mv_otg_init_irq(mvotg);
  462. if (buf[0] == '1') {
  463. mvotg->otg_ctrl.a_bus_req = 1;
  464. mvotg->otg_ctrl.a_bus_drop = 0;
  465. dev_dbg(&mvotg->pdev->dev,
  466. "User request: a_bus_req = 1\n");
  467. if (spin_trylock(&mvotg->wq_lock)) {
  468. mv_otg_run_state_machine(mvotg, 0);
  469. spin_unlock(&mvotg->wq_lock);
  470. }
  471. }
  472. return count;
  473. }
  474. static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req,
  475. set_a_bus_req);
  476. static ssize_t
  477. set_a_clr_err(struct device *dev, struct device_attribute *attr,
  478. const char *buf, size_t count)
  479. {
  480. struct mv_otg *mvotg = dev_get_drvdata(dev);
  481. if (!mvotg->phy.otg->default_a)
  482. return -1;
  483. if (count > 2)
  484. return -1;
  485. if (buf[0] == '1') {
  486. mvotg->otg_ctrl.a_clr_err = 1;
  487. dev_dbg(&mvotg->pdev->dev,
  488. "User request: a_clr_err = 1\n");
  489. }
  490. if (spin_trylock(&mvotg->wq_lock)) {
  491. mv_otg_run_state_machine(mvotg, 0);
  492. spin_unlock(&mvotg->wq_lock);
  493. }
  494. return count;
  495. }
  496. static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err);
  497. static ssize_t
  498. get_a_bus_drop(struct device *dev, struct device_attribute *attr,
  499. char *buf)
  500. {
  501. struct mv_otg *mvotg = dev_get_drvdata(dev);
  502. return scnprintf(buf, PAGE_SIZE, "%d\n",
  503. mvotg->otg_ctrl.a_bus_drop);
  504. }
  505. static ssize_t
  506. set_a_bus_drop(struct device *dev, struct device_attribute *attr,
  507. const char *buf, size_t count)
  508. {
  509. struct mv_otg *mvotg = dev_get_drvdata(dev);
  510. if (!mvotg->phy.otg->default_a)
  511. return -1;
  512. if (count > 2)
  513. return -1;
  514. if (buf[0] == '0') {
  515. mvotg->otg_ctrl.a_bus_drop = 0;
  516. dev_dbg(&mvotg->pdev->dev,
  517. "User request: a_bus_drop = 0\n");
  518. } else if (buf[0] == '1') {
  519. mvotg->otg_ctrl.a_bus_drop = 1;
  520. mvotg->otg_ctrl.a_bus_req = 0;
  521. dev_dbg(&mvotg->pdev->dev,
  522. "User request: a_bus_drop = 1\n");
  523. dev_dbg(&mvotg->pdev->dev,
  524. "User request: and a_bus_req = 0\n");
  525. }
  526. if (spin_trylock(&mvotg->wq_lock)) {
  527. mv_otg_run_state_machine(mvotg, 0);
  528. spin_unlock(&mvotg->wq_lock);
  529. }
  530. return count;
  531. }
  532. static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR,
  533. get_a_bus_drop, set_a_bus_drop);
  534. static struct attribute *inputs_attrs[] = {
  535. &dev_attr_a_bus_req.attr,
  536. &dev_attr_a_clr_err.attr,
  537. &dev_attr_a_bus_drop.attr,
  538. NULL,
  539. };
  540. static const struct attribute_group inputs_attr_group = {
  541. .name = "inputs",
  542. .attrs = inputs_attrs,
  543. };
  544. static int mv_otg_remove(struct platform_device *pdev)
  545. {
  546. struct mv_otg *mvotg = platform_get_drvdata(pdev);
  547. sysfs_remove_group(&mvotg->pdev->dev.kobj, &inputs_attr_group);
  548. if (mvotg->qwork) {
  549. flush_workqueue(mvotg->qwork);
  550. destroy_workqueue(mvotg->qwork);
  551. }
  552. mv_otg_disable(mvotg);
  553. usb_remove_phy(&mvotg->phy);
  554. return 0;
  555. }
  556. static int mv_otg_probe(struct platform_device *pdev)
  557. {
  558. struct mv_usb_platform_data *pdata = dev_get_platdata(&pdev->dev);
  559. struct mv_otg *mvotg;
  560. struct usb_otg *otg;
  561. struct resource *r;
  562. int retval = 0, i;
  563. if (pdata == NULL) {
  564. dev_err(&pdev->dev, "failed to get platform data\n");
  565. return -ENODEV;
  566. }
  567. mvotg = devm_kzalloc(&pdev->dev, sizeof(*mvotg), GFP_KERNEL);
  568. if (!mvotg)
  569. return -ENOMEM;
  570. otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL);
  571. if (!otg)
  572. return -ENOMEM;
  573. platform_set_drvdata(pdev, mvotg);
  574. mvotg->pdev = pdev;
  575. mvotg->pdata = pdata;
  576. mvotg->clk = devm_clk_get(&pdev->dev, NULL);
  577. if (IS_ERR(mvotg->clk))
  578. return PTR_ERR(mvotg->clk);
  579. mvotg->qwork = create_singlethread_workqueue("mv_otg_queue");
  580. if (!mvotg->qwork) {
  581. dev_dbg(&pdev->dev, "cannot create workqueue for OTG\n");
  582. return -ENOMEM;
  583. }
  584. INIT_DELAYED_WORK(&mvotg->work, mv_otg_work);
  585. /* OTG common part */
  586. mvotg->pdev = pdev;
  587. mvotg->phy.dev = &pdev->dev;
  588. mvotg->phy.otg = otg;
  589. mvotg->phy.label = driver_name;
  590. otg->state = OTG_STATE_UNDEFINED;
  591. otg->usb_phy = &mvotg->phy;
  592. otg->set_host = mv_otg_set_host;
  593. otg->set_peripheral = mv_otg_set_peripheral;
  594. otg->set_vbus = mv_otg_set_vbus;
  595. for (i = 0; i < OTG_TIMER_NUM; i++)
  596. init_timer(&mvotg->otg_ctrl.timer[i]);
  597. r = platform_get_resource_byname(mvotg->pdev,
  598. IORESOURCE_MEM, "phyregs");
  599. if (r == NULL) {
  600. dev_err(&pdev->dev, "no phy I/O memory resource defined\n");
  601. retval = -ENODEV;
  602. goto err_destroy_workqueue;
  603. }
  604. mvotg->phy_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
  605. if (mvotg->phy_regs == NULL) {
  606. dev_err(&pdev->dev, "failed to map phy I/O memory\n");
  607. retval = -EFAULT;
  608. goto err_destroy_workqueue;
  609. }
  610. r = platform_get_resource_byname(mvotg->pdev,
  611. IORESOURCE_MEM, "capregs");
  612. if (r == NULL) {
  613. dev_err(&pdev->dev, "no I/O memory resource defined\n");
  614. retval = -ENODEV;
  615. goto err_destroy_workqueue;
  616. }
  617. mvotg->cap_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
  618. if (mvotg->cap_regs == NULL) {
  619. dev_err(&pdev->dev, "failed to map I/O memory\n");
  620. retval = -EFAULT;
  621. goto err_destroy_workqueue;
  622. }
  623. /* we will acces controller register, so enable the udc controller */
  624. retval = mv_otg_enable_internal(mvotg);
  625. if (retval) {
  626. dev_err(&pdev->dev, "mv otg enable error %d\n", retval);
  627. goto err_destroy_workqueue;
  628. }
  629. mvotg->op_regs =
  630. (struct mv_otg_regs __iomem *) ((unsigned long) mvotg->cap_regs
  631. + (readl(mvotg->cap_regs) & CAPLENGTH_MASK));
  632. if (pdata->id) {
  633. retval = devm_request_threaded_irq(&pdev->dev, pdata->id->irq,
  634. NULL, mv_otg_inputs_irq,
  635. IRQF_ONESHOT, "id", mvotg);
  636. if (retval) {
  637. dev_info(&pdev->dev,
  638. "Failed to request irq for ID\n");
  639. pdata->id = NULL;
  640. }
  641. }
  642. if (pdata->vbus) {
  643. mvotg->clock_gating = 1;
  644. retval = devm_request_threaded_irq(&pdev->dev, pdata->vbus->irq,
  645. NULL, mv_otg_inputs_irq,
  646. IRQF_ONESHOT, "vbus", mvotg);
  647. if (retval) {
  648. dev_info(&pdev->dev,
  649. "Failed to request irq for VBUS, "
  650. "disable clock gating\n");
  651. mvotg->clock_gating = 0;
  652. pdata->vbus = NULL;
  653. }
  654. }
  655. if (pdata->disable_otg_clock_gating)
  656. mvotg->clock_gating = 0;
  657. mv_otg_reset(mvotg);
  658. mv_otg_init_irq(mvotg);
  659. r = platform_get_resource(mvotg->pdev, IORESOURCE_IRQ, 0);
  660. if (r == NULL) {
  661. dev_err(&pdev->dev, "no IRQ resource defined\n");
  662. retval = -ENODEV;
  663. goto err_disable_clk;
  664. }
  665. mvotg->irq = r->start;
  666. if (devm_request_irq(&pdev->dev, mvotg->irq, mv_otg_irq, IRQF_SHARED,
  667. driver_name, mvotg)) {
  668. dev_err(&pdev->dev, "Request irq %d for OTG failed\n",
  669. mvotg->irq);
  670. mvotg->irq = 0;
  671. retval = -ENODEV;
  672. goto err_disable_clk;
  673. }
  674. retval = usb_add_phy(&mvotg->phy, USB_PHY_TYPE_USB2);
  675. if (retval < 0) {
  676. dev_err(&pdev->dev, "can't register transceiver, %d\n",
  677. retval);
  678. goto err_disable_clk;
  679. }
  680. retval = sysfs_create_group(&pdev->dev.kobj, &inputs_attr_group);
  681. if (retval < 0) {
  682. dev_dbg(&pdev->dev,
  683. "Can't register sysfs attr group: %d\n", retval);
  684. goto err_remove_phy;
  685. }
  686. spin_lock_init(&mvotg->wq_lock);
  687. if (spin_trylock(&mvotg->wq_lock)) {
  688. mv_otg_run_state_machine(mvotg, 2 * HZ);
  689. spin_unlock(&mvotg->wq_lock);
  690. }
  691. dev_info(&pdev->dev,
  692. "successful probe OTG device %s clock gating.\n",
  693. mvotg->clock_gating ? "with" : "without");
  694. return 0;
  695. err_remove_phy:
  696. usb_remove_phy(&mvotg->phy);
  697. err_disable_clk:
  698. mv_otg_disable_internal(mvotg);
  699. err_destroy_workqueue:
  700. flush_workqueue(mvotg->qwork);
  701. destroy_workqueue(mvotg->qwork);
  702. return retval;
  703. }
  704. #ifdef CONFIG_PM
  705. static int mv_otg_suspend(struct platform_device *pdev, pm_message_t state)
  706. {
  707. struct mv_otg *mvotg = platform_get_drvdata(pdev);
  708. if (mvotg->phy.otg->state != OTG_STATE_B_IDLE) {
  709. dev_info(&pdev->dev,
  710. "OTG state is not B_IDLE, it is %d!\n",
  711. mvotg->phy.otg->state);
  712. return -EAGAIN;
  713. }
  714. if (!mvotg->clock_gating)
  715. mv_otg_disable_internal(mvotg);
  716. return 0;
  717. }
  718. static int mv_otg_resume(struct platform_device *pdev)
  719. {
  720. struct mv_otg *mvotg = platform_get_drvdata(pdev);
  721. u32 otgsc;
  722. if (!mvotg->clock_gating) {
  723. mv_otg_enable_internal(mvotg);
  724. otgsc = readl(&mvotg->op_regs->otgsc);
  725. otgsc |= mvotg->irq_en;
  726. writel(otgsc, &mvotg->op_regs->otgsc);
  727. if (spin_trylock(&mvotg->wq_lock)) {
  728. mv_otg_run_state_machine(mvotg, 0);
  729. spin_unlock(&mvotg->wq_lock);
  730. }
  731. }
  732. return 0;
  733. }
  734. #endif
  735. static struct platform_driver mv_otg_driver = {
  736. .probe = mv_otg_probe,
  737. .remove = mv_otg_remove,
  738. .driver = {
  739. .name = driver_name,
  740. },
  741. #ifdef CONFIG_PM
  742. .suspend = mv_otg_suspend,
  743. .resume = mv_otg_resume,
  744. #endif
  745. };
  746. module_platform_driver(mv_otg_driver);