phy-fsl-usb.c 28 KB

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  1. /*
  2. * Copyright (C) 2007,2008 Freescale semiconductor, Inc.
  3. *
  4. * Author: Li Yang <LeoLi@freescale.com>
  5. * Jerry Huang <Chang-Ming.Huang@freescale.com>
  6. *
  7. * Initialization based on code from Shlomi Gridish.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along
  20. * with this program; if not, write to the Free Software Foundation, Inc.,
  21. * 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/kernel.h>
  25. #include <linux/delay.h>
  26. #include <linux/slab.h>
  27. #include <linux/proc_fs.h>
  28. #include <linux/errno.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/io.h>
  31. #include <linux/timer.h>
  32. #include <linux/usb.h>
  33. #include <linux/device.h>
  34. #include <linux/usb/ch9.h>
  35. #include <linux/usb/gadget.h>
  36. #include <linux/workqueue.h>
  37. #include <linux/time.h>
  38. #include <linux/fsl_devices.h>
  39. #include <linux/platform_device.h>
  40. #include <linux/uaccess.h>
  41. #include <asm/unaligned.h>
  42. #include "phy-fsl-usb.h"
  43. #ifdef VERBOSE
  44. #define VDBG(fmt, args...) pr_debug("[%s] " fmt, \
  45. __func__, ## args)
  46. #else
  47. #define VDBG(stuff...) do {} while (0)
  48. #endif
  49. #define DRIVER_VERSION "Rev. 1.55"
  50. #define DRIVER_AUTHOR "Jerry Huang/Li Yang"
  51. #define DRIVER_DESC "Freescale USB OTG Transceiver Driver"
  52. #define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
  53. static const char driver_name[] = "fsl-usb2-otg";
  54. const pm_message_t otg_suspend_state = {
  55. .event = 1,
  56. };
  57. #define HA_DATA_PULSE
  58. static struct usb_dr_mmap *usb_dr_regs;
  59. static struct fsl_otg *fsl_otg_dev;
  60. static int srp_wait_done;
  61. /* FSM timers */
  62. struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr,
  63. *b_ase0_brst_tmr, *b_se0_srp_tmr;
  64. /* Driver specific timers */
  65. struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr,
  66. *b_srp_wait_tmr, *a_wait_enum_tmr;
  67. static struct list_head active_timers;
  68. static struct fsl_otg_config fsl_otg_initdata = {
  69. .otg_port = 1,
  70. };
  71. #ifdef CONFIG_PPC32
  72. static u32 _fsl_readl_be(const unsigned __iomem *p)
  73. {
  74. return in_be32(p);
  75. }
  76. static u32 _fsl_readl_le(const unsigned __iomem *p)
  77. {
  78. return in_le32(p);
  79. }
  80. static void _fsl_writel_be(u32 v, unsigned __iomem *p)
  81. {
  82. out_be32(p, v);
  83. }
  84. static void _fsl_writel_le(u32 v, unsigned __iomem *p)
  85. {
  86. out_le32(p, v);
  87. }
  88. static u32 (*_fsl_readl)(const unsigned __iomem *p);
  89. static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
  90. #define fsl_readl(p) (*_fsl_readl)((p))
  91. #define fsl_writel(v, p) (*_fsl_writel)((v), (p))
  92. #else
  93. #define fsl_readl(addr) readl(addr)
  94. #define fsl_writel(val, addr) writel(val, addr)
  95. #endif /* CONFIG_PPC32 */
  96. int write_ulpi(u8 addr, u8 data)
  97. {
  98. u32 temp;
  99. temp = 0x60000000 | (addr << 16) | data;
  100. fsl_writel(temp, &usb_dr_regs->ulpiview);
  101. return 0;
  102. }
  103. /* -------------------------------------------------------------*/
  104. /* Operations that will be called from OTG Finite State Machine */
  105. /* Charge vbus for vbus pulsing in SRP */
  106. void fsl_otg_chrg_vbus(struct otg_fsm *fsm, int on)
  107. {
  108. u32 tmp;
  109. tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
  110. if (on)
  111. /* stop discharging, start charging */
  112. tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) |
  113. OTGSC_CTRL_VBUS_CHARGE;
  114. else
  115. /* stop charging */
  116. tmp &= ~OTGSC_CTRL_VBUS_CHARGE;
  117. fsl_writel(tmp, &usb_dr_regs->otgsc);
  118. }
  119. /* Discharge vbus through a resistor to ground */
  120. void fsl_otg_dischrg_vbus(int on)
  121. {
  122. u32 tmp;
  123. tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
  124. if (on)
  125. /* stop charging, start discharging */
  126. tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) |
  127. OTGSC_CTRL_VBUS_DISCHARGE;
  128. else
  129. /* stop discharging */
  130. tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE;
  131. fsl_writel(tmp, &usb_dr_regs->otgsc);
  132. }
  133. /* A-device driver vbus, controlled through PP bit in PORTSC */
  134. void fsl_otg_drv_vbus(struct otg_fsm *fsm, int on)
  135. {
  136. u32 tmp;
  137. if (on) {
  138. tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS;
  139. fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc);
  140. } else {
  141. tmp = fsl_readl(&usb_dr_regs->portsc) &
  142. ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER;
  143. fsl_writel(tmp, &usb_dr_regs->portsc);
  144. }
  145. }
  146. /*
  147. * Pull-up D+, signalling connect by periperal. Also used in
  148. * data-line pulsing in SRP
  149. */
  150. void fsl_otg_loc_conn(struct otg_fsm *fsm, int on)
  151. {
  152. u32 tmp;
  153. tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
  154. if (on)
  155. tmp |= OTGSC_CTRL_DATA_PULSING;
  156. else
  157. tmp &= ~OTGSC_CTRL_DATA_PULSING;
  158. fsl_writel(tmp, &usb_dr_regs->otgsc);
  159. }
  160. /*
  161. * Generate SOF by host. This is controlled through suspend/resume the
  162. * port. In host mode, controller will automatically send SOF.
  163. * Suspend will block the data on the port.
  164. */
  165. void fsl_otg_loc_sof(struct otg_fsm *fsm, int on)
  166. {
  167. u32 tmp;
  168. tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS;
  169. if (on)
  170. tmp |= PORTSC_PORT_FORCE_RESUME;
  171. else
  172. tmp |= PORTSC_PORT_SUSPEND;
  173. fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc);
  174. }
  175. /* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */
  176. void fsl_otg_start_pulse(struct otg_fsm *fsm)
  177. {
  178. u32 tmp;
  179. srp_wait_done = 0;
  180. #ifdef HA_DATA_PULSE
  181. tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
  182. tmp |= OTGSC_HA_DATA_PULSE;
  183. fsl_writel(tmp, &usb_dr_regs->otgsc);
  184. #else
  185. fsl_otg_loc_conn(1);
  186. #endif
  187. fsl_otg_add_timer(fsm, b_data_pulse_tmr);
  188. }
  189. void b_data_pulse_end(unsigned long foo)
  190. {
  191. #ifdef HA_DATA_PULSE
  192. #else
  193. fsl_otg_loc_conn(0);
  194. #endif
  195. /* Do VBUS pulse after data pulse */
  196. fsl_otg_pulse_vbus();
  197. }
  198. void fsl_otg_pulse_vbus(void)
  199. {
  200. srp_wait_done = 0;
  201. fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 1);
  202. /* start the timer to end vbus charge */
  203. fsl_otg_add_timer(&fsl_otg_dev->fsm, b_vbus_pulse_tmr);
  204. }
  205. void b_vbus_pulse_end(unsigned long foo)
  206. {
  207. fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 0);
  208. /*
  209. * As USB3300 using the same a_sess_vld and b_sess_vld voltage
  210. * we need to discharge the bus for a while to distinguish
  211. * residual voltage of vbus pulsing and A device pull up
  212. */
  213. fsl_otg_dischrg_vbus(1);
  214. fsl_otg_add_timer(&fsl_otg_dev->fsm, b_srp_wait_tmr);
  215. }
  216. void b_srp_end(unsigned long foo)
  217. {
  218. fsl_otg_dischrg_vbus(0);
  219. srp_wait_done = 1;
  220. if ((fsl_otg_dev->phy.otg->state == OTG_STATE_B_SRP_INIT) &&
  221. fsl_otg_dev->fsm.b_sess_vld)
  222. fsl_otg_dev->fsm.b_srp_done = 1;
  223. }
  224. /*
  225. * Workaround for a_host suspending too fast. When a_bus_req=0,
  226. * a_host will start by SRP. It needs to set b_hnp_enable before
  227. * actually suspending to start HNP
  228. */
  229. void a_wait_enum(unsigned long foo)
  230. {
  231. VDBG("a_wait_enum timeout\n");
  232. if (!fsl_otg_dev->phy.otg->host->b_hnp_enable)
  233. fsl_otg_add_timer(&fsl_otg_dev->fsm, a_wait_enum_tmr);
  234. else
  235. otg_statemachine(&fsl_otg_dev->fsm);
  236. }
  237. /* The timeout callback function to set time out bit */
  238. void set_tmout(unsigned long indicator)
  239. {
  240. *(int *)indicator = 1;
  241. }
  242. /* Initialize timers */
  243. int fsl_otg_init_timers(struct otg_fsm *fsm)
  244. {
  245. /* FSM used timers */
  246. a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
  247. (unsigned long)&fsm->a_wait_vrise_tmout);
  248. if (!a_wait_vrise_tmr)
  249. return -ENOMEM;
  250. a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
  251. (unsigned long)&fsm->a_wait_bcon_tmout);
  252. if (!a_wait_bcon_tmr)
  253. return -ENOMEM;
  254. a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
  255. (unsigned long)&fsm->a_aidl_bdis_tmout);
  256. if (!a_aidl_bdis_tmr)
  257. return -ENOMEM;
  258. b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
  259. (unsigned long)&fsm->b_ase0_brst_tmout);
  260. if (!b_ase0_brst_tmr)
  261. return -ENOMEM;
  262. b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
  263. (unsigned long)&fsm->b_se0_srp);
  264. if (!b_se0_srp_tmr)
  265. return -ENOMEM;
  266. b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL,
  267. (unsigned long)&fsm->b_srp_done);
  268. if (!b_srp_fail_tmr)
  269. return -ENOMEM;
  270. a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10,
  271. (unsigned long)&fsm);
  272. if (!a_wait_enum_tmr)
  273. return -ENOMEM;
  274. /* device driver used timers */
  275. b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0);
  276. if (!b_srp_wait_tmr)
  277. return -ENOMEM;
  278. b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end,
  279. TB_DATA_PLS, 0);
  280. if (!b_data_pulse_tmr)
  281. return -ENOMEM;
  282. b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end,
  283. TB_VBUS_PLS, 0);
  284. if (!b_vbus_pulse_tmr)
  285. return -ENOMEM;
  286. return 0;
  287. }
  288. /* Uninitialize timers */
  289. void fsl_otg_uninit_timers(void)
  290. {
  291. /* FSM used timers */
  292. kfree(a_wait_vrise_tmr);
  293. kfree(a_wait_bcon_tmr);
  294. kfree(a_aidl_bdis_tmr);
  295. kfree(b_ase0_brst_tmr);
  296. kfree(b_se0_srp_tmr);
  297. kfree(b_srp_fail_tmr);
  298. kfree(a_wait_enum_tmr);
  299. /* device driver used timers */
  300. kfree(b_srp_wait_tmr);
  301. kfree(b_data_pulse_tmr);
  302. kfree(b_vbus_pulse_tmr);
  303. }
  304. static struct fsl_otg_timer *fsl_otg_get_timer(enum otg_fsm_timer t)
  305. {
  306. struct fsl_otg_timer *timer;
  307. /* REVISIT: use array of pointers to timers instead */
  308. switch (t) {
  309. case A_WAIT_VRISE:
  310. timer = a_wait_vrise_tmr;
  311. break;
  312. case A_WAIT_BCON:
  313. timer = a_wait_vrise_tmr;
  314. break;
  315. case A_AIDL_BDIS:
  316. timer = a_wait_vrise_tmr;
  317. break;
  318. case B_ASE0_BRST:
  319. timer = a_wait_vrise_tmr;
  320. break;
  321. case B_SE0_SRP:
  322. timer = a_wait_vrise_tmr;
  323. break;
  324. case B_SRP_FAIL:
  325. timer = a_wait_vrise_tmr;
  326. break;
  327. case A_WAIT_ENUM:
  328. timer = a_wait_vrise_tmr;
  329. break;
  330. default:
  331. timer = NULL;
  332. }
  333. return timer;
  334. }
  335. /* Add timer to timer list */
  336. void fsl_otg_add_timer(struct otg_fsm *fsm, void *gtimer)
  337. {
  338. struct fsl_otg_timer *timer = gtimer;
  339. struct fsl_otg_timer *tmp_timer;
  340. /*
  341. * Check if the timer is already in the active list,
  342. * if so update timer count
  343. */
  344. list_for_each_entry(tmp_timer, &active_timers, list)
  345. if (tmp_timer == timer) {
  346. timer->count = timer->expires;
  347. return;
  348. }
  349. timer->count = timer->expires;
  350. list_add_tail(&timer->list, &active_timers);
  351. }
  352. static void fsl_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
  353. {
  354. struct fsl_otg_timer *timer;
  355. timer = fsl_otg_get_timer(t);
  356. if (!timer)
  357. return;
  358. fsl_otg_add_timer(fsm, timer);
  359. }
  360. /* Remove timer from the timer list; clear timeout status */
  361. void fsl_otg_del_timer(struct otg_fsm *fsm, void *gtimer)
  362. {
  363. struct fsl_otg_timer *timer = gtimer;
  364. struct fsl_otg_timer *tmp_timer, *del_tmp;
  365. list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
  366. if (tmp_timer == timer)
  367. list_del(&timer->list);
  368. }
  369. static void fsl_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
  370. {
  371. struct fsl_otg_timer *timer;
  372. timer = fsl_otg_get_timer(t);
  373. if (!timer)
  374. return;
  375. fsl_otg_del_timer(fsm, timer);
  376. }
  377. /* Reset controller, not reset the bus */
  378. void otg_reset_controller(void)
  379. {
  380. u32 command;
  381. command = fsl_readl(&usb_dr_regs->usbcmd);
  382. command |= (1 << 1);
  383. fsl_writel(command, &usb_dr_regs->usbcmd);
  384. while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1))
  385. ;
  386. }
  387. /* Call suspend/resume routines in host driver */
  388. int fsl_otg_start_host(struct otg_fsm *fsm, int on)
  389. {
  390. struct usb_otg *otg = fsm->otg;
  391. struct device *dev;
  392. struct fsl_otg *otg_dev =
  393. container_of(otg->usb_phy, struct fsl_otg, phy);
  394. u32 retval = 0;
  395. if (!otg->host)
  396. return -ENODEV;
  397. dev = otg->host->controller;
  398. /*
  399. * Update a_vbus_vld state as a_vbus_vld int is disabled
  400. * in device mode
  401. */
  402. fsm->a_vbus_vld =
  403. !!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID);
  404. if (on) {
  405. /* start fsl usb host controller */
  406. if (otg_dev->host_working)
  407. goto end;
  408. else {
  409. otg_reset_controller();
  410. VDBG("host on......\n");
  411. if (dev->driver->pm && dev->driver->pm->resume) {
  412. retval = dev->driver->pm->resume(dev);
  413. if (fsm->id) {
  414. /* default-b */
  415. fsl_otg_drv_vbus(fsm, 1);
  416. /*
  417. * Workaround: b_host can't driver
  418. * vbus, but PP in PORTSC needs to
  419. * be 1 for host to work.
  420. * So we set drv_vbus bit in
  421. * transceiver to 0 thru ULPI.
  422. */
  423. write_ulpi(0x0c, 0x20);
  424. }
  425. }
  426. otg_dev->host_working = 1;
  427. }
  428. } else {
  429. /* stop fsl usb host controller */
  430. if (!otg_dev->host_working)
  431. goto end;
  432. else {
  433. VDBG("host off......\n");
  434. if (dev && dev->driver) {
  435. if (dev->driver->pm && dev->driver->pm->suspend)
  436. retval = dev->driver->pm->suspend(dev);
  437. if (fsm->id)
  438. /* default-b */
  439. fsl_otg_drv_vbus(fsm, 0);
  440. }
  441. otg_dev->host_working = 0;
  442. }
  443. }
  444. end:
  445. return retval;
  446. }
  447. /*
  448. * Call suspend and resume function in udc driver
  449. * to stop and start udc driver.
  450. */
  451. int fsl_otg_start_gadget(struct otg_fsm *fsm, int on)
  452. {
  453. struct usb_otg *otg = fsm->otg;
  454. struct device *dev;
  455. if (!otg->gadget || !otg->gadget->dev.parent)
  456. return -ENODEV;
  457. VDBG("gadget %s\n", on ? "on" : "off");
  458. dev = otg->gadget->dev.parent;
  459. if (on) {
  460. if (dev->driver->resume)
  461. dev->driver->resume(dev);
  462. } else {
  463. if (dev->driver->suspend)
  464. dev->driver->suspend(dev, otg_suspend_state);
  465. }
  466. return 0;
  467. }
  468. /*
  469. * Called by initialization code of host driver. Register host controller
  470. * to the OTG. Suspend host for OTG role detection.
  471. */
  472. static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
  473. {
  474. struct fsl_otg *otg_dev;
  475. if (!otg)
  476. return -ENODEV;
  477. otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
  478. if (otg_dev != fsl_otg_dev)
  479. return -ENODEV;
  480. otg->host = host;
  481. otg_dev->fsm.a_bus_drop = 0;
  482. otg_dev->fsm.a_bus_req = 1;
  483. if (host) {
  484. VDBG("host off......\n");
  485. otg->host->otg_port = fsl_otg_initdata.otg_port;
  486. otg->host->is_b_host = otg_dev->fsm.id;
  487. /*
  488. * must leave time for hub_wq to finish its thing
  489. * before yanking the host driver out from under it,
  490. * so suspend the host after a short delay.
  491. */
  492. otg_dev->host_working = 1;
  493. schedule_delayed_work(&otg_dev->otg_event, 100);
  494. return 0;
  495. } else {
  496. /* host driver going away */
  497. if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) &
  498. OTGSC_STS_USB_ID)) {
  499. /* Mini-A cable connected */
  500. struct otg_fsm *fsm = &otg_dev->fsm;
  501. otg->state = OTG_STATE_UNDEFINED;
  502. fsm->protocol = PROTO_UNDEF;
  503. }
  504. }
  505. otg_dev->host_working = 0;
  506. otg_statemachine(&otg_dev->fsm);
  507. return 0;
  508. }
  509. /* Called by initialization code of udc. Register udc to OTG. */
  510. static int fsl_otg_set_peripheral(struct usb_otg *otg,
  511. struct usb_gadget *gadget)
  512. {
  513. struct fsl_otg *otg_dev;
  514. if (!otg)
  515. return -ENODEV;
  516. otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
  517. VDBG("otg_dev 0x%x\n", (int)otg_dev);
  518. VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev);
  519. if (otg_dev != fsl_otg_dev)
  520. return -ENODEV;
  521. if (!gadget) {
  522. if (!otg->default_a)
  523. otg->gadget->ops->vbus_draw(otg->gadget, 0);
  524. usb_gadget_vbus_disconnect(otg->gadget);
  525. otg->gadget = 0;
  526. otg_dev->fsm.b_bus_req = 0;
  527. otg_statemachine(&otg_dev->fsm);
  528. return 0;
  529. }
  530. otg->gadget = gadget;
  531. otg->gadget->is_a_peripheral = !otg_dev->fsm.id;
  532. otg_dev->fsm.b_bus_req = 1;
  533. /* start the gadget right away if the ID pin says Mini-B */
  534. pr_debug("ID pin=%d\n", otg_dev->fsm.id);
  535. if (otg_dev->fsm.id == 1) {
  536. fsl_otg_start_host(&otg_dev->fsm, 0);
  537. otg_drv_vbus(&otg_dev->fsm, 0);
  538. fsl_otg_start_gadget(&otg_dev->fsm, 1);
  539. }
  540. return 0;
  541. }
  542. /*
  543. * Delayed pin detect interrupt processing.
  544. *
  545. * When the Mini-A cable is disconnected from the board,
  546. * the pin-detect interrupt happens before the disconnect
  547. * interrupts for the connected device(s). In order to
  548. * process the disconnect interrupt(s) prior to switching
  549. * roles, the pin-detect interrupts are delayed, and handled
  550. * by this routine.
  551. */
  552. static void fsl_otg_event(struct work_struct *work)
  553. {
  554. struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work);
  555. struct otg_fsm *fsm = &og->fsm;
  556. if (fsm->id) { /* switch to gadget */
  557. fsl_otg_start_host(fsm, 0);
  558. otg_drv_vbus(fsm, 0);
  559. fsl_otg_start_gadget(fsm, 1);
  560. }
  561. }
  562. /* B-device start SRP */
  563. static int fsl_otg_start_srp(struct usb_otg *otg)
  564. {
  565. struct fsl_otg *otg_dev;
  566. if (!otg || otg->state != OTG_STATE_B_IDLE)
  567. return -ENODEV;
  568. otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
  569. if (otg_dev != fsl_otg_dev)
  570. return -ENODEV;
  571. otg_dev->fsm.b_bus_req = 1;
  572. otg_statemachine(&otg_dev->fsm);
  573. return 0;
  574. }
  575. /* A_host suspend will call this function to start hnp */
  576. static int fsl_otg_start_hnp(struct usb_otg *otg)
  577. {
  578. struct fsl_otg *otg_dev;
  579. if (!otg)
  580. return -ENODEV;
  581. otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
  582. if (otg_dev != fsl_otg_dev)
  583. return -ENODEV;
  584. pr_debug("start_hnp...\n");
  585. /* clear a_bus_req to enter a_suspend state */
  586. otg_dev->fsm.a_bus_req = 0;
  587. otg_statemachine(&otg_dev->fsm);
  588. return 0;
  589. }
  590. /*
  591. * Interrupt handler. OTG/host/peripheral share the same int line.
  592. * OTG driver clears OTGSC interrupts and leaves USB interrupts
  593. * intact. It needs to have knowledge of some USB interrupts
  594. * such as port change.
  595. */
  596. irqreturn_t fsl_otg_isr(int irq, void *dev_id)
  597. {
  598. struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
  599. struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg;
  600. u32 otg_int_src, otg_sc;
  601. otg_sc = fsl_readl(&usb_dr_regs->otgsc);
  602. otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8);
  603. /* Only clear otg interrupts */
  604. fsl_writel(otg_sc, &usb_dr_regs->otgsc);
  605. /*FIXME: ID change not generate when init to 0 */
  606. fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
  607. otg->default_a = (fsm->id == 0);
  608. /* process OTG interrupts */
  609. if (otg_int_src) {
  610. if (otg_int_src & OTGSC_INTSTS_USB_ID) {
  611. fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
  612. otg->default_a = (fsm->id == 0);
  613. /* clear conn information */
  614. if (fsm->id)
  615. fsm->b_conn = 0;
  616. else
  617. fsm->a_conn = 0;
  618. if (otg->host)
  619. otg->host->is_b_host = fsm->id;
  620. if (otg->gadget)
  621. otg->gadget->is_a_peripheral = !fsm->id;
  622. VDBG("ID int (ID is %d)\n", fsm->id);
  623. if (fsm->id) { /* switch to gadget */
  624. schedule_delayed_work(
  625. &((struct fsl_otg *)dev_id)->otg_event,
  626. 100);
  627. } else { /* switch to host */
  628. cancel_delayed_work(&
  629. ((struct fsl_otg *)dev_id)->
  630. otg_event);
  631. fsl_otg_start_gadget(fsm, 0);
  632. otg_drv_vbus(fsm, 1);
  633. fsl_otg_start_host(fsm, 1);
  634. }
  635. return IRQ_HANDLED;
  636. }
  637. }
  638. return IRQ_NONE;
  639. }
  640. static struct otg_fsm_ops fsl_otg_ops = {
  641. .chrg_vbus = fsl_otg_chrg_vbus,
  642. .drv_vbus = fsl_otg_drv_vbus,
  643. .loc_conn = fsl_otg_loc_conn,
  644. .loc_sof = fsl_otg_loc_sof,
  645. .start_pulse = fsl_otg_start_pulse,
  646. .add_timer = fsl_otg_fsm_add_timer,
  647. .del_timer = fsl_otg_fsm_del_timer,
  648. .start_host = fsl_otg_start_host,
  649. .start_gadget = fsl_otg_start_gadget,
  650. };
  651. /* Initialize the global variable fsl_otg_dev and request IRQ for OTG */
  652. static int fsl_otg_conf(struct platform_device *pdev)
  653. {
  654. struct fsl_otg *fsl_otg_tc;
  655. int status;
  656. if (fsl_otg_dev)
  657. return 0;
  658. /* allocate space to fsl otg device */
  659. fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL);
  660. if (!fsl_otg_tc)
  661. return -ENOMEM;
  662. fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
  663. if (!fsl_otg_tc->phy.otg) {
  664. kfree(fsl_otg_tc);
  665. return -ENOMEM;
  666. }
  667. INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event);
  668. INIT_LIST_HEAD(&active_timers);
  669. status = fsl_otg_init_timers(&fsl_otg_tc->fsm);
  670. if (status) {
  671. pr_info("Couldn't init OTG timers\n");
  672. goto err;
  673. }
  674. mutex_init(&fsl_otg_tc->fsm.lock);
  675. /* Set OTG state machine operations */
  676. fsl_otg_tc->fsm.ops = &fsl_otg_ops;
  677. /* initialize the otg structure */
  678. fsl_otg_tc->phy.label = DRIVER_DESC;
  679. fsl_otg_tc->phy.dev = &pdev->dev;
  680. fsl_otg_tc->phy.otg->usb_phy = &fsl_otg_tc->phy;
  681. fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host;
  682. fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral;
  683. fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp;
  684. fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp;
  685. fsl_otg_dev = fsl_otg_tc;
  686. /* Store the otg transceiver */
  687. status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2);
  688. if (status) {
  689. pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n");
  690. goto err;
  691. }
  692. return 0;
  693. err:
  694. fsl_otg_uninit_timers();
  695. kfree(fsl_otg_tc->phy.otg);
  696. kfree(fsl_otg_tc);
  697. return status;
  698. }
  699. /* OTG Initialization */
  700. int usb_otg_start(struct platform_device *pdev)
  701. {
  702. struct fsl_otg *p_otg;
  703. struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2);
  704. struct otg_fsm *fsm;
  705. int status;
  706. struct resource *res;
  707. u32 temp;
  708. struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
  709. p_otg = container_of(otg_trans, struct fsl_otg, phy);
  710. fsm = &p_otg->fsm;
  711. /* Initialize the state machine structure with default values */
  712. SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED);
  713. fsm->otg = p_otg->phy.otg;
  714. /* We don't require predefined MEM/IRQ resource index */
  715. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  716. if (!res)
  717. return -ENXIO;
  718. /* We don't request_mem_region here to enable resource sharing
  719. * with host/device */
  720. usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap));
  721. p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs;
  722. pdata->regs = (void *)usb_dr_regs;
  723. if (pdata->init && pdata->init(pdev) != 0)
  724. return -EINVAL;
  725. if (pdata->big_endian_mmio) {
  726. _fsl_readl = _fsl_readl_be;
  727. _fsl_writel = _fsl_writel_be;
  728. } else {
  729. _fsl_readl = _fsl_readl_le;
  730. _fsl_writel = _fsl_writel_le;
  731. }
  732. /* request irq */
  733. p_otg->irq = platform_get_irq(pdev, 0);
  734. status = request_irq(p_otg->irq, fsl_otg_isr,
  735. IRQF_SHARED, driver_name, p_otg);
  736. if (status) {
  737. dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n",
  738. p_otg->irq, status);
  739. iounmap(p_otg->dr_mem_map);
  740. kfree(p_otg->phy.otg);
  741. kfree(p_otg);
  742. return status;
  743. }
  744. /* stop the controller */
  745. temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
  746. temp &= ~USB_CMD_RUN_STOP;
  747. fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
  748. /* reset the controller */
  749. temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
  750. temp |= USB_CMD_CTRL_RESET;
  751. fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
  752. /* wait reset completed */
  753. while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET)
  754. ;
  755. /* configure the VBUSHS as IDLE(both host and device) */
  756. temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0);
  757. fsl_writel(temp, &p_otg->dr_mem_map->usbmode);
  758. /* configure PHY interface */
  759. temp = fsl_readl(&p_otg->dr_mem_map->portsc);
  760. temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW);
  761. switch (pdata->phy_mode) {
  762. case FSL_USB2_PHY_ULPI:
  763. temp |= PORTSC_PTS_ULPI;
  764. break;
  765. case FSL_USB2_PHY_UTMI_WIDE:
  766. temp |= PORTSC_PTW_16BIT;
  767. /* fall through */
  768. case FSL_USB2_PHY_UTMI:
  769. temp |= PORTSC_PTS_UTMI;
  770. /* fall through */
  771. default:
  772. break;
  773. }
  774. fsl_writel(temp, &p_otg->dr_mem_map->portsc);
  775. if (pdata->have_sysif_regs) {
  776. /* configure control enable IO output, big endian register */
  777. temp = __raw_readl(&p_otg->dr_mem_map->control);
  778. temp |= USB_CTRL_IOENB;
  779. __raw_writel(temp, &p_otg->dr_mem_map->control);
  780. }
  781. /* disable all interrupt and clear all OTGSC status */
  782. temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
  783. temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK;
  784. temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
  785. fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
  786. /*
  787. * The identification (id) input is FALSE when a Mini-A plug is inserted
  788. * in the devices Mini-AB receptacle. Otherwise, this input is TRUE.
  789. * Also: record initial state of ID pin
  790. */
  791. if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) {
  792. p_otg->phy.otg->state = OTG_STATE_UNDEFINED;
  793. p_otg->fsm.id = 1;
  794. } else {
  795. p_otg->phy.otg->state = OTG_STATE_A_IDLE;
  796. p_otg->fsm.id = 0;
  797. }
  798. pr_debug("initial ID pin=%d\n", p_otg->fsm.id);
  799. /* enable OTG ID pin interrupt */
  800. temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
  801. temp |= OTGSC_INTR_USB_ID_EN;
  802. temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN);
  803. fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
  804. return 0;
  805. }
  806. /*
  807. * state file in sysfs
  808. */
  809. static int show_fsl_usb2_otg_state(struct device *dev,
  810. struct device_attribute *attr, char *buf)
  811. {
  812. struct otg_fsm *fsm = &fsl_otg_dev->fsm;
  813. char *next = buf;
  814. unsigned size = PAGE_SIZE;
  815. int t;
  816. mutex_lock(&fsm->lock);
  817. /* basic driver infomation */
  818. t = scnprintf(next, size,
  819. DRIVER_DESC "\n" "fsl_usb2_otg version: %s\n\n",
  820. DRIVER_VERSION);
  821. size -= t;
  822. next += t;
  823. /* Registers */
  824. t = scnprintf(next, size,
  825. "OTGSC: 0x%08x\n"
  826. "PORTSC: 0x%08x\n"
  827. "USBMODE: 0x%08x\n"
  828. "USBCMD: 0x%08x\n"
  829. "USBSTS: 0x%08x\n"
  830. "USBINTR: 0x%08x\n",
  831. fsl_readl(&usb_dr_regs->otgsc),
  832. fsl_readl(&usb_dr_regs->portsc),
  833. fsl_readl(&usb_dr_regs->usbmode),
  834. fsl_readl(&usb_dr_regs->usbcmd),
  835. fsl_readl(&usb_dr_regs->usbsts),
  836. fsl_readl(&usb_dr_regs->usbintr));
  837. size -= t;
  838. next += t;
  839. /* State */
  840. t = scnprintf(next, size,
  841. "OTG state: %s\n\n",
  842. usb_otg_state_string(fsl_otg_dev->phy.otg->state));
  843. size -= t;
  844. next += t;
  845. /* State Machine Variables */
  846. t = scnprintf(next, size,
  847. "a_bus_req: %d\n"
  848. "b_bus_req: %d\n"
  849. "a_bus_resume: %d\n"
  850. "a_bus_suspend: %d\n"
  851. "a_conn: %d\n"
  852. "a_sess_vld: %d\n"
  853. "a_srp_det: %d\n"
  854. "a_vbus_vld: %d\n"
  855. "b_bus_resume: %d\n"
  856. "b_bus_suspend: %d\n"
  857. "b_conn: %d\n"
  858. "b_se0_srp: %d\n"
  859. "b_ssend_srp: %d\n"
  860. "b_sess_vld: %d\n"
  861. "id: %d\n",
  862. fsm->a_bus_req,
  863. fsm->b_bus_req,
  864. fsm->a_bus_resume,
  865. fsm->a_bus_suspend,
  866. fsm->a_conn,
  867. fsm->a_sess_vld,
  868. fsm->a_srp_det,
  869. fsm->a_vbus_vld,
  870. fsm->b_bus_resume,
  871. fsm->b_bus_suspend,
  872. fsm->b_conn,
  873. fsm->b_se0_srp,
  874. fsm->b_ssend_srp,
  875. fsm->b_sess_vld,
  876. fsm->id);
  877. size -= t;
  878. next += t;
  879. mutex_unlock(&fsm->lock);
  880. return PAGE_SIZE - size;
  881. }
  882. static DEVICE_ATTR(fsl_usb2_otg_state, S_IRUGO, show_fsl_usb2_otg_state, NULL);
  883. /* Char driver interface to control some OTG input */
  884. /*
  885. * Handle some ioctl command, such as get otg
  886. * status and set host suspend
  887. */
  888. static long fsl_otg_ioctl(struct file *file, unsigned int cmd,
  889. unsigned long arg)
  890. {
  891. u32 retval = 0;
  892. switch (cmd) {
  893. case GET_OTG_STATUS:
  894. retval = fsl_otg_dev->host_working;
  895. break;
  896. case SET_A_SUSPEND_REQ:
  897. fsl_otg_dev->fsm.a_suspend_req_inf = arg;
  898. break;
  899. case SET_A_BUS_DROP:
  900. fsl_otg_dev->fsm.a_bus_drop = arg;
  901. break;
  902. case SET_A_BUS_REQ:
  903. fsl_otg_dev->fsm.a_bus_req = arg;
  904. break;
  905. case SET_B_BUS_REQ:
  906. fsl_otg_dev->fsm.b_bus_req = arg;
  907. break;
  908. default:
  909. break;
  910. }
  911. otg_statemachine(&fsl_otg_dev->fsm);
  912. return retval;
  913. }
  914. static int fsl_otg_open(struct inode *inode, struct file *file)
  915. {
  916. return 0;
  917. }
  918. static int fsl_otg_release(struct inode *inode, struct file *file)
  919. {
  920. return 0;
  921. }
  922. static const struct file_operations otg_fops = {
  923. .owner = THIS_MODULE,
  924. .llseek = NULL,
  925. .read = NULL,
  926. .write = NULL,
  927. .unlocked_ioctl = fsl_otg_ioctl,
  928. .open = fsl_otg_open,
  929. .release = fsl_otg_release,
  930. };
  931. static int fsl_otg_probe(struct platform_device *pdev)
  932. {
  933. int ret;
  934. if (!dev_get_platdata(&pdev->dev))
  935. return -ENODEV;
  936. /* configure the OTG */
  937. ret = fsl_otg_conf(pdev);
  938. if (ret) {
  939. dev_err(&pdev->dev, "Couldn't configure OTG module\n");
  940. return ret;
  941. }
  942. /* start OTG */
  943. ret = usb_otg_start(pdev);
  944. if (ret) {
  945. dev_err(&pdev->dev, "Can't init FSL OTG device\n");
  946. return ret;
  947. }
  948. ret = register_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME, &otg_fops);
  949. if (ret) {
  950. dev_err(&pdev->dev, "unable to register FSL OTG device\n");
  951. return ret;
  952. }
  953. ret = device_create_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
  954. if (ret)
  955. dev_warn(&pdev->dev, "Can't register sysfs attribute\n");
  956. return ret;
  957. }
  958. static int fsl_otg_remove(struct platform_device *pdev)
  959. {
  960. struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
  961. usb_remove_phy(&fsl_otg_dev->phy);
  962. free_irq(fsl_otg_dev->irq, fsl_otg_dev);
  963. iounmap((void *)usb_dr_regs);
  964. fsl_otg_uninit_timers();
  965. kfree(fsl_otg_dev->phy.otg);
  966. kfree(fsl_otg_dev);
  967. device_remove_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
  968. unregister_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME);
  969. if (pdata->exit)
  970. pdata->exit(pdev);
  971. return 0;
  972. }
  973. struct platform_driver fsl_otg_driver = {
  974. .probe = fsl_otg_probe,
  975. .remove = fsl_otg_remove,
  976. .driver = {
  977. .name = driver_name,
  978. .owner = THIS_MODULE,
  979. },
  980. };
  981. module_platform_driver(fsl_otg_driver);
  982. MODULE_DESCRIPTION(DRIVER_INFO);
  983. MODULE_AUTHOR(DRIVER_AUTHOR);
  984. MODULE_LICENSE("GPL");