mtu3_gadget_ep0.c 21 KB

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  1. /*
  2. * mtu3_gadget_ep0.c - MediaTek USB3 DRD peripheral driver ep0 handling
  3. *
  4. * Copyright (c) 2016 MediaTek Inc.
  5. *
  6. * Author: Chunfeng.Yun <chunfeng.yun@mediatek.com>
  7. *
  8. * This software is licensed under the terms of the GNU General Public
  9. * License version 2, as published by the Free Software Foundation, and
  10. * may be copied, distributed, and modified under those terms.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. */
  18. #include <linux/usb/composite.h>
  19. #include "mtu3.h"
  20. /* ep0 is always mtu3->in_eps[0] */
  21. #define next_ep0_request(mtu) next_request((mtu)->ep0)
  22. /* for high speed test mode; see USB 2.0 spec 7.1.20 */
  23. static const u8 mtu3_test_packet[53] = {
  24. /* implicit SYNC then DATA0 to start */
  25. /* JKJKJKJK x9 */
  26. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  27. /* JJKKJJKK x8 */
  28. 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
  29. /* JJJJKKKK x8 */
  30. 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee,
  31. /* JJJJJJJKKKKKKK x8 */
  32. 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  33. /* JJJJJJJK x8 */
  34. 0x7f, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd,
  35. /* JKKKKKKK x10, JK */
  36. 0xfc, 0x7e, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, 0x7e,
  37. /* implicit CRC16 then EOP to end */
  38. };
  39. static char *decode_ep0_state(struct mtu3 *mtu)
  40. {
  41. switch (mtu->ep0_state) {
  42. case MU3D_EP0_STATE_SETUP:
  43. return "SETUP";
  44. case MU3D_EP0_STATE_TX:
  45. return "IN";
  46. case MU3D_EP0_STATE_RX:
  47. return "OUT";
  48. case MU3D_EP0_STATE_TX_END:
  49. return "TX-END";
  50. case MU3D_EP0_STATE_STALL:
  51. return "STALL";
  52. default:
  53. return "??";
  54. }
  55. }
  56. static void ep0_req_giveback(struct mtu3 *mtu, struct usb_request *req)
  57. {
  58. mtu3_req_complete(mtu->ep0, req, 0);
  59. }
  60. static int
  61. forward_to_driver(struct mtu3 *mtu, const struct usb_ctrlrequest *setup)
  62. __releases(mtu->lock)
  63. __acquires(mtu->lock)
  64. {
  65. int ret;
  66. if (!mtu->gadget_driver)
  67. return -EOPNOTSUPP;
  68. spin_unlock(&mtu->lock);
  69. ret = mtu->gadget_driver->setup(&mtu->g, setup);
  70. spin_lock(&mtu->lock);
  71. dev_dbg(mtu->dev, "%s ret %d\n", __func__, ret);
  72. return ret;
  73. }
  74. static void ep0_write_fifo(struct mtu3_ep *mep, const u8 *src, u16 len)
  75. {
  76. void __iomem *fifo = mep->mtu->mac_base + U3D_FIFO0;
  77. u16 index = 0;
  78. dev_dbg(mep->mtu->dev, "%s: ep%din, len=%d, buf=%p\n",
  79. __func__, mep->epnum, len, src);
  80. if (len >= 4) {
  81. iowrite32_rep(fifo, src, len >> 2);
  82. index = len & ~0x03;
  83. }
  84. if (len & 0x02) {
  85. writew(*(u16 *)&src[index], fifo);
  86. index += 2;
  87. }
  88. if (len & 0x01)
  89. writeb(src[index], fifo);
  90. }
  91. static void ep0_read_fifo(struct mtu3_ep *mep, u8 *dst, u16 len)
  92. {
  93. void __iomem *fifo = mep->mtu->mac_base + U3D_FIFO0;
  94. u32 value;
  95. u16 index = 0;
  96. dev_dbg(mep->mtu->dev, "%s: ep%dout len=%d buf=%p\n",
  97. __func__, mep->epnum, len, dst);
  98. if (len >= 4) {
  99. ioread32_rep(fifo, dst, len >> 2);
  100. index = len & ~0x03;
  101. }
  102. if (len & 0x3) {
  103. value = readl(fifo);
  104. memcpy(&dst[index], &value, len & 0x3);
  105. }
  106. }
  107. static void ep0_load_test_packet(struct mtu3 *mtu)
  108. {
  109. /*
  110. * because the length of test packet is less than max packet of HS ep0,
  111. * write it into fifo directly.
  112. */
  113. ep0_write_fifo(mtu->ep0, mtu3_test_packet, sizeof(mtu3_test_packet));
  114. }
  115. /*
  116. * A. send STALL for setup transfer without data stage:
  117. * set SENDSTALL and SETUPPKTRDY at the same time;
  118. * B. send STALL for other cases:
  119. * set SENDSTALL only.
  120. */
  121. static void ep0_stall_set(struct mtu3_ep *mep0, bool set, u32 pktrdy)
  122. {
  123. struct mtu3 *mtu = mep0->mtu;
  124. void __iomem *mbase = mtu->mac_base;
  125. u32 csr;
  126. /* EP0_SENTSTALL is W1C */
  127. csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
  128. if (set)
  129. csr |= EP0_SENDSTALL | pktrdy;
  130. else
  131. csr = (csr & ~EP0_SENDSTALL) | EP0_SENTSTALL;
  132. mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
  133. mtu->delayed_status = false;
  134. mtu->ep0_state = MU3D_EP0_STATE_SETUP;
  135. dev_dbg(mtu->dev, "ep0: %s STALL, ep0_state: %s\n",
  136. set ? "SEND" : "CLEAR", decode_ep0_state(mtu));
  137. }
  138. static int ep0_queue(struct mtu3_ep *mep0, struct mtu3_request *mreq);
  139. static void ep0_dummy_complete(struct usb_ep *ep, struct usb_request *req)
  140. {}
  141. static void ep0_set_sel_complete(struct usb_ep *ep, struct usb_request *req)
  142. {
  143. struct mtu3_request *mreq;
  144. struct mtu3 *mtu;
  145. struct usb_set_sel_req sel;
  146. memcpy(&sel, req->buf, sizeof(sel));
  147. mreq = to_mtu3_request(req);
  148. mtu = mreq->mtu;
  149. dev_dbg(mtu->dev, "u1sel:%d, u1pel:%d, u2sel:%d, u2pel:%d\n",
  150. sel.u1_sel, sel.u1_pel, sel.u2_sel, sel.u2_pel);
  151. }
  152. /* queue data stage to handle 6 byte SET_SEL request */
  153. static int ep0_set_sel(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
  154. {
  155. int ret;
  156. u16 length = le16_to_cpu(setup->wLength);
  157. if (unlikely(length != 6)) {
  158. dev_err(mtu->dev, "%s wrong wLength:%d\n",
  159. __func__, length);
  160. return -EINVAL;
  161. }
  162. mtu->ep0_req.mep = mtu->ep0;
  163. mtu->ep0_req.request.length = 6;
  164. mtu->ep0_req.request.buf = mtu->setup_buf;
  165. mtu->ep0_req.request.complete = ep0_set_sel_complete;
  166. ret = ep0_queue(mtu->ep0, &mtu->ep0_req);
  167. return ret < 0 ? ret : 1;
  168. }
  169. static int
  170. ep0_get_status(struct mtu3 *mtu, const struct usb_ctrlrequest *setup)
  171. {
  172. struct mtu3_ep *mep = NULL;
  173. int handled = 1;
  174. u8 result[2] = {0, 0};
  175. u8 epnum = 0;
  176. int is_in;
  177. switch (setup->bRequestType & USB_RECIP_MASK) {
  178. case USB_RECIP_DEVICE:
  179. result[0] = mtu->is_self_powered << USB_DEVICE_SELF_POWERED;
  180. result[0] |= mtu->may_wakeup << USB_DEVICE_REMOTE_WAKEUP;
  181. /* superspeed only */
  182. if (mtu->g.speed == USB_SPEED_SUPER) {
  183. result[0] |= mtu->u1_enable << USB_DEV_STAT_U1_ENABLED;
  184. result[0] |= mtu->u2_enable << USB_DEV_STAT_U2_ENABLED;
  185. }
  186. dev_dbg(mtu->dev, "%s result=%x, U1=%x, U2=%x\n", __func__,
  187. result[0], mtu->u1_enable, mtu->u2_enable);
  188. break;
  189. case USB_RECIP_INTERFACE:
  190. break;
  191. case USB_RECIP_ENDPOINT:
  192. epnum = (u8) le16_to_cpu(setup->wIndex);
  193. is_in = epnum & USB_DIR_IN;
  194. epnum &= USB_ENDPOINT_NUMBER_MASK;
  195. if (epnum >= mtu->num_eps) {
  196. handled = -EINVAL;
  197. break;
  198. }
  199. if (!epnum)
  200. break;
  201. mep = (is_in ? mtu->in_eps : mtu->out_eps) + epnum;
  202. if (!mep->desc) {
  203. handled = -EINVAL;
  204. break;
  205. }
  206. if (mep->flags & MTU3_EP_STALL)
  207. result[0] |= 1 << USB_ENDPOINT_HALT;
  208. break;
  209. default:
  210. /* class, vendor, etc ... delegate */
  211. handled = 0;
  212. break;
  213. }
  214. if (handled > 0) {
  215. int ret;
  216. /* prepare a data stage for GET_STATUS */
  217. dev_dbg(mtu->dev, "get_status=%x\n", *(u16 *)result);
  218. memcpy(mtu->setup_buf, result, sizeof(result));
  219. mtu->ep0_req.mep = mtu->ep0;
  220. mtu->ep0_req.request.length = 2;
  221. mtu->ep0_req.request.buf = &mtu->setup_buf;
  222. mtu->ep0_req.request.complete = ep0_dummy_complete;
  223. ret = ep0_queue(mtu->ep0, &mtu->ep0_req);
  224. if (ret < 0)
  225. handled = ret;
  226. }
  227. return handled;
  228. }
  229. static int handle_test_mode(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
  230. {
  231. void __iomem *mbase = mtu->mac_base;
  232. int handled = 1;
  233. switch (le16_to_cpu(setup->wIndex) >> 8) {
  234. case TEST_J:
  235. dev_dbg(mtu->dev, "TEST_J\n");
  236. mtu->test_mode_nr = TEST_J_MODE;
  237. break;
  238. case TEST_K:
  239. dev_dbg(mtu->dev, "TEST_K\n");
  240. mtu->test_mode_nr = TEST_K_MODE;
  241. break;
  242. case TEST_SE0_NAK:
  243. dev_dbg(mtu->dev, "TEST_SE0_NAK\n");
  244. mtu->test_mode_nr = TEST_SE0_NAK_MODE;
  245. break;
  246. case TEST_PACKET:
  247. dev_dbg(mtu->dev, "TEST_PACKET\n");
  248. mtu->test_mode_nr = TEST_PACKET_MODE;
  249. break;
  250. default:
  251. handled = -EINVAL;
  252. goto out;
  253. }
  254. mtu->test_mode = true;
  255. /* no TX completion interrupt, and need restart platform after test */
  256. if (mtu->test_mode_nr == TEST_PACKET_MODE)
  257. ep0_load_test_packet(mtu);
  258. mtu3_writel(mbase, U3D_USB2_TEST_MODE, mtu->test_mode_nr);
  259. mtu->ep0_state = MU3D_EP0_STATE_SETUP;
  260. out:
  261. return handled;
  262. }
  263. static int ep0_handle_feature_dev(struct mtu3 *mtu,
  264. struct usb_ctrlrequest *setup, bool set)
  265. {
  266. void __iomem *mbase = mtu->mac_base;
  267. int handled = -EINVAL;
  268. u32 lpc;
  269. switch (le16_to_cpu(setup->wValue)) {
  270. case USB_DEVICE_REMOTE_WAKEUP:
  271. mtu->may_wakeup = !!set;
  272. handled = 1;
  273. break;
  274. case USB_DEVICE_TEST_MODE:
  275. if (!set || (mtu->g.speed != USB_SPEED_HIGH) ||
  276. (le16_to_cpu(setup->wIndex) & 0xff))
  277. break;
  278. handled = handle_test_mode(mtu, setup);
  279. break;
  280. case USB_DEVICE_U1_ENABLE:
  281. if (mtu->g.speed != USB_SPEED_SUPER ||
  282. mtu->g.state != USB_STATE_CONFIGURED)
  283. break;
  284. lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL);
  285. if (set)
  286. lpc |= SW_U1_ACCEPT_ENABLE;
  287. else
  288. lpc &= ~SW_U1_ACCEPT_ENABLE;
  289. mtu3_writel(mbase, U3D_LINK_POWER_CONTROL, lpc);
  290. mtu->u1_enable = !!set;
  291. handled = 1;
  292. break;
  293. case USB_DEVICE_U2_ENABLE:
  294. if (mtu->g.speed != USB_SPEED_SUPER ||
  295. mtu->g.state != USB_STATE_CONFIGURED)
  296. break;
  297. lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL);
  298. if (set)
  299. lpc |= SW_U2_ACCEPT_ENABLE;
  300. else
  301. lpc &= ~SW_U2_ACCEPT_ENABLE;
  302. mtu3_writel(mbase, U3D_LINK_POWER_CONTROL, lpc);
  303. mtu->u2_enable = !!set;
  304. handled = 1;
  305. break;
  306. default:
  307. handled = -EINVAL;
  308. break;
  309. }
  310. return handled;
  311. }
  312. static int ep0_handle_feature(struct mtu3 *mtu,
  313. struct usb_ctrlrequest *setup, bool set)
  314. {
  315. struct mtu3_ep *mep;
  316. int handled = -EINVAL;
  317. int is_in;
  318. u16 value;
  319. u16 index;
  320. u8 epnum;
  321. value = le16_to_cpu(setup->wValue);
  322. index = le16_to_cpu(setup->wIndex);
  323. switch (setup->bRequestType & USB_RECIP_MASK) {
  324. case USB_RECIP_DEVICE:
  325. handled = ep0_handle_feature_dev(mtu, setup, set);
  326. break;
  327. case USB_RECIP_INTERFACE:
  328. /* superspeed only */
  329. if ((value == USB_INTRF_FUNC_SUSPEND)
  330. && (mtu->g.speed == USB_SPEED_SUPER)) {
  331. /*
  332. * forward the request because function drivers
  333. * should handle it
  334. */
  335. handled = 0;
  336. }
  337. break;
  338. case USB_RECIP_ENDPOINT:
  339. epnum = index & USB_ENDPOINT_NUMBER_MASK;
  340. if (epnum == 0 || epnum >= mtu->num_eps ||
  341. value != USB_ENDPOINT_HALT)
  342. break;
  343. is_in = index & USB_DIR_IN;
  344. mep = (is_in ? mtu->in_eps : mtu->out_eps) + epnum;
  345. if (!mep->desc)
  346. break;
  347. handled = 1;
  348. /* ignore request if endpoint is wedged */
  349. if (mep->wedged)
  350. break;
  351. mtu3_ep_stall_set(mep, set);
  352. break;
  353. default:
  354. /* class, vendor, etc ... delegate */
  355. handled = 0;
  356. break;
  357. }
  358. return handled;
  359. }
  360. /*
  361. * handle all control requests can be handled
  362. * returns:
  363. * negative errno - error happened
  364. * zero - need delegate SETUP to gadget driver
  365. * positive - already handled
  366. */
  367. static int handle_standard_request(struct mtu3 *mtu,
  368. struct usb_ctrlrequest *setup)
  369. {
  370. void __iomem *mbase = mtu->mac_base;
  371. enum usb_device_state state = mtu->g.state;
  372. int handled = -EINVAL;
  373. u32 dev_conf;
  374. u16 value;
  375. value = le16_to_cpu(setup->wValue);
  376. /* the gadget driver handles everything except what we must handle */
  377. switch (setup->bRequest) {
  378. case USB_REQ_SET_ADDRESS:
  379. /* change it after the status stage */
  380. mtu->address = (u8) (value & 0x7f);
  381. dev_dbg(mtu->dev, "set address to 0x%x\n", mtu->address);
  382. dev_conf = mtu3_readl(mbase, U3D_DEVICE_CONF);
  383. dev_conf &= ~DEV_ADDR_MSK;
  384. dev_conf |= DEV_ADDR(mtu->address);
  385. mtu3_writel(mbase, U3D_DEVICE_CONF, dev_conf);
  386. if (mtu->address)
  387. usb_gadget_set_state(&mtu->g, USB_STATE_ADDRESS);
  388. else
  389. usb_gadget_set_state(&mtu->g, USB_STATE_DEFAULT);
  390. handled = 1;
  391. break;
  392. case USB_REQ_SET_CONFIGURATION:
  393. if (state == USB_STATE_ADDRESS) {
  394. usb_gadget_set_state(&mtu->g,
  395. USB_STATE_CONFIGURED);
  396. } else if (state == USB_STATE_CONFIGURED) {
  397. /*
  398. * USB2 spec sec 9.4.7, if wValue is 0 then dev
  399. * is moved to addressed state
  400. */
  401. if (!value)
  402. usb_gadget_set_state(&mtu->g,
  403. USB_STATE_ADDRESS);
  404. }
  405. handled = 0;
  406. break;
  407. case USB_REQ_CLEAR_FEATURE:
  408. handled = ep0_handle_feature(mtu, setup, 0);
  409. break;
  410. case USB_REQ_SET_FEATURE:
  411. handled = ep0_handle_feature(mtu, setup, 1);
  412. break;
  413. case USB_REQ_GET_STATUS:
  414. handled = ep0_get_status(mtu, setup);
  415. break;
  416. case USB_REQ_SET_SEL:
  417. handled = ep0_set_sel(mtu, setup);
  418. break;
  419. case USB_REQ_SET_ISOCH_DELAY:
  420. handled = 1;
  421. break;
  422. default:
  423. /* delegate SET_CONFIGURATION, etc */
  424. handled = 0;
  425. }
  426. return handled;
  427. }
  428. /* receive an data packet (OUT) */
  429. static void ep0_rx_state(struct mtu3 *mtu)
  430. {
  431. struct mtu3_request *mreq;
  432. struct usb_request *req;
  433. void __iomem *mbase = mtu->mac_base;
  434. u32 maxp;
  435. u32 csr;
  436. u16 count = 0;
  437. dev_dbg(mtu->dev, "%s\n", __func__);
  438. csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
  439. mreq = next_ep0_request(mtu);
  440. req = &mreq->request;
  441. /* read packet and ack; or stall because of gadget driver bug */
  442. if (req) {
  443. void *buf = req->buf + req->actual;
  444. unsigned int len = req->length - req->actual;
  445. /* read the buffer */
  446. count = mtu3_readl(mbase, U3D_RXCOUNT0);
  447. if (count > len) {
  448. req->status = -EOVERFLOW;
  449. count = len;
  450. }
  451. ep0_read_fifo(mtu->ep0, buf, count);
  452. req->actual += count;
  453. csr |= EP0_RXPKTRDY;
  454. maxp = mtu->g.ep0->maxpacket;
  455. if (count < maxp || req->actual == req->length) {
  456. mtu->ep0_state = MU3D_EP0_STATE_SETUP;
  457. dev_dbg(mtu->dev, "ep0 state: %s\n",
  458. decode_ep0_state(mtu));
  459. csr |= EP0_DATAEND;
  460. } else {
  461. req = NULL;
  462. }
  463. } else {
  464. csr |= EP0_RXPKTRDY | EP0_SENDSTALL;
  465. dev_dbg(mtu->dev, "%s: SENDSTALL\n", __func__);
  466. }
  467. mtu3_writel(mbase, U3D_EP0CSR, csr);
  468. /* give back the request if have received all data */
  469. if (req)
  470. ep0_req_giveback(mtu, req);
  471. }
  472. /* transmitting to the host (IN) */
  473. static void ep0_tx_state(struct mtu3 *mtu)
  474. {
  475. struct mtu3_request *mreq = next_ep0_request(mtu);
  476. struct usb_request *req;
  477. u32 csr;
  478. u8 *src;
  479. u8 count;
  480. u32 maxp;
  481. dev_dbg(mtu->dev, "%s\n", __func__);
  482. if (!mreq)
  483. return;
  484. maxp = mtu->g.ep0->maxpacket;
  485. req = &mreq->request;
  486. /* load the data */
  487. src = (u8 *)req->buf + req->actual;
  488. count = min(maxp, req->length - req->actual);
  489. if (count)
  490. ep0_write_fifo(mtu->ep0, src, count);
  491. dev_dbg(mtu->dev, "%s act=%d, len=%d, cnt=%d, maxp=%d zero=%d\n",
  492. __func__, req->actual, req->length, count, maxp, req->zero);
  493. req->actual += count;
  494. if ((count < maxp)
  495. || ((req->actual == req->length) && !req->zero))
  496. mtu->ep0_state = MU3D_EP0_STATE_TX_END;
  497. /* send it out, triggering a "txpktrdy cleared" irq */
  498. csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
  499. mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr | EP0_TXPKTRDY);
  500. dev_dbg(mtu->dev, "%s ep0csr=0x%x\n", __func__,
  501. mtu3_readl(mtu->mac_base, U3D_EP0CSR));
  502. }
  503. static void ep0_read_setup(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
  504. {
  505. struct mtu3_request *mreq;
  506. u32 count;
  507. u32 csr;
  508. csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
  509. count = mtu3_readl(mtu->mac_base, U3D_RXCOUNT0);
  510. ep0_read_fifo(mtu->ep0, (u8 *)setup, count);
  511. dev_dbg(mtu->dev, "SETUP req%02x.%02x v%04x i%04x l%04x\n",
  512. setup->bRequestType, setup->bRequest,
  513. le16_to_cpu(setup->wValue), le16_to_cpu(setup->wIndex),
  514. le16_to_cpu(setup->wLength));
  515. /* clean up any leftover transfers */
  516. mreq = next_ep0_request(mtu);
  517. if (mreq)
  518. ep0_req_giveback(mtu, &mreq->request);
  519. if (le16_to_cpu(setup->wLength) == 0) {
  520. ; /* no data stage, nothing to do */
  521. } else if (setup->bRequestType & USB_DIR_IN) {
  522. mtu3_writel(mtu->mac_base, U3D_EP0CSR,
  523. csr | EP0_SETUPPKTRDY | EP0_DPHTX);
  524. mtu->ep0_state = MU3D_EP0_STATE_TX;
  525. } else {
  526. mtu3_writel(mtu->mac_base, U3D_EP0CSR,
  527. (csr | EP0_SETUPPKTRDY) & (~EP0_DPHTX));
  528. mtu->ep0_state = MU3D_EP0_STATE_RX;
  529. }
  530. }
  531. static int ep0_handle_setup(struct mtu3 *mtu)
  532. __releases(mtu->lock)
  533. __acquires(mtu->lock)
  534. {
  535. struct usb_ctrlrequest setup;
  536. struct mtu3_request *mreq;
  537. void __iomem *mbase = mtu->mac_base;
  538. int handled = 0;
  539. ep0_read_setup(mtu, &setup);
  540. if ((setup.bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
  541. handled = handle_standard_request(mtu, &setup);
  542. dev_dbg(mtu->dev, "handled %d, ep0_state: %s\n",
  543. handled, decode_ep0_state(mtu));
  544. if (handled < 0)
  545. goto stall;
  546. else if (handled > 0)
  547. goto finish;
  548. handled = forward_to_driver(mtu, &setup);
  549. if (handled < 0) {
  550. stall:
  551. dev_dbg(mtu->dev, "%s stall (%d)\n", __func__, handled);
  552. ep0_stall_set(mtu->ep0, true,
  553. le16_to_cpu(setup.wLength) ? 0 : EP0_SETUPPKTRDY);
  554. return 0;
  555. }
  556. finish:
  557. if (mtu->test_mode) {
  558. ; /* nothing to do */
  559. } else if (handled == USB_GADGET_DELAYED_STATUS) {
  560. /* handle the delay STATUS phase till receive ep_queue on ep0 */
  561. mtu->delayed_status = true;
  562. } else if (le16_to_cpu(setup.wLength) == 0) { /* no data stage */
  563. mtu3_writel(mbase, U3D_EP0CSR,
  564. (mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS)
  565. | EP0_SETUPPKTRDY | EP0_DATAEND);
  566. /* complete zlp request directly */
  567. mreq = next_ep0_request(mtu);
  568. if (mreq && !mreq->request.length)
  569. ep0_req_giveback(mtu, &mreq->request);
  570. }
  571. return 0;
  572. }
  573. irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu)
  574. {
  575. void __iomem *mbase = mtu->mac_base;
  576. struct mtu3_request *mreq;
  577. u32 int_status;
  578. irqreturn_t ret = IRQ_NONE;
  579. u32 csr;
  580. u32 len;
  581. int_status = mtu3_readl(mbase, U3D_EPISR);
  582. int_status &= mtu3_readl(mbase, U3D_EPIER);
  583. mtu3_writel(mbase, U3D_EPISR, int_status); /* W1C */
  584. /* only handle ep0's */
  585. if (!(int_status & EP0ISR))
  586. return IRQ_NONE;
  587. csr = mtu3_readl(mbase, U3D_EP0CSR);
  588. dev_dbg(mtu->dev, "%s csr=0x%x\n", __func__, csr);
  589. /* we sent a stall.. need to clear it now.. */
  590. if (csr & EP0_SENTSTALL) {
  591. ep0_stall_set(mtu->ep0, false, 0);
  592. csr = mtu3_readl(mbase, U3D_EP0CSR);
  593. ret = IRQ_HANDLED;
  594. }
  595. dev_dbg(mtu->dev, "ep0_state: %s\n", decode_ep0_state(mtu));
  596. switch (mtu->ep0_state) {
  597. case MU3D_EP0_STATE_TX:
  598. /* irq on clearing txpktrdy */
  599. if ((csr & EP0_FIFOFULL) == 0) {
  600. ep0_tx_state(mtu);
  601. ret = IRQ_HANDLED;
  602. }
  603. break;
  604. case MU3D_EP0_STATE_RX:
  605. /* irq on set rxpktrdy */
  606. if (csr & EP0_RXPKTRDY) {
  607. ep0_rx_state(mtu);
  608. ret = IRQ_HANDLED;
  609. }
  610. break;
  611. case MU3D_EP0_STATE_TX_END:
  612. mtu3_writel(mbase, U3D_EP0CSR,
  613. (csr & EP0_W1C_BITS) | EP0_DATAEND);
  614. mreq = next_ep0_request(mtu);
  615. if (mreq)
  616. ep0_req_giveback(mtu, &mreq->request);
  617. mtu->ep0_state = MU3D_EP0_STATE_SETUP;
  618. ret = IRQ_HANDLED;
  619. dev_dbg(mtu->dev, "ep0_state: %s\n", decode_ep0_state(mtu));
  620. break;
  621. case MU3D_EP0_STATE_SETUP:
  622. if (!(csr & EP0_SETUPPKTRDY))
  623. break;
  624. len = mtu3_readl(mbase, U3D_RXCOUNT0);
  625. if (len != 8) {
  626. dev_err(mtu->dev, "SETUP packet len %d != 8 ?\n", len);
  627. break;
  628. }
  629. ep0_handle_setup(mtu);
  630. ret = IRQ_HANDLED;
  631. break;
  632. default:
  633. /* can't happen */
  634. ep0_stall_set(mtu->ep0, true, 0);
  635. WARN_ON(1);
  636. break;
  637. }
  638. return ret;
  639. }
  640. static int mtu3_ep0_enable(struct usb_ep *ep,
  641. const struct usb_endpoint_descriptor *desc)
  642. {
  643. /* always enabled */
  644. return -EINVAL;
  645. }
  646. static int mtu3_ep0_disable(struct usb_ep *ep)
  647. {
  648. /* always enabled */
  649. return -EINVAL;
  650. }
  651. static int ep0_queue(struct mtu3_ep *mep, struct mtu3_request *mreq)
  652. {
  653. struct mtu3 *mtu = mep->mtu;
  654. mreq->mtu = mtu;
  655. mreq->request.actual = 0;
  656. mreq->request.status = -EINPROGRESS;
  657. dev_dbg(mtu->dev, "%s %s (ep0_state: %s), len#%d\n", __func__,
  658. mep->name, decode_ep0_state(mtu), mreq->request.length);
  659. switch (mtu->ep0_state) {
  660. case MU3D_EP0_STATE_SETUP:
  661. case MU3D_EP0_STATE_RX: /* control-OUT data */
  662. case MU3D_EP0_STATE_TX: /* control-IN data */
  663. break;
  664. default:
  665. dev_err(mtu->dev, "%s, error in ep0 state %s\n", __func__,
  666. decode_ep0_state(mtu));
  667. return -EINVAL;
  668. }
  669. if (mtu->delayed_status) {
  670. u32 csr;
  671. mtu->delayed_status = false;
  672. csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
  673. csr |= EP0_SETUPPKTRDY | EP0_DATAEND;
  674. mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
  675. /* needn't giveback the request for handling delay STATUS */
  676. return 0;
  677. }
  678. if (!list_empty(&mep->req_list))
  679. return -EBUSY;
  680. list_add_tail(&mreq->list, &mep->req_list);
  681. /* sequence #1, IN ... start writing the data */
  682. if (mtu->ep0_state == MU3D_EP0_STATE_TX)
  683. ep0_tx_state(mtu);
  684. return 0;
  685. }
  686. static int mtu3_ep0_queue(struct usb_ep *ep,
  687. struct usb_request *req, gfp_t gfp)
  688. {
  689. struct mtu3_ep *mep;
  690. struct mtu3_request *mreq;
  691. struct mtu3 *mtu;
  692. unsigned long flags;
  693. int ret = 0;
  694. if (!ep || !req)
  695. return -EINVAL;
  696. mep = to_mtu3_ep(ep);
  697. mtu = mep->mtu;
  698. mreq = to_mtu3_request(req);
  699. spin_lock_irqsave(&mtu->lock, flags);
  700. ret = ep0_queue(mep, mreq);
  701. spin_unlock_irqrestore(&mtu->lock, flags);
  702. return ret;
  703. }
  704. static int mtu3_ep0_dequeue(struct usb_ep *ep, struct usb_request *req)
  705. {
  706. /* we just won't support this */
  707. return -EINVAL;
  708. }
  709. static int mtu3_ep0_halt(struct usb_ep *ep, int value)
  710. {
  711. struct mtu3_ep *mep;
  712. struct mtu3 *mtu;
  713. unsigned long flags;
  714. int ret = 0;
  715. if (!ep || !value)
  716. return -EINVAL;
  717. mep = to_mtu3_ep(ep);
  718. mtu = mep->mtu;
  719. dev_dbg(mtu->dev, "%s\n", __func__);
  720. spin_lock_irqsave(&mtu->lock, flags);
  721. if (!list_empty(&mep->req_list)) {
  722. ret = -EBUSY;
  723. goto cleanup;
  724. }
  725. switch (mtu->ep0_state) {
  726. /*
  727. * stalls are usually issued after parsing SETUP packet, either
  728. * directly in irq context from setup() or else later.
  729. */
  730. case MU3D_EP0_STATE_TX:
  731. case MU3D_EP0_STATE_TX_END:
  732. case MU3D_EP0_STATE_RX:
  733. case MU3D_EP0_STATE_SETUP:
  734. ep0_stall_set(mtu->ep0, true, 0);
  735. break;
  736. default:
  737. dev_dbg(mtu->dev, "ep0 can't halt in state %s\n",
  738. decode_ep0_state(mtu));
  739. ret = -EINVAL;
  740. }
  741. cleanup:
  742. spin_unlock_irqrestore(&mtu->lock, flags);
  743. return ret;
  744. }
  745. const struct usb_ep_ops mtu3_ep0_ops = {
  746. .enable = mtu3_ep0_enable,
  747. .disable = mtu3_ep0_disable,
  748. .alloc_request = mtu3_alloc_request,
  749. .free_request = mtu3_free_request,
  750. .queue = mtu3_ep0_queue,
  751. .dequeue = mtu3_ep0_dequeue,
  752. .set_halt = mtu3_ep0_halt,
  753. };