mxser.c 71 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812
  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
  5. * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
  6. *
  7. * This code is loosely based on the 1.8 moxa driver which is based on
  8. * Linux serial driver, written by Linus Torvalds, Theodore T'so and
  9. * others.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  17. * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
  18. * www.moxa.com.
  19. * - Fixed x86_64 cleanness
  20. */
  21. #include <linux/module.h>
  22. #include <linux/errno.h>
  23. #include <linux/signal.h>
  24. #include <linux/sched.h>
  25. #include <linux/timer.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/tty.h>
  28. #include <linux/tty_flip.h>
  29. #include <linux/serial.h>
  30. #include <linux/serial_reg.h>
  31. #include <linux/major.h>
  32. #include <linux/string.h>
  33. #include <linux/fcntl.h>
  34. #include <linux/ptrace.h>
  35. #include <linux/ioport.h>
  36. #include <linux/mm.h>
  37. #include <linux/delay.h>
  38. #include <linux/pci.h>
  39. #include <linux/bitops.h>
  40. #include <linux/slab.h>
  41. #include <linux/ratelimit.h>
  42. #include <asm/io.h>
  43. #include <asm/irq.h>
  44. #include <linux/uaccess.h>
  45. #include "mxser.h"
  46. #define MXSER_VERSION "2.0.5" /* 1.14 */
  47. #define MXSERMAJOR 174
  48. #define MXSER_BOARDS 4 /* Max. boards */
  49. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  50. #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
  51. #define MXSER_ISR_PASS_LIMIT 100
  52. /*CheckIsMoxaMust return value*/
  53. #define MOXA_OTHER_UART 0x00
  54. #define MOXA_MUST_MU150_HWID 0x01
  55. #define MOXA_MUST_MU860_HWID 0x02
  56. #define WAKEUP_CHARS 256
  57. #define UART_MCR_AFE 0x20
  58. #define UART_LSR_SPECIAL 0x1E
  59. #define PCI_DEVICE_ID_POS104UL 0x1044
  60. #define PCI_DEVICE_ID_CB108 0x1080
  61. #define PCI_DEVICE_ID_CP102UF 0x1023
  62. #define PCI_DEVICE_ID_CP112UL 0x1120
  63. #define PCI_DEVICE_ID_CB114 0x1142
  64. #define PCI_DEVICE_ID_CP114UL 0x1143
  65. #define PCI_DEVICE_ID_CB134I 0x1341
  66. #define PCI_DEVICE_ID_CP138U 0x1380
  67. #define C168_ASIC_ID 1
  68. #define C104_ASIC_ID 2
  69. #define C102_ASIC_ID 0xB
  70. #define CI132_ASIC_ID 4
  71. #define CI134_ASIC_ID 3
  72. #define CI104J_ASIC_ID 5
  73. #define MXSER_HIGHBAUD 1
  74. #define MXSER_HAS2 2
  75. /* This is only for PCI */
  76. static const struct {
  77. int type;
  78. int tx_fifo;
  79. int rx_fifo;
  80. int xmit_fifo_size;
  81. int rx_high_water;
  82. int rx_trigger;
  83. int rx_low_water;
  84. long max_baud;
  85. } Gpci_uart_info[] = {
  86. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  87. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  88. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  89. };
  90. #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
  91. struct mxser_cardinfo {
  92. char *name;
  93. unsigned int nports;
  94. unsigned int flags;
  95. };
  96. static const struct mxser_cardinfo mxser_cards[] = {
  97. /* 0*/ { "C168 series", 8, },
  98. { "C104 series", 4, },
  99. { "CI-104J series", 4, },
  100. { "C168H/PCI series", 8, },
  101. { "C104H/PCI series", 4, },
  102. /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
  103. { "CI-132 series", 4, MXSER_HAS2 },
  104. { "CI-134 series", 4, },
  105. { "CP-132 series", 2, },
  106. { "CP-114 series", 4, },
  107. /*10*/ { "CT-114 series", 4, },
  108. { "CP-102 series", 2, MXSER_HIGHBAUD },
  109. { "CP-104U series", 4, },
  110. { "CP-168U series", 8, },
  111. { "CP-132U series", 2, },
  112. /*15*/ { "CP-134U series", 4, },
  113. { "CP-104JU series", 4, },
  114. { "Moxa UC7000 Serial", 8, }, /* RC7000 */
  115. { "CP-118U series", 8, },
  116. { "CP-102UL series", 2, },
  117. /*20*/ { "CP-102U series", 2, },
  118. { "CP-118EL series", 8, },
  119. { "CP-168EL series", 8, },
  120. { "CP-104EL series", 4, },
  121. { "CB-108 series", 8, },
  122. /*25*/ { "CB-114 series", 4, },
  123. { "CB-134I series", 4, },
  124. { "CP-138U series", 8, },
  125. { "POS-104UL series", 4, },
  126. { "CP-114UL series", 4, },
  127. /*30*/ { "CP-102UF series", 2, },
  128. { "CP-112UL series", 2, },
  129. };
  130. /* driver_data correspond to the lines in the structure above
  131. see also ISA probe function before you change something */
  132. static const struct pci_device_id mxser_pcibrds[] = {
  133. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
  134. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
  135. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
  136. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
  137. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
  138. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
  139. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
  140. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
  141. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
  142. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
  143. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
  144. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
  145. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
  146. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
  147. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
  148. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
  149. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
  150. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
  151. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
  152. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
  153. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
  154. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
  155. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
  156. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
  157. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
  158. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
  159. { }
  160. };
  161. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  162. static unsigned long ioaddr[MXSER_BOARDS];
  163. static int ttymajor = MXSERMAJOR;
  164. /* Variables for insmod */
  165. MODULE_AUTHOR("Casper Yang");
  166. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  167. module_param_hw_array(ioaddr, ulong, ioport, NULL, 0);
  168. MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
  169. module_param(ttymajor, int, 0);
  170. MODULE_LICENSE("GPL");
  171. struct mxser_log {
  172. int tick;
  173. unsigned long rxcnt[MXSER_PORTS];
  174. unsigned long txcnt[MXSER_PORTS];
  175. };
  176. struct mxser_mon {
  177. unsigned long rxcnt;
  178. unsigned long txcnt;
  179. unsigned long up_rxcnt;
  180. unsigned long up_txcnt;
  181. int modem_status;
  182. unsigned char hold_reason;
  183. };
  184. struct mxser_mon_ext {
  185. unsigned long rx_cnt[32];
  186. unsigned long tx_cnt[32];
  187. unsigned long up_rxcnt[32];
  188. unsigned long up_txcnt[32];
  189. int modem_status[32];
  190. long baudrate[32];
  191. int databits[32];
  192. int stopbits[32];
  193. int parity[32];
  194. int flowctrl[32];
  195. int fifo[32];
  196. int iftype[32];
  197. };
  198. struct mxser_board;
  199. struct mxser_port {
  200. struct tty_port port;
  201. struct mxser_board *board;
  202. unsigned long ioaddr;
  203. unsigned long opmode_ioaddr;
  204. int max_baud;
  205. int rx_high_water;
  206. int rx_trigger; /* Rx fifo trigger level */
  207. int rx_low_water;
  208. int baud_base; /* max. speed */
  209. int type; /* UART type */
  210. int x_char; /* xon/xoff character */
  211. int IER; /* Interrupt Enable Register */
  212. int MCR; /* Modem control register */
  213. unsigned char stop_rx;
  214. unsigned char ldisc_stop_rx;
  215. int custom_divisor;
  216. unsigned char err_shadow;
  217. struct async_icount icount; /* kernel counters for 4 input interrupts */
  218. unsigned int timeout;
  219. int read_status_mask;
  220. int ignore_status_mask;
  221. unsigned int xmit_fifo_size;
  222. int xmit_head;
  223. int xmit_tail;
  224. int xmit_cnt;
  225. int closing;
  226. struct ktermios normal_termios;
  227. struct mxser_mon mon_data;
  228. spinlock_t slock;
  229. };
  230. struct mxser_board {
  231. unsigned int idx;
  232. int irq;
  233. const struct mxser_cardinfo *info;
  234. unsigned long vector;
  235. unsigned long vector_mask;
  236. int chip_flag;
  237. int uart_type;
  238. struct mxser_port ports[MXSER_PORTS_PER_BOARD];
  239. };
  240. struct mxser_mstatus {
  241. tcflag_t cflag;
  242. int cts;
  243. int dsr;
  244. int ri;
  245. int dcd;
  246. };
  247. static struct mxser_board mxser_boards[MXSER_BOARDS];
  248. static struct tty_driver *mxvar_sdriver;
  249. static struct mxser_log mxvar_log;
  250. static int mxser_set_baud_method[MXSER_PORTS + 1];
  251. static void mxser_enable_must_enchance_mode(unsigned long baseio)
  252. {
  253. u8 oldlcr;
  254. u8 efr;
  255. oldlcr = inb(baseio + UART_LCR);
  256. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  257. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  258. efr |= MOXA_MUST_EFR_EFRB_ENABLE;
  259. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  260. outb(oldlcr, baseio + UART_LCR);
  261. }
  262. #ifdef CONFIG_PCI
  263. static void mxser_disable_must_enchance_mode(unsigned long baseio)
  264. {
  265. u8 oldlcr;
  266. u8 efr;
  267. oldlcr = inb(baseio + UART_LCR);
  268. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  269. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  270. efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
  271. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  272. outb(oldlcr, baseio + UART_LCR);
  273. }
  274. #endif
  275. static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
  276. {
  277. u8 oldlcr;
  278. u8 efr;
  279. oldlcr = inb(baseio + UART_LCR);
  280. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  281. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  282. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  283. efr |= MOXA_MUST_EFR_BANK0;
  284. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  285. outb(value, baseio + MOXA_MUST_XON1_REGISTER);
  286. outb(oldlcr, baseio + UART_LCR);
  287. }
  288. static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
  289. {
  290. u8 oldlcr;
  291. u8 efr;
  292. oldlcr = inb(baseio + UART_LCR);
  293. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  294. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  295. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  296. efr |= MOXA_MUST_EFR_BANK0;
  297. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  298. outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
  299. outb(oldlcr, baseio + UART_LCR);
  300. }
  301. static void mxser_set_must_fifo_value(struct mxser_port *info)
  302. {
  303. u8 oldlcr;
  304. u8 efr;
  305. oldlcr = inb(info->ioaddr + UART_LCR);
  306. outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
  307. efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
  308. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  309. efr |= MOXA_MUST_EFR_BANK1;
  310. outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
  311. outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
  312. outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
  313. outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
  314. outb(oldlcr, info->ioaddr + UART_LCR);
  315. }
  316. static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
  317. {
  318. u8 oldlcr;
  319. u8 efr;
  320. oldlcr = inb(baseio + UART_LCR);
  321. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  322. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  323. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  324. efr |= MOXA_MUST_EFR_BANK2;
  325. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  326. outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
  327. outb(oldlcr, baseio + UART_LCR);
  328. }
  329. #ifdef CONFIG_PCI
  330. static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
  331. {
  332. u8 oldlcr;
  333. u8 efr;
  334. oldlcr = inb(baseio + UART_LCR);
  335. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  336. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  337. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  338. efr |= MOXA_MUST_EFR_BANK2;
  339. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  340. *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
  341. outb(oldlcr, baseio + UART_LCR);
  342. }
  343. #endif
  344. static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
  345. {
  346. u8 oldlcr;
  347. u8 efr;
  348. oldlcr = inb(baseio + UART_LCR);
  349. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  350. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  351. efr &= ~MOXA_MUST_EFR_SF_MASK;
  352. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  353. outb(oldlcr, baseio + UART_LCR);
  354. }
  355. static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
  356. {
  357. u8 oldlcr;
  358. u8 efr;
  359. oldlcr = inb(baseio + UART_LCR);
  360. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  361. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  362. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  363. efr |= MOXA_MUST_EFR_SF_TX1;
  364. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  365. outb(oldlcr, baseio + UART_LCR);
  366. }
  367. static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
  368. {
  369. u8 oldlcr;
  370. u8 efr;
  371. oldlcr = inb(baseio + UART_LCR);
  372. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  373. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  374. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  375. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  376. outb(oldlcr, baseio + UART_LCR);
  377. }
  378. static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
  379. {
  380. u8 oldlcr;
  381. u8 efr;
  382. oldlcr = inb(baseio + UART_LCR);
  383. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  384. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  385. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  386. efr |= MOXA_MUST_EFR_SF_RX1;
  387. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  388. outb(oldlcr, baseio + UART_LCR);
  389. }
  390. static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
  391. {
  392. u8 oldlcr;
  393. u8 efr;
  394. oldlcr = inb(baseio + UART_LCR);
  395. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  396. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  397. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  398. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  399. outb(oldlcr, baseio + UART_LCR);
  400. }
  401. #ifdef CONFIG_PCI
  402. static int CheckIsMoxaMust(unsigned long io)
  403. {
  404. u8 oldmcr, hwid;
  405. int i;
  406. outb(0, io + UART_LCR);
  407. mxser_disable_must_enchance_mode(io);
  408. oldmcr = inb(io + UART_MCR);
  409. outb(0, io + UART_MCR);
  410. mxser_set_must_xon1_value(io, 0x11);
  411. if ((hwid = inb(io + UART_MCR)) != 0) {
  412. outb(oldmcr, io + UART_MCR);
  413. return MOXA_OTHER_UART;
  414. }
  415. mxser_get_must_hardware_id(io, &hwid);
  416. for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
  417. if (hwid == Gpci_uart_info[i].type)
  418. return (int)hwid;
  419. }
  420. return MOXA_OTHER_UART;
  421. }
  422. #endif
  423. static void process_txrx_fifo(struct mxser_port *info)
  424. {
  425. int i;
  426. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  427. info->rx_trigger = 1;
  428. info->rx_high_water = 1;
  429. info->rx_low_water = 1;
  430. info->xmit_fifo_size = 1;
  431. } else
  432. for (i = 0; i < UART_INFO_NUM; i++)
  433. if (info->board->chip_flag == Gpci_uart_info[i].type) {
  434. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  435. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  436. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  437. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  438. break;
  439. }
  440. }
  441. static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
  442. {
  443. static unsigned char mxser_msr[MXSER_PORTS + 1];
  444. unsigned char status = 0;
  445. status = inb(baseaddr + UART_MSR);
  446. mxser_msr[port] &= 0x0F;
  447. mxser_msr[port] |= status;
  448. status = mxser_msr[port];
  449. if (mode)
  450. mxser_msr[port] = 0;
  451. return status;
  452. }
  453. static int mxser_carrier_raised(struct tty_port *port)
  454. {
  455. struct mxser_port *mp = container_of(port, struct mxser_port, port);
  456. return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
  457. }
  458. static void mxser_dtr_rts(struct tty_port *port, int on)
  459. {
  460. struct mxser_port *mp = container_of(port, struct mxser_port, port);
  461. unsigned long flags;
  462. spin_lock_irqsave(&mp->slock, flags);
  463. if (on)
  464. outb(inb(mp->ioaddr + UART_MCR) |
  465. UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
  466. else
  467. outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
  468. mp->ioaddr + UART_MCR);
  469. spin_unlock_irqrestore(&mp->slock, flags);
  470. }
  471. static int mxser_set_baud(struct tty_struct *tty, long newspd)
  472. {
  473. struct mxser_port *info = tty->driver_data;
  474. unsigned int quot = 0, baud;
  475. unsigned char cval;
  476. u64 timeout;
  477. if (!info->ioaddr)
  478. return -1;
  479. if (newspd > info->max_baud)
  480. return -1;
  481. if (newspd == 134) {
  482. quot = 2 * info->baud_base / 269;
  483. tty_encode_baud_rate(tty, 134, 134);
  484. } else if (newspd) {
  485. quot = info->baud_base / newspd;
  486. if (quot == 0)
  487. quot = 1;
  488. baud = info->baud_base/quot;
  489. tty_encode_baud_rate(tty, baud, baud);
  490. } else {
  491. quot = 0;
  492. }
  493. /*
  494. * worst case (128 * 1000 * 10 * 18432) needs 35 bits, so divide in the
  495. * u64 domain
  496. */
  497. timeout = (u64)info->xmit_fifo_size * HZ * 10 * quot;
  498. do_div(timeout, info->baud_base);
  499. info->timeout = timeout + HZ / 50; /* Add .02 seconds of slop */
  500. if (quot) {
  501. info->MCR |= UART_MCR_DTR;
  502. outb(info->MCR, info->ioaddr + UART_MCR);
  503. } else {
  504. info->MCR &= ~UART_MCR_DTR;
  505. outb(info->MCR, info->ioaddr + UART_MCR);
  506. return 0;
  507. }
  508. cval = inb(info->ioaddr + UART_LCR);
  509. outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
  510. outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
  511. outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
  512. outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
  513. #ifdef BOTHER
  514. if (C_BAUD(tty) == BOTHER) {
  515. quot = info->baud_base % newspd;
  516. quot *= 8;
  517. if (quot % newspd > newspd / 2) {
  518. quot /= newspd;
  519. quot++;
  520. } else
  521. quot /= newspd;
  522. mxser_set_must_enum_value(info->ioaddr, quot);
  523. } else
  524. #endif
  525. mxser_set_must_enum_value(info->ioaddr, 0);
  526. return 0;
  527. }
  528. /*
  529. * This routine is called to set the UART divisor registers to match
  530. * the specified baud rate for a serial port.
  531. */
  532. static int mxser_change_speed(struct tty_struct *tty,
  533. struct ktermios *old_termios)
  534. {
  535. struct mxser_port *info = tty->driver_data;
  536. unsigned cflag, cval, fcr;
  537. int ret = 0;
  538. unsigned char status;
  539. cflag = tty->termios.c_cflag;
  540. if (!info->ioaddr)
  541. return ret;
  542. if (mxser_set_baud_method[tty->index] == 0)
  543. mxser_set_baud(tty, tty_get_baud_rate(tty));
  544. /* byte size and parity */
  545. switch (cflag & CSIZE) {
  546. case CS5:
  547. cval = 0x00;
  548. break;
  549. case CS6:
  550. cval = 0x01;
  551. break;
  552. case CS7:
  553. cval = 0x02;
  554. break;
  555. case CS8:
  556. cval = 0x03;
  557. break;
  558. default:
  559. cval = 0x00;
  560. break; /* too keep GCC shut... */
  561. }
  562. if (cflag & CSTOPB)
  563. cval |= 0x04;
  564. if (cflag & PARENB)
  565. cval |= UART_LCR_PARITY;
  566. if (!(cflag & PARODD))
  567. cval |= UART_LCR_EPAR;
  568. if (cflag & CMSPAR)
  569. cval |= UART_LCR_SPAR;
  570. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  571. if (info->board->chip_flag) {
  572. fcr = UART_FCR_ENABLE_FIFO;
  573. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  574. mxser_set_must_fifo_value(info);
  575. } else
  576. fcr = 0;
  577. } else {
  578. fcr = UART_FCR_ENABLE_FIFO;
  579. if (info->board->chip_flag) {
  580. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  581. mxser_set_must_fifo_value(info);
  582. } else {
  583. switch (info->rx_trigger) {
  584. case 1:
  585. fcr |= UART_FCR_TRIGGER_1;
  586. break;
  587. case 4:
  588. fcr |= UART_FCR_TRIGGER_4;
  589. break;
  590. case 8:
  591. fcr |= UART_FCR_TRIGGER_8;
  592. break;
  593. default:
  594. fcr |= UART_FCR_TRIGGER_14;
  595. break;
  596. }
  597. }
  598. }
  599. /* CTS flow control flag and modem status interrupts */
  600. info->IER &= ~UART_IER_MSI;
  601. info->MCR &= ~UART_MCR_AFE;
  602. tty_port_set_cts_flow(&info->port, cflag & CRTSCTS);
  603. if (cflag & CRTSCTS) {
  604. info->IER |= UART_IER_MSI;
  605. if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
  606. info->MCR |= UART_MCR_AFE;
  607. } else {
  608. status = inb(info->ioaddr + UART_MSR);
  609. if (tty->hw_stopped) {
  610. if (status & UART_MSR_CTS) {
  611. tty->hw_stopped = 0;
  612. if (info->type != PORT_16550A &&
  613. !info->board->chip_flag) {
  614. outb(info->IER & ~UART_IER_THRI,
  615. info->ioaddr +
  616. UART_IER);
  617. info->IER |= UART_IER_THRI;
  618. outb(info->IER, info->ioaddr +
  619. UART_IER);
  620. }
  621. tty_wakeup(tty);
  622. }
  623. } else {
  624. if (!(status & UART_MSR_CTS)) {
  625. tty->hw_stopped = 1;
  626. if ((info->type != PORT_16550A) &&
  627. (!info->board->chip_flag)) {
  628. info->IER &= ~UART_IER_THRI;
  629. outb(info->IER, info->ioaddr +
  630. UART_IER);
  631. }
  632. }
  633. }
  634. }
  635. }
  636. outb(info->MCR, info->ioaddr + UART_MCR);
  637. tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL);
  638. if (~cflag & CLOCAL)
  639. info->IER |= UART_IER_MSI;
  640. outb(info->IER, info->ioaddr + UART_IER);
  641. /*
  642. * Set up parity check flag
  643. */
  644. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  645. if (I_INPCK(tty))
  646. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  647. if (I_BRKINT(tty) || I_PARMRK(tty))
  648. info->read_status_mask |= UART_LSR_BI;
  649. info->ignore_status_mask = 0;
  650. if (I_IGNBRK(tty)) {
  651. info->ignore_status_mask |= UART_LSR_BI;
  652. info->read_status_mask |= UART_LSR_BI;
  653. /*
  654. * If we're ignore parity and break indicators, ignore
  655. * overruns too. (For real raw support).
  656. */
  657. if (I_IGNPAR(tty)) {
  658. info->ignore_status_mask |=
  659. UART_LSR_OE |
  660. UART_LSR_PE |
  661. UART_LSR_FE;
  662. info->read_status_mask |=
  663. UART_LSR_OE |
  664. UART_LSR_PE |
  665. UART_LSR_FE;
  666. }
  667. }
  668. if (info->board->chip_flag) {
  669. mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
  670. mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
  671. if (I_IXON(tty)) {
  672. mxser_enable_must_rx_software_flow_control(
  673. info->ioaddr);
  674. } else {
  675. mxser_disable_must_rx_software_flow_control(
  676. info->ioaddr);
  677. }
  678. if (I_IXOFF(tty)) {
  679. mxser_enable_must_tx_software_flow_control(
  680. info->ioaddr);
  681. } else {
  682. mxser_disable_must_tx_software_flow_control(
  683. info->ioaddr);
  684. }
  685. }
  686. outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
  687. outb(cval, info->ioaddr + UART_LCR);
  688. return ret;
  689. }
  690. static void mxser_check_modem_status(struct tty_struct *tty,
  691. struct mxser_port *port, int status)
  692. {
  693. /* update input line counters */
  694. if (status & UART_MSR_TERI)
  695. port->icount.rng++;
  696. if (status & UART_MSR_DDSR)
  697. port->icount.dsr++;
  698. if (status & UART_MSR_DDCD)
  699. port->icount.dcd++;
  700. if (status & UART_MSR_DCTS)
  701. port->icount.cts++;
  702. port->mon_data.modem_status = status;
  703. wake_up_interruptible(&port->port.delta_msr_wait);
  704. if (tty_port_check_carrier(&port->port) && (status & UART_MSR_DDCD)) {
  705. if (status & UART_MSR_DCD)
  706. wake_up_interruptible(&port->port.open_wait);
  707. }
  708. if (tty_port_cts_enabled(&port->port)) {
  709. if (tty->hw_stopped) {
  710. if (status & UART_MSR_CTS) {
  711. tty->hw_stopped = 0;
  712. if ((port->type != PORT_16550A) &&
  713. (!port->board->chip_flag)) {
  714. outb(port->IER & ~UART_IER_THRI,
  715. port->ioaddr + UART_IER);
  716. port->IER |= UART_IER_THRI;
  717. outb(port->IER, port->ioaddr +
  718. UART_IER);
  719. }
  720. tty_wakeup(tty);
  721. }
  722. } else {
  723. if (!(status & UART_MSR_CTS)) {
  724. tty->hw_stopped = 1;
  725. if (port->type != PORT_16550A &&
  726. !port->board->chip_flag) {
  727. port->IER &= ~UART_IER_THRI;
  728. outb(port->IER, port->ioaddr +
  729. UART_IER);
  730. }
  731. }
  732. }
  733. }
  734. }
  735. static int mxser_activate(struct tty_port *port, struct tty_struct *tty)
  736. {
  737. struct mxser_port *info = container_of(port, struct mxser_port, port);
  738. unsigned long page;
  739. unsigned long flags;
  740. page = __get_free_page(GFP_KERNEL);
  741. if (!page)
  742. return -ENOMEM;
  743. spin_lock_irqsave(&info->slock, flags);
  744. if (!info->ioaddr || !info->type) {
  745. set_bit(TTY_IO_ERROR, &tty->flags);
  746. free_page(page);
  747. spin_unlock_irqrestore(&info->slock, flags);
  748. return 0;
  749. }
  750. info->port.xmit_buf = (unsigned char *) page;
  751. /*
  752. * Clear the FIFO buffers and disable them
  753. * (they will be reenabled in mxser_change_speed())
  754. */
  755. if (info->board->chip_flag)
  756. outb((UART_FCR_CLEAR_RCVR |
  757. UART_FCR_CLEAR_XMIT |
  758. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
  759. else
  760. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  761. info->ioaddr + UART_FCR);
  762. /*
  763. * At this point there's no way the LSR could still be 0xFF;
  764. * if it is, then bail out, because there's likely no UART
  765. * here.
  766. */
  767. if (inb(info->ioaddr + UART_LSR) == 0xff) {
  768. spin_unlock_irqrestore(&info->slock, flags);
  769. if (capable(CAP_SYS_ADMIN)) {
  770. set_bit(TTY_IO_ERROR, &tty->flags);
  771. return 0;
  772. } else
  773. return -ENODEV;
  774. }
  775. /*
  776. * Clear the interrupt registers.
  777. */
  778. (void) inb(info->ioaddr + UART_LSR);
  779. (void) inb(info->ioaddr + UART_RX);
  780. (void) inb(info->ioaddr + UART_IIR);
  781. (void) inb(info->ioaddr + UART_MSR);
  782. /*
  783. * Now, initialize the UART
  784. */
  785. outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
  786. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  787. outb(info->MCR, info->ioaddr + UART_MCR);
  788. /*
  789. * Finally, enable interrupts
  790. */
  791. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  792. if (info->board->chip_flag)
  793. info->IER |= MOXA_MUST_IER_EGDAI;
  794. outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
  795. /*
  796. * And clear the interrupt registers again for luck.
  797. */
  798. (void) inb(info->ioaddr + UART_LSR);
  799. (void) inb(info->ioaddr + UART_RX);
  800. (void) inb(info->ioaddr + UART_IIR);
  801. (void) inb(info->ioaddr + UART_MSR);
  802. clear_bit(TTY_IO_ERROR, &tty->flags);
  803. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  804. /*
  805. * and set the speed of the serial port
  806. */
  807. mxser_change_speed(tty, NULL);
  808. spin_unlock_irqrestore(&info->slock, flags);
  809. return 0;
  810. }
  811. /*
  812. * This routine will shutdown a serial port
  813. */
  814. static void mxser_shutdown_port(struct tty_port *port)
  815. {
  816. struct mxser_port *info = container_of(port, struct mxser_port, port);
  817. unsigned long flags;
  818. spin_lock_irqsave(&info->slock, flags);
  819. /*
  820. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  821. * here so the queue might never be waken up
  822. */
  823. wake_up_interruptible(&info->port.delta_msr_wait);
  824. /*
  825. * Free the xmit buffer, if necessary
  826. */
  827. if (info->port.xmit_buf) {
  828. free_page((unsigned long) info->port.xmit_buf);
  829. info->port.xmit_buf = NULL;
  830. }
  831. info->IER = 0;
  832. outb(0x00, info->ioaddr + UART_IER);
  833. /* clear Rx/Tx FIFO's */
  834. if (info->board->chip_flag)
  835. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
  836. MOXA_MUST_FCR_GDA_MODE_ENABLE,
  837. info->ioaddr + UART_FCR);
  838. else
  839. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  840. info->ioaddr + UART_FCR);
  841. /* read data port to reset things */
  842. (void) inb(info->ioaddr + UART_RX);
  843. if (info->board->chip_flag)
  844. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  845. spin_unlock_irqrestore(&info->slock, flags);
  846. }
  847. /*
  848. * This routine is called whenever a serial port is opened. It
  849. * enables interrupts for a serial port, linking in its async structure into
  850. * the IRQ chain. It also performs the serial-specific
  851. * initialization for the tty structure.
  852. */
  853. static int mxser_open(struct tty_struct *tty, struct file *filp)
  854. {
  855. struct mxser_port *info;
  856. int line;
  857. line = tty->index;
  858. if (line == MXSER_PORTS)
  859. return 0;
  860. info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
  861. if (!info->ioaddr)
  862. return -ENODEV;
  863. tty->driver_data = info;
  864. return tty_port_open(&info->port, tty, filp);
  865. }
  866. static void mxser_flush_buffer(struct tty_struct *tty)
  867. {
  868. struct mxser_port *info = tty->driver_data;
  869. char fcr;
  870. unsigned long flags;
  871. spin_lock_irqsave(&info->slock, flags);
  872. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  873. fcr = inb(info->ioaddr + UART_FCR);
  874. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  875. info->ioaddr + UART_FCR);
  876. outb(fcr, info->ioaddr + UART_FCR);
  877. spin_unlock_irqrestore(&info->slock, flags);
  878. tty_wakeup(tty);
  879. }
  880. static void mxser_close_port(struct tty_port *port)
  881. {
  882. struct mxser_port *info = container_of(port, struct mxser_port, port);
  883. unsigned long timeout;
  884. /*
  885. * At this point we stop accepting input. To do this, we
  886. * disable the receive line status interrupts, and tell the
  887. * interrupt driver to stop checking the data ready bit in the
  888. * line status register.
  889. */
  890. info->IER &= ~UART_IER_RLSI;
  891. if (info->board->chip_flag)
  892. info->IER &= ~MOXA_MUST_RECV_ISR;
  893. outb(info->IER, info->ioaddr + UART_IER);
  894. /*
  895. * Before we drop DTR, make sure the UART transmitter
  896. * has completely drained; this is especially
  897. * important if there is a transmit FIFO!
  898. */
  899. timeout = jiffies + HZ;
  900. while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
  901. schedule_timeout_interruptible(5);
  902. if (time_after(jiffies, timeout))
  903. break;
  904. }
  905. }
  906. /*
  907. * This routine is called when the serial port gets closed. First, we
  908. * wait for the last remaining data to be sent. Then, we unlink its
  909. * async structure from the interrupt chain if necessary, and we free
  910. * that IRQ if nothing is left in the chain.
  911. */
  912. static void mxser_close(struct tty_struct *tty, struct file *filp)
  913. {
  914. struct mxser_port *info = tty->driver_data;
  915. struct tty_port *port = &info->port;
  916. if (tty->index == MXSER_PORTS || info == NULL)
  917. return;
  918. if (tty_port_close_start(port, tty, filp) == 0)
  919. return;
  920. info->closing = 1;
  921. mutex_lock(&port->mutex);
  922. mxser_close_port(port);
  923. mxser_flush_buffer(tty);
  924. if (tty_port_initialized(port) && C_HUPCL(tty))
  925. tty_port_lower_dtr_rts(port);
  926. mxser_shutdown_port(port);
  927. tty_port_set_initialized(port, 0);
  928. mutex_unlock(&port->mutex);
  929. info->closing = 0;
  930. /* Right now the tty_port set is done outside of the close_end helper
  931. as we don't yet have everyone using refcounts */
  932. tty_port_close_end(port, tty);
  933. tty_port_tty_set(port, NULL);
  934. }
  935. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  936. {
  937. int c, total = 0;
  938. struct mxser_port *info = tty->driver_data;
  939. unsigned long flags;
  940. if (!info->port.xmit_buf)
  941. return 0;
  942. while (1) {
  943. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  944. SERIAL_XMIT_SIZE - info->xmit_head));
  945. if (c <= 0)
  946. break;
  947. memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
  948. spin_lock_irqsave(&info->slock, flags);
  949. info->xmit_head = (info->xmit_head + c) &
  950. (SERIAL_XMIT_SIZE - 1);
  951. info->xmit_cnt += c;
  952. spin_unlock_irqrestore(&info->slock, flags);
  953. buf += c;
  954. count -= c;
  955. total += c;
  956. }
  957. if (info->xmit_cnt && !tty->stopped) {
  958. if (!tty->hw_stopped ||
  959. (info->type == PORT_16550A) ||
  960. (info->board->chip_flag)) {
  961. spin_lock_irqsave(&info->slock, flags);
  962. outb(info->IER & ~UART_IER_THRI, info->ioaddr +
  963. UART_IER);
  964. info->IER |= UART_IER_THRI;
  965. outb(info->IER, info->ioaddr + UART_IER);
  966. spin_unlock_irqrestore(&info->slock, flags);
  967. }
  968. }
  969. return total;
  970. }
  971. static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
  972. {
  973. struct mxser_port *info = tty->driver_data;
  974. unsigned long flags;
  975. if (!info->port.xmit_buf)
  976. return 0;
  977. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  978. return 0;
  979. spin_lock_irqsave(&info->slock, flags);
  980. info->port.xmit_buf[info->xmit_head++] = ch;
  981. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  982. info->xmit_cnt++;
  983. spin_unlock_irqrestore(&info->slock, flags);
  984. if (!tty->stopped) {
  985. if (!tty->hw_stopped ||
  986. (info->type == PORT_16550A) ||
  987. info->board->chip_flag) {
  988. spin_lock_irqsave(&info->slock, flags);
  989. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  990. info->IER |= UART_IER_THRI;
  991. outb(info->IER, info->ioaddr + UART_IER);
  992. spin_unlock_irqrestore(&info->slock, flags);
  993. }
  994. }
  995. return 1;
  996. }
  997. static void mxser_flush_chars(struct tty_struct *tty)
  998. {
  999. struct mxser_port *info = tty->driver_data;
  1000. unsigned long flags;
  1001. if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
  1002. (tty->hw_stopped && info->type != PORT_16550A &&
  1003. !info->board->chip_flag))
  1004. return;
  1005. spin_lock_irqsave(&info->slock, flags);
  1006. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1007. info->IER |= UART_IER_THRI;
  1008. outb(info->IER, info->ioaddr + UART_IER);
  1009. spin_unlock_irqrestore(&info->slock, flags);
  1010. }
  1011. static int mxser_write_room(struct tty_struct *tty)
  1012. {
  1013. struct mxser_port *info = tty->driver_data;
  1014. int ret;
  1015. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1016. return ret < 0 ? 0 : ret;
  1017. }
  1018. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1019. {
  1020. struct mxser_port *info = tty->driver_data;
  1021. return info->xmit_cnt;
  1022. }
  1023. /*
  1024. * ------------------------------------------------------------
  1025. * friends of mxser_ioctl()
  1026. * ------------------------------------------------------------
  1027. */
  1028. static int mxser_get_serial_info(struct tty_struct *tty,
  1029. struct serial_struct __user *retinfo)
  1030. {
  1031. struct mxser_port *info = tty->driver_data;
  1032. struct serial_struct tmp = {
  1033. .type = info->type,
  1034. .line = tty->index,
  1035. .port = info->ioaddr,
  1036. .irq = info->board->irq,
  1037. .flags = info->port.flags,
  1038. .baud_base = info->baud_base,
  1039. .close_delay = info->port.close_delay,
  1040. .closing_wait = info->port.closing_wait,
  1041. .custom_divisor = info->custom_divisor,
  1042. };
  1043. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  1044. return -EFAULT;
  1045. return 0;
  1046. }
  1047. static int mxser_set_serial_info(struct tty_struct *tty,
  1048. struct serial_struct __user *new_info)
  1049. {
  1050. struct mxser_port *info = tty->driver_data;
  1051. struct tty_port *port = &info->port;
  1052. struct serial_struct new_serial;
  1053. speed_t baud;
  1054. unsigned long sl_flags;
  1055. unsigned int flags;
  1056. int retval = 0;
  1057. if (!new_info || !info->ioaddr)
  1058. return -ENODEV;
  1059. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  1060. return -EFAULT;
  1061. if (new_serial.irq != info->board->irq ||
  1062. new_serial.port != info->ioaddr)
  1063. return -EINVAL;
  1064. flags = port->flags & ASYNC_SPD_MASK;
  1065. if (!capable(CAP_SYS_ADMIN)) {
  1066. if ((new_serial.baud_base != info->baud_base) ||
  1067. (new_serial.close_delay != info->port.close_delay) ||
  1068. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
  1069. return -EPERM;
  1070. info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
  1071. (new_serial.flags & ASYNC_USR_MASK));
  1072. } else {
  1073. /*
  1074. * OK, past this point, all the error checking has been done.
  1075. * At this point, we start making changes.....
  1076. */
  1077. port->flags = ((port->flags & ~ASYNC_FLAGS) |
  1078. (new_serial.flags & ASYNC_FLAGS));
  1079. port->close_delay = new_serial.close_delay * HZ / 100;
  1080. port->closing_wait = new_serial.closing_wait * HZ / 100;
  1081. port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  1082. if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
  1083. (new_serial.baud_base != info->baud_base ||
  1084. new_serial.custom_divisor !=
  1085. info->custom_divisor)) {
  1086. if (new_serial.custom_divisor == 0)
  1087. return -EINVAL;
  1088. baud = new_serial.baud_base / new_serial.custom_divisor;
  1089. tty_encode_baud_rate(tty, baud, baud);
  1090. }
  1091. }
  1092. info->type = new_serial.type;
  1093. process_txrx_fifo(info);
  1094. if (tty_port_initialized(port)) {
  1095. if (flags != (port->flags & ASYNC_SPD_MASK)) {
  1096. spin_lock_irqsave(&info->slock, sl_flags);
  1097. mxser_change_speed(tty, NULL);
  1098. spin_unlock_irqrestore(&info->slock, sl_flags);
  1099. }
  1100. } else {
  1101. retval = mxser_activate(port, tty);
  1102. if (retval == 0)
  1103. tty_port_set_initialized(port, 1);
  1104. }
  1105. return retval;
  1106. }
  1107. /*
  1108. * mxser_get_lsr_info - get line status register info
  1109. *
  1110. * Purpose: Let user call ioctl() to get info when the UART physically
  1111. * is emptied. On bus types like RS485, the transmitter must
  1112. * release the bus after transmitting. This must be done when
  1113. * the transmit shift register is empty, not be done when the
  1114. * transmit holding register is empty. This functionality
  1115. * allows an RS485 driver to be written in user space.
  1116. */
  1117. static int mxser_get_lsr_info(struct mxser_port *info,
  1118. unsigned int __user *value)
  1119. {
  1120. unsigned char status;
  1121. unsigned int result;
  1122. unsigned long flags;
  1123. spin_lock_irqsave(&info->slock, flags);
  1124. status = inb(info->ioaddr + UART_LSR);
  1125. spin_unlock_irqrestore(&info->slock, flags);
  1126. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1127. return put_user(result, value);
  1128. }
  1129. static int mxser_tiocmget(struct tty_struct *tty)
  1130. {
  1131. struct mxser_port *info = tty->driver_data;
  1132. unsigned char control, status;
  1133. unsigned long flags;
  1134. if (tty->index == MXSER_PORTS)
  1135. return -ENOIOCTLCMD;
  1136. if (tty_io_error(tty))
  1137. return -EIO;
  1138. control = info->MCR;
  1139. spin_lock_irqsave(&info->slock, flags);
  1140. status = inb(info->ioaddr + UART_MSR);
  1141. if (status & UART_MSR_ANY_DELTA)
  1142. mxser_check_modem_status(tty, info, status);
  1143. spin_unlock_irqrestore(&info->slock, flags);
  1144. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  1145. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  1146. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  1147. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  1148. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  1149. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1150. }
  1151. static int mxser_tiocmset(struct tty_struct *tty,
  1152. unsigned int set, unsigned int clear)
  1153. {
  1154. struct mxser_port *info = tty->driver_data;
  1155. unsigned long flags;
  1156. if (tty->index == MXSER_PORTS)
  1157. return -ENOIOCTLCMD;
  1158. if (tty_io_error(tty))
  1159. return -EIO;
  1160. spin_lock_irqsave(&info->slock, flags);
  1161. if (set & TIOCM_RTS)
  1162. info->MCR |= UART_MCR_RTS;
  1163. if (set & TIOCM_DTR)
  1164. info->MCR |= UART_MCR_DTR;
  1165. if (clear & TIOCM_RTS)
  1166. info->MCR &= ~UART_MCR_RTS;
  1167. if (clear & TIOCM_DTR)
  1168. info->MCR &= ~UART_MCR_DTR;
  1169. outb(info->MCR, info->ioaddr + UART_MCR);
  1170. spin_unlock_irqrestore(&info->slock, flags);
  1171. return 0;
  1172. }
  1173. static int __init mxser_program_mode(int port)
  1174. {
  1175. int id, i, j, n;
  1176. outb(0, port);
  1177. outb(0, port);
  1178. outb(0, port);
  1179. (void)inb(port);
  1180. (void)inb(port);
  1181. outb(0, port);
  1182. (void)inb(port);
  1183. id = inb(port + 1) & 0x1F;
  1184. if ((id != C168_ASIC_ID) &&
  1185. (id != C104_ASIC_ID) &&
  1186. (id != C102_ASIC_ID) &&
  1187. (id != CI132_ASIC_ID) &&
  1188. (id != CI134_ASIC_ID) &&
  1189. (id != CI104J_ASIC_ID))
  1190. return -1;
  1191. for (i = 0, j = 0; i < 4; i++) {
  1192. n = inb(port + 2);
  1193. if (n == 'M') {
  1194. j = 1;
  1195. } else if ((j == 1) && (n == 1)) {
  1196. j = 2;
  1197. break;
  1198. } else
  1199. j = 0;
  1200. }
  1201. if (j != 2)
  1202. id = -2;
  1203. return id;
  1204. }
  1205. static void __init mxser_normal_mode(int port)
  1206. {
  1207. int i, n;
  1208. outb(0xA5, port + 1);
  1209. outb(0x80, port + 3);
  1210. outb(12, port + 0); /* 9600 bps */
  1211. outb(0, port + 1);
  1212. outb(0x03, port + 3); /* 8 data bits */
  1213. outb(0x13, port + 4); /* loop back mode */
  1214. for (i = 0; i < 16; i++) {
  1215. n = inb(port + 5);
  1216. if ((n & 0x61) == 0x60)
  1217. break;
  1218. if ((n & 1) == 1)
  1219. (void)inb(port);
  1220. }
  1221. outb(0x00, port + 4);
  1222. }
  1223. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  1224. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  1225. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  1226. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  1227. #define EN_CCMD 0x000 /* Chip's command register */
  1228. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  1229. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  1230. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  1231. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  1232. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  1233. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  1234. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  1235. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  1236. static int __init mxser_read_register(int port, unsigned short *regs)
  1237. {
  1238. int i, k, value, id;
  1239. unsigned int j;
  1240. id = mxser_program_mode(port);
  1241. if (id < 0)
  1242. return id;
  1243. for (i = 0; i < 14; i++) {
  1244. k = (i & 0x3F) | 0x180;
  1245. for (j = 0x100; j > 0; j >>= 1) {
  1246. outb(CHIP_CS, port);
  1247. if (k & j) {
  1248. outb(CHIP_CS | CHIP_DO, port);
  1249. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  1250. } else {
  1251. outb(CHIP_CS, port);
  1252. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  1253. }
  1254. }
  1255. (void)inb(port);
  1256. value = 0;
  1257. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  1258. outb(CHIP_CS, port);
  1259. outb(CHIP_CS | CHIP_SK, port);
  1260. if (inb(port) & CHIP_DI)
  1261. value |= j;
  1262. }
  1263. regs[i] = value;
  1264. outb(0, port);
  1265. }
  1266. mxser_normal_mode(port);
  1267. return id;
  1268. }
  1269. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1270. {
  1271. struct mxser_port *ip;
  1272. struct tty_port *port;
  1273. struct tty_struct *tty;
  1274. int result, status;
  1275. unsigned int i, j;
  1276. int ret = 0;
  1277. switch (cmd) {
  1278. case MOXA_GET_MAJOR:
  1279. printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
  1280. "%x (GET_MAJOR), fix your userspace\n",
  1281. current->comm, cmd);
  1282. return put_user(ttymajor, (int __user *)argp);
  1283. case MOXA_CHKPORTENABLE:
  1284. result = 0;
  1285. for (i = 0; i < MXSER_BOARDS; i++)
  1286. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
  1287. if (mxser_boards[i].ports[j].ioaddr)
  1288. result |= (1 << i);
  1289. return put_user(result, (unsigned long __user *)argp);
  1290. case MOXA_GETDATACOUNT:
  1291. /* The receive side is locked by port->slock but it isn't
  1292. clear that an exact snapshot is worth copying here */
  1293. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1294. ret = -EFAULT;
  1295. return ret;
  1296. case MOXA_GETMSTATUS: {
  1297. struct mxser_mstatus ms, __user *msu = argp;
  1298. for (i = 0; i < MXSER_BOARDS; i++)
  1299. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1300. ip = &mxser_boards[i].ports[j];
  1301. port = &ip->port;
  1302. memset(&ms, 0, sizeof(ms));
  1303. mutex_lock(&port->mutex);
  1304. if (!ip->ioaddr)
  1305. goto copy;
  1306. tty = tty_port_tty_get(port);
  1307. if (!tty)
  1308. ms.cflag = ip->normal_termios.c_cflag;
  1309. else
  1310. ms.cflag = tty->termios.c_cflag;
  1311. tty_kref_put(tty);
  1312. spin_lock_irq(&ip->slock);
  1313. status = inb(ip->ioaddr + UART_MSR);
  1314. spin_unlock_irq(&ip->slock);
  1315. if (status & UART_MSR_DCD)
  1316. ms.dcd = 1;
  1317. if (status & UART_MSR_DSR)
  1318. ms.dsr = 1;
  1319. if (status & UART_MSR_CTS)
  1320. ms.cts = 1;
  1321. copy:
  1322. mutex_unlock(&port->mutex);
  1323. if (copy_to_user(msu, &ms, sizeof(ms)))
  1324. return -EFAULT;
  1325. msu++;
  1326. }
  1327. return 0;
  1328. }
  1329. case MOXA_ASPP_MON_EXT: {
  1330. struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
  1331. unsigned int cflag, iflag, p;
  1332. u8 opmode;
  1333. me = kzalloc(sizeof(*me), GFP_KERNEL);
  1334. if (!me)
  1335. return -ENOMEM;
  1336. for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
  1337. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
  1338. if (p >= ARRAY_SIZE(me->rx_cnt)) {
  1339. i = MXSER_BOARDS;
  1340. break;
  1341. }
  1342. ip = &mxser_boards[i].ports[j];
  1343. port = &ip->port;
  1344. mutex_lock(&port->mutex);
  1345. if (!ip->ioaddr) {
  1346. mutex_unlock(&port->mutex);
  1347. continue;
  1348. }
  1349. spin_lock_irq(&ip->slock);
  1350. status = mxser_get_msr(ip->ioaddr, 0, p);
  1351. if (status & UART_MSR_TERI)
  1352. ip->icount.rng++;
  1353. if (status & UART_MSR_DDSR)
  1354. ip->icount.dsr++;
  1355. if (status & UART_MSR_DDCD)
  1356. ip->icount.dcd++;
  1357. if (status & UART_MSR_DCTS)
  1358. ip->icount.cts++;
  1359. ip->mon_data.modem_status = status;
  1360. me->rx_cnt[p] = ip->mon_data.rxcnt;
  1361. me->tx_cnt[p] = ip->mon_data.txcnt;
  1362. me->up_rxcnt[p] = ip->mon_data.up_rxcnt;
  1363. me->up_txcnt[p] = ip->mon_data.up_txcnt;
  1364. me->modem_status[p] =
  1365. ip->mon_data.modem_status;
  1366. spin_unlock_irq(&ip->slock);
  1367. tty = tty_port_tty_get(&ip->port);
  1368. if (!tty) {
  1369. cflag = ip->normal_termios.c_cflag;
  1370. iflag = ip->normal_termios.c_iflag;
  1371. me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios);
  1372. } else {
  1373. cflag = tty->termios.c_cflag;
  1374. iflag = tty->termios.c_iflag;
  1375. me->baudrate[p] = tty_get_baud_rate(tty);
  1376. }
  1377. tty_kref_put(tty);
  1378. me->databits[p] = cflag & CSIZE;
  1379. me->stopbits[p] = cflag & CSTOPB;
  1380. me->parity[p] = cflag & (PARENB | PARODD |
  1381. CMSPAR);
  1382. if (cflag & CRTSCTS)
  1383. me->flowctrl[p] |= 0x03;
  1384. if (iflag & (IXON | IXOFF))
  1385. me->flowctrl[p] |= 0x0C;
  1386. if (ip->type == PORT_16550A)
  1387. me->fifo[p] = 1;
  1388. if (ip->board->chip_flag == MOXA_MUST_MU860_HWID) {
  1389. opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2);
  1390. opmode &= OP_MODE_MASK;
  1391. } else {
  1392. opmode = RS232_MODE;
  1393. }
  1394. me->iftype[p] = opmode;
  1395. mutex_unlock(&port->mutex);
  1396. }
  1397. }
  1398. if (copy_to_user(argp, me, sizeof(*me)))
  1399. ret = -EFAULT;
  1400. kfree(me);
  1401. return ret;
  1402. }
  1403. default:
  1404. return -ENOIOCTLCMD;
  1405. }
  1406. return 0;
  1407. }
  1408. static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
  1409. struct async_icount *cprev)
  1410. {
  1411. struct async_icount cnow;
  1412. unsigned long flags;
  1413. int ret;
  1414. spin_lock_irqsave(&info->slock, flags);
  1415. cnow = info->icount; /* atomic copy */
  1416. spin_unlock_irqrestore(&info->slock, flags);
  1417. ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
  1418. ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
  1419. ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
  1420. ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
  1421. *cprev = cnow;
  1422. return ret;
  1423. }
  1424. static int mxser_ioctl(struct tty_struct *tty,
  1425. unsigned int cmd, unsigned long arg)
  1426. {
  1427. struct mxser_port *info = tty->driver_data;
  1428. struct tty_port *port = &info->port;
  1429. struct async_icount cnow;
  1430. unsigned long flags;
  1431. void __user *argp = (void __user *)arg;
  1432. int retval;
  1433. if (tty->index == MXSER_PORTS)
  1434. return mxser_ioctl_special(cmd, argp);
  1435. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1436. int p;
  1437. unsigned long opmode;
  1438. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1439. int shiftbit;
  1440. unsigned char val, mask;
  1441. if (info->board->chip_flag != MOXA_MUST_MU860_HWID)
  1442. return -EFAULT;
  1443. p = tty->index % 4;
  1444. if (cmd == MOXA_SET_OP_MODE) {
  1445. if (get_user(opmode, (int __user *) argp))
  1446. return -EFAULT;
  1447. if (opmode != RS232_MODE &&
  1448. opmode != RS485_2WIRE_MODE &&
  1449. opmode != RS422_MODE &&
  1450. opmode != RS485_4WIRE_MODE)
  1451. return -EFAULT;
  1452. mask = ModeMask[p];
  1453. shiftbit = p * 2;
  1454. spin_lock_irq(&info->slock);
  1455. val = inb(info->opmode_ioaddr);
  1456. val &= mask;
  1457. val |= (opmode << shiftbit);
  1458. outb(val, info->opmode_ioaddr);
  1459. spin_unlock_irq(&info->slock);
  1460. } else {
  1461. shiftbit = p * 2;
  1462. spin_lock_irq(&info->slock);
  1463. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1464. spin_unlock_irq(&info->slock);
  1465. opmode &= OP_MODE_MASK;
  1466. if (put_user(opmode, (int __user *)argp))
  1467. return -EFAULT;
  1468. }
  1469. return 0;
  1470. }
  1471. if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && tty_io_error(tty))
  1472. return -EIO;
  1473. switch (cmd) {
  1474. case TIOCGSERIAL:
  1475. mutex_lock(&port->mutex);
  1476. retval = mxser_get_serial_info(tty, argp);
  1477. mutex_unlock(&port->mutex);
  1478. return retval;
  1479. case TIOCSSERIAL:
  1480. mutex_lock(&port->mutex);
  1481. retval = mxser_set_serial_info(tty, argp);
  1482. mutex_unlock(&port->mutex);
  1483. return retval;
  1484. case TIOCSERGETLSR: /* Get line status register */
  1485. return mxser_get_lsr_info(info, argp);
  1486. /*
  1487. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1488. * - mask passed in arg for lines of interest
  1489. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1490. * Caller should use TIOCGICOUNT to see which one it was
  1491. */
  1492. case TIOCMIWAIT:
  1493. spin_lock_irqsave(&info->slock, flags);
  1494. cnow = info->icount; /* note the counters on entry */
  1495. spin_unlock_irqrestore(&info->slock, flags);
  1496. return wait_event_interruptible(info->port.delta_msr_wait,
  1497. mxser_cflags_changed(info, arg, &cnow));
  1498. case MOXA_HighSpeedOn:
  1499. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1500. case MOXA_SDS_RSTICOUNTER:
  1501. spin_lock_irq(&info->slock);
  1502. info->mon_data.rxcnt = 0;
  1503. info->mon_data.txcnt = 0;
  1504. spin_unlock_irq(&info->slock);
  1505. return 0;
  1506. case MOXA_ASPP_OQUEUE:{
  1507. int len, lsr;
  1508. len = mxser_chars_in_buffer(tty);
  1509. spin_lock_irq(&info->slock);
  1510. lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
  1511. spin_unlock_irq(&info->slock);
  1512. len += (lsr ? 0 : 1);
  1513. return put_user(len, (int __user *)argp);
  1514. }
  1515. case MOXA_ASPP_MON: {
  1516. int mcr, status;
  1517. spin_lock_irq(&info->slock);
  1518. status = mxser_get_msr(info->ioaddr, 1, tty->index);
  1519. mxser_check_modem_status(tty, info, status);
  1520. mcr = inb(info->ioaddr + UART_MCR);
  1521. spin_unlock_irq(&info->slock);
  1522. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1523. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1524. else
  1525. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1526. if (mcr & MOXA_MUST_MCR_TX_XON)
  1527. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1528. else
  1529. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1530. if (tty->hw_stopped)
  1531. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1532. else
  1533. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1534. if (copy_to_user(argp, &info->mon_data,
  1535. sizeof(struct mxser_mon)))
  1536. return -EFAULT;
  1537. return 0;
  1538. }
  1539. case MOXA_ASPP_LSTATUS: {
  1540. if (put_user(info->err_shadow, (unsigned char __user *)argp))
  1541. return -EFAULT;
  1542. info->err_shadow = 0;
  1543. return 0;
  1544. }
  1545. case MOXA_SET_BAUD_METHOD: {
  1546. int method;
  1547. if (get_user(method, (int __user *)argp))
  1548. return -EFAULT;
  1549. mxser_set_baud_method[tty->index] = method;
  1550. return put_user(method, (int __user *)argp);
  1551. }
  1552. default:
  1553. return -ENOIOCTLCMD;
  1554. }
  1555. return 0;
  1556. }
  1557. /*
  1558. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1559. * Return: write counters to the user passed counter struct
  1560. * NB: both 1->0 and 0->1 transitions are counted except for
  1561. * RI where only 0->1 is counted.
  1562. */
  1563. static int mxser_get_icount(struct tty_struct *tty,
  1564. struct serial_icounter_struct *icount)
  1565. {
  1566. struct mxser_port *info = tty->driver_data;
  1567. struct async_icount cnow;
  1568. unsigned long flags;
  1569. spin_lock_irqsave(&info->slock, flags);
  1570. cnow = info->icount;
  1571. spin_unlock_irqrestore(&info->slock, flags);
  1572. icount->frame = cnow.frame;
  1573. icount->brk = cnow.brk;
  1574. icount->overrun = cnow.overrun;
  1575. icount->buf_overrun = cnow.buf_overrun;
  1576. icount->parity = cnow.parity;
  1577. icount->rx = cnow.rx;
  1578. icount->tx = cnow.tx;
  1579. icount->cts = cnow.cts;
  1580. icount->dsr = cnow.dsr;
  1581. icount->rng = cnow.rng;
  1582. icount->dcd = cnow.dcd;
  1583. return 0;
  1584. }
  1585. static void mxser_stoprx(struct tty_struct *tty)
  1586. {
  1587. struct mxser_port *info = tty->driver_data;
  1588. info->ldisc_stop_rx = 1;
  1589. if (I_IXOFF(tty)) {
  1590. if (info->board->chip_flag) {
  1591. info->IER &= ~MOXA_MUST_RECV_ISR;
  1592. outb(info->IER, info->ioaddr + UART_IER);
  1593. } else {
  1594. info->x_char = STOP_CHAR(tty);
  1595. outb(0, info->ioaddr + UART_IER);
  1596. info->IER |= UART_IER_THRI;
  1597. outb(info->IER, info->ioaddr + UART_IER);
  1598. }
  1599. }
  1600. if (C_CRTSCTS(tty)) {
  1601. info->MCR &= ~UART_MCR_RTS;
  1602. outb(info->MCR, info->ioaddr + UART_MCR);
  1603. }
  1604. }
  1605. /*
  1606. * This routine is called by the upper-layer tty layer to signal that
  1607. * incoming characters should be throttled.
  1608. */
  1609. static void mxser_throttle(struct tty_struct *tty)
  1610. {
  1611. mxser_stoprx(tty);
  1612. }
  1613. static void mxser_unthrottle(struct tty_struct *tty)
  1614. {
  1615. struct mxser_port *info = tty->driver_data;
  1616. /* startrx */
  1617. info->ldisc_stop_rx = 0;
  1618. if (I_IXOFF(tty)) {
  1619. if (info->x_char)
  1620. info->x_char = 0;
  1621. else {
  1622. if (info->board->chip_flag) {
  1623. info->IER |= MOXA_MUST_RECV_ISR;
  1624. outb(info->IER, info->ioaddr + UART_IER);
  1625. } else {
  1626. info->x_char = START_CHAR(tty);
  1627. outb(0, info->ioaddr + UART_IER);
  1628. info->IER |= UART_IER_THRI;
  1629. outb(info->IER, info->ioaddr + UART_IER);
  1630. }
  1631. }
  1632. }
  1633. if (C_CRTSCTS(tty)) {
  1634. info->MCR |= UART_MCR_RTS;
  1635. outb(info->MCR, info->ioaddr + UART_MCR);
  1636. }
  1637. }
  1638. /*
  1639. * mxser_stop() and mxser_start()
  1640. *
  1641. * This routines are called before setting or resetting tty->stopped.
  1642. * They enable or disable transmitter interrupts, as necessary.
  1643. */
  1644. static void mxser_stop(struct tty_struct *tty)
  1645. {
  1646. struct mxser_port *info = tty->driver_data;
  1647. unsigned long flags;
  1648. spin_lock_irqsave(&info->slock, flags);
  1649. if (info->IER & UART_IER_THRI) {
  1650. info->IER &= ~UART_IER_THRI;
  1651. outb(info->IER, info->ioaddr + UART_IER);
  1652. }
  1653. spin_unlock_irqrestore(&info->slock, flags);
  1654. }
  1655. static void mxser_start(struct tty_struct *tty)
  1656. {
  1657. struct mxser_port *info = tty->driver_data;
  1658. unsigned long flags;
  1659. spin_lock_irqsave(&info->slock, flags);
  1660. if (info->xmit_cnt && info->port.xmit_buf) {
  1661. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1662. info->IER |= UART_IER_THRI;
  1663. outb(info->IER, info->ioaddr + UART_IER);
  1664. }
  1665. spin_unlock_irqrestore(&info->slock, flags);
  1666. }
  1667. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1668. {
  1669. struct mxser_port *info = tty->driver_data;
  1670. unsigned long flags;
  1671. spin_lock_irqsave(&info->slock, flags);
  1672. mxser_change_speed(tty, old_termios);
  1673. spin_unlock_irqrestore(&info->slock, flags);
  1674. if ((old_termios->c_cflag & CRTSCTS) && !C_CRTSCTS(tty)) {
  1675. tty->hw_stopped = 0;
  1676. mxser_start(tty);
  1677. }
  1678. /* Handle sw stopped */
  1679. if ((old_termios->c_iflag & IXON) && !I_IXON(tty)) {
  1680. tty->stopped = 0;
  1681. if (info->board->chip_flag) {
  1682. spin_lock_irqsave(&info->slock, flags);
  1683. mxser_disable_must_rx_software_flow_control(
  1684. info->ioaddr);
  1685. spin_unlock_irqrestore(&info->slock, flags);
  1686. }
  1687. mxser_start(tty);
  1688. }
  1689. }
  1690. /*
  1691. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1692. */
  1693. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1694. {
  1695. struct mxser_port *info = tty->driver_data;
  1696. unsigned long orig_jiffies, char_time;
  1697. unsigned long flags;
  1698. int lsr;
  1699. if (info->type == PORT_UNKNOWN)
  1700. return;
  1701. if (info->xmit_fifo_size == 0)
  1702. return; /* Just in case.... */
  1703. orig_jiffies = jiffies;
  1704. /*
  1705. * Set the check interval to be 1/5 of the estimated time to
  1706. * send a single character, and make it at least 1. The check
  1707. * interval should also be less than the timeout.
  1708. *
  1709. * Note: we have to use pretty tight timings here to satisfy
  1710. * the NIST-PCTS.
  1711. */
  1712. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1713. char_time = char_time / 5;
  1714. if (char_time == 0)
  1715. char_time = 1;
  1716. if (timeout && timeout < char_time)
  1717. char_time = timeout;
  1718. /*
  1719. * If the transmitter hasn't cleared in twice the approximate
  1720. * amount of time to send the entire FIFO, it probably won't
  1721. * ever clear. This assumes the UART isn't doing flow
  1722. * control, which is currently the case. Hence, if it ever
  1723. * takes longer than info->timeout, this is probably due to a
  1724. * UART bug of some kind. So, we clamp the timeout parameter at
  1725. * 2*info->timeout.
  1726. */
  1727. if (!timeout || timeout > 2 * info->timeout)
  1728. timeout = 2 * info->timeout;
  1729. spin_lock_irqsave(&info->slock, flags);
  1730. while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
  1731. spin_unlock_irqrestore(&info->slock, flags);
  1732. schedule_timeout_interruptible(char_time);
  1733. spin_lock_irqsave(&info->slock, flags);
  1734. if (signal_pending(current))
  1735. break;
  1736. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1737. break;
  1738. }
  1739. spin_unlock_irqrestore(&info->slock, flags);
  1740. set_current_state(TASK_RUNNING);
  1741. }
  1742. /*
  1743. * This routine is called by tty_hangup() when a hangup is signaled.
  1744. */
  1745. static void mxser_hangup(struct tty_struct *tty)
  1746. {
  1747. struct mxser_port *info = tty->driver_data;
  1748. mxser_flush_buffer(tty);
  1749. tty_port_hangup(&info->port);
  1750. }
  1751. /*
  1752. * mxser_rs_break() --- routine which turns the break handling on or off
  1753. */
  1754. static int mxser_rs_break(struct tty_struct *tty, int break_state)
  1755. {
  1756. struct mxser_port *info = tty->driver_data;
  1757. unsigned long flags;
  1758. spin_lock_irqsave(&info->slock, flags);
  1759. if (break_state == -1)
  1760. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1761. info->ioaddr + UART_LCR);
  1762. else
  1763. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1764. info->ioaddr + UART_LCR);
  1765. spin_unlock_irqrestore(&info->slock, flags);
  1766. return 0;
  1767. }
  1768. static void mxser_receive_chars(struct tty_struct *tty,
  1769. struct mxser_port *port, int *status)
  1770. {
  1771. unsigned char ch, gdl;
  1772. int ignored = 0;
  1773. int cnt = 0;
  1774. int recv_room;
  1775. int max = 256;
  1776. recv_room = tty->receive_room;
  1777. if (recv_room == 0 && !port->ldisc_stop_rx)
  1778. mxser_stoprx(tty);
  1779. if (port->board->chip_flag != MOXA_OTHER_UART) {
  1780. if (*status & UART_LSR_SPECIAL)
  1781. goto intr_old;
  1782. if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
  1783. (*status & MOXA_MUST_LSR_RERR))
  1784. goto intr_old;
  1785. if (*status & MOXA_MUST_LSR_RERR)
  1786. goto intr_old;
  1787. gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
  1788. if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
  1789. gdl &= MOXA_MUST_GDL_MASK;
  1790. if (gdl >= recv_room) {
  1791. if (!port->ldisc_stop_rx)
  1792. mxser_stoprx(tty);
  1793. }
  1794. while (gdl--) {
  1795. ch = inb(port->ioaddr + UART_RX);
  1796. tty_insert_flip_char(&port->port, ch, 0);
  1797. cnt++;
  1798. }
  1799. goto end_intr;
  1800. }
  1801. intr_old:
  1802. do {
  1803. if (max-- < 0)
  1804. break;
  1805. ch = inb(port->ioaddr + UART_RX);
  1806. if (port->board->chip_flag && (*status & UART_LSR_OE))
  1807. outb(0x23, port->ioaddr + UART_FCR);
  1808. *status &= port->read_status_mask;
  1809. if (*status & port->ignore_status_mask) {
  1810. if (++ignored > 100)
  1811. break;
  1812. } else {
  1813. char flag = 0;
  1814. if (*status & UART_LSR_SPECIAL) {
  1815. if (*status & UART_LSR_BI) {
  1816. flag = TTY_BREAK;
  1817. port->icount.brk++;
  1818. if (port->port.flags & ASYNC_SAK)
  1819. do_SAK(tty);
  1820. } else if (*status & UART_LSR_PE) {
  1821. flag = TTY_PARITY;
  1822. port->icount.parity++;
  1823. } else if (*status & UART_LSR_FE) {
  1824. flag = TTY_FRAME;
  1825. port->icount.frame++;
  1826. } else if (*status & UART_LSR_OE) {
  1827. flag = TTY_OVERRUN;
  1828. port->icount.overrun++;
  1829. } else
  1830. flag = TTY_BREAK;
  1831. }
  1832. tty_insert_flip_char(&port->port, ch, flag);
  1833. cnt++;
  1834. if (cnt >= recv_room) {
  1835. if (!port->ldisc_stop_rx)
  1836. mxser_stoprx(tty);
  1837. break;
  1838. }
  1839. }
  1840. if (port->board->chip_flag)
  1841. break;
  1842. *status = inb(port->ioaddr + UART_LSR);
  1843. } while (*status & UART_LSR_DR);
  1844. end_intr:
  1845. mxvar_log.rxcnt[tty->index] += cnt;
  1846. port->mon_data.rxcnt += cnt;
  1847. port->mon_data.up_rxcnt += cnt;
  1848. /*
  1849. * We are called from an interrupt context with &port->slock
  1850. * being held. Drop it temporarily in order to prevent
  1851. * recursive locking.
  1852. */
  1853. spin_unlock(&port->slock);
  1854. tty_flip_buffer_push(&port->port);
  1855. spin_lock(&port->slock);
  1856. }
  1857. static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
  1858. {
  1859. int count, cnt;
  1860. if (port->x_char) {
  1861. outb(port->x_char, port->ioaddr + UART_TX);
  1862. port->x_char = 0;
  1863. mxvar_log.txcnt[tty->index]++;
  1864. port->mon_data.txcnt++;
  1865. port->mon_data.up_txcnt++;
  1866. port->icount.tx++;
  1867. return;
  1868. }
  1869. if (port->port.xmit_buf == NULL)
  1870. return;
  1871. if (port->xmit_cnt <= 0 || tty->stopped ||
  1872. (tty->hw_stopped &&
  1873. (port->type != PORT_16550A) &&
  1874. (!port->board->chip_flag))) {
  1875. port->IER &= ~UART_IER_THRI;
  1876. outb(port->IER, port->ioaddr + UART_IER);
  1877. return;
  1878. }
  1879. cnt = port->xmit_cnt;
  1880. count = port->xmit_fifo_size;
  1881. do {
  1882. outb(port->port.xmit_buf[port->xmit_tail++],
  1883. port->ioaddr + UART_TX);
  1884. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  1885. if (--port->xmit_cnt <= 0)
  1886. break;
  1887. } while (--count > 0);
  1888. mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
  1889. port->mon_data.txcnt += (cnt - port->xmit_cnt);
  1890. port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
  1891. port->icount.tx += (cnt - port->xmit_cnt);
  1892. if (port->xmit_cnt < WAKEUP_CHARS)
  1893. tty_wakeup(tty);
  1894. if (port->xmit_cnt <= 0) {
  1895. port->IER &= ~UART_IER_THRI;
  1896. outb(port->IER, port->ioaddr + UART_IER);
  1897. }
  1898. }
  1899. /*
  1900. * This is the serial driver's generic interrupt routine
  1901. */
  1902. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  1903. {
  1904. int status, iir, i;
  1905. struct mxser_board *brd = NULL;
  1906. struct mxser_port *port;
  1907. int max, irqbits, bits, msr;
  1908. unsigned int int_cnt, pass_counter = 0;
  1909. int handled = IRQ_NONE;
  1910. struct tty_struct *tty;
  1911. for (i = 0; i < MXSER_BOARDS; i++)
  1912. if (dev_id == &mxser_boards[i]) {
  1913. brd = dev_id;
  1914. break;
  1915. }
  1916. if (i == MXSER_BOARDS)
  1917. goto irq_stop;
  1918. if (brd == NULL)
  1919. goto irq_stop;
  1920. max = brd->info->nports;
  1921. while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
  1922. irqbits = inb(brd->vector) & brd->vector_mask;
  1923. if (irqbits == brd->vector_mask)
  1924. break;
  1925. handled = IRQ_HANDLED;
  1926. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  1927. if (irqbits == brd->vector_mask)
  1928. break;
  1929. if (bits & irqbits)
  1930. continue;
  1931. port = &brd->ports[i];
  1932. int_cnt = 0;
  1933. spin_lock(&port->slock);
  1934. do {
  1935. iir = inb(port->ioaddr + UART_IIR);
  1936. if (iir & UART_IIR_NO_INT)
  1937. break;
  1938. iir &= MOXA_MUST_IIR_MASK;
  1939. tty = tty_port_tty_get(&port->port);
  1940. if (!tty || port->closing ||
  1941. !tty_port_initialized(&port->port)) {
  1942. status = inb(port->ioaddr + UART_LSR);
  1943. outb(0x27, port->ioaddr + UART_FCR);
  1944. inb(port->ioaddr + UART_MSR);
  1945. tty_kref_put(tty);
  1946. break;
  1947. }
  1948. status = inb(port->ioaddr + UART_LSR);
  1949. if (status & UART_LSR_PE)
  1950. port->err_shadow |= NPPI_NOTIFY_PARITY;
  1951. if (status & UART_LSR_FE)
  1952. port->err_shadow |= NPPI_NOTIFY_FRAMING;
  1953. if (status & UART_LSR_OE)
  1954. port->err_shadow |=
  1955. NPPI_NOTIFY_HW_OVERRUN;
  1956. if (status & UART_LSR_BI)
  1957. port->err_shadow |= NPPI_NOTIFY_BREAK;
  1958. if (port->board->chip_flag) {
  1959. if (iir == MOXA_MUST_IIR_GDA ||
  1960. iir == MOXA_MUST_IIR_RDA ||
  1961. iir == MOXA_MUST_IIR_RTO ||
  1962. iir == MOXA_MUST_IIR_LSR)
  1963. mxser_receive_chars(tty, port,
  1964. &status);
  1965. } else {
  1966. status &= port->read_status_mask;
  1967. if (status & UART_LSR_DR)
  1968. mxser_receive_chars(tty, port,
  1969. &status);
  1970. }
  1971. msr = inb(port->ioaddr + UART_MSR);
  1972. if (msr & UART_MSR_ANY_DELTA)
  1973. mxser_check_modem_status(tty, port, msr);
  1974. if (port->board->chip_flag) {
  1975. if (iir == 0x02 && (status &
  1976. UART_LSR_THRE))
  1977. mxser_transmit_chars(tty, port);
  1978. } else {
  1979. if (status & UART_LSR_THRE)
  1980. mxser_transmit_chars(tty, port);
  1981. }
  1982. tty_kref_put(tty);
  1983. } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
  1984. spin_unlock(&port->slock);
  1985. }
  1986. }
  1987. irq_stop:
  1988. return handled;
  1989. }
  1990. static const struct tty_operations mxser_ops = {
  1991. .open = mxser_open,
  1992. .close = mxser_close,
  1993. .write = mxser_write,
  1994. .put_char = mxser_put_char,
  1995. .flush_chars = mxser_flush_chars,
  1996. .write_room = mxser_write_room,
  1997. .chars_in_buffer = mxser_chars_in_buffer,
  1998. .flush_buffer = mxser_flush_buffer,
  1999. .ioctl = mxser_ioctl,
  2000. .throttle = mxser_throttle,
  2001. .unthrottle = mxser_unthrottle,
  2002. .set_termios = mxser_set_termios,
  2003. .stop = mxser_stop,
  2004. .start = mxser_start,
  2005. .hangup = mxser_hangup,
  2006. .break_ctl = mxser_rs_break,
  2007. .wait_until_sent = mxser_wait_until_sent,
  2008. .tiocmget = mxser_tiocmget,
  2009. .tiocmset = mxser_tiocmset,
  2010. .get_icount = mxser_get_icount,
  2011. };
  2012. static const struct tty_port_operations mxser_port_ops = {
  2013. .carrier_raised = mxser_carrier_raised,
  2014. .dtr_rts = mxser_dtr_rts,
  2015. .activate = mxser_activate,
  2016. .shutdown = mxser_shutdown_port,
  2017. };
  2018. /*
  2019. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  2020. */
  2021. static bool allow_overlapping_vector;
  2022. module_param(allow_overlapping_vector, bool, S_IRUGO);
  2023. MODULE_PARM_DESC(allow_overlapping_vector, "whether we allow ISA cards to be configured such that vector overlabs IO ports (default=no)");
  2024. static bool mxser_overlapping_vector(struct mxser_board *brd)
  2025. {
  2026. return allow_overlapping_vector &&
  2027. brd->vector >= brd->ports[0].ioaddr &&
  2028. brd->vector < brd->ports[0].ioaddr + 8 * brd->info->nports;
  2029. }
  2030. static int mxser_request_vector(struct mxser_board *brd)
  2031. {
  2032. if (mxser_overlapping_vector(brd))
  2033. return 0;
  2034. return request_region(brd->vector, 1, "mxser(vector)") ? 0 : -EIO;
  2035. }
  2036. static void mxser_release_vector(struct mxser_board *brd)
  2037. {
  2038. if (mxser_overlapping_vector(brd))
  2039. return;
  2040. release_region(brd->vector, 1);
  2041. }
  2042. static void mxser_release_ISA_res(struct mxser_board *brd)
  2043. {
  2044. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2045. mxser_release_vector(brd);
  2046. }
  2047. static int mxser_initbrd(struct mxser_board *brd,
  2048. struct pci_dev *pdev)
  2049. {
  2050. struct mxser_port *info;
  2051. unsigned int i;
  2052. int retval;
  2053. printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
  2054. brd->ports[0].max_baud);
  2055. for (i = 0; i < brd->info->nports; i++) {
  2056. info = &brd->ports[i];
  2057. tty_port_init(&info->port);
  2058. info->port.ops = &mxser_port_ops;
  2059. info->board = brd;
  2060. info->stop_rx = 0;
  2061. info->ldisc_stop_rx = 0;
  2062. /* Enhance mode enabled here */
  2063. if (brd->chip_flag != MOXA_OTHER_UART)
  2064. mxser_enable_must_enchance_mode(info->ioaddr);
  2065. info->type = brd->uart_type;
  2066. process_txrx_fifo(info);
  2067. info->custom_divisor = info->baud_base * 16;
  2068. info->port.close_delay = 5 * HZ / 10;
  2069. info->port.closing_wait = 30 * HZ;
  2070. info->normal_termios = mxvar_sdriver->init_termios;
  2071. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  2072. info->err_shadow = 0;
  2073. spin_lock_init(&info->slock);
  2074. /* before set INT ISR, disable all int */
  2075. outb(inb(info->ioaddr + UART_IER) & 0xf0,
  2076. info->ioaddr + UART_IER);
  2077. }
  2078. retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
  2079. brd);
  2080. if (retval) {
  2081. for (i = 0; i < brd->info->nports; i++)
  2082. tty_port_destroy(&brd->ports[i].port);
  2083. printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
  2084. "conflict with another device.\n",
  2085. brd->info->name, brd->irq);
  2086. }
  2087. return retval;
  2088. }
  2089. static void mxser_board_remove(struct mxser_board *brd)
  2090. {
  2091. unsigned int i;
  2092. for (i = 0; i < brd->info->nports; i++) {
  2093. tty_unregister_device(mxvar_sdriver, brd->idx + i);
  2094. tty_port_destroy(&brd->ports[i].port);
  2095. }
  2096. free_irq(brd->irq, brd);
  2097. }
  2098. static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
  2099. {
  2100. int id, i, bits, ret;
  2101. unsigned short regs[16], irq;
  2102. unsigned char scratch, scratch2;
  2103. brd->chip_flag = MOXA_OTHER_UART;
  2104. id = mxser_read_register(cap, regs);
  2105. switch (id) {
  2106. case C168_ASIC_ID:
  2107. brd->info = &mxser_cards[0];
  2108. break;
  2109. case C104_ASIC_ID:
  2110. brd->info = &mxser_cards[1];
  2111. break;
  2112. case CI104J_ASIC_ID:
  2113. brd->info = &mxser_cards[2];
  2114. break;
  2115. case C102_ASIC_ID:
  2116. brd->info = &mxser_cards[5];
  2117. break;
  2118. case CI132_ASIC_ID:
  2119. brd->info = &mxser_cards[6];
  2120. break;
  2121. case CI134_ASIC_ID:
  2122. brd->info = &mxser_cards[7];
  2123. break;
  2124. default:
  2125. return 0;
  2126. }
  2127. irq = 0;
  2128. /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
  2129. Flag-hack checks if configuration should be read as 2-port here. */
  2130. if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
  2131. irq = regs[9] & 0xF000;
  2132. irq = irq | (irq >> 4);
  2133. if (irq != (regs[9] & 0xFF00))
  2134. goto err_irqconflict;
  2135. } else if (brd->info->nports == 4) {
  2136. irq = regs[9] & 0xF000;
  2137. irq = irq | (irq >> 4);
  2138. irq = irq | (irq >> 8);
  2139. if (irq != regs[9])
  2140. goto err_irqconflict;
  2141. } else if (brd->info->nports == 8) {
  2142. irq = regs[9] & 0xF000;
  2143. irq = irq | (irq >> 4);
  2144. irq = irq | (irq >> 8);
  2145. if ((irq != regs[9]) || (irq != regs[10]))
  2146. goto err_irqconflict;
  2147. }
  2148. if (!irq) {
  2149. printk(KERN_ERR "mxser: interrupt number unset\n");
  2150. return -EIO;
  2151. }
  2152. brd->irq = ((int)(irq & 0xF000) >> 12);
  2153. for (i = 0; i < 8; i++)
  2154. brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
  2155. if ((regs[12] & 0x80) == 0) {
  2156. printk(KERN_ERR "mxser: invalid interrupt vector\n");
  2157. return -EIO;
  2158. }
  2159. brd->vector = (int)regs[11]; /* interrupt vector */
  2160. if (id == 1)
  2161. brd->vector_mask = 0x00FF;
  2162. else
  2163. brd->vector_mask = 0x000F;
  2164. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2165. if (regs[12] & bits) {
  2166. brd->ports[i].baud_base = 921600;
  2167. brd->ports[i].max_baud = 921600;
  2168. } else {
  2169. brd->ports[i].baud_base = 115200;
  2170. brd->ports[i].max_baud = 115200;
  2171. }
  2172. }
  2173. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2174. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2175. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2176. outb(scratch2, cap + UART_LCR);
  2177. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2178. scratch = inb(cap + UART_IIR);
  2179. if (scratch & 0xC0)
  2180. brd->uart_type = PORT_16550A;
  2181. else
  2182. brd->uart_type = PORT_16450;
  2183. if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
  2184. "mxser(IO)")) {
  2185. printk(KERN_ERR "mxser: can't request ports I/O region: "
  2186. "0x%.8lx-0x%.8lx\n",
  2187. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2188. 8 * brd->info->nports - 1);
  2189. return -EIO;
  2190. }
  2191. ret = mxser_request_vector(brd);
  2192. if (ret) {
  2193. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2194. printk(KERN_ERR "mxser: can't request interrupt vector region: "
  2195. "0x%.8lx-0x%.8lx\n",
  2196. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2197. 8 * brd->info->nports - 1);
  2198. return ret;
  2199. }
  2200. return brd->info->nports;
  2201. err_irqconflict:
  2202. printk(KERN_ERR "mxser: invalid interrupt number\n");
  2203. return -EIO;
  2204. }
  2205. static int mxser_probe(struct pci_dev *pdev,
  2206. const struct pci_device_id *ent)
  2207. {
  2208. #ifdef CONFIG_PCI
  2209. struct mxser_board *brd;
  2210. unsigned int i, j;
  2211. unsigned long ioaddress;
  2212. struct device *tty_dev;
  2213. int retval = -EINVAL;
  2214. for (i = 0; i < MXSER_BOARDS; i++)
  2215. if (mxser_boards[i].info == NULL)
  2216. break;
  2217. if (i >= MXSER_BOARDS) {
  2218. dev_err(&pdev->dev, "too many boards found (maximum %d), board "
  2219. "not configured\n", MXSER_BOARDS);
  2220. goto err;
  2221. }
  2222. brd = &mxser_boards[i];
  2223. brd->idx = i * MXSER_PORTS_PER_BOARD;
  2224. dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
  2225. mxser_cards[ent->driver_data].name,
  2226. pdev->bus->number, PCI_SLOT(pdev->devfn));
  2227. retval = pci_enable_device(pdev);
  2228. if (retval) {
  2229. dev_err(&pdev->dev, "PCI enable failed\n");
  2230. goto err;
  2231. }
  2232. /* io address */
  2233. ioaddress = pci_resource_start(pdev, 2);
  2234. retval = pci_request_region(pdev, 2, "mxser(IO)");
  2235. if (retval)
  2236. goto err_dis;
  2237. brd->info = &mxser_cards[ent->driver_data];
  2238. for (i = 0; i < brd->info->nports; i++)
  2239. brd->ports[i].ioaddr = ioaddress + 8 * i;
  2240. /* vector */
  2241. ioaddress = pci_resource_start(pdev, 3);
  2242. retval = pci_request_region(pdev, 3, "mxser(vector)");
  2243. if (retval)
  2244. goto err_zero;
  2245. brd->vector = ioaddress;
  2246. /* irq */
  2247. brd->irq = pdev->irq;
  2248. brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
  2249. brd->uart_type = PORT_16550A;
  2250. brd->vector_mask = 0;
  2251. for (i = 0; i < brd->info->nports; i++) {
  2252. for (j = 0; j < UART_INFO_NUM; j++) {
  2253. if (Gpci_uart_info[j].type == brd->chip_flag) {
  2254. brd->ports[i].max_baud =
  2255. Gpci_uart_info[j].max_baud;
  2256. /* exception....CP-102 */
  2257. if (brd->info->flags & MXSER_HIGHBAUD)
  2258. brd->ports[i].max_baud = 921600;
  2259. break;
  2260. }
  2261. }
  2262. }
  2263. if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
  2264. for (i = 0; i < brd->info->nports; i++) {
  2265. if (i < 4)
  2266. brd->ports[i].opmode_ioaddr = ioaddress + 4;
  2267. else
  2268. brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
  2269. }
  2270. outb(0, ioaddress + 4); /* default set to RS232 mode */
  2271. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  2272. }
  2273. for (i = 0; i < brd->info->nports; i++) {
  2274. brd->vector_mask |= (1 << i);
  2275. brd->ports[i].baud_base = 921600;
  2276. }
  2277. /* mxser_initbrd will hook ISR. */
  2278. retval = mxser_initbrd(brd, pdev);
  2279. if (retval)
  2280. goto err_rel3;
  2281. for (i = 0; i < brd->info->nports; i++) {
  2282. tty_dev = tty_port_register_device(&brd->ports[i].port,
  2283. mxvar_sdriver, brd->idx + i, &pdev->dev);
  2284. if (IS_ERR(tty_dev)) {
  2285. retval = PTR_ERR(tty_dev);
  2286. for (; i > 0; i--)
  2287. tty_unregister_device(mxvar_sdriver,
  2288. brd->idx + i - 1);
  2289. goto err_relbrd;
  2290. }
  2291. }
  2292. pci_set_drvdata(pdev, brd);
  2293. return 0;
  2294. err_relbrd:
  2295. for (i = 0; i < brd->info->nports; i++)
  2296. tty_port_destroy(&brd->ports[i].port);
  2297. free_irq(brd->irq, brd);
  2298. err_rel3:
  2299. pci_release_region(pdev, 3);
  2300. err_zero:
  2301. brd->info = NULL;
  2302. pci_release_region(pdev, 2);
  2303. err_dis:
  2304. pci_disable_device(pdev);
  2305. err:
  2306. return retval;
  2307. #else
  2308. return -ENODEV;
  2309. #endif
  2310. }
  2311. static void mxser_remove(struct pci_dev *pdev)
  2312. {
  2313. #ifdef CONFIG_PCI
  2314. struct mxser_board *brd = pci_get_drvdata(pdev);
  2315. mxser_board_remove(brd);
  2316. pci_release_region(pdev, 2);
  2317. pci_release_region(pdev, 3);
  2318. pci_disable_device(pdev);
  2319. brd->info = NULL;
  2320. #endif
  2321. }
  2322. static struct pci_driver mxser_driver = {
  2323. .name = "mxser",
  2324. .id_table = mxser_pcibrds,
  2325. .probe = mxser_probe,
  2326. .remove = mxser_remove
  2327. };
  2328. static int __init mxser_module_init(void)
  2329. {
  2330. struct mxser_board *brd;
  2331. struct device *tty_dev;
  2332. unsigned int b, i, m;
  2333. int retval;
  2334. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  2335. if (!mxvar_sdriver)
  2336. return -ENOMEM;
  2337. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  2338. MXSER_VERSION);
  2339. /* Initialize the tty_driver structure */
  2340. mxvar_sdriver->name = "ttyMI";
  2341. mxvar_sdriver->major = ttymajor;
  2342. mxvar_sdriver->minor_start = 0;
  2343. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  2344. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  2345. mxvar_sdriver->init_termios = tty_std_termios;
  2346. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  2347. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
  2348. tty_set_operations(mxvar_sdriver, &mxser_ops);
  2349. retval = tty_register_driver(mxvar_sdriver);
  2350. if (retval) {
  2351. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
  2352. "tty driver !\n");
  2353. goto err_put;
  2354. }
  2355. /* Start finding ISA boards here */
  2356. for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
  2357. if (!ioaddr[b])
  2358. continue;
  2359. brd = &mxser_boards[m];
  2360. retval = mxser_get_ISA_conf(ioaddr[b], brd);
  2361. if (retval <= 0) {
  2362. brd->info = NULL;
  2363. continue;
  2364. }
  2365. printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
  2366. brd->info->name, ioaddr[b]);
  2367. /* mxser_initbrd will hook ISR. */
  2368. if (mxser_initbrd(brd, NULL) < 0) {
  2369. mxser_release_ISA_res(brd);
  2370. brd->info = NULL;
  2371. continue;
  2372. }
  2373. brd->idx = m * MXSER_PORTS_PER_BOARD;
  2374. for (i = 0; i < brd->info->nports; i++) {
  2375. tty_dev = tty_port_register_device(&brd->ports[i].port,
  2376. mxvar_sdriver, brd->idx + i, NULL);
  2377. if (IS_ERR(tty_dev)) {
  2378. for (; i > 0; i--)
  2379. tty_unregister_device(mxvar_sdriver,
  2380. brd->idx + i - 1);
  2381. for (i = 0; i < brd->info->nports; i++)
  2382. tty_port_destroy(&brd->ports[i].port);
  2383. free_irq(brd->irq, brd);
  2384. mxser_release_ISA_res(brd);
  2385. brd->info = NULL;
  2386. break;
  2387. }
  2388. }
  2389. if (brd->info == NULL)
  2390. continue;
  2391. m++;
  2392. }
  2393. retval = pci_register_driver(&mxser_driver);
  2394. if (retval) {
  2395. printk(KERN_ERR "mxser: can't register pci driver\n");
  2396. if (!m) {
  2397. retval = -ENODEV;
  2398. goto err_unr;
  2399. } /* else: we have some ISA cards under control */
  2400. }
  2401. return 0;
  2402. err_unr:
  2403. tty_unregister_driver(mxvar_sdriver);
  2404. err_put:
  2405. put_tty_driver(mxvar_sdriver);
  2406. return retval;
  2407. }
  2408. static void __exit mxser_module_exit(void)
  2409. {
  2410. unsigned int i;
  2411. pci_unregister_driver(&mxser_driver);
  2412. for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
  2413. if (mxser_boards[i].info != NULL)
  2414. mxser_board_remove(&mxser_boards[i]);
  2415. tty_unregister_driver(mxvar_sdriver);
  2416. put_tty_driver(mxvar_sdriver);
  2417. for (i = 0; i < MXSER_BOARDS; i++)
  2418. if (mxser_boards[i].info != NULL)
  2419. mxser_release_ISA_res(&mxser_boards[i]);
  2420. }
  2421. module_init(mxser_module_init);
  2422. module_exit(mxser_module_exit);