qeth_core_main.c 179 KB

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  1. /*
  2. * Copyright IBM Corp. 2007, 2009
  3. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
  4. * Frank Pavlic <fpavlic@de.ibm.com>,
  5. * Thomas Spatzier <tspat@de.ibm.com>,
  6. * Frank Blaschka <frank.blaschka@de.ibm.com>
  7. */
  8. #define KMSG_COMPONENT "qeth"
  9. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  10. #include <linux/module.h>
  11. #include <linux/moduleparam.h>
  12. #include <linux/string.h>
  13. #include <linux/errno.h>
  14. #include <linux/kernel.h>
  15. #include <linux/ip.h>
  16. #include <linux/tcp.h>
  17. #include <linux/mii.h>
  18. #include <linux/kthread.h>
  19. #include <linux/slab.h>
  20. #include <net/iucv/af_iucv.h>
  21. #include <net/dsfield.h>
  22. #include <asm/ebcdic.h>
  23. #include <asm/chpid.h>
  24. #include <asm/io.h>
  25. #include <asm/sysinfo.h>
  26. #include <asm/compat.h>
  27. #include <asm/diag.h>
  28. #include <asm/cio.h>
  29. #include <asm/ccwdev.h>
  30. #include "qeth_core.h"
  31. struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
  32. /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
  33. /* N P A M L V H */
  34. [QETH_DBF_SETUP] = {"qeth_setup",
  35. 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
  36. [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
  37. &debug_sprintf_view, NULL},
  38. [QETH_DBF_CTRL] = {"qeth_control",
  39. 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
  40. };
  41. EXPORT_SYMBOL_GPL(qeth_dbf);
  42. struct qeth_card_list_struct qeth_core_card_list;
  43. EXPORT_SYMBOL_GPL(qeth_core_card_list);
  44. struct kmem_cache *qeth_core_header_cache;
  45. EXPORT_SYMBOL_GPL(qeth_core_header_cache);
  46. static struct kmem_cache *qeth_qdio_outbuf_cache;
  47. static struct device *qeth_core_root_dev;
  48. static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
  49. static struct lock_class_key qdio_out_skb_queue_key;
  50. static struct mutex qeth_mod_mutex;
  51. static void qeth_send_control_data_cb(struct qeth_channel *,
  52. struct qeth_cmd_buffer *);
  53. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
  54. static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
  55. static void qeth_free_buffer_pool(struct qeth_card *);
  56. static int qeth_qdio_establish(struct qeth_card *);
  57. static void qeth_free_qdio_buffers(struct qeth_card *);
  58. static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
  59. struct qeth_qdio_out_buffer *buf,
  60. enum iucv_tx_notify notification);
  61. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
  62. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  63. struct qeth_qdio_out_buffer *buf,
  64. enum qeth_qdio_buffer_states newbufstate);
  65. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
  66. struct workqueue_struct *qeth_wq;
  67. EXPORT_SYMBOL_GPL(qeth_wq);
  68. int qeth_card_hw_is_reachable(struct qeth_card *card)
  69. {
  70. return (card->state == CARD_STATE_SOFTSETUP) ||
  71. (card->state == CARD_STATE_UP);
  72. }
  73. EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
  74. static void qeth_close_dev_handler(struct work_struct *work)
  75. {
  76. struct qeth_card *card;
  77. card = container_of(work, struct qeth_card, close_dev_work);
  78. QETH_CARD_TEXT(card, 2, "cldevhdl");
  79. rtnl_lock();
  80. dev_close(card->dev);
  81. rtnl_unlock();
  82. ccwgroup_set_offline(card->gdev);
  83. }
  84. void qeth_close_dev(struct qeth_card *card)
  85. {
  86. QETH_CARD_TEXT(card, 2, "cldevsubm");
  87. queue_work(qeth_wq, &card->close_dev_work);
  88. }
  89. EXPORT_SYMBOL_GPL(qeth_close_dev);
  90. static const char *qeth_get_cardname(struct qeth_card *card)
  91. {
  92. if (card->info.guestlan) {
  93. switch (card->info.type) {
  94. case QETH_CARD_TYPE_OSD:
  95. return " Virtual NIC QDIO";
  96. case QETH_CARD_TYPE_IQD:
  97. return " Virtual NIC Hiper";
  98. case QETH_CARD_TYPE_OSM:
  99. return " Virtual NIC QDIO - OSM";
  100. case QETH_CARD_TYPE_OSX:
  101. return " Virtual NIC QDIO - OSX";
  102. default:
  103. return " unknown";
  104. }
  105. } else {
  106. switch (card->info.type) {
  107. case QETH_CARD_TYPE_OSD:
  108. return " OSD Express";
  109. case QETH_CARD_TYPE_IQD:
  110. return " HiperSockets";
  111. case QETH_CARD_TYPE_OSN:
  112. return " OSN QDIO";
  113. case QETH_CARD_TYPE_OSM:
  114. return " OSM QDIO";
  115. case QETH_CARD_TYPE_OSX:
  116. return " OSX QDIO";
  117. default:
  118. return " unknown";
  119. }
  120. }
  121. return " n/a";
  122. }
  123. /* max length to be returned: 14 */
  124. const char *qeth_get_cardname_short(struct qeth_card *card)
  125. {
  126. if (card->info.guestlan) {
  127. switch (card->info.type) {
  128. case QETH_CARD_TYPE_OSD:
  129. return "Virt.NIC QDIO";
  130. case QETH_CARD_TYPE_IQD:
  131. return "Virt.NIC Hiper";
  132. case QETH_CARD_TYPE_OSM:
  133. return "Virt.NIC OSM";
  134. case QETH_CARD_TYPE_OSX:
  135. return "Virt.NIC OSX";
  136. default:
  137. return "unknown";
  138. }
  139. } else {
  140. switch (card->info.type) {
  141. case QETH_CARD_TYPE_OSD:
  142. switch (card->info.link_type) {
  143. case QETH_LINK_TYPE_FAST_ETH:
  144. return "OSD_100";
  145. case QETH_LINK_TYPE_HSTR:
  146. return "HSTR";
  147. case QETH_LINK_TYPE_GBIT_ETH:
  148. return "OSD_1000";
  149. case QETH_LINK_TYPE_10GBIT_ETH:
  150. return "OSD_10GIG";
  151. case QETH_LINK_TYPE_LANE_ETH100:
  152. return "OSD_FE_LANE";
  153. case QETH_LINK_TYPE_LANE_TR:
  154. return "OSD_TR_LANE";
  155. case QETH_LINK_TYPE_LANE_ETH1000:
  156. return "OSD_GbE_LANE";
  157. case QETH_LINK_TYPE_LANE:
  158. return "OSD_ATM_LANE";
  159. default:
  160. return "OSD_Express";
  161. }
  162. case QETH_CARD_TYPE_IQD:
  163. return "HiperSockets";
  164. case QETH_CARD_TYPE_OSN:
  165. return "OSN";
  166. case QETH_CARD_TYPE_OSM:
  167. return "OSM_1000";
  168. case QETH_CARD_TYPE_OSX:
  169. return "OSX_10GIG";
  170. default:
  171. return "unknown";
  172. }
  173. }
  174. return "n/a";
  175. }
  176. void qeth_set_recovery_task(struct qeth_card *card)
  177. {
  178. card->recovery_task = current;
  179. }
  180. EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
  181. void qeth_clear_recovery_task(struct qeth_card *card)
  182. {
  183. card->recovery_task = NULL;
  184. }
  185. EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
  186. static bool qeth_is_recovery_task(const struct qeth_card *card)
  187. {
  188. return card->recovery_task == current;
  189. }
  190. void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
  191. int clear_start_mask)
  192. {
  193. unsigned long flags;
  194. spin_lock_irqsave(&card->thread_mask_lock, flags);
  195. card->thread_allowed_mask = threads;
  196. if (clear_start_mask)
  197. card->thread_start_mask &= threads;
  198. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  199. wake_up(&card->wait_q);
  200. }
  201. EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
  202. int qeth_threads_running(struct qeth_card *card, unsigned long threads)
  203. {
  204. unsigned long flags;
  205. int rc = 0;
  206. spin_lock_irqsave(&card->thread_mask_lock, flags);
  207. rc = (card->thread_running_mask & threads);
  208. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  209. return rc;
  210. }
  211. EXPORT_SYMBOL_GPL(qeth_threads_running);
  212. int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
  213. {
  214. if (qeth_is_recovery_task(card))
  215. return 0;
  216. return wait_event_interruptible(card->wait_q,
  217. qeth_threads_running(card, threads) == 0);
  218. }
  219. EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
  220. void qeth_clear_working_pool_list(struct qeth_card *card)
  221. {
  222. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  223. QETH_CARD_TEXT(card, 5, "clwrklst");
  224. list_for_each_entry_safe(pool_entry, tmp,
  225. &card->qdio.in_buf_pool.entry_list, list){
  226. list_del(&pool_entry->list);
  227. }
  228. }
  229. EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
  230. static int qeth_alloc_buffer_pool(struct qeth_card *card)
  231. {
  232. struct qeth_buffer_pool_entry *pool_entry;
  233. void *ptr;
  234. int i, j;
  235. QETH_CARD_TEXT(card, 5, "alocpool");
  236. for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
  237. pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
  238. if (!pool_entry) {
  239. qeth_free_buffer_pool(card);
  240. return -ENOMEM;
  241. }
  242. for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
  243. ptr = (void *) __get_free_page(GFP_KERNEL);
  244. if (!ptr) {
  245. while (j > 0)
  246. free_page((unsigned long)
  247. pool_entry->elements[--j]);
  248. kfree(pool_entry);
  249. qeth_free_buffer_pool(card);
  250. return -ENOMEM;
  251. }
  252. pool_entry->elements[j] = ptr;
  253. }
  254. list_add(&pool_entry->init_list,
  255. &card->qdio.init_pool.entry_list);
  256. }
  257. return 0;
  258. }
  259. int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
  260. {
  261. QETH_CARD_TEXT(card, 2, "realcbp");
  262. if ((card->state != CARD_STATE_DOWN) &&
  263. (card->state != CARD_STATE_RECOVER))
  264. return -EPERM;
  265. /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
  266. qeth_clear_working_pool_list(card);
  267. qeth_free_buffer_pool(card);
  268. card->qdio.in_buf_pool.buf_count = bufcnt;
  269. card->qdio.init_pool.buf_count = bufcnt;
  270. return qeth_alloc_buffer_pool(card);
  271. }
  272. EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
  273. static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
  274. {
  275. if (!q)
  276. return;
  277. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  278. kfree(q);
  279. }
  280. static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
  281. {
  282. struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  283. int i;
  284. if (!q)
  285. return NULL;
  286. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  287. kfree(q);
  288. return NULL;
  289. }
  290. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
  291. q->bufs[i].buffer = q->qdio_bufs[i];
  292. QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
  293. return q;
  294. }
  295. static int qeth_cq_init(struct qeth_card *card)
  296. {
  297. int rc;
  298. if (card->options.cq == QETH_CQ_ENABLED) {
  299. QETH_DBF_TEXT(SETUP, 2, "cqinit");
  300. qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
  301. QDIO_MAX_BUFFERS_PER_Q);
  302. card->qdio.c_q->next_buf_to_init = 127;
  303. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
  304. card->qdio.no_in_queues - 1, 0,
  305. 127);
  306. if (rc) {
  307. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  308. goto out;
  309. }
  310. }
  311. rc = 0;
  312. out:
  313. return rc;
  314. }
  315. static int qeth_alloc_cq(struct qeth_card *card)
  316. {
  317. int rc;
  318. if (card->options.cq == QETH_CQ_ENABLED) {
  319. int i;
  320. struct qdio_outbuf_state *outbuf_states;
  321. QETH_DBF_TEXT(SETUP, 2, "cqon");
  322. card->qdio.c_q = qeth_alloc_qdio_queue();
  323. if (!card->qdio.c_q) {
  324. rc = -1;
  325. goto kmsg_out;
  326. }
  327. card->qdio.no_in_queues = 2;
  328. card->qdio.out_bufstates =
  329. kzalloc(card->qdio.no_out_queues *
  330. QDIO_MAX_BUFFERS_PER_Q *
  331. sizeof(struct qdio_outbuf_state), GFP_KERNEL);
  332. outbuf_states = card->qdio.out_bufstates;
  333. if (outbuf_states == NULL) {
  334. rc = -1;
  335. goto free_cq_out;
  336. }
  337. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  338. card->qdio.out_qs[i]->bufstates = outbuf_states;
  339. outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
  340. }
  341. } else {
  342. QETH_DBF_TEXT(SETUP, 2, "nocq");
  343. card->qdio.c_q = NULL;
  344. card->qdio.no_in_queues = 1;
  345. }
  346. QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
  347. rc = 0;
  348. out:
  349. return rc;
  350. free_cq_out:
  351. qeth_free_qdio_queue(card->qdio.c_q);
  352. card->qdio.c_q = NULL;
  353. kmsg_out:
  354. dev_err(&card->gdev->dev, "Failed to create completion queue\n");
  355. goto out;
  356. }
  357. static void qeth_free_cq(struct qeth_card *card)
  358. {
  359. if (card->qdio.c_q) {
  360. --card->qdio.no_in_queues;
  361. qeth_free_qdio_queue(card->qdio.c_q);
  362. card->qdio.c_q = NULL;
  363. }
  364. kfree(card->qdio.out_bufstates);
  365. card->qdio.out_bufstates = NULL;
  366. }
  367. static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
  368. int delayed)
  369. {
  370. enum iucv_tx_notify n;
  371. switch (sbalf15) {
  372. case 0:
  373. n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
  374. break;
  375. case 4:
  376. case 16:
  377. case 17:
  378. case 18:
  379. n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
  380. TX_NOTIFY_UNREACHABLE;
  381. break;
  382. default:
  383. n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
  384. TX_NOTIFY_GENERALERROR;
  385. break;
  386. }
  387. return n;
  388. }
  389. static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
  390. int forced_cleanup)
  391. {
  392. if (q->card->options.cq != QETH_CQ_ENABLED)
  393. return;
  394. if (q->bufs[bidx]->next_pending != NULL) {
  395. struct qeth_qdio_out_buffer *head = q->bufs[bidx];
  396. struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
  397. while (c) {
  398. if (forced_cleanup ||
  399. atomic_read(&c->state) ==
  400. QETH_QDIO_BUF_HANDLED_DELAYED) {
  401. struct qeth_qdio_out_buffer *f = c;
  402. QETH_CARD_TEXT(f->q->card, 5, "fp");
  403. QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
  404. /* release here to avoid interleaving between
  405. outbound tasklet and inbound tasklet
  406. regarding notifications and lifecycle */
  407. qeth_release_skbs(c);
  408. c = f->next_pending;
  409. WARN_ON_ONCE(head->next_pending != f);
  410. head->next_pending = c;
  411. kmem_cache_free(qeth_qdio_outbuf_cache, f);
  412. } else {
  413. head = c;
  414. c = c->next_pending;
  415. }
  416. }
  417. }
  418. if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
  419. QETH_QDIO_BUF_HANDLED_DELAYED)) {
  420. /* for recovery situations */
  421. q->bufs[bidx]->aob = q->bufstates[bidx].aob;
  422. qeth_init_qdio_out_buf(q, bidx);
  423. QETH_CARD_TEXT(q->card, 2, "clprecov");
  424. }
  425. }
  426. static void qeth_qdio_handle_aob(struct qeth_card *card,
  427. unsigned long phys_aob_addr)
  428. {
  429. struct qaob *aob;
  430. struct qeth_qdio_out_buffer *buffer;
  431. enum iucv_tx_notify notification;
  432. aob = (struct qaob *) phys_to_virt(phys_aob_addr);
  433. QETH_CARD_TEXT(card, 5, "haob");
  434. QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
  435. buffer = (struct qeth_qdio_out_buffer *) aob->user1;
  436. QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
  437. if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
  438. QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
  439. notification = TX_NOTIFY_OK;
  440. } else {
  441. WARN_ON_ONCE(atomic_read(&buffer->state) !=
  442. QETH_QDIO_BUF_PENDING);
  443. atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
  444. notification = TX_NOTIFY_DELAYED_OK;
  445. }
  446. if (aob->aorc != 0) {
  447. QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
  448. notification = qeth_compute_cq_notification(aob->aorc, 1);
  449. }
  450. qeth_notify_skbs(buffer->q, buffer, notification);
  451. buffer->aob = NULL;
  452. qeth_clear_output_buffer(buffer->q, buffer,
  453. QETH_QDIO_BUF_HANDLED_DELAYED);
  454. /* from here on: do not touch buffer anymore */
  455. qdio_release_aob(aob);
  456. }
  457. static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
  458. {
  459. return card->options.cq == QETH_CQ_ENABLED &&
  460. card->qdio.c_q != NULL &&
  461. queue != 0 &&
  462. queue == card->qdio.no_in_queues - 1;
  463. }
  464. static int qeth_issue_next_read(struct qeth_card *card)
  465. {
  466. int rc;
  467. struct qeth_cmd_buffer *iob;
  468. QETH_CARD_TEXT(card, 5, "issnxrd");
  469. if (card->read.state != CH_STATE_UP)
  470. return -EIO;
  471. iob = qeth_get_buffer(&card->read);
  472. if (!iob) {
  473. dev_warn(&card->gdev->dev, "The qeth device driver "
  474. "failed to recover an error on the device\n");
  475. QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
  476. "available\n", dev_name(&card->gdev->dev));
  477. return -ENOMEM;
  478. }
  479. qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
  480. QETH_CARD_TEXT(card, 6, "noirqpnd");
  481. rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
  482. (addr_t) iob, 0, 0);
  483. if (rc) {
  484. QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
  485. "rc=%i\n", dev_name(&card->gdev->dev), rc);
  486. atomic_set(&card->read.irq_pending, 0);
  487. card->read_or_write_problem = 1;
  488. qeth_schedule_recovery(card);
  489. wake_up(&card->wait_q);
  490. }
  491. return rc;
  492. }
  493. static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
  494. {
  495. struct qeth_reply *reply;
  496. reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
  497. if (reply) {
  498. atomic_set(&reply->refcnt, 1);
  499. atomic_set(&reply->received, 0);
  500. reply->card = card;
  501. }
  502. return reply;
  503. }
  504. static void qeth_get_reply(struct qeth_reply *reply)
  505. {
  506. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  507. atomic_inc(&reply->refcnt);
  508. }
  509. static void qeth_put_reply(struct qeth_reply *reply)
  510. {
  511. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  512. if (atomic_dec_and_test(&reply->refcnt))
  513. kfree(reply);
  514. }
  515. static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
  516. struct qeth_card *card)
  517. {
  518. char *ipa_name;
  519. int com = cmd->hdr.command;
  520. ipa_name = qeth_get_ipa_cmd_name(com);
  521. if (rc)
  522. QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
  523. "x%X \"%s\"\n",
  524. ipa_name, com, dev_name(&card->gdev->dev),
  525. QETH_CARD_IFNAME(card), rc,
  526. qeth_get_ipa_msg(rc));
  527. else
  528. QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
  529. ipa_name, com, dev_name(&card->gdev->dev),
  530. QETH_CARD_IFNAME(card));
  531. }
  532. static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
  533. struct qeth_cmd_buffer *iob)
  534. {
  535. struct qeth_ipa_cmd *cmd = NULL;
  536. QETH_CARD_TEXT(card, 5, "chkipad");
  537. if (IS_IPA(iob->data)) {
  538. cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
  539. if (IS_IPA_REPLY(cmd)) {
  540. if (cmd->hdr.command != IPA_CMD_SETCCID &&
  541. cmd->hdr.command != IPA_CMD_DELCCID &&
  542. cmd->hdr.command != IPA_CMD_MODCCID &&
  543. cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
  544. qeth_issue_ipa_msg(cmd,
  545. cmd->hdr.return_code, card);
  546. return cmd;
  547. } else {
  548. switch (cmd->hdr.command) {
  549. case IPA_CMD_STOPLAN:
  550. if (cmd->hdr.return_code ==
  551. IPA_RC_VEPA_TO_VEB_TRANSITION) {
  552. dev_err(&card->gdev->dev,
  553. "Interface %s is down because the "
  554. "adjacent port is no longer in "
  555. "reflective relay mode\n",
  556. QETH_CARD_IFNAME(card));
  557. qeth_close_dev(card);
  558. } else {
  559. dev_warn(&card->gdev->dev,
  560. "The link for interface %s on CHPID"
  561. " 0x%X failed\n",
  562. QETH_CARD_IFNAME(card),
  563. card->info.chpid);
  564. qeth_issue_ipa_msg(cmd,
  565. cmd->hdr.return_code, card);
  566. }
  567. card->lan_online = 0;
  568. if (card->dev && netif_carrier_ok(card->dev))
  569. netif_carrier_off(card->dev);
  570. return NULL;
  571. case IPA_CMD_STARTLAN:
  572. dev_info(&card->gdev->dev,
  573. "The link for %s on CHPID 0x%X has"
  574. " been restored\n",
  575. QETH_CARD_IFNAME(card),
  576. card->info.chpid);
  577. netif_carrier_on(card->dev);
  578. card->lan_online = 1;
  579. if (card->info.hwtrap)
  580. card->info.hwtrap = 2;
  581. qeth_schedule_recovery(card);
  582. return NULL;
  583. case IPA_CMD_SETBRIDGEPORT_IQD:
  584. case IPA_CMD_SETBRIDGEPORT_OSA:
  585. case IPA_CMD_ADDRESS_CHANGE_NOTIF:
  586. if (card->discipline->control_event_handler
  587. (card, cmd))
  588. return cmd;
  589. else
  590. return NULL;
  591. case IPA_CMD_MODCCID:
  592. return cmd;
  593. case IPA_CMD_REGISTER_LOCAL_ADDR:
  594. QETH_CARD_TEXT(card, 3, "irla");
  595. break;
  596. case IPA_CMD_UNREGISTER_LOCAL_ADDR:
  597. QETH_CARD_TEXT(card, 3, "urla");
  598. break;
  599. default:
  600. QETH_DBF_MESSAGE(2, "Received data is IPA "
  601. "but not a reply!\n");
  602. break;
  603. }
  604. }
  605. }
  606. return cmd;
  607. }
  608. void qeth_clear_ipacmd_list(struct qeth_card *card)
  609. {
  610. struct qeth_reply *reply, *r;
  611. unsigned long flags;
  612. QETH_CARD_TEXT(card, 4, "clipalst");
  613. spin_lock_irqsave(&card->lock, flags);
  614. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  615. qeth_get_reply(reply);
  616. reply->rc = -EIO;
  617. atomic_inc(&reply->received);
  618. list_del_init(&reply->list);
  619. wake_up(&reply->wait_q);
  620. qeth_put_reply(reply);
  621. }
  622. spin_unlock_irqrestore(&card->lock, flags);
  623. atomic_set(&card->write.irq_pending, 0);
  624. }
  625. EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
  626. static int qeth_check_idx_response(struct qeth_card *card,
  627. unsigned char *buffer)
  628. {
  629. if (!buffer)
  630. return 0;
  631. QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
  632. if ((buffer[2] & 0xc0) == 0xc0) {
  633. QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
  634. "with cause code 0x%02x%s\n",
  635. buffer[4],
  636. ((buffer[4] == 0x22) ?
  637. " -- try another portname" : ""));
  638. QETH_CARD_TEXT(card, 2, "ckidxres");
  639. QETH_CARD_TEXT(card, 2, " idxterm");
  640. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  641. if (buffer[4] == 0xf6) {
  642. dev_err(&card->gdev->dev,
  643. "The qeth device is not configured "
  644. "for the OSI layer required by z/VM\n");
  645. return -EPERM;
  646. }
  647. return -EIO;
  648. }
  649. return 0;
  650. }
  651. static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
  652. {
  653. struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
  654. dev_get_drvdata(&cdev->dev))->dev);
  655. return card;
  656. }
  657. static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
  658. __u32 len)
  659. {
  660. struct qeth_card *card;
  661. card = CARD_FROM_CDEV(channel->ccwdev);
  662. QETH_CARD_TEXT(card, 4, "setupccw");
  663. if (channel == &card->read)
  664. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  665. else
  666. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  667. channel->ccw.count = len;
  668. channel->ccw.cda = (__u32) __pa(iob);
  669. }
  670. static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
  671. {
  672. __u8 index;
  673. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
  674. index = channel->io_buf_no;
  675. do {
  676. if (channel->iob[index].state == BUF_STATE_FREE) {
  677. channel->iob[index].state = BUF_STATE_LOCKED;
  678. channel->io_buf_no = (channel->io_buf_no + 1) %
  679. QETH_CMD_BUFFER_NO;
  680. memset(channel->iob[index].data, 0, QETH_BUFSIZE);
  681. return channel->iob + index;
  682. }
  683. index = (index + 1) % QETH_CMD_BUFFER_NO;
  684. } while (index != channel->io_buf_no);
  685. return NULL;
  686. }
  687. void qeth_release_buffer(struct qeth_channel *channel,
  688. struct qeth_cmd_buffer *iob)
  689. {
  690. unsigned long flags;
  691. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
  692. spin_lock_irqsave(&channel->iob_lock, flags);
  693. memset(iob->data, 0, QETH_BUFSIZE);
  694. iob->state = BUF_STATE_FREE;
  695. iob->callback = qeth_send_control_data_cb;
  696. iob->rc = 0;
  697. spin_unlock_irqrestore(&channel->iob_lock, flags);
  698. wake_up(&channel->wait_q);
  699. }
  700. EXPORT_SYMBOL_GPL(qeth_release_buffer);
  701. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
  702. {
  703. struct qeth_cmd_buffer *buffer = NULL;
  704. unsigned long flags;
  705. spin_lock_irqsave(&channel->iob_lock, flags);
  706. buffer = __qeth_get_buffer(channel);
  707. spin_unlock_irqrestore(&channel->iob_lock, flags);
  708. return buffer;
  709. }
  710. struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
  711. {
  712. struct qeth_cmd_buffer *buffer;
  713. wait_event(channel->wait_q,
  714. ((buffer = qeth_get_buffer(channel)) != NULL));
  715. return buffer;
  716. }
  717. EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
  718. void qeth_clear_cmd_buffers(struct qeth_channel *channel)
  719. {
  720. int cnt;
  721. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  722. qeth_release_buffer(channel, &channel->iob[cnt]);
  723. channel->buf_no = 0;
  724. channel->io_buf_no = 0;
  725. }
  726. EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
  727. static void qeth_send_control_data_cb(struct qeth_channel *channel,
  728. struct qeth_cmd_buffer *iob)
  729. {
  730. struct qeth_card *card;
  731. struct qeth_reply *reply, *r;
  732. struct qeth_ipa_cmd *cmd;
  733. unsigned long flags;
  734. int keep_reply;
  735. int rc = 0;
  736. card = CARD_FROM_CDEV(channel->ccwdev);
  737. QETH_CARD_TEXT(card, 4, "sndctlcb");
  738. rc = qeth_check_idx_response(card, iob->data);
  739. switch (rc) {
  740. case 0:
  741. break;
  742. case -EIO:
  743. qeth_clear_ipacmd_list(card);
  744. qeth_schedule_recovery(card);
  745. /* fall through */
  746. default:
  747. goto out;
  748. }
  749. cmd = qeth_check_ipa_data(card, iob);
  750. if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
  751. goto out;
  752. /*in case of OSN : check if cmd is set */
  753. if (card->info.type == QETH_CARD_TYPE_OSN &&
  754. cmd &&
  755. cmd->hdr.command != IPA_CMD_STARTLAN &&
  756. card->osn_info.assist_cb != NULL) {
  757. card->osn_info.assist_cb(card->dev, cmd);
  758. goto out;
  759. }
  760. spin_lock_irqsave(&card->lock, flags);
  761. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  762. if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
  763. ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
  764. qeth_get_reply(reply);
  765. list_del_init(&reply->list);
  766. spin_unlock_irqrestore(&card->lock, flags);
  767. keep_reply = 0;
  768. if (reply->callback != NULL) {
  769. if (cmd) {
  770. reply->offset = (__u16)((char *)cmd -
  771. (char *)iob->data);
  772. keep_reply = reply->callback(card,
  773. reply,
  774. (unsigned long)cmd);
  775. } else
  776. keep_reply = reply->callback(card,
  777. reply,
  778. (unsigned long)iob);
  779. }
  780. if (cmd)
  781. reply->rc = (u16) cmd->hdr.return_code;
  782. else if (iob->rc)
  783. reply->rc = iob->rc;
  784. if (keep_reply) {
  785. spin_lock_irqsave(&card->lock, flags);
  786. list_add_tail(&reply->list,
  787. &card->cmd_waiter_list);
  788. spin_unlock_irqrestore(&card->lock, flags);
  789. } else {
  790. atomic_inc(&reply->received);
  791. wake_up(&reply->wait_q);
  792. }
  793. qeth_put_reply(reply);
  794. goto out;
  795. }
  796. }
  797. spin_unlock_irqrestore(&card->lock, flags);
  798. out:
  799. memcpy(&card->seqno.pdu_hdr_ack,
  800. QETH_PDU_HEADER_SEQ_NO(iob->data),
  801. QETH_SEQ_NO_LENGTH);
  802. qeth_release_buffer(channel, iob);
  803. }
  804. static int qeth_setup_channel(struct qeth_channel *channel)
  805. {
  806. int cnt;
  807. QETH_DBF_TEXT(SETUP, 2, "setupch");
  808. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
  809. channel->iob[cnt].data =
  810. kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
  811. if (channel->iob[cnt].data == NULL)
  812. break;
  813. channel->iob[cnt].state = BUF_STATE_FREE;
  814. channel->iob[cnt].channel = channel;
  815. channel->iob[cnt].callback = qeth_send_control_data_cb;
  816. channel->iob[cnt].rc = 0;
  817. }
  818. if (cnt < QETH_CMD_BUFFER_NO) {
  819. while (cnt-- > 0)
  820. kfree(channel->iob[cnt].data);
  821. return -ENOMEM;
  822. }
  823. channel->buf_no = 0;
  824. channel->io_buf_no = 0;
  825. atomic_set(&channel->irq_pending, 0);
  826. spin_lock_init(&channel->iob_lock);
  827. init_waitqueue_head(&channel->wait_q);
  828. return 0;
  829. }
  830. static int qeth_set_thread_start_bit(struct qeth_card *card,
  831. unsigned long thread)
  832. {
  833. unsigned long flags;
  834. spin_lock_irqsave(&card->thread_mask_lock, flags);
  835. if (!(card->thread_allowed_mask & thread) ||
  836. (card->thread_start_mask & thread)) {
  837. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  838. return -EPERM;
  839. }
  840. card->thread_start_mask |= thread;
  841. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  842. return 0;
  843. }
  844. void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
  845. {
  846. unsigned long flags;
  847. spin_lock_irqsave(&card->thread_mask_lock, flags);
  848. card->thread_start_mask &= ~thread;
  849. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  850. wake_up(&card->wait_q);
  851. }
  852. EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
  853. void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
  854. {
  855. unsigned long flags;
  856. spin_lock_irqsave(&card->thread_mask_lock, flags);
  857. card->thread_running_mask &= ~thread;
  858. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  859. wake_up(&card->wait_q);
  860. }
  861. EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
  862. static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  863. {
  864. unsigned long flags;
  865. int rc = 0;
  866. spin_lock_irqsave(&card->thread_mask_lock, flags);
  867. if (card->thread_start_mask & thread) {
  868. if ((card->thread_allowed_mask & thread) &&
  869. !(card->thread_running_mask & thread)) {
  870. rc = 1;
  871. card->thread_start_mask &= ~thread;
  872. card->thread_running_mask |= thread;
  873. } else
  874. rc = -EPERM;
  875. }
  876. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  877. return rc;
  878. }
  879. int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  880. {
  881. int rc = 0;
  882. wait_event(card->wait_q,
  883. (rc = __qeth_do_run_thread(card, thread)) >= 0);
  884. return rc;
  885. }
  886. EXPORT_SYMBOL_GPL(qeth_do_run_thread);
  887. void qeth_schedule_recovery(struct qeth_card *card)
  888. {
  889. QETH_CARD_TEXT(card, 2, "startrec");
  890. if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
  891. schedule_work(&card->kernel_thread_starter);
  892. }
  893. EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
  894. static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
  895. {
  896. int dstat, cstat;
  897. char *sense;
  898. struct qeth_card *card;
  899. sense = (char *) irb->ecw;
  900. cstat = irb->scsw.cmd.cstat;
  901. dstat = irb->scsw.cmd.dstat;
  902. card = CARD_FROM_CDEV(cdev);
  903. if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
  904. SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
  905. SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
  906. QETH_CARD_TEXT(card, 2, "CGENCHK");
  907. dev_warn(&cdev->dev, "The qeth device driver "
  908. "failed to recover an error on the device\n");
  909. QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
  910. dev_name(&cdev->dev), dstat, cstat);
  911. print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
  912. 16, 1, irb, 64, 1);
  913. return 1;
  914. }
  915. if (dstat & DEV_STAT_UNIT_CHECK) {
  916. if (sense[SENSE_RESETTING_EVENT_BYTE] &
  917. SENSE_RESETTING_EVENT_FLAG) {
  918. QETH_CARD_TEXT(card, 2, "REVIND");
  919. return 1;
  920. }
  921. if (sense[SENSE_COMMAND_REJECT_BYTE] &
  922. SENSE_COMMAND_REJECT_FLAG) {
  923. QETH_CARD_TEXT(card, 2, "CMDREJi");
  924. return 1;
  925. }
  926. if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
  927. QETH_CARD_TEXT(card, 2, "AFFE");
  928. return 1;
  929. }
  930. if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
  931. QETH_CARD_TEXT(card, 2, "ZEROSEN");
  932. return 0;
  933. }
  934. QETH_CARD_TEXT(card, 2, "DGENCHK");
  935. return 1;
  936. }
  937. return 0;
  938. }
  939. static long __qeth_check_irb_error(struct ccw_device *cdev,
  940. unsigned long intparm, struct irb *irb)
  941. {
  942. struct qeth_card *card;
  943. card = CARD_FROM_CDEV(cdev);
  944. if (!card || !IS_ERR(irb))
  945. return 0;
  946. switch (PTR_ERR(irb)) {
  947. case -EIO:
  948. QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
  949. dev_name(&cdev->dev));
  950. QETH_CARD_TEXT(card, 2, "ckirberr");
  951. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  952. break;
  953. case -ETIMEDOUT:
  954. dev_warn(&cdev->dev, "A hardware operation timed out"
  955. " on the device\n");
  956. QETH_CARD_TEXT(card, 2, "ckirberr");
  957. QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
  958. if (intparm == QETH_RCD_PARM) {
  959. if (card->data.ccwdev == cdev) {
  960. card->data.state = CH_STATE_DOWN;
  961. wake_up(&card->wait_q);
  962. }
  963. }
  964. break;
  965. default:
  966. QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
  967. dev_name(&cdev->dev), PTR_ERR(irb));
  968. QETH_CARD_TEXT(card, 2, "ckirberr");
  969. QETH_CARD_TEXT(card, 2, " rc???");
  970. }
  971. return PTR_ERR(irb);
  972. }
  973. static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
  974. struct irb *irb)
  975. {
  976. int rc;
  977. int cstat, dstat;
  978. struct qeth_cmd_buffer *buffer;
  979. struct qeth_channel *channel;
  980. struct qeth_card *card;
  981. struct qeth_cmd_buffer *iob;
  982. __u8 index;
  983. if (__qeth_check_irb_error(cdev, intparm, irb))
  984. return;
  985. cstat = irb->scsw.cmd.cstat;
  986. dstat = irb->scsw.cmd.dstat;
  987. card = CARD_FROM_CDEV(cdev);
  988. if (!card)
  989. return;
  990. QETH_CARD_TEXT(card, 5, "irq");
  991. if (card->read.ccwdev == cdev) {
  992. channel = &card->read;
  993. QETH_CARD_TEXT(card, 5, "read");
  994. } else if (card->write.ccwdev == cdev) {
  995. channel = &card->write;
  996. QETH_CARD_TEXT(card, 5, "write");
  997. } else {
  998. channel = &card->data;
  999. QETH_CARD_TEXT(card, 5, "data");
  1000. }
  1001. atomic_set(&channel->irq_pending, 0);
  1002. if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
  1003. channel->state = CH_STATE_STOPPED;
  1004. if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
  1005. channel->state = CH_STATE_HALTED;
  1006. /*let's wake up immediately on data channel*/
  1007. if ((channel == &card->data) && (intparm != 0) &&
  1008. (intparm != QETH_RCD_PARM))
  1009. goto out;
  1010. if (intparm == QETH_CLEAR_CHANNEL_PARM) {
  1011. QETH_CARD_TEXT(card, 6, "clrchpar");
  1012. /* we don't have to handle this further */
  1013. intparm = 0;
  1014. }
  1015. if (intparm == QETH_HALT_CHANNEL_PARM) {
  1016. QETH_CARD_TEXT(card, 6, "hltchpar");
  1017. /* we don't have to handle this further */
  1018. intparm = 0;
  1019. }
  1020. if ((dstat & DEV_STAT_UNIT_EXCEP) ||
  1021. (dstat & DEV_STAT_UNIT_CHECK) ||
  1022. (cstat)) {
  1023. if (irb->esw.esw0.erw.cons) {
  1024. dev_warn(&channel->ccwdev->dev,
  1025. "The qeth device driver failed to recover "
  1026. "an error on the device\n");
  1027. QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
  1028. "0x%X dstat 0x%X\n",
  1029. dev_name(&channel->ccwdev->dev), cstat, dstat);
  1030. print_hex_dump(KERN_WARNING, "qeth: irb ",
  1031. DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
  1032. print_hex_dump(KERN_WARNING, "qeth: sense data ",
  1033. DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
  1034. }
  1035. if (intparm == QETH_RCD_PARM) {
  1036. channel->state = CH_STATE_DOWN;
  1037. goto out;
  1038. }
  1039. rc = qeth_get_problem(cdev, irb);
  1040. if (rc) {
  1041. qeth_clear_ipacmd_list(card);
  1042. qeth_schedule_recovery(card);
  1043. goto out;
  1044. }
  1045. }
  1046. if (intparm == QETH_RCD_PARM) {
  1047. channel->state = CH_STATE_RCD_DONE;
  1048. goto out;
  1049. }
  1050. if (intparm) {
  1051. buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
  1052. buffer->state = BUF_STATE_PROCESSED;
  1053. }
  1054. if (channel == &card->data)
  1055. return;
  1056. if (channel == &card->read &&
  1057. channel->state == CH_STATE_UP)
  1058. qeth_issue_next_read(card);
  1059. iob = channel->iob;
  1060. index = channel->buf_no;
  1061. while (iob[index].state == BUF_STATE_PROCESSED) {
  1062. if (iob[index].callback != NULL)
  1063. iob[index].callback(channel, iob + index);
  1064. index = (index + 1) % QETH_CMD_BUFFER_NO;
  1065. }
  1066. channel->buf_no = index;
  1067. out:
  1068. wake_up(&card->wait_q);
  1069. return;
  1070. }
  1071. static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
  1072. struct qeth_qdio_out_buffer *buf,
  1073. enum iucv_tx_notify notification)
  1074. {
  1075. struct sk_buff *skb;
  1076. if (skb_queue_empty(&buf->skb_list))
  1077. goto out;
  1078. skb = skb_peek(&buf->skb_list);
  1079. while (skb) {
  1080. QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
  1081. QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
  1082. if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
  1083. if (skb->sk) {
  1084. struct iucv_sock *iucv = iucv_sk(skb->sk);
  1085. iucv->sk_txnotify(skb, notification);
  1086. }
  1087. }
  1088. if (skb_queue_is_last(&buf->skb_list, skb))
  1089. skb = NULL;
  1090. else
  1091. skb = skb_queue_next(&buf->skb_list, skb);
  1092. }
  1093. out:
  1094. return;
  1095. }
  1096. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
  1097. {
  1098. struct sk_buff *skb;
  1099. struct iucv_sock *iucv;
  1100. int notify_general_error = 0;
  1101. if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
  1102. notify_general_error = 1;
  1103. /* release may never happen from within CQ tasklet scope */
  1104. WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
  1105. skb = skb_dequeue(&buf->skb_list);
  1106. while (skb) {
  1107. QETH_CARD_TEXT(buf->q->card, 5, "skbr");
  1108. QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
  1109. if (notify_general_error &&
  1110. be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
  1111. if (skb->sk) {
  1112. iucv = iucv_sk(skb->sk);
  1113. iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
  1114. }
  1115. }
  1116. refcount_dec(&skb->users);
  1117. dev_kfree_skb_any(skb);
  1118. skb = skb_dequeue(&buf->skb_list);
  1119. }
  1120. }
  1121. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  1122. struct qeth_qdio_out_buffer *buf,
  1123. enum qeth_qdio_buffer_states newbufstate)
  1124. {
  1125. int i;
  1126. /* is PCI flag set on buffer? */
  1127. if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
  1128. atomic_dec(&queue->set_pci_flags_count);
  1129. if (newbufstate == QETH_QDIO_BUF_EMPTY) {
  1130. qeth_release_skbs(buf);
  1131. }
  1132. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
  1133. if (buf->buffer->element[i].addr && buf->is_header[i])
  1134. kmem_cache_free(qeth_core_header_cache,
  1135. buf->buffer->element[i].addr);
  1136. buf->is_header[i] = 0;
  1137. buf->buffer->element[i].length = 0;
  1138. buf->buffer->element[i].addr = NULL;
  1139. buf->buffer->element[i].eflags = 0;
  1140. buf->buffer->element[i].sflags = 0;
  1141. }
  1142. buf->buffer->element[15].eflags = 0;
  1143. buf->buffer->element[15].sflags = 0;
  1144. buf->next_element_to_fill = 0;
  1145. atomic_set(&buf->state, newbufstate);
  1146. }
  1147. static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
  1148. {
  1149. int j;
  1150. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  1151. if (!q->bufs[j])
  1152. continue;
  1153. qeth_cleanup_handled_pending(q, j, 1);
  1154. qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
  1155. if (free) {
  1156. kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
  1157. q->bufs[j] = NULL;
  1158. }
  1159. }
  1160. }
  1161. void qeth_clear_qdio_buffers(struct qeth_card *card)
  1162. {
  1163. int i;
  1164. QETH_CARD_TEXT(card, 2, "clearqdbf");
  1165. /* clear outbound buffers to free skbs */
  1166. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1167. if (card->qdio.out_qs[i]) {
  1168. qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
  1169. }
  1170. }
  1171. }
  1172. EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
  1173. static void qeth_free_buffer_pool(struct qeth_card *card)
  1174. {
  1175. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  1176. int i = 0;
  1177. list_for_each_entry_safe(pool_entry, tmp,
  1178. &card->qdio.init_pool.entry_list, init_list){
  1179. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
  1180. free_page((unsigned long)pool_entry->elements[i]);
  1181. list_del(&pool_entry->init_list);
  1182. kfree(pool_entry);
  1183. }
  1184. }
  1185. static void qeth_clean_channel(struct qeth_channel *channel)
  1186. {
  1187. int cnt;
  1188. QETH_DBF_TEXT(SETUP, 2, "freech");
  1189. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  1190. kfree(channel->iob[cnt].data);
  1191. }
  1192. static void qeth_set_single_write_queues(struct qeth_card *card)
  1193. {
  1194. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1195. (card->qdio.no_out_queues == 4))
  1196. qeth_free_qdio_buffers(card);
  1197. card->qdio.no_out_queues = 1;
  1198. if (card->qdio.default_out_queue != 0)
  1199. dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
  1200. card->qdio.default_out_queue = 0;
  1201. }
  1202. static void qeth_set_multiple_write_queues(struct qeth_card *card)
  1203. {
  1204. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1205. (card->qdio.no_out_queues == 1)) {
  1206. qeth_free_qdio_buffers(card);
  1207. card->qdio.default_out_queue = 2;
  1208. }
  1209. card->qdio.no_out_queues = 4;
  1210. }
  1211. static void qeth_update_from_chp_desc(struct qeth_card *card)
  1212. {
  1213. struct ccw_device *ccwdev;
  1214. struct channel_path_desc *chp_dsc;
  1215. QETH_DBF_TEXT(SETUP, 2, "chp_desc");
  1216. ccwdev = card->data.ccwdev;
  1217. chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
  1218. if (!chp_dsc)
  1219. goto out;
  1220. card->info.func_level = 0x4100 + chp_dsc->desc;
  1221. if (card->info.type == QETH_CARD_TYPE_IQD)
  1222. goto out;
  1223. /* CHPP field bit 6 == 1 -> single queue */
  1224. if ((chp_dsc->chpp & 0x02) == 0x02)
  1225. qeth_set_single_write_queues(card);
  1226. else
  1227. qeth_set_multiple_write_queues(card);
  1228. out:
  1229. kfree(chp_dsc);
  1230. QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
  1231. QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
  1232. }
  1233. static void qeth_init_qdio_info(struct qeth_card *card)
  1234. {
  1235. QETH_DBF_TEXT(SETUP, 4, "intqdinf");
  1236. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  1237. /* inbound */
  1238. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  1239. if (card->info.type == QETH_CARD_TYPE_IQD)
  1240. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
  1241. else
  1242. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
  1243. card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
  1244. INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
  1245. INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
  1246. }
  1247. static void qeth_set_intial_options(struct qeth_card *card)
  1248. {
  1249. card->options.route4.type = NO_ROUTER;
  1250. card->options.route6.type = NO_ROUTER;
  1251. card->options.fake_broadcast = 0;
  1252. card->options.performance_stats = 0;
  1253. card->options.rx_sg_cb = QETH_RX_SG_CB;
  1254. card->options.isolation = ISOLATION_MODE_NONE;
  1255. card->options.cq = QETH_CQ_DISABLED;
  1256. }
  1257. static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
  1258. {
  1259. unsigned long flags;
  1260. int rc = 0;
  1261. spin_lock_irqsave(&card->thread_mask_lock, flags);
  1262. QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
  1263. (u8) card->thread_start_mask,
  1264. (u8) card->thread_allowed_mask,
  1265. (u8) card->thread_running_mask);
  1266. rc = (card->thread_start_mask & thread);
  1267. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  1268. return rc;
  1269. }
  1270. static void qeth_start_kernel_thread(struct work_struct *work)
  1271. {
  1272. struct task_struct *ts;
  1273. struct qeth_card *card = container_of(work, struct qeth_card,
  1274. kernel_thread_starter);
  1275. QETH_CARD_TEXT(card , 2, "strthrd");
  1276. if (card->read.state != CH_STATE_UP &&
  1277. card->write.state != CH_STATE_UP)
  1278. return;
  1279. if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
  1280. ts = kthread_run(card->discipline->recover, (void *)card,
  1281. "qeth_recover");
  1282. if (IS_ERR(ts)) {
  1283. qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
  1284. qeth_clear_thread_running_bit(card,
  1285. QETH_RECOVER_THREAD);
  1286. }
  1287. }
  1288. }
  1289. static void qeth_buffer_reclaim_work(struct work_struct *);
  1290. static int qeth_setup_card(struct qeth_card *card)
  1291. {
  1292. QETH_DBF_TEXT(SETUP, 2, "setupcrd");
  1293. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1294. card->read.state = CH_STATE_DOWN;
  1295. card->write.state = CH_STATE_DOWN;
  1296. card->data.state = CH_STATE_DOWN;
  1297. card->state = CARD_STATE_DOWN;
  1298. card->lan_online = 0;
  1299. card->read_or_write_problem = 0;
  1300. card->dev = NULL;
  1301. spin_lock_init(&card->vlanlock);
  1302. spin_lock_init(&card->mclock);
  1303. spin_lock_init(&card->lock);
  1304. spin_lock_init(&card->ip_lock);
  1305. spin_lock_init(&card->thread_mask_lock);
  1306. mutex_init(&card->conf_mutex);
  1307. mutex_init(&card->discipline_mutex);
  1308. card->thread_start_mask = 0;
  1309. card->thread_allowed_mask = 0;
  1310. card->thread_running_mask = 0;
  1311. INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
  1312. INIT_LIST_HEAD(&card->cmd_waiter_list);
  1313. init_waitqueue_head(&card->wait_q);
  1314. /* initial options */
  1315. qeth_set_intial_options(card);
  1316. /* IP address takeover */
  1317. INIT_LIST_HEAD(&card->ipato.entries);
  1318. card->ipato.enabled = 0;
  1319. card->ipato.invert4 = 0;
  1320. card->ipato.invert6 = 0;
  1321. /* init QDIO stuff */
  1322. qeth_init_qdio_info(card);
  1323. INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
  1324. INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
  1325. return 0;
  1326. }
  1327. static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
  1328. {
  1329. struct qeth_card *card = container_of(slr, struct qeth_card,
  1330. qeth_service_level);
  1331. if (card->info.mcl_level[0])
  1332. seq_printf(m, "qeth: %s firmware level %s\n",
  1333. CARD_BUS_ID(card), card->info.mcl_level);
  1334. }
  1335. static struct qeth_card *qeth_alloc_card(void)
  1336. {
  1337. struct qeth_card *card;
  1338. QETH_DBF_TEXT(SETUP, 2, "alloccrd");
  1339. card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
  1340. if (!card)
  1341. goto out;
  1342. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1343. if (qeth_setup_channel(&card->read))
  1344. goto out_ip;
  1345. if (qeth_setup_channel(&card->write))
  1346. goto out_channel;
  1347. card->options.layer2 = -1;
  1348. card->qeth_service_level.seq_print = qeth_core_sl_print;
  1349. register_service_level(&card->qeth_service_level);
  1350. return card;
  1351. out_channel:
  1352. qeth_clean_channel(&card->read);
  1353. out_ip:
  1354. kfree(card);
  1355. out:
  1356. return NULL;
  1357. }
  1358. static int qeth_determine_card_type(struct qeth_card *card)
  1359. {
  1360. int i = 0;
  1361. QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
  1362. card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
  1363. card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
  1364. while (known_devices[i][QETH_DEV_MODEL_IND]) {
  1365. if ((CARD_RDEV(card)->id.dev_type ==
  1366. known_devices[i][QETH_DEV_TYPE_IND]) &&
  1367. (CARD_RDEV(card)->id.dev_model ==
  1368. known_devices[i][QETH_DEV_MODEL_IND])) {
  1369. card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
  1370. card->qdio.no_out_queues =
  1371. known_devices[i][QETH_QUEUE_NO_IND];
  1372. card->qdio.no_in_queues = 1;
  1373. card->info.is_multicast_different =
  1374. known_devices[i][QETH_MULTICAST_IND];
  1375. qeth_update_from_chp_desc(card);
  1376. return 0;
  1377. }
  1378. i++;
  1379. }
  1380. card->info.type = QETH_CARD_TYPE_UNKNOWN;
  1381. dev_err(&card->gdev->dev, "The adapter hardware is of an "
  1382. "unknown type\n");
  1383. return -ENOENT;
  1384. }
  1385. static int qeth_clear_channel(struct qeth_channel *channel)
  1386. {
  1387. unsigned long flags;
  1388. struct qeth_card *card;
  1389. int rc;
  1390. card = CARD_FROM_CDEV(channel->ccwdev);
  1391. QETH_CARD_TEXT(card, 3, "clearch");
  1392. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1393. rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
  1394. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1395. if (rc)
  1396. return rc;
  1397. rc = wait_event_interruptible_timeout(card->wait_q,
  1398. channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
  1399. if (rc == -ERESTARTSYS)
  1400. return rc;
  1401. if (channel->state != CH_STATE_STOPPED)
  1402. return -ETIME;
  1403. channel->state = CH_STATE_DOWN;
  1404. return 0;
  1405. }
  1406. static int qeth_halt_channel(struct qeth_channel *channel)
  1407. {
  1408. unsigned long flags;
  1409. struct qeth_card *card;
  1410. int rc;
  1411. card = CARD_FROM_CDEV(channel->ccwdev);
  1412. QETH_CARD_TEXT(card, 3, "haltch");
  1413. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1414. rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
  1415. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1416. if (rc)
  1417. return rc;
  1418. rc = wait_event_interruptible_timeout(card->wait_q,
  1419. channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
  1420. if (rc == -ERESTARTSYS)
  1421. return rc;
  1422. if (channel->state != CH_STATE_HALTED)
  1423. return -ETIME;
  1424. return 0;
  1425. }
  1426. static int qeth_halt_channels(struct qeth_card *card)
  1427. {
  1428. int rc1 = 0, rc2 = 0, rc3 = 0;
  1429. QETH_CARD_TEXT(card, 3, "haltchs");
  1430. rc1 = qeth_halt_channel(&card->read);
  1431. rc2 = qeth_halt_channel(&card->write);
  1432. rc3 = qeth_halt_channel(&card->data);
  1433. if (rc1)
  1434. return rc1;
  1435. if (rc2)
  1436. return rc2;
  1437. return rc3;
  1438. }
  1439. static int qeth_clear_channels(struct qeth_card *card)
  1440. {
  1441. int rc1 = 0, rc2 = 0, rc3 = 0;
  1442. QETH_CARD_TEXT(card, 3, "clearchs");
  1443. rc1 = qeth_clear_channel(&card->read);
  1444. rc2 = qeth_clear_channel(&card->write);
  1445. rc3 = qeth_clear_channel(&card->data);
  1446. if (rc1)
  1447. return rc1;
  1448. if (rc2)
  1449. return rc2;
  1450. return rc3;
  1451. }
  1452. static int qeth_clear_halt_card(struct qeth_card *card, int halt)
  1453. {
  1454. int rc = 0;
  1455. QETH_CARD_TEXT(card, 3, "clhacrd");
  1456. if (halt)
  1457. rc = qeth_halt_channels(card);
  1458. if (rc)
  1459. return rc;
  1460. return qeth_clear_channels(card);
  1461. }
  1462. int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
  1463. {
  1464. int rc = 0;
  1465. QETH_CARD_TEXT(card, 3, "qdioclr");
  1466. switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
  1467. QETH_QDIO_CLEANING)) {
  1468. case QETH_QDIO_ESTABLISHED:
  1469. if (card->info.type == QETH_CARD_TYPE_IQD)
  1470. rc = qdio_shutdown(CARD_DDEV(card),
  1471. QDIO_FLAG_CLEANUP_USING_HALT);
  1472. else
  1473. rc = qdio_shutdown(CARD_DDEV(card),
  1474. QDIO_FLAG_CLEANUP_USING_CLEAR);
  1475. if (rc)
  1476. QETH_CARD_TEXT_(card, 3, "1err%d", rc);
  1477. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  1478. break;
  1479. case QETH_QDIO_CLEANING:
  1480. return rc;
  1481. default:
  1482. break;
  1483. }
  1484. rc = qeth_clear_halt_card(card, use_halt);
  1485. if (rc)
  1486. QETH_CARD_TEXT_(card, 3, "2err%d", rc);
  1487. card->state = CARD_STATE_DOWN;
  1488. return rc;
  1489. }
  1490. EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
  1491. static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
  1492. int *length)
  1493. {
  1494. struct ciw *ciw;
  1495. char *rcd_buf;
  1496. int ret;
  1497. struct qeth_channel *channel = &card->data;
  1498. unsigned long flags;
  1499. /*
  1500. * scan for RCD command in extended SenseID data
  1501. */
  1502. ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
  1503. if (!ciw || ciw->cmd == 0)
  1504. return -EOPNOTSUPP;
  1505. rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
  1506. if (!rcd_buf)
  1507. return -ENOMEM;
  1508. channel->ccw.cmd_code = ciw->cmd;
  1509. channel->ccw.cda = (__u32) __pa(rcd_buf);
  1510. channel->ccw.count = ciw->count;
  1511. channel->ccw.flags = CCW_FLAG_SLI;
  1512. channel->state = CH_STATE_RCD;
  1513. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1514. ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1515. QETH_RCD_PARM, LPM_ANYPATH, 0,
  1516. QETH_RCD_TIMEOUT);
  1517. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1518. if (!ret)
  1519. wait_event(card->wait_q,
  1520. (channel->state == CH_STATE_RCD_DONE ||
  1521. channel->state == CH_STATE_DOWN));
  1522. if (channel->state == CH_STATE_DOWN)
  1523. ret = -EIO;
  1524. else
  1525. channel->state = CH_STATE_DOWN;
  1526. if (ret) {
  1527. kfree(rcd_buf);
  1528. *buffer = NULL;
  1529. *length = 0;
  1530. } else {
  1531. *length = ciw->count;
  1532. *buffer = rcd_buf;
  1533. }
  1534. return ret;
  1535. }
  1536. static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
  1537. {
  1538. QETH_DBF_TEXT(SETUP, 2, "cfgunit");
  1539. card->info.chpid = prcd[30];
  1540. card->info.unit_addr2 = prcd[31];
  1541. card->info.cula = prcd[63];
  1542. card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
  1543. (prcd[0x11] == _ascebc['M']));
  1544. }
  1545. /* Determine whether the device requires a specific layer discipline */
  1546. static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
  1547. {
  1548. if (card->info.type == QETH_CARD_TYPE_OSM ||
  1549. card->info.type == QETH_CARD_TYPE_OSN) {
  1550. QETH_DBF_TEXT(SETUP, 3, "force l2");
  1551. return QETH_DISCIPLINE_LAYER2;
  1552. }
  1553. /* virtual HiperSocket is L3 only: */
  1554. if (card->info.guestlan && card->info.type == QETH_CARD_TYPE_IQD) {
  1555. QETH_DBF_TEXT(SETUP, 3, "force l3");
  1556. return QETH_DISCIPLINE_LAYER3;
  1557. }
  1558. QETH_DBF_TEXT(SETUP, 3, "force no");
  1559. return QETH_DISCIPLINE_UNDETERMINED;
  1560. }
  1561. static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
  1562. {
  1563. QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
  1564. if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
  1565. prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
  1566. card->info.blkt.time_total = 0;
  1567. card->info.blkt.inter_packet = 0;
  1568. card->info.blkt.inter_packet_jumbo = 0;
  1569. } else {
  1570. card->info.blkt.time_total = 250;
  1571. card->info.blkt.inter_packet = 5;
  1572. card->info.blkt.inter_packet_jumbo = 15;
  1573. }
  1574. }
  1575. static void qeth_init_tokens(struct qeth_card *card)
  1576. {
  1577. card->token.issuer_rm_w = 0x00010103UL;
  1578. card->token.cm_filter_w = 0x00010108UL;
  1579. card->token.cm_connection_w = 0x0001010aUL;
  1580. card->token.ulp_filter_w = 0x0001010bUL;
  1581. card->token.ulp_connection_w = 0x0001010dUL;
  1582. }
  1583. static void qeth_init_func_level(struct qeth_card *card)
  1584. {
  1585. switch (card->info.type) {
  1586. case QETH_CARD_TYPE_IQD:
  1587. card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
  1588. break;
  1589. case QETH_CARD_TYPE_OSD:
  1590. case QETH_CARD_TYPE_OSN:
  1591. card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
  1592. break;
  1593. default:
  1594. break;
  1595. }
  1596. }
  1597. static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
  1598. void (*idx_reply_cb)(struct qeth_channel *,
  1599. struct qeth_cmd_buffer *))
  1600. {
  1601. struct qeth_cmd_buffer *iob;
  1602. unsigned long flags;
  1603. int rc;
  1604. struct qeth_card *card;
  1605. QETH_DBF_TEXT(SETUP, 2, "idxanswr");
  1606. card = CARD_FROM_CDEV(channel->ccwdev);
  1607. iob = qeth_get_buffer(channel);
  1608. if (!iob)
  1609. return -ENOMEM;
  1610. iob->callback = idx_reply_cb;
  1611. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  1612. channel->ccw.count = QETH_BUFSIZE;
  1613. channel->ccw.cda = (__u32) __pa(iob->data);
  1614. wait_event(card->wait_q,
  1615. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1616. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1617. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1618. rc = ccw_device_start(channel->ccwdev,
  1619. &channel->ccw, (addr_t) iob, 0, 0);
  1620. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1621. if (rc) {
  1622. QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
  1623. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  1624. atomic_set(&channel->irq_pending, 0);
  1625. wake_up(&card->wait_q);
  1626. return rc;
  1627. }
  1628. rc = wait_event_interruptible_timeout(card->wait_q,
  1629. channel->state == CH_STATE_UP, QETH_TIMEOUT);
  1630. if (rc == -ERESTARTSYS)
  1631. return rc;
  1632. if (channel->state != CH_STATE_UP) {
  1633. rc = -ETIME;
  1634. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  1635. qeth_clear_cmd_buffers(channel);
  1636. } else
  1637. rc = 0;
  1638. return rc;
  1639. }
  1640. static int qeth_idx_activate_channel(struct qeth_channel *channel,
  1641. void (*idx_reply_cb)(struct qeth_channel *,
  1642. struct qeth_cmd_buffer *))
  1643. {
  1644. struct qeth_card *card;
  1645. struct qeth_cmd_buffer *iob;
  1646. unsigned long flags;
  1647. __u16 temp;
  1648. __u8 tmp;
  1649. int rc;
  1650. struct ccw_dev_id temp_devid;
  1651. card = CARD_FROM_CDEV(channel->ccwdev);
  1652. QETH_DBF_TEXT(SETUP, 2, "idxactch");
  1653. iob = qeth_get_buffer(channel);
  1654. if (!iob)
  1655. return -ENOMEM;
  1656. iob->callback = idx_reply_cb;
  1657. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  1658. channel->ccw.count = IDX_ACTIVATE_SIZE;
  1659. channel->ccw.cda = (__u32) __pa(iob->data);
  1660. if (channel == &card->write) {
  1661. memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
  1662. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1663. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1664. card->seqno.trans_hdr++;
  1665. } else {
  1666. memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
  1667. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1668. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1669. }
  1670. tmp = ((__u8)card->info.portno) | 0x80;
  1671. memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
  1672. memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1673. &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
  1674. memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
  1675. &card->info.func_level, sizeof(__u16));
  1676. ccw_device_get_id(CARD_DDEV(card), &temp_devid);
  1677. memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
  1678. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1679. memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
  1680. wait_event(card->wait_q,
  1681. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1682. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1683. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1684. rc = ccw_device_start(channel->ccwdev,
  1685. &channel->ccw, (addr_t) iob, 0, 0);
  1686. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1687. if (rc) {
  1688. QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
  1689. rc);
  1690. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  1691. atomic_set(&channel->irq_pending, 0);
  1692. wake_up(&card->wait_q);
  1693. return rc;
  1694. }
  1695. rc = wait_event_interruptible_timeout(card->wait_q,
  1696. channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
  1697. if (rc == -ERESTARTSYS)
  1698. return rc;
  1699. if (channel->state != CH_STATE_ACTIVATING) {
  1700. dev_warn(&channel->ccwdev->dev, "The qeth device driver"
  1701. " failed to recover an error on the device\n");
  1702. QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
  1703. dev_name(&channel->ccwdev->dev));
  1704. QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
  1705. qeth_clear_cmd_buffers(channel);
  1706. return -ETIME;
  1707. }
  1708. return qeth_idx_activate_get_answer(channel, idx_reply_cb);
  1709. }
  1710. static int qeth_peer_func_level(int level)
  1711. {
  1712. if ((level & 0xff) == 8)
  1713. return (level & 0xff) + 0x400;
  1714. if (((level >> 8) & 3) == 1)
  1715. return (level & 0xff) + 0x200;
  1716. return level;
  1717. }
  1718. static void qeth_idx_write_cb(struct qeth_channel *channel,
  1719. struct qeth_cmd_buffer *iob)
  1720. {
  1721. struct qeth_card *card;
  1722. __u16 temp;
  1723. QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
  1724. if (channel->state == CH_STATE_DOWN) {
  1725. channel->state = CH_STATE_ACTIVATING;
  1726. goto out;
  1727. }
  1728. card = CARD_FROM_CDEV(channel->ccwdev);
  1729. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1730. if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
  1731. dev_err(&card->write.ccwdev->dev,
  1732. "The adapter is used exclusively by another "
  1733. "host\n");
  1734. else
  1735. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
  1736. " negative reply\n",
  1737. dev_name(&card->write.ccwdev->dev));
  1738. goto out;
  1739. }
  1740. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1741. if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
  1742. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
  1743. "function level mismatch (sent: 0x%x, received: "
  1744. "0x%x)\n", dev_name(&card->write.ccwdev->dev),
  1745. card->info.func_level, temp);
  1746. goto out;
  1747. }
  1748. channel->state = CH_STATE_UP;
  1749. out:
  1750. qeth_release_buffer(channel, iob);
  1751. }
  1752. static void qeth_idx_read_cb(struct qeth_channel *channel,
  1753. struct qeth_cmd_buffer *iob)
  1754. {
  1755. struct qeth_card *card;
  1756. __u16 temp;
  1757. QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
  1758. if (channel->state == CH_STATE_DOWN) {
  1759. channel->state = CH_STATE_ACTIVATING;
  1760. goto out;
  1761. }
  1762. card = CARD_FROM_CDEV(channel->ccwdev);
  1763. if (qeth_check_idx_response(card, iob->data))
  1764. goto out;
  1765. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1766. switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
  1767. case QETH_IDX_ACT_ERR_EXCL:
  1768. dev_err(&card->write.ccwdev->dev,
  1769. "The adapter is used exclusively by another "
  1770. "host\n");
  1771. break;
  1772. case QETH_IDX_ACT_ERR_AUTH:
  1773. case QETH_IDX_ACT_ERR_AUTH_USER:
  1774. dev_err(&card->read.ccwdev->dev,
  1775. "Setting the device online failed because of "
  1776. "insufficient authorization\n");
  1777. break;
  1778. default:
  1779. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
  1780. " negative reply\n",
  1781. dev_name(&card->read.ccwdev->dev));
  1782. }
  1783. QETH_CARD_TEXT_(card, 2, "idxread%c",
  1784. QETH_IDX_ACT_CAUSE_CODE(iob->data));
  1785. goto out;
  1786. }
  1787. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1788. if (temp != qeth_peer_func_level(card->info.func_level)) {
  1789. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
  1790. "level mismatch (sent: 0x%x, received: 0x%x)\n",
  1791. dev_name(&card->read.ccwdev->dev),
  1792. card->info.func_level, temp);
  1793. goto out;
  1794. }
  1795. memcpy(&card->token.issuer_rm_r,
  1796. QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1797. QETH_MPC_TOKEN_LENGTH);
  1798. memcpy(&card->info.mcl_level[0],
  1799. QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
  1800. channel->state = CH_STATE_UP;
  1801. out:
  1802. qeth_release_buffer(channel, iob);
  1803. }
  1804. void qeth_prepare_control_data(struct qeth_card *card, int len,
  1805. struct qeth_cmd_buffer *iob)
  1806. {
  1807. qeth_setup_ccw(&card->write, iob->data, len);
  1808. iob->callback = qeth_release_buffer;
  1809. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1810. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1811. card->seqno.trans_hdr++;
  1812. memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
  1813. &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
  1814. card->seqno.pdu_hdr++;
  1815. memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
  1816. &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
  1817. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1818. }
  1819. EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
  1820. /**
  1821. * qeth_send_control_data() - send control command to the card
  1822. * @card: qeth_card structure pointer
  1823. * @len: size of the command buffer
  1824. * @iob: qeth_cmd_buffer pointer
  1825. * @reply_cb: callback function pointer
  1826. * @cb_card: pointer to the qeth_card structure
  1827. * @cb_reply: pointer to the qeth_reply structure
  1828. * @cb_cmd: pointer to the original iob for non-IPA
  1829. * commands, or to the qeth_ipa_cmd structure
  1830. * for the IPA commands.
  1831. * @reply_param: private pointer passed to the callback
  1832. *
  1833. * Returns the value of the `return_code' field of the response
  1834. * block returned from the hardware, or other error indication.
  1835. * Value of zero indicates successful execution of the command.
  1836. *
  1837. * Callback function gets called one or more times, with cb_cmd
  1838. * pointing to the response returned by the hardware. Callback
  1839. * function must return non-zero if more reply blocks are expected,
  1840. * and zero if the last or only reply block is received. Callback
  1841. * function can get the value of the reply_param pointer from the
  1842. * field 'param' of the structure qeth_reply.
  1843. */
  1844. int qeth_send_control_data(struct qeth_card *card, int len,
  1845. struct qeth_cmd_buffer *iob,
  1846. int (*reply_cb)(struct qeth_card *cb_card,
  1847. struct qeth_reply *cb_reply,
  1848. unsigned long cb_cmd),
  1849. void *reply_param)
  1850. {
  1851. int rc;
  1852. unsigned long flags;
  1853. struct qeth_reply *reply = NULL;
  1854. unsigned long timeout, event_timeout;
  1855. struct qeth_ipa_cmd *cmd;
  1856. QETH_CARD_TEXT(card, 2, "sendctl");
  1857. if (card->read_or_write_problem) {
  1858. qeth_release_buffer(iob->channel, iob);
  1859. return -EIO;
  1860. }
  1861. reply = qeth_alloc_reply(card);
  1862. if (!reply) {
  1863. return -ENOMEM;
  1864. }
  1865. reply->callback = reply_cb;
  1866. reply->param = reply_param;
  1867. if (card->state == CARD_STATE_DOWN)
  1868. reply->seqno = QETH_IDX_COMMAND_SEQNO;
  1869. else
  1870. reply->seqno = card->seqno.ipa++;
  1871. init_waitqueue_head(&reply->wait_q);
  1872. spin_lock_irqsave(&card->lock, flags);
  1873. list_add_tail(&reply->list, &card->cmd_waiter_list);
  1874. spin_unlock_irqrestore(&card->lock, flags);
  1875. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1876. while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
  1877. qeth_prepare_control_data(card, len, iob);
  1878. if (IS_IPA(iob->data))
  1879. event_timeout = QETH_IPA_TIMEOUT;
  1880. else
  1881. event_timeout = QETH_TIMEOUT;
  1882. timeout = jiffies + event_timeout;
  1883. QETH_CARD_TEXT(card, 6, "noirqpnd");
  1884. spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
  1885. rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
  1886. (addr_t) iob, 0, 0);
  1887. spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
  1888. if (rc) {
  1889. QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
  1890. "ccw_device_start rc = %i\n",
  1891. dev_name(&card->write.ccwdev->dev), rc);
  1892. QETH_CARD_TEXT_(card, 2, " err%d", rc);
  1893. spin_lock_irqsave(&card->lock, flags);
  1894. list_del_init(&reply->list);
  1895. qeth_put_reply(reply);
  1896. spin_unlock_irqrestore(&card->lock, flags);
  1897. qeth_release_buffer(iob->channel, iob);
  1898. atomic_set(&card->write.irq_pending, 0);
  1899. wake_up(&card->wait_q);
  1900. return rc;
  1901. }
  1902. /* we have only one long running ipassist, since we can ensure
  1903. process context of this command we can sleep */
  1904. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  1905. if ((cmd->hdr.command == IPA_CMD_SETIP) &&
  1906. (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
  1907. if (!wait_event_timeout(reply->wait_q,
  1908. atomic_read(&reply->received), event_timeout))
  1909. goto time_err;
  1910. } else {
  1911. while (!atomic_read(&reply->received)) {
  1912. if (time_after(jiffies, timeout))
  1913. goto time_err;
  1914. cpu_relax();
  1915. }
  1916. }
  1917. if (reply->rc == -EIO)
  1918. goto error;
  1919. rc = reply->rc;
  1920. qeth_put_reply(reply);
  1921. return rc;
  1922. time_err:
  1923. reply->rc = -ETIME;
  1924. spin_lock_irqsave(&reply->card->lock, flags);
  1925. list_del_init(&reply->list);
  1926. spin_unlock_irqrestore(&reply->card->lock, flags);
  1927. atomic_inc(&reply->received);
  1928. error:
  1929. atomic_set(&card->write.irq_pending, 0);
  1930. qeth_release_buffer(iob->channel, iob);
  1931. card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
  1932. rc = reply->rc;
  1933. qeth_put_reply(reply);
  1934. return rc;
  1935. }
  1936. EXPORT_SYMBOL_GPL(qeth_send_control_data);
  1937. static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1938. unsigned long data)
  1939. {
  1940. struct qeth_cmd_buffer *iob;
  1941. QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
  1942. iob = (struct qeth_cmd_buffer *) data;
  1943. memcpy(&card->token.cm_filter_r,
  1944. QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1945. QETH_MPC_TOKEN_LENGTH);
  1946. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1947. return 0;
  1948. }
  1949. static int qeth_cm_enable(struct qeth_card *card)
  1950. {
  1951. int rc;
  1952. struct qeth_cmd_buffer *iob;
  1953. QETH_DBF_TEXT(SETUP, 2, "cmenable");
  1954. iob = qeth_wait_for_buffer(&card->write);
  1955. memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
  1956. memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
  1957. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1958. memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
  1959. &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
  1960. rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
  1961. qeth_cm_enable_cb, NULL);
  1962. return rc;
  1963. }
  1964. static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  1965. unsigned long data)
  1966. {
  1967. struct qeth_cmd_buffer *iob;
  1968. QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
  1969. iob = (struct qeth_cmd_buffer *) data;
  1970. memcpy(&card->token.cm_connection_r,
  1971. QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
  1972. QETH_MPC_TOKEN_LENGTH);
  1973. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1974. return 0;
  1975. }
  1976. static int qeth_cm_setup(struct qeth_card *card)
  1977. {
  1978. int rc;
  1979. struct qeth_cmd_buffer *iob;
  1980. QETH_DBF_TEXT(SETUP, 2, "cmsetup");
  1981. iob = qeth_wait_for_buffer(&card->write);
  1982. memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
  1983. memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
  1984. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1985. memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
  1986. &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
  1987. memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
  1988. &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
  1989. rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
  1990. qeth_cm_setup_cb, NULL);
  1991. return rc;
  1992. }
  1993. static int qeth_get_initial_mtu_for_card(struct qeth_card *card)
  1994. {
  1995. switch (card->info.type) {
  1996. case QETH_CARD_TYPE_UNKNOWN:
  1997. return 1500;
  1998. case QETH_CARD_TYPE_IQD:
  1999. return card->info.max_mtu;
  2000. case QETH_CARD_TYPE_OSD:
  2001. switch (card->info.link_type) {
  2002. case QETH_LINK_TYPE_HSTR:
  2003. case QETH_LINK_TYPE_LANE_TR:
  2004. return 2000;
  2005. default:
  2006. return card->options.layer2 ? 1500 : 1492;
  2007. }
  2008. case QETH_CARD_TYPE_OSM:
  2009. case QETH_CARD_TYPE_OSX:
  2010. return card->options.layer2 ? 1500 : 1492;
  2011. default:
  2012. return 1500;
  2013. }
  2014. }
  2015. static int qeth_get_mtu_outof_framesize(int framesize)
  2016. {
  2017. switch (framesize) {
  2018. case 0x4000:
  2019. return 8192;
  2020. case 0x6000:
  2021. return 16384;
  2022. case 0xa000:
  2023. return 32768;
  2024. case 0xffff:
  2025. return 57344;
  2026. default:
  2027. return 0;
  2028. }
  2029. }
  2030. static int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
  2031. {
  2032. switch (card->info.type) {
  2033. case QETH_CARD_TYPE_OSD:
  2034. case QETH_CARD_TYPE_OSM:
  2035. case QETH_CARD_TYPE_OSX:
  2036. case QETH_CARD_TYPE_IQD:
  2037. return ((mtu >= 576) &&
  2038. (mtu <= card->info.max_mtu));
  2039. case QETH_CARD_TYPE_OSN:
  2040. case QETH_CARD_TYPE_UNKNOWN:
  2041. default:
  2042. return 1;
  2043. }
  2044. }
  2045. static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  2046. unsigned long data)
  2047. {
  2048. __u16 mtu, framesize;
  2049. __u16 len;
  2050. __u8 link_type;
  2051. struct qeth_cmd_buffer *iob;
  2052. QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
  2053. iob = (struct qeth_cmd_buffer *) data;
  2054. memcpy(&card->token.ulp_filter_r,
  2055. QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
  2056. QETH_MPC_TOKEN_LENGTH);
  2057. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2058. memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
  2059. mtu = qeth_get_mtu_outof_framesize(framesize);
  2060. if (!mtu) {
  2061. iob->rc = -EINVAL;
  2062. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2063. return 0;
  2064. }
  2065. if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
  2066. /* frame size has changed */
  2067. if (card->dev &&
  2068. ((card->dev->mtu == card->info.initial_mtu) ||
  2069. (card->dev->mtu > mtu)))
  2070. card->dev->mtu = mtu;
  2071. qeth_free_qdio_buffers(card);
  2072. }
  2073. card->info.initial_mtu = mtu;
  2074. card->info.max_mtu = mtu;
  2075. card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
  2076. } else {
  2077. card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
  2078. iob->data);
  2079. card->info.initial_mtu = min(card->info.max_mtu,
  2080. qeth_get_initial_mtu_for_card(card));
  2081. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  2082. }
  2083. memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
  2084. if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
  2085. memcpy(&link_type,
  2086. QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
  2087. card->info.link_type = link_type;
  2088. } else
  2089. card->info.link_type = 0;
  2090. QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
  2091. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2092. return 0;
  2093. }
  2094. static int qeth_ulp_enable(struct qeth_card *card)
  2095. {
  2096. int rc;
  2097. char prot_type;
  2098. struct qeth_cmd_buffer *iob;
  2099. /*FIXME: trace view callbacks*/
  2100. QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
  2101. iob = qeth_wait_for_buffer(&card->write);
  2102. memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
  2103. *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
  2104. (__u8) card->info.portno;
  2105. if (card->options.layer2)
  2106. if (card->info.type == QETH_CARD_TYPE_OSN)
  2107. prot_type = QETH_PROT_OSN2;
  2108. else
  2109. prot_type = QETH_PROT_LAYER2;
  2110. else
  2111. prot_type = QETH_PROT_TCPIP;
  2112. memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
  2113. memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
  2114. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2115. memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
  2116. &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
  2117. rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
  2118. qeth_ulp_enable_cb, NULL);
  2119. return rc;
  2120. }
  2121. static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  2122. unsigned long data)
  2123. {
  2124. struct qeth_cmd_buffer *iob;
  2125. QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
  2126. iob = (struct qeth_cmd_buffer *) data;
  2127. memcpy(&card->token.ulp_connection_r,
  2128. QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2129. QETH_MPC_TOKEN_LENGTH);
  2130. if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2131. 3)) {
  2132. QETH_DBF_TEXT(SETUP, 2, "olmlimit");
  2133. dev_err(&card->gdev->dev, "A connection could not be "
  2134. "established because of an OLM limit\n");
  2135. iob->rc = -EMLINK;
  2136. }
  2137. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2138. return 0;
  2139. }
  2140. static int qeth_ulp_setup(struct qeth_card *card)
  2141. {
  2142. int rc;
  2143. __u16 temp;
  2144. struct qeth_cmd_buffer *iob;
  2145. struct ccw_dev_id dev_id;
  2146. QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
  2147. iob = qeth_wait_for_buffer(&card->write);
  2148. memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
  2149. memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
  2150. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2151. memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
  2152. &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
  2153. memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
  2154. &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
  2155. ccw_device_get_id(CARD_DDEV(card), &dev_id);
  2156. memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
  2157. temp = (card->info.cula << 8) + card->info.unit_addr2;
  2158. memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
  2159. rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
  2160. qeth_ulp_setup_cb, NULL);
  2161. return rc;
  2162. }
  2163. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
  2164. {
  2165. int rc;
  2166. struct qeth_qdio_out_buffer *newbuf;
  2167. rc = 0;
  2168. newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
  2169. if (!newbuf) {
  2170. rc = -ENOMEM;
  2171. goto out;
  2172. }
  2173. newbuf->buffer = q->qdio_bufs[bidx];
  2174. skb_queue_head_init(&newbuf->skb_list);
  2175. lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
  2176. newbuf->q = q;
  2177. newbuf->aob = NULL;
  2178. newbuf->next_pending = q->bufs[bidx];
  2179. atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
  2180. q->bufs[bidx] = newbuf;
  2181. if (q->bufstates) {
  2182. q->bufstates[bidx].user = newbuf;
  2183. QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
  2184. QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
  2185. QETH_CARD_TEXT_(q->card, 2, "%lx",
  2186. (long) newbuf->next_pending);
  2187. }
  2188. out:
  2189. return rc;
  2190. }
  2191. static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
  2192. {
  2193. if (!q)
  2194. return;
  2195. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2196. kfree(q);
  2197. }
  2198. static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
  2199. {
  2200. struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  2201. if (!q)
  2202. return NULL;
  2203. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  2204. kfree(q);
  2205. return NULL;
  2206. }
  2207. return q;
  2208. }
  2209. static int qeth_alloc_qdio_buffers(struct qeth_card *card)
  2210. {
  2211. int i, j;
  2212. QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
  2213. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
  2214. QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
  2215. return 0;
  2216. QETH_DBF_TEXT(SETUP, 2, "inq");
  2217. card->qdio.in_q = qeth_alloc_qdio_queue();
  2218. if (!card->qdio.in_q)
  2219. goto out_nomem;
  2220. /* inbound buffer pool */
  2221. if (qeth_alloc_buffer_pool(card))
  2222. goto out_freeinq;
  2223. /* outbound */
  2224. card->qdio.out_qs =
  2225. kzalloc(card->qdio.no_out_queues *
  2226. sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
  2227. if (!card->qdio.out_qs)
  2228. goto out_freepool;
  2229. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2230. card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
  2231. if (!card->qdio.out_qs[i])
  2232. goto out_freeoutq;
  2233. QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
  2234. QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
  2235. card->qdio.out_qs[i]->queue_no = i;
  2236. /* give outbound qeth_qdio_buffers their qdio_buffers */
  2237. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2238. WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
  2239. if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
  2240. goto out_freeoutqbufs;
  2241. }
  2242. }
  2243. /* completion */
  2244. if (qeth_alloc_cq(card))
  2245. goto out_freeoutq;
  2246. return 0;
  2247. out_freeoutqbufs:
  2248. while (j > 0) {
  2249. --j;
  2250. kmem_cache_free(qeth_qdio_outbuf_cache,
  2251. card->qdio.out_qs[i]->bufs[j]);
  2252. card->qdio.out_qs[i]->bufs[j] = NULL;
  2253. }
  2254. out_freeoutq:
  2255. while (i > 0) {
  2256. qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
  2257. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2258. }
  2259. kfree(card->qdio.out_qs);
  2260. card->qdio.out_qs = NULL;
  2261. out_freepool:
  2262. qeth_free_buffer_pool(card);
  2263. out_freeinq:
  2264. qeth_free_qdio_queue(card->qdio.in_q);
  2265. card->qdio.in_q = NULL;
  2266. out_nomem:
  2267. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  2268. return -ENOMEM;
  2269. }
  2270. static void qeth_free_qdio_buffers(struct qeth_card *card)
  2271. {
  2272. int i, j;
  2273. if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
  2274. QETH_QDIO_UNINITIALIZED)
  2275. return;
  2276. qeth_free_cq(card);
  2277. cancel_delayed_work_sync(&card->buffer_reclaim_work);
  2278. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2279. if (card->qdio.in_q->bufs[j].rx_skb)
  2280. dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
  2281. }
  2282. qeth_free_qdio_queue(card->qdio.in_q);
  2283. card->qdio.in_q = NULL;
  2284. /* inbound buffer pool */
  2285. qeth_free_buffer_pool(card);
  2286. /* free outbound qdio_qs */
  2287. if (card->qdio.out_qs) {
  2288. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2289. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2290. qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
  2291. }
  2292. kfree(card->qdio.out_qs);
  2293. card->qdio.out_qs = NULL;
  2294. }
  2295. }
  2296. static void qeth_create_qib_param_field(struct qeth_card *card,
  2297. char *param_field)
  2298. {
  2299. param_field[0] = _ascebc['P'];
  2300. param_field[1] = _ascebc['C'];
  2301. param_field[2] = _ascebc['I'];
  2302. param_field[3] = _ascebc['T'];
  2303. *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
  2304. *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
  2305. *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
  2306. }
  2307. static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
  2308. char *param_field)
  2309. {
  2310. param_field[16] = _ascebc['B'];
  2311. param_field[17] = _ascebc['L'];
  2312. param_field[18] = _ascebc['K'];
  2313. param_field[19] = _ascebc['T'];
  2314. *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
  2315. *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
  2316. *((unsigned int *) (&param_field[28])) =
  2317. card->info.blkt.inter_packet_jumbo;
  2318. }
  2319. static int qeth_qdio_activate(struct qeth_card *card)
  2320. {
  2321. QETH_DBF_TEXT(SETUP, 3, "qdioact");
  2322. return qdio_activate(CARD_DDEV(card));
  2323. }
  2324. static int qeth_dm_act(struct qeth_card *card)
  2325. {
  2326. int rc;
  2327. struct qeth_cmd_buffer *iob;
  2328. QETH_DBF_TEXT(SETUP, 2, "dmact");
  2329. iob = qeth_wait_for_buffer(&card->write);
  2330. memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
  2331. memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
  2332. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2333. memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
  2334. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2335. rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
  2336. return rc;
  2337. }
  2338. static int qeth_mpc_initialize(struct qeth_card *card)
  2339. {
  2340. int rc;
  2341. QETH_DBF_TEXT(SETUP, 2, "mpcinit");
  2342. rc = qeth_issue_next_read(card);
  2343. if (rc) {
  2344. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2345. return rc;
  2346. }
  2347. rc = qeth_cm_enable(card);
  2348. if (rc) {
  2349. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  2350. goto out_qdio;
  2351. }
  2352. rc = qeth_cm_setup(card);
  2353. if (rc) {
  2354. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  2355. goto out_qdio;
  2356. }
  2357. rc = qeth_ulp_enable(card);
  2358. if (rc) {
  2359. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  2360. goto out_qdio;
  2361. }
  2362. rc = qeth_ulp_setup(card);
  2363. if (rc) {
  2364. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2365. goto out_qdio;
  2366. }
  2367. rc = qeth_alloc_qdio_buffers(card);
  2368. if (rc) {
  2369. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2370. goto out_qdio;
  2371. }
  2372. rc = qeth_qdio_establish(card);
  2373. if (rc) {
  2374. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  2375. qeth_free_qdio_buffers(card);
  2376. goto out_qdio;
  2377. }
  2378. rc = qeth_qdio_activate(card);
  2379. if (rc) {
  2380. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  2381. goto out_qdio;
  2382. }
  2383. rc = qeth_dm_act(card);
  2384. if (rc) {
  2385. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  2386. goto out_qdio;
  2387. }
  2388. return 0;
  2389. out_qdio:
  2390. qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  2391. qdio_free(CARD_DDEV(card));
  2392. return rc;
  2393. }
  2394. void qeth_print_status_message(struct qeth_card *card)
  2395. {
  2396. switch (card->info.type) {
  2397. case QETH_CARD_TYPE_OSD:
  2398. case QETH_CARD_TYPE_OSM:
  2399. case QETH_CARD_TYPE_OSX:
  2400. /* VM will use a non-zero first character
  2401. * to indicate a HiperSockets like reporting
  2402. * of the level OSA sets the first character to zero
  2403. * */
  2404. if (!card->info.mcl_level[0]) {
  2405. sprintf(card->info.mcl_level, "%02x%02x",
  2406. card->info.mcl_level[2],
  2407. card->info.mcl_level[3]);
  2408. break;
  2409. }
  2410. /* fallthrough */
  2411. case QETH_CARD_TYPE_IQD:
  2412. if ((card->info.guestlan) ||
  2413. (card->info.mcl_level[0] & 0x80)) {
  2414. card->info.mcl_level[0] = (char) _ebcasc[(__u8)
  2415. card->info.mcl_level[0]];
  2416. card->info.mcl_level[1] = (char) _ebcasc[(__u8)
  2417. card->info.mcl_level[1]];
  2418. card->info.mcl_level[2] = (char) _ebcasc[(__u8)
  2419. card->info.mcl_level[2]];
  2420. card->info.mcl_level[3] = (char) _ebcasc[(__u8)
  2421. card->info.mcl_level[3]];
  2422. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2423. }
  2424. break;
  2425. default:
  2426. memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
  2427. }
  2428. dev_info(&card->gdev->dev,
  2429. "Device is a%s card%s%s%s\nwith link type %s.\n",
  2430. qeth_get_cardname(card),
  2431. (card->info.mcl_level[0]) ? " (level: " : "",
  2432. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2433. (card->info.mcl_level[0]) ? ")" : "",
  2434. qeth_get_cardname_short(card));
  2435. }
  2436. EXPORT_SYMBOL_GPL(qeth_print_status_message);
  2437. static void qeth_initialize_working_pool_list(struct qeth_card *card)
  2438. {
  2439. struct qeth_buffer_pool_entry *entry;
  2440. QETH_CARD_TEXT(card, 5, "inwrklst");
  2441. list_for_each_entry(entry,
  2442. &card->qdio.init_pool.entry_list, init_list) {
  2443. qeth_put_buffer_pool_entry(card, entry);
  2444. }
  2445. }
  2446. static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
  2447. struct qeth_card *card)
  2448. {
  2449. struct list_head *plh;
  2450. struct qeth_buffer_pool_entry *entry;
  2451. int i, free;
  2452. struct page *page;
  2453. if (list_empty(&card->qdio.in_buf_pool.entry_list))
  2454. return NULL;
  2455. list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
  2456. entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
  2457. free = 1;
  2458. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2459. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2460. free = 0;
  2461. break;
  2462. }
  2463. }
  2464. if (free) {
  2465. list_del_init(&entry->list);
  2466. return entry;
  2467. }
  2468. }
  2469. /* no free buffer in pool so take first one and swap pages */
  2470. entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
  2471. struct qeth_buffer_pool_entry, list);
  2472. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2473. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2474. page = alloc_page(GFP_ATOMIC);
  2475. if (!page) {
  2476. return NULL;
  2477. } else {
  2478. free_page((unsigned long)entry->elements[i]);
  2479. entry->elements[i] = page_address(page);
  2480. if (card->options.performance_stats)
  2481. card->perf_stats.sg_alloc_page_rx++;
  2482. }
  2483. }
  2484. }
  2485. list_del_init(&entry->list);
  2486. return entry;
  2487. }
  2488. static int qeth_init_input_buffer(struct qeth_card *card,
  2489. struct qeth_qdio_buffer *buf)
  2490. {
  2491. struct qeth_buffer_pool_entry *pool_entry;
  2492. int i;
  2493. if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
  2494. buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  2495. if (!buf->rx_skb)
  2496. return 1;
  2497. }
  2498. pool_entry = qeth_find_free_buffer_pool_entry(card);
  2499. if (!pool_entry)
  2500. return 1;
  2501. /*
  2502. * since the buffer is accessed only from the input_tasklet
  2503. * there shouldn't be a need to synchronize; also, since we use
  2504. * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
  2505. * buffers
  2506. */
  2507. buf->pool_entry = pool_entry;
  2508. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2509. buf->buffer->element[i].length = PAGE_SIZE;
  2510. buf->buffer->element[i].addr = pool_entry->elements[i];
  2511. if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
  2512. buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
  2513. else
  2514. buf->buffer->element[i].eflags = 0;
  2515. buf->buffer->element[i].sflags = 0;
  2516. }
  2517. return 0;
  2518. }
  2519. int qeth_init_qdio_queues(struct qeth_card *card)
  2520. {
  2521. int i, j;
  2522. int rc;
  2523. QETH_DBF_TEXT(SETUP, 2, "initqdqs");
  2524. /* inbound queue */
  2525. qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
  2526. QDIO_MAX_BUFFERS_PER_Q);
  2527. qeth_initialize_working_pool_list(card);
  2528. /*give only as many buffers to hardware as we have buffer pool entries*/
  2529. for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
  2530. qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
  2531. card->qdio.in_q->next_buf_to_init =
  2532. card->qdio.in_buf_pool.buf_count - 1;
  2533. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
  2534. card->qdio.in_buf_pool.buf_count - 1);
  2535. if (rc) {
  2536. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2537. return rc;
  2538. }
  2539. /* completion */
  2540. rc = qeth_cq_init(card);
  2541. if (rc) {
  2542. return rc;
  2543. }
  2544. /* outbound queue */
  2545. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2546. qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
  2547. QDIO_MAX_BUFFERS_PER_Q);
  2548. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2549. qeth_clear_output_buffer(card->qdio.out_qs[i],
  2550. card->qdio.out_qs[i]->bufs[j],
  2551. QETH_QDIO_BUF_EMPTY);
  2552. }
  2553. card->qdio.out_qs[i]->card = card;
  2554. card->qdio.out_qs[i]->next_buf_to_fill = 0;
  2555. card->qdio.out_qs[i]->do_pack = 0;
  2556. atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
  2557. atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
  2558. atomic_set(&card->qdio.out_qs[i]->state,
  2559. QETH_OUT_Q_UNLOCKED);
  2560. }
  2561. return 0;
  2562. }
  2563. EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
  2564. static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
  2565. {
  2566. switch (link_type) {
  2567. case QETH_LINK_TYPE_HSTR:
  2568. return 2;
  2569. default:
  2570. return 1;
  2571. }
  2572. }
  2573. static void qeth_fill_ipacmd_header(struct qeth_card *card,
  2574. struct qeth_ipa_cmd *cmd, __u8 command,
  2575. enum qeth_prot_versions prot)
  2576. {
  2577. memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
  2578. cmd->hdr.command = command;
  2579. cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
  2580. cmd->hdr.seqno = card->seqno.ipa;
  2581. cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
  2582. cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
  2583. if (card->options.layer2)
  2584. cmd->hdr.prim_version_no = 2;
  2585. else
  2586. cmd->hdr.prim_version_no = 1;
  2587. cmd->hdr.param_count = 1;
  2588. cmd->hdr.prot_version = prot;
  2589. cmd->hdr.ipa_supported = 0;
  2590. cmd->hdr.ipa_enabled = 0;
  2591. }
  2592. struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
  2593. enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
  2594. {
  2595. struct qeth_cmd_buffer *iob;
  2596. struct qeth_ipa_cmd *cmd;
  2597. iob = qeth_get_buffer(&card->write);
  2598. if (iob) {
  2599. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2600. qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
  2601. } else {
  2602. dev_warn(&card->gdev->dev,
  2603. "The qeth driver ran out of channel command buffers\n");
  2604. QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
  2605. dev_name(&card->gdev->dev));
  2606. }
  2607. return iob;
  2608. }
  2609. EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
  2610. void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2611. char prot_type)
  2612. {
  2613. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  2614. memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
  2615. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  2616. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2617. }
  2618. EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
  2619. /**
  2620. * qeth_send_ipa_cmd() - send an IPA command
  2621. *
  2622. * See qeth_send_control_data() for explanation of the arguments.
  2623. */
  2624. int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2625. int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
  2626. unsigned long),
  2627. void *reply_param)
  2628. {
  2629. int rc;
  2630. char prot_type;
  2631. QETH_CARD_TEXT(card, 4, "sendipa");
  2632. if (card->options.layer2)
  2633. if (card->info.type == QETH_CARD_TYPE_OSN)
  2634. prot_type = QETH_PROT_OSN2;
  2635. else
  2636. prot_type = QETH_PROT_LAYER2;
  2637. else
  2638. prot_type = QETH_PROT_TCPIP;
  2639. qeth_prepare_ipa_cmd(card, iob, prot_type);
  2640. rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
  2641. iob, reply_cb, reply_param);
  2642. if (rc == -ETIME) {
  2643. qeth_clear_ipacmd_list(card);
  2644. qeth_schedule_recovery(card);
  2645. }
  2646. return rc;
  2647. }
  2648. EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
  2649. static int qeth_send_startlan(struct qeth_card *card)
  2650. {
  2651. int rc;
  2652. struct qeth_cmd_buffer *iob;
  2653. QETH_DBF_TEXT(SETUP, 2, "strtlan");
  2654. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
  2655. if (!iob)
  2656. return -ENOMEM;
  2657. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  2658. return rc;
  2659. }
  2660. static int qeth_default_setadapterparms_cb(struct qeth_card *card,
  2661. struct qeth_reply *reply, unsigned long data)
  2662. {
  2663. struct qeth_ipa_cmd *cmd;
  2664. QETH_CARD_TEXT(card, 4, "defadpcb");
  2665. cmd = (struct qeth_ipa_cmd *) data;
  2666. if (cmd->hdr.return_code == 0)
  2667. cmd->hdr.return_code =
  2668. cmd->data.setadapterparms.hdr.return_code;
  2669. return 0;
  2670. }
  2671. static int qeth_query_setadapterparms_cb(struct qeth_card *card,
  2672. struct qeth_reply *reply, unsigned long data)
  2673. {
  2674. struct qeth_ipa_cmd *cmd;
  2675. QETH_CARD_TEXT(card, 3, "quyadpcb");
  2676. cmd = (struct qeth_ipa_cmd *) data;
  2677. if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
  2678. card->info.link_type =
  2679. cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
  2680. QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
  2681. }
  2682. card->options.adp.supported_funcs =
  2683. cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
  2684. return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  2685. }
  2686. static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
  2687. __u32 command, __u32 cmdlen)
  2688. {
  2689. struct qeth_cmd_buffer *iob;
  2690. struct qeth_ipa_cmd *cmd;
  2691. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
  2692. QETH_PROT_IPV4);
  2693. if (iob) {
  2694. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2695. cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
  2696. cmd->data.setadapterparms.hdr.command_code = command;
  2697. cmd->data.setadapterparms.hdr.used_total = 1;
  2698. cmd->data.setadapterparms.hdr.seq_no = 1;
  2699. }
  2700. return iob;
  2701. }
  2702. int qeth_query_setadapterparms(struct qeth_card *card)
  2703. {
  2704. int rc;
  2705. struct qeth_cmd_buffer *iob;
  2706. QETH_CARD_TEXT(card, 3, "queryadp");
  2707. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
  2708. sizeof(struct qeth_ipacmd_setadpparms));
  2709. if (!iob)
  2710. return -ENOMEM;
  2711. rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
  2712. return rc;
  2713. }
  2714. EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
  2715. static int qeth_query_ipassists_cb(struct qeth_card *card,
  2716. struct qeth_reply *reply, unsigned long data)
  2717. {
  2718. struct qeth_ipa_cmd *cmd;
  2719. QETH_DBF_TEXT(SETUP, 2, "qipasscb");
  2720. cmd = (struct qeth_ipa_cmd *) data;
  2721. switch (cmd->hdr.return_code) {
  2722. case IPA_RC_NOTSUPP:
  2723. case IPA_RC_L2_UNSUPPORTED_CMD:
  2724. QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
  2725. card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
  2726. card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
  2727. return -0;
  2728. default:
  2729. if (cmd->hdr.return_code) {
  2730. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
  2731. "rc=%d\n",
  2732. dev_name(&card->gdev->dev),
  2733. cmd->hdr.return_code);
  2734. return 0;
  2735. }
  2736. }
  2737. if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
  2738. card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
  2739. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  2740. } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
  2741. card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
  2742. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  2743. } else
  2744. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
  2745. "\n", dev_name(&card->gdev->dev));
  2746. return 0;
  2747. }
  2748. int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
  2749. {
  2750. int rc;
  2751. struct qeth_cmd_buffer *iob;
  2752. QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
  2753. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
  2754. if (!iob)
  2755. return -ENOMEM;
  2756. rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
  2757. return rc;
  2758. }
  2759. EXPORT_SYMBOL_GPL(qeth_query_ipassists);
  2760. static int qeth_query_switch_attributes_cb(struct qeth_card *card,
  2761. struct qeth_reply *reply, unsigned long data)
  2762. {
  2763. struct qeth_ipa_cmd *cmd;
  2764. struct qeth_switch_info *sw_info;
  2765. struct qeth_query_switch_attributes *attrs;
  2766. QETH_CARD_TEXT(card, 2, "qswiatcb");
  2767. cmd = (struct qeth_ipa_cmd *) data;
  2768. sw_info = (struct qeth_switch_info *)reply->param;
  2769. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  2770. attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
  2771. sw_info->capabilities = attrs->capabilities;
  2772. sw_info->settings = attrs->settings;
  2773. QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
  2774. sw_info->settings);
  2775. }
  2776. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  2777. return 0;
  2778. }
  2779. int qeth_query_switch_attributes(struct qeth_card *card,
  2780. struct qeth_switch_info *sw_info)
  2781. {
  2782. struct qeth_cmd_buffer *iob;
  2783. QETH_CARD_TEXT(card, 2, "qswiattr");
  2784. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
  2785. return -EOPNOTSUPP;
  2786. if (!netif_carrier_ok(card->dev))
  2787. return -ENOMEDIUM;
  2788. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
  2789. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  2790. if (!iob)
  2791. return -ENOMEM;
  2792. return qeth_send_ipa_cmd(card, iob,
  2793. qeth_query_switch_attributes_cb, sw_info);
  2794. }
  2795. EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
  2796. static int qeth_query_setdiagass_cb(struct qeth_card *card,
  2797. struct qeth_reply *reply, unsigned long data)
  2798. {
  2799. struct qeth_ipa_cmd *cmd;
  2800. __u16 rc;
  2801. cmd = (struct qeth_ipa_cmd *)data;
  2802. rc = cmd->hdr.return_code;
  2803. if (rc)
  2804. QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
  2805. else
  2806. card->info.diagass_support = cmd->data.diagass.ext;
  2807. return 0;
  2808. }
  2809. static int qeth_query_setdiagass(struct qeth_card *card)
  2810. {
  2811. struct qeth_cmd_buffer *iob;
  2812. struct qeth_ipa_cmd *cmd;
  2813. QETH_DBF_TEXT(SETUP, 2, "qdiagass");
  2814. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2815. if (!iob)
  2816. return -ENOMEM;
  2817. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2818. cmd->data.diagass.subcmd_len = 16;
  2819. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
  2820. return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
  2821. }
  2822. static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
  2823. {
  2824. unsigned long info = get_zeroed_page(GFP_KERNEL);
  2825. struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
  2826. struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
  2827. struct ccw_dev_id ccwid;
  2828. int level;
  2829. tid->chpid = card->info.chpid;
  2830. ccw_device_get_id(CARD_RDEV(card), &ccwid);
  2831. tid->ssid = ccwid.ssid;
  2832. tid->devno = ccwid.devno;
  2833. if (!info)
  2834. return;
  2835. level = stsi(NULL, 0, 0, 0);
  2836. if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
  2837. tid->lparnr = info222->lpar_number;
  2838. if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
  2839. EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
  2840. memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
  2841. }
  2842. free_page(info);
  2843. return;
  2844. }
  2845. static int qeth_hw_trap_cb(struct qeth_card *card,
  2846. struct qeth_reply *reply, unsigned long data)
  2847. {
  2848. struct qeth_ipa_cmd *cmd;
  2849. __u16 rc;
  2850. cmd = (struct qeth_ipa_cmd *)data;
  2851. rc = cmd->hdr.return_code;
  2852. if (rc)
  2853. QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
  2854. return 0;
  2855. }
  2856. int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
  2857. {
  2858. struct qeth_cmd_buffer *iob;
  2859. struct qeth_ipa_cmd *cmd;
  2860. QETH_DBF_TEXT(SETUP, 2, "diagtrap");
  2861. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2862. if (!iob)
  2863. return -ENOMEM;
  2864. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2865. cmd->data.diagass.subcmd_len = 80;
  2866. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
  2867. cmd->data.diagass.type = 1;
  2868. cmd->data.diagass.action = action;
  2869. switch (action) {
  2870. case QETH_DIAGS_TRAP_ARM:
  2871. cmd->data.diagass.options = 0x0003;
  2872. cmd->data.diagass.ext = 0x00010000 +
  2873. sizeof(struct qeth_trap_id);
  2874. qeth_get_trap_id(card,
  2875. (struct qeth_trap_id *)cmd->data.diagass.cdata);
  2876. break;
  2877. case QETH_DIAGS_TRAP_DISARM:
  2878. cmd->data.diagass.options = 0x0001;
  2879. break;
  2880. case QETH_DIAGS_TRAP_CAPTURE:
  2881. break;
  2882. }
  2883. return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
  2884. }
  2885. EXPORT_SYMBOL_GPL(qeth_hw_trap);
  2886. static int qeth_check_qdio_errors(struct qeth_card *card,
  2887. struct qdio_buffer *buf,
  2888. unsigned int qdio_error,
  2889. const char *dbftext)
  2890. {
  2891. if (qdio_error) {
  2892. QETH_CARD_TEXT(card, 2, dbftext);
  2893. QETH_CARD_TEXT_(card, 2, " F15=%02X",
  2894. buf->element[15].sflags);
  2895. QETH_CARD_TEXT_(card, 2, " F14=%02X",
  2896. buf->element[14].sflags);
  2897. QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
  2898. if ((buf->element[15].sflags) == 0x12) {
  2899. card->stats.rx_dropped++;
  2900. return 0;
  2901. } else
  2902. return 1;
  2903. }
  2904. return 0;
  2905. }
  2906. static void qeth_queue_input_buffer(struct qeth_card *card, int index)
  2907. {
  2908. struct qeth_qdio_q *queue = card->qdio.in_q;
  2909. struct list_head *lh;
  2910. int count;
  2911. int i;
  2912. int rc;
  2913. int newcount = 0;
  2914. count = (index < queue->next_buf_to_init)?
  2915. card->qdio.in_buf_pool.buf_count -
  2916. (queue->next_buf_to_init - index) :
  2917. card->qdio.in_buf_pool.buf_count -
  2918. (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
  2919. /* only requeue at a certain threshold to avoid SIGAs */
  2920. if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
  2921. for (i = queue->next_buf_to_init;
  2922. i < queue->next_buf_to_init + count; ++i) {
  2923. if (qeth_init_input_buffer(card,
  2924. &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
  2925. break;
  2926. } else {
  2927. newcount++;
  2928. }
  2929. }
  2930. if (newcount < count) {
  2931. /* we are in memory shortage so we switch back to
  2932. traditional skb allocation and drop packages */
  2933. atomic_set(&card->force_alloc_skb, 3);
  2934. count = newcount;
  2935. } else {
  2936. atomic_add_unless(&card->force_alloc_skb, -1, 0);
  2937. }
  2938. if (!count) {
  2939. i = 0;
  2940. list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
  2941. i++;
  2942. if (i == card->qdio.in_buf_pool.buf_count) {
  2943. QETH_CARD_TEXT(card, 2, "qsarbw");
  2944. card->reclaim_index = index;
  2945. schedule_delayed_work(
  2946. &card->buffer_reclaim_work,
  2947. QETH_RECLAIM_WORK_TIME);
  2948. }
  2949. return;
  2950. }
  2951. /*
  2952. * according to old code it should be avoided to requeue all
  2953. * 128 buffers in order to benefit from PCI avoidance.
  2954. * this function keeps at least one buffer (the buffer at
  2955. * 'index') un-requeued -> this buffer is the first buffer that
  2956. * will be requeued the next time
  2957. */
  2958. if (card->options.performance_stats) {
  2959. card->perf_stats.inbound_do_qdio_cnt++;
  2960. card->perf_stats.inbound_do_qdio_start_time =
  2961. qeth_get_micros();
  2962. }
  2963. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
  2964. queue->next_buf_to_init, count);
  2965. if (card->options.performance_stats)
  2966. card->perf_stats.inbound_do_qdio_time +=
  2967. qeth_get_micros() -
  2968. card->perf_stats.inbound_do_qdio_start_time;
  2969. if (rc) {
  2970. QETH_CARD_TEXT(card, 2, "qinberr");
  2971. }
  2972. queue->next_buf_to_init = (queue->next_buf_to_init + count) %
  2973. QDIO_MAX_BUFFERS_PER_Q;
  2974. }
  2975. }
  2976. static void qeth_buffer_reclaim_work(struct work_struct *work)
  2977. {
  2978. struct qeth_card *card = container_of(work, struct qeth_card,
  2979. buffer_reclaim_work.work);
  2980. QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
  2981. qeth_queue_input_buffer(card, card->reclaim_index);
  2982. }
  2983. static void qeth_handle_send_error(struct qeth_card *card,
  2984. struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
  2985. {
  2986. int sbalf15 = buffer->buffer->element[15].sflags;
  2987. QETH_CARD_TEXT(card, 6, "hdsnderr");
  2988. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2989. if (sbalf15 == 0) {
  2990. qdio_err = 0;
  2991. } else {
  2992. qdio_err = 1;
  2993. }
  2994. }
  2995. qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
  2996. if (!qdio_err)
  2997. return;
  2998. if ((sbalf15 >= 15) && (sbalf15 <= 31))
  2999. return;
  3000. QETH_CARD_TEXT(card, 1, "lnkfail");
  3001. QETH_CARD_TEXT_(card, 1, "%04x %02x",
  3002. (u16)qdio_err, (u8)sbalf15);
  3003. }
  3004. /**
  3005. * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
  3006. * @queue: queue to check for packing buffer
  3007. *
  3008. * Returns number of buffers that were prepared for flush.
  3009. */
  3010. static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
  3011. {
  3012. struct qeth_qdio_out_buffer *buffer;
  3013. buffer = queue->bufs[queue->next_buf_to_fill];
  3014. if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
  3015. (buffer->next_element_to_fill > 0)) {
  3016. /* it's a packing buffer */
  3017. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3018. queue->next_buf_to_fill =
  3019. (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
  3020. return 1;
  3021. }
  3022. return 0;
  3023. }
  3024. /*
  3025. * Switched to packing state if the number of used buffers on a queue
  3026. * reaches a certain limit.
  3027. */
  3028. static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
  3029. {
  3030. if (!queue->do_pack) {
  3031. if (atomic_read(&queue->used_buffers)
  3032. >= QETH_HIGH_WATERMARK_PACK){
  3033. /* switch non-PACKING -> PACKING */
  3034. QETH_CARD_TEXT(queue->card, 6, "np->pack");
  3035. if (queue->card->options.performance_stats)
  3036. queue->card->perf_stats.sc_dp_p++;
  3037. queue->do_pack = 1;
  3038. }
  3039. }
  3040. }
  3041. /*
  3042. * Switches from packing to non-packing mode. If there is a packing
  3043. * buffer on the queue this buffer will be prepared to be flushed.
  3044. * In that case 1 is returned to inform the caller. If no buffer
  3045. * has to be flushed, zero is returned.
  3046. */
  3047. static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
  3048. {
  3049. if (queue->do_pack) {
  3050. if (atomic_read(&queue->used_buffers)
  3051. <= QETH_LOW_WATERMARK_PACK) {
  3052. /* switch PACKING -> non-PACKING */
  3053. QETH_CARD_TEXT(queue->card, 6, "pack->np");
  3054. if (queue->card->options.performance_stats)
  3055. queue->card->perf_stats.sc_p_dp++;
  3056. queue->do_pack = 0;
  3057. return qeth_prep_flush_pack_buffer(queue);
  3058. }
  3059. }
  3060. return 0;
  3061. }
  3062. static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
  3063. int count)
  3064. {
  3065. struct qeth_qdio_out_buffer *buf;
  3066. int rc;
  3067. int i;
  3068. unsigned int qdio_flags;
  3069. for (i = index; i < index + count; ++i) {
  3070. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3071. buf = queue->bufs[bidx];
  3072. buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
  3073. SBAL_EFLAGS_LAST_ENTRY;
  3074. if (queue->bufstates)
  3075. queue->bufstates[bidx].user = buf;
  3076. if (queue->card->info.type == QETH_CARD_TYPE_IQD)
  3077. continue;
  3078. if (!queue->do_pack) {
  3079. if ((atomic_read(&queue->used_buffers) >=
  3080. (QETH_HIGH_WATERMARK_PACK -
  3081. QETH_WATERMARK_PACK_FUZZ)) &&
  3082. !atomic_read(&queue->set_pci_flags_count)) {
  3083. /* it's likely that we'll go to packing
  3084. * mode soon */
  3085. atomic_inc(&queue->set_pci_flags_count);
  3086. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3087. }
  3088. } else {
  3089. if (!atomic_read(&queue->set_pci_flags_count)) {
  3090. /*
  3091. * there's no outstanding PCI any more, so we
  3092. * have to request a PCI to be sure the the PCI
  3093. * will wake at some time in the future then we
  3094. * can flush packed buffers that might still be
  3095. * hanging around, which can happen if no
  3096. * further send was requested by the stack
  3097. */
  3098. atomic_inc(&queue->set_pci_flags_count);
  3099. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3100. }
  3101. }
  3102. }
  3103. netif_trans_update(queue->card->dev);
  3104. if (queue->card->options.performance_stats) {
  3105. queue->card->perf_stats.outbound_do_qdio_cnt++;
  3106. queue->card->perf_stats.outbound_do_qdio_start_time =
  3107. qeth_get_micros();
  3108. }
  3109. qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
  3110. if (atomic_read(&queue->set_pci_flags_count))
  3111. qdio_flags |= QDIO_FLAG_PCI_OUT;
  3112. rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
  3113. queue->queue_no, index, count);
  3114. if (queue->card->options.performance_stats)
  3115. queue->card->perf_stats.outbound_do_qdio_time +=
  3116. qeth_get_micros() -
  3117. queue->card->perf_stats.outbound_do_qdio_start_time;
  3118. atomic_add(count, &queue->used_buffers);
  3119. if (rc) {
  3120. queue->card->stats.tx_errors += count;
  3121. /* ignore temporary SIGA errors without busy condition */
  3122. if (rc == -ENOBUFS)
  3123. return;
  3124. QETH_CARD_TEXT(queue->card, 2, "flushbuf");
  3125. QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
  3126. QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
  3127. QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
  3128. QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
  3129. /* this must not happen under normal circumstances. if it
  3130. * happens something is really wrong -> recover */
  3131. qeth_schedule_recovery(queue->card);
  3132. return;
  3133. }
  3134. if (queue->card->options.performance_stats)
  3135. queue->card->perf_stats.bufs_sent += count;
  3136. }
  3137. static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
  3138. {
  3139. int index;
  3140. int flush_cnt = 0;
  3141. int q_was_packing = 0;
  3142. /*
  3143. * check if weed have to switch to non-packing mode or if
  3144. * we have to get a pci flag out on the queue
  3145. */
  3146. if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
  3147. !atomic_read(&queue->set_pci_flags_count)) {
  3148. if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
  3149. QETH_OUT_Q_UNLOCKED) {
  3150. /*
  3151. * If we get in here, there was no action in
  3152. * do_send_packet. So, we check if there is a
  3153. * packing buffer to be flushed here.
  3154. */
  3155. netif_stop_queue(queue->card->dev);
  3156. index = queue->next_buf_to_fill;
  3157. q_was_packing = queue->do_pack;
  3158. /* queue->do_pack may change */
  3159. barrier();
  3160. flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
  3161. if (!flush_cnt &&
  3162. !atomic_read(&queue->set_pci_flags_count))
  3163. flush_cnt += qeth_prep_flush_pack_buffer(queue);
  3164. if (queue->card->options.performance_stats &&
  3165. q_was_packing)
  3166. queue->card->perf_stats.bufs_sent_pack +=
  3167. flush_cnt;
  3168. if (flush_cnt)
  3169. qeth_flush_buffers(queue, index, flush_cnt);
  3170. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3171. }
  3172. }
  3173. }
  3174. void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
  3175. unsigned long card_ptr)
  3176. {
  3177. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3178. if (card->dev && (card->dev->flags & IFF_UP))
  3179. napi_schedule(&card->napi);
  3180. }
  3181. EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
  3182. int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
  3183. {
  3184. int rc;
  3185. if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
  3186. rc = -1;
  3187. goto out;
  3188. } else {
  3189. if (card->options.cq == cq) {
  3190. rc = 0;
  3191. goto out;
  3192. }
  3193. if (card->state != CARD_STATE_DOWN &&
  3194. card->state != CARD_STATE_RECOVER) {
  3195. rc = -1;
  3196. goto out;
  3197. }
  3198. qeth_free_qdio_buffers(card);
  3199. card->options.cq = cq;
  3200. rc = 0;
  3201. }
  3202. out:
  3203. return rc;
  3204. }
  3205. EXPORT_SYMBOL_GPL(qeth_configure_cq);
  3206. static void qeth_qdio_cq_handler(struct qeth_card *card,
  3207. unsigned int qdio_err,
  3208. unsigned int queue, int first_element, int count) {
  3209. struct qeth_qdio_q *cq = card->qdio.c_q;
  3210. int i;
  3211. int rc;
  3212. if (!qeth_is_cq(card, queue))
  3213. goto out;
  3214. QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
  3215. QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
  3216. QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
  3217. if (qdio_err) {
  3218. netif_stop_queue(card->dev);
  3219. qeth_schedule_recovery(card);
  3220. goto out;
  3221. }
  3222. if (card->options.performance_stats) {
  3223. card->perf_stats.cq_cnt++;
  3224. card->perf_stats.cq_start_time = qeth_get_micros();
  3225. }
  3226. for (i = first_element; i < first_element + count; ++i) {
  3227. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3228. struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
  3229. int e;
  3230. e = 0;
  3231. while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
  3232. buffer->element[e].addr) {
  3233. unsigned long phys_aob_addr;
  3234. phys_aob_addr = (unsigned long) buffer->element[e].addr;
  3235. qeth_qdio_handle_aob(card, phys_aob_addr);
  3236. buffer->element[e].addr = NULL;
  3237. buffer->element[e].eflags = 0;
  3238. buffer->element[e].sflags = 0;
  3239. buffer->element[e].length = 0;
  3240. ++e;
  3241. }
  3242. buffer->element[15].eflags = 0;
  3243. buffer->element[15].sflags = 0;
  3244. }
  3245. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
  3246. card->qdio.c_q->next_buf_to_init,
  3247. count);
  3248. if (rc) {
  3249. dev_warn(&card->gdev->dev,
  3250. "QDIO reported an error, rc=%i\n", rc);
  3251. QETH_CARD_TEXT(card, 2, "qcqherr");
  3252. }
  3253. card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
  3254. + count) % QDIO_MAX_BUFFERS_PER_Q;
  3255. netif_wake_queue(card->dev);
  3256. if (card->options.performance_stats) {
  3257. int delta_t = qeth_get_micros();
  3258. delta_t -= card->perf_stats.cq_start_time;
  3259. card->perf_stats.cq_time += delta_t;
  3260. }
  3261. out:
  3262. return;
  3263. }
  3264. void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
  3265. unsigned int queue, int first_elem, int count,
  3266. unsigned long card_ptr)
  3267. {
  3268. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3269. QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
  3270. QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
  3271. if (qeth_is_cq(card, queue))
  3272. qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
  3273. else if (qdio_err)
  3274. qeth_schedule_recovery(card);
  3275. }
  3276. EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
  3277. void qeth_qdio_output_handler(struct ccw_device *ccwdev,
  3278. unsigned int qdio_error, int __queue, int first_element,
  3279. int count, unsigned long card_ptr)
  3280. {
  3281. struct qeth_card *card = (struct qeth_card *) card_ptr;
  3282. struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
  3283. struct qeth_qdio_out_buffer *buffer;
  3284. int i;
  3285. QETH_CARD_TEXT(card, 6, "qdouhdl");
  3286. if (qdio_error & QDIO_ERROR_FATAL) {
  3287. QETH_CARD_TEXT(card, 2, "achkcond");
  3288. netif_stop_queue(card->dev);
  3289. qeth_schedule_recovery(card);
  3290. return;
  3291. }
  3292. if (card->options.performance_stats) {
  3293. card->perf_stats.outbound_handler_cnt++;
  3294. card->perf_stats.outbound_handler_start_time =
  3295. qeth_get_micros();
  3296. }
  3297. for (i = first_element; i < (first_element + count); ++i) {
  3298. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3299. buffer = queue->bufs[bidx];
  3300. qeth_handle_send_error(card, buffer, qdio_error);
  3301. if (queue->bufstates &&
  3302. (queue->bufstates[bidx].flags &
  3303. QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
  3304. WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
  3305. if (atomic_cmpxchg(&buffer->state,
  3306. QETH_QDIO_BUF_PRIMED,
  3307. QETH_QDIO_BUF_PENDING) ==
  3308. QETH_QDIO_BUF_PRIMED) {
  3309. qeth_notify_skbs(queue, buffer,
  3310. TX_NOTIFY_PENDING);
  3311. }
  3312. buffer->aob = queue->bufstates[bidx].aob;
  3313. QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
  3314. QETH_CARD_TEXT(queue->card, 5, "aob");
  3315. QETH_CARD_TEXT_(queue->card, 5, "%lx",
  3316. virt_to_phys(buffer->aob));
  3317. if (qeth_init_qdio_out_buf(queue, bidx)) {
  3318. QETH_CARD_TEXT(card, 2, "outofbuf");
  3319. qeth_schedule_recovery(card);
  3320. }
  3321. } else {
  3322. if (card->options.cq == QETH_CQ_ENABLED) {
  3323. enum iucv_tx_notify n;
  3324. n = qeth_compute_cq_notification(
  3325. buffer->buffer->element[15].sflags, 0);
  3326. qeth_notify_skbs(queue, buffer, n);
  3327. }
  3328. qeth_clear_output_buffer(queue, buffer,
  3329. QETH_QDIO_BUF_EMPTY);
  3330. }
  3331. qeth_cleanup_handled_pending(queue, bidx, 0);
  3332. }
  3333. atomic_sub(count, &queue->used_buffers);
  3334. /* check if we need to do something on this outbound queue */
  3335. if (card->info.type != QETH_CARD_TYPE_IQD)
  3336. qeth_check_outbound_queue(queue);
  3337. netif_wake_queue(queue->card->dev);
  3338. if (card->options.performance_stats)
  3339. card->perf_stats.outbound_handler_time += qeth_get_micros() -
  3340. card->perf_stats.outbound_handler_start_time;
  3341. }
  3342. EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
  3343. /* We cannot use outbound queue 3 for unicast packets on HiperSockets */
  3344. static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
  3345. {
  3346. if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
  3347. return 2;
  3348. return queue_num;
  3349. }
  3350. /**
  3351. * Note: Function assumes that we have 4 outbound queues.
  3352. */
  3353. int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
  3354. int ipv, int cast_type)
  3355. {
  3356. __be16 *tci;
  3357. u8 tos;
  3358. if (cast_type && card->info.is_multicast_different)
  3359. return card->info.is_multicast_different &
  3360. (card->qdio.no_out_queues - 1);
  3361. switch (card->qdio.do_prio_queueing) {
  3362. case QETH_PRIO_Q_ING_TOS:
  3363. case QETH_PRIO_Q_ING_PREC:
  3364. switch (ipv) {
  3365. case 4:
  3366. tos = ipv4_get_dsfield(ip_hdr(skb));
  3367. break;
  3368. case 6:
  3369. tos = ipv6_get_dsfield(ipv6_hdr(skb));
  3370. break;
  3371. default:
  3372. return card->qdio.default_out_queue;
  3373. }
  3374. if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
  3375. return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
  3376. if (tos & IPTOS_MINCOST)
  3377. return qeth_cut_iqd_prio(card, 3);
  3378. if (tos & IPTOS_RELIABILITY)
  3379. return 2;
  3380. if (tos & IPTOS_THROUGHPUT)
  3381. return 1;
  3382. if (tos & IPTOS_LOWDELAY)
  3383. return 0;
  3384. break;
  3385. case QETH_PRIO_Q_ING_SKB:
  3386. if (skb->priority > 5)
  3387. return 0;
  3388. return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
  3389. case QETH_PRIO_Q_ING_VLAN:
  3390. tci = &((struct ethhdr *)skb->data)->h_proto;
  3391. if (be16_to_cpu(*tci) == ETH_P_8021Q)
  3392. return qeth_cut_iqd_prio(card,
  3393. ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
  3394. break;
  3395. default:
  3396. break;
  3397. }
  3398. return card->qdio.default_out_queue;
  3399. }
  3400. EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
  3401. /**
  3402. * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
  3403. * @skb: SKB address
  3404. *
  3405. * Returns the number of pages, and thus QDIO buffer elements, needed to cover
  3406. * fragmented part of the SKB. Returns zero for linear SKB.
  3407. */
  3408. int qeth_get_elements_for_frags(struct sk_buff *skb)
  3409. {
  3410. int cnt, elements = 0;
  3411. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3412. struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
  3413. elements += qeth_get_elements_for_range(
  3414. (addr_t)skb_frag_address(frag),
  3415. (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
  3416. }
  3417. return elements;
  3418. }
  3419. EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
  3420. /**
  3421. * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
  3422. * @card: qeth card structure, to check max. elems.
  3423. * @skb: SKB address
  3424. * @extra_elems: extra elems needed, to check against max.
  3425. * @data_offset: range starts at skb->data + data_offset
  3426. *
  3427. * Returns the number of pages, and thus QDIO buffer elements, needed to cover
  3428. * skb data, including linear part and fragments. Checks if the result plus
  3429. * extra_elems fits under the limit for the card. Returns 0 if it does not.
  3430. * Note: extra_elems is not included in the returned result.
  3431. */
  3432. int qeth_get_elements_no(struct qeth_card *card,
  3433. struct sk_buff *skb, int extra_elems, int data_offset)
  3434. {
  3435. int elements = qeth_get_elements_for_range(
  3436. (addr_t)skb->data + data_offset,
  3437. (addr_t)skb->data + skb_headlen(skb)) +
  3438. qeth_get_elements_for_frags(skb);
  3439. if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
  3440. QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
  3441. "(Number=%d / Length=%d). Discarded.\n",
  3442. elements + extra_elems, skb->len);
  3443. return 0;
  3444. }
  3445. return elements;
  3446. }
  3447. EXPORT_SYMBOL_GPL(qeth_get_elements_no);
  3448. int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
  3449. {
  3450. int hroom, inpage, rest;
  3451. if (((unsigned long)skb->data & PAGE_MASK) !=
  3452. (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
  3453. hroom = skb_headroom(skb);
  3454. inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
  3455. rest = len - inpage;
  3456. if (rest > hroom)
  3457. return 1;
  3458. memmove(skb->data - rest, skb->data, skb_headlen(skb));
  3459. skb->data -= rest;
  3460. skb->tail -= rest;
  3461. *hdr = (struct qeth_hdr *)skb->data;
  3462. QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
  3463. }
  3464. return 0;
  3465. }
  3466. EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
  3467. /**
  3468. * qeth_push_hdr() - push a qeth_hdr onto an skb.
  3469. * @skb: skb that the qeth_hdr should be pushed onto.
  3470. * @hdr: double pointer to a qeth_hdr. When returning with >= 0,
  3471. * it contains a valid pointer to a qeth_hdr.
  3472. * @len: length of the hdr that needs to be pushed on.
  3473. *
  3474. * Returns the pushed length. If the header can't be pushed on
  3475. * (eg. because it would cross a page boundary), it is allocated from
  3476. * the cache instead and 0 is returned.
  3477. * Error to create the hdr is indicated by returning with < 0.
  3478. */
  3479. int qeth_push_hdr(struct sk_buff *skb, struct qeth_hdr **hdr, unsigned int len)
  3480. {
  3481. if (skb_headroom(skb) >= len &&
  3482. qeth_get_elements_for_range((addr_t)skb->data - len,
  3483. (addr_t)skb->data) == 1) {
  3484. *hdr = skb_push(skb, len);
  3485. return len;
  3486. }
  3487. /* fall back */
  3488. *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
  3489. if (!*hdr)
  3490. return -ENOMEM;
  3491. return 0;
  3492. }
  3493. EXPORT_SYMBOL_GPL(qeth_push_hdr);
  3494. static void __qeth_fill_buffer(struct sk_buff *skb,
  3495. struct qeth_qdio_out_buffer *buf,
  3496. bool is_first_elem, unsigned int offset)
  3497. {
  3498. struct qdio_buffer *buffer = buf->buffer;
  3499. int element = buf->next_element_to_fill;
  3500. int length = skb_headlen(skb) - offset;
  3501. char *data = skb->data + offset;
  3502. int length_here, cnt;
  3503. /* map linear part into buffer element(s) */
  3504. while (length > 0) {
  3505. /* length_here is the remaining amount of data in this page */
  3506. length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
  3507. if (length < length_here)
  3508. length_here = length;
  3509. buffer->element[element].addr = data;
  3510. buffer->element[element].length = length_here;
  3511. length -= length_here;
  3512. if (is_first_elem) {
  3513. is_first_elem = false;
  3514. if (length || skb_is_nonlinear(skb))
  3515. /* skb needs additional elements */
  3516. buffer->element[element].eflags =
  3517. SBAL_EFLAGS_FIRST_FRAG;
  3518. else
  3519. buffer->element[element].eflags = 0;
  3520. } else {
  3521. buffer->element[element].eflags =
  3522. SBAL_EFLAGS_MIDDLE_FRAG;
  3523. }
  3524. data += length_here;
  3525. element++;
  3526. }
  3527. /* map page frags into buffer element(s) */
  3528. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3529. skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
  3530. data = skb_frag_address(frag);
  3531. length = skb_frag_size(frag);
  3532. while (length > 0) {
  3533. length_here = PAGE_SIZE -
  3534. ((unsigned long) data % PAGE_SIZE);
  3535. if (length < length_here)
  3536. length_here = length;
  3537. buffer->element[element].addr = data;
  3538. buffer->element[element].length = length_here;
  3539. buffer->element[element].eflags =
  3540. SBAL_EFLAGS_MIDDLE_FRAG;
  3541. length -= length_here;
  3542. data += length_here;
  3543. element++;
  3544. }
  3545. }
  3546. if (buffer->element[element - 1].eflags)
  3547. buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
  3548. buf->next_element_to_fill = element;
  3549. }
  3550. /**
  3551. * qeth_fill_buffer() - map skb into an output buffer
  3552. * @queue: QDIO queue to submit the buffer on
  3553. * @buf: buffer to transport the skb
  3554. * @skb: skb to map into the buffer
  3555. * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated
  3556. * from qeth_core_header_cache.
  3557. * @offset: when mapping the skb, start at skb->data + offset
  3558. * @hd_len: if > 0, build a dedicated header element of this size
  3559. */
  3560. static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
  3561. struct qeth_qdio_out_buffer *buf,
  3562. struct sk_buff *skb, struct qeth_hdr *hdr,
  3563. unsigned int offset, unsigned int hd_len)
  3564. {
  3565. struct qdio_buffer *buffer = buf->buffer;
  3566. bool is_first_elem = true;
  3567. int flush_cnt = 0;
  3568. refcount_inc(&skb->users);
  3569. skb_queue_tail(&buf->skb_list, skb);
  3570. /* build dedicated header element */
  3571. if (hd_len) {
  3572. int element = buf->next_element_to_fill;
  3573. is_first_elem = false;
  3574. buffer->element[element].addr = hdr;
  3575. buffer->element[element].length = hd_len;
  3576. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3577. /* remember to free cache-allocated qeth_hdr: */
  3578. buf->is_header[element] = ((void *)hdr != skb->data);
  3579. buf->next_element_to_fill++;
  3580. }
  3581. __qeth_fill_buffer(skb, buf, is_first_elem, offset);
  3582. if (!queue->do_pack) {
  3583. QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
  3584. /* set state to PRIMED -> will be flushed */
  3585. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3586. flush_cnt = 1;
  3587. } else {
  3588. QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
  3589. if (queue->card->options.performance_stats)
  3590. queue->card->perf_stats.skbs_sent_pack++;
  3591. if (buf->next_element_to_fill >=
  3592. QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
  3593. /*
  3594. * packed buffer if full -> set state PRIMED
  3595. * -> will be flushed
  3596. */
  3597. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3598. flush_cnt = 1;
  3599. }
  3600. }
  3601. return flush_cnt;
  3602. }
  3603. int qeth_do_send_packet_fast(struct qeth_card *card,
  3604. struct qeth_qdio_out_q *queue, struct sk_buff *skb,
  3605. struct qeth_hdr *hdr, unsigned int offset,
  3606. unsigned int hd_len)
  3607. {
  3608. struct qeth_qdio_out_buffer *buffer;
  3609. int index;
  3610. /* spin until we get the queue ... */
  3611. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3612. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3613. /* ... now we've got the queue */
  3614. index = queue->next_buf_to_fill;
  3615. buffer = queue->bufs[queue->next_buf_to_fill];
  3616. /*
  3617. * check if buffer is empty to make sure that we do not 'overtake'
  3618. * ourselves and try to fill a buffer that is already primed
  3619. */
  3620. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
  3621. goto out;
  3622. queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
  3623. QDIO_MAX_BUFFERS_PER_Q;
  3624. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3625. qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3626. qeth_flush_buffers(queue, index, 1);
  3627. return 0;
  3628. out:
  3629. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3630. return -EBUSY;
  3631. }
  3632. EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
  3633. int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  3634. struct sk_buff *skb, struct qeth_hdr *hdr,
  3635. unsigned int offset, unsigned int hd_len,
  3636. int elements_needed)
  3637. {
  3638. struct qeth_qdio_out_buffer *buffer;
  3639. int start_index;
  3640. int flush_count = 0;
  3641. int do_pack = 0;
  3642. int tmp;
  3643. int rc = 0;
  3644. /* spin until we get the queue ... */
  3645. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3646. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3647. start_index = queue->next_buf_to_fill;
  3648. buffer = queue->bufs[queue->next_buf_to_fill];
  3649. /*
  3650. * check if buffer is empty to make sure that we do not 'overtake'
  3651. * ourselves and try to fill a buffer that is already primed
  3652. */
  3653. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
  3654. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3655. return -EBUSY;
  3656. }
  3657. /* check if we need to switch packing state of this queue */
  3658. qeth_switch_to_packing_if_needed(queue);
  3659. if (queue->do_pack) {
  3660. do_pack = 1;
  3661. /* does packet fit in current buffer? */
  3662. if ((QETH_MAX_BUFFER_ELEMENTS(card) -
  3663. buffer->next_element_to_fill) < elements_needed) {
  3664. /* ... no -> set state PRIMED */
  3665. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3666. flush_count++;
  3667. queue->next_buf_to_fill =
  3668. (queue->next_buf_to_fill + 1) %
  3669. QDIO_MAX_BUFFERS_PER_Q;
  3670. buffer = queue->bufs[queue->next_buf_to_fill];
  3671. /* we did a step forward, so check buffer state
  3672. * again */
  3673. if (atomic_read(&buffer->state) !=
  3674. QETH_QDIO_BUF_EMPTY) {
  3675. qeth_flush_buffers(queue, start_index,
  3676. flush_count);
  3677. atomic_set(&queue->state,
  3678. QETH_OUT_Q_UNLOCKED);
  3679. rc = -EBUSY;
  3680. goto out;
  3681. }
  3682. }
  3683. }
  3684. tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3685. queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
  3686. QDIO_MAX_BUFFERS_PER_Q;
  3687. flush_count += tmp;
  3688. if (flush_count)
  3689. qeth_flush_buffers(queue, start_index, flush_count);
  3690. else if (!atomic_read(&queue->set_pci_flags_count))
  3691. atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
  3692. /*
  3693. * queue->state will go from LOCKED -> UNLOCKED or from
  3694. * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
  3695. * (switch packing state or flush buffer to get another pci flag out).
  3696. * In that case we will enter this loop
  3697. */
  3698. while (atomic_dec_return(&queue->state)) {
  3699. start_index = queue->next_buf_to_fill;
  3700. /* check if we can go back to non-packing state */
  3701. tmp = qeth_switch_to_nonpacking_if_needed(queue);
  3702. /*
  3703. * check if we need to flush a packing buffer to get a pci
  3704. * flag out on the queue
  3705. */
  3706. if (!tmp && !atomic_read(&queue->set_pci_flags_count))
  3707. tmp = qeth_prep_flush_pack_buffer(queue);
  3708. if (tmp) {
  3709. qeth_flush_buffers(queue, start_index, tmp);
  3710. flush_count += tmp;
  3711. }
  3712. }
  3713. out:
  3714. /* at this point the queue is UNLOCKED again */
  3715. if (queue->card->options.performance_stats && do_pack)
  3716. queue->card->perf_stats.bufs_sent_pack += flush_count;
  3717. return rc;
  3718. }
  3719. EXPORT_SYMBOL_GPL(qeth_do_send_packet);
  3720. static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
  3721. struct qeth_reply *reply, unsigned long data)
  3722. {
  3723. struct qeth_ipa_cmd *cmd;
  3724. struct qeth_ipacmd_setadpparms *setparms;
  3725. QETH_CARD_TEXT(card, 4, "prmadpcb");
  3726. cmd = (struct qeth_ipa_cmd *) data;
  3727. setparms = &(cmd->data.setadapterparms);
  3728. qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  3729. if (cmd->hdr.return_code) {
  3730. QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
  3731. setparms->data.mode = SET_PROMISC_MODE_OFF;
  3732. }
  3733. card->info.promisc_mode = setparms->data.mode;
  3734. return 0;
  3735. }
  3736. void qeth_setadp_promisc_mode(struct qeth_card *card)
  3737. {
  3738. enum qeth_ipa_promisc_modes mode;
  3739. struct net_device *dev = card->dev;
  3740. struct qeth_cmd_buffer *iob;
  3741. struct qeth_ipa_cmd *cmd;
  3742. QETH_CARD_TEXT(card, 4, "setprom");
  3743. if (((dev->flags & IFF_PROMISC) &&
  3744. (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
  3745. (!(dev->flags & IFF_PROMISC) &&
  3746. (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
  3747. return;
  3748. mode = SET_PROMISC_MODE_OFF;
  3749. if (dev->flags & IFF_PROMISC)
  3750. mode = SET_PROMISC_MODE_ON;
  3751. QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
  3752. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
  3753. sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
  3754. if (!iob)
  3755. return;
  3756. cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
  3757. cmd->data.setadapterparms.data.mode = mode;
  3758. qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
  3759. }
  3760. EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
  3761. int qeth_change_mtu(struct net_device *dev, int new_mtu)
  3762. {
  3763. struct qeth_card *card;
  3764. char dbf_text[15];
  3765. card = dev->ml_priv;
  3766. QETH_CARD_TEXT(card, 4, "chgmtu");
  3767. sprintf(dbf_text, "%8x", new_mtu);
  3768. QETH_CARD_TEXT(card, 4, dbf_text);
  3769. if (!qeth_mtu_is_valid(card, new_mtu))
  3770. return -EINVAL;
  3771. dev->mtu = new_mtu;
  3772. return 0;
  3773. }
  3774. EXPORT_SYMBOL_GPL(qeth_change_mtu);
  3775. struct net_device_stats *qeth_get_stats(struct net_device *dev)
  3776. {
  3777. struct qeth_card *card;
  3778. card = dev->ml_priv;
  3779. QETH_CARD_TEXT(card, 5, "getstat");
  3780. return &card->stats;
  3781. }
  3782. EXPORT_SYMBOL_GPL(qeth_get_stats);
  3783. static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
  3784. struct qeth_reply *reply, unsigned long data)
  3785. {
  3786. struct qeth_ipa_cmd *cmd;
  3787. QETH_CARD_TEXT(card, 4, "chgmaccb");
  3788. cmd = (struct qeth_ipa_cmd *) data;
  3789. if (!card->options.layer2 ||
  3790. !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
  3791. memcpy(card->dev->dev_addr,
  3792. &cmd->data.setadapterparms.data.change_addr.addr,
  3793. OSA_ADDR_LEN);
  3794. card->info.mac_bits |= QETH_LAYER2_MAC_READ;
  3795. }
  3796. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3797. return 0;
  3798. }
  3799. int qeth_setadpparms_change_macaddr(struct qeth_card *card)
  3800. {
  3801. int rc;
  3802. struct qeth_cmd_buffer *iob;
  3803. struct qeth_ipa_cmd *cmd;
  3804. QETH_CARD_TEXT(card, 4, "chgmac");
  3805. iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
  3806. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3807. sizeof(struct qeth_change_addr));
  3808. if (!iob)
  3809. return -ENOMEM;
  3810. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3811. cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
  3812. cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
  3813. memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
  3814. card->dev->dev_addr, OSA_ADDR_LEN);
  3815. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
  3816. NULL);
  3817. return rc;
  3818. }
  3819. EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
  3820. static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
  3821. struct qeth_reply *reply, unsigned long data)
  3822. {
  3823. struct qeth_ipa_cmd *cmd;
  3824. struct qeth_set_access_ctrl *access_ctrl_req;
  3825. int fallback = *(int *)reply->param;
  3826. QETH_CARD_TEXT(card, 4, "setaccb");
  3827. cmd = (struct qeth_ipa_cmd *) data;
  3828. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3829. QETH_DBF_TEXT_(SETUP, 2, "setaccb");
  3830. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3831. QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
  3832. cmd->data.setadapterparms.hdr.return_code);
  3833. if (cmd->data.setadapterparms.hdr.return_code !=
  3834. SET_ACCESS_CTRL_RC_SUCCESS)
  3835. QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
  3836. card->gdev->dev.kobj.name,
  3837. access_ctrl_req->subcmd_code,
  3838. cmd->data.setadapterparms.hdr.return_code);
  3839. switch (cmd->data.setadapterparms.hdr.return_code) {
  3840. case SET_ACCESS_CTRL_RC_SUCCESS:
  3841. if (card->options.isolation == ISOLATION_MODE_NONE) {
  3842. dev_info(&card->gdev->dev,
  3843. "QDIO data connection isolation is deactivated\n");
  3844. } else {
  3845. dev_info(&card->gdev->dev,
  3846. "QDIO data connection isolation is activated\n");
  3847. }
  3848. break;
  3849. case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
  3850. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
  3851. "deactivated\n", dev_name(&card->gdev->dev));
  3852. if (fallback)
  3853. card->options.isolation = card->options.prev_isolation;
  3854. break;
  3855. case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
  3856. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
  3857. " activated\n", dev_name(&card->gdev->dev));
  3858. if (fallback)
  3859. card->options.isolation = card->options.prev_isolation;
  3860. break;
  3861. case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
  3862. dev_err(&card->gdev->dev, "Adapter does not "
  3863. "support QDIO data connection isolation\n");
  3864. break;
  3865. case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
  3866. dev_err(&card->gdev->dev,
  3867. "Adapter is dedicated. "
  3868. "QDIO data connection isolation not supported\n");
  3869. if (fallback)
  3870. card->options.isolation = card->options.prev_isolation;
  3871. break;
  3872. case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
  3873. dev_err(&card->gdev->dev,
  3874. "TSO does not permit QDIO data connection isolation\n");
  3875. if (fallback)
  3876. card->options.isolation = card->options.prev_isolation;
  3877. break;
  3878. case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
  3879. dev_err(&card->gdev->dev, "The adjacent switch port does not "
  3880. "support reflective relay mode\n");
  3881. if (fallback)
  3882. card->options.isolation = card->options.prev_isolation;
  3883. break;
  3884. case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
  3885. dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
  3886. "enabled at the adjacent switch port");
  3887. if (fallback)
  3888. card->options.isolation = card->options.prev_isolation;
  3889. break;
  3890. case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
  3891. dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
  3892. "at the adjacent switch failed\n");
  3893. break;
  3894. default:
  3895. /* this should never happen */
  3896. if (fallback)
  3897. card->options.isolation = card->options.prev_isolation;
  3898. break;
  3899. }
  3900. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3901. return 0;
  3902. }
  3903. static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
  3904. enum qeth_ipa_isolation_modes isolation, int fallback)
  3905. {
  3906. int rc;
  3907. struct qeth_cmd_buffer *iob;
  3908. struct qeth_ipa_cmd *cmd;
  3909. struct qeth_set_access_ctrl *access_ctrl_req;
  3910. QETH_CARD_TEXT(card, 4, "setacctl");
  3911. QETH_DBF_TEXT_(SETUP, 2, "setacctl");
  3912. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3913. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
  3914. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3915. sizeof(struct qeth_set_access_ctrl));
  3916. if (!iob)
  3917. return -ENOMEM;
  3918. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3919. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3920. access_ctrl_req->subcmd_code = isolation;
  3921. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
  3922. &fallback);
  3923. QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
  3924. return rc;
  3925. }
  3926. int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
  3927. {
  3928. int rc = 0;
  3929. QETH_CARD_TEXT(card, 4, "setactlo");
  3930. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  3931. card->info.type == QETH_CARD_TYPE_OSX) &&
  3932. qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
  3933. rc = qeth_setadpparms_set_access_ctrl(card,
  3934. card->options.isolation, fallback);
  3935. if (rc) {
  3936. QETH_DBF_MESSAGE(3,
  3937. "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
  3938. card->gdev->dev.kobj.name,
  3939. rc);
  3940. rc = -EOPNOTSUPP;
  3941. }
  3942. } else if (card->options.isolation != ISOLATION_MODE_NONE) {
  3943. card->options.isolation = ISOLATION_MODE_NONE;
  3944. dev_err(&card->gdev->dev, "Adapter does not "
  3945. "support QDIO data connection isolation\n");
  3946. rc = -EOPNOTSUPP;
  3947. }
  3948. return rc;
  3949. }
  3950. EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
  3951. void qeth_tx_timeout(struct net_device *dev)
  3952. {
  3953. struct qeth_card *card;
  3954. card = dev->ml_priv;
  3955. QETH_CARD_TEXT(card, 4, "txtimeo");
  3956. card->stats.tx_errors++;
  3957. qeth_schedule_recovery(card);
  3958. }
  3959. EXPORT_SYMBOL_GPL(qeth_tx_timeout);
  3960. static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
  3961. {
  3962. struct qeth_card *card = dev->ml_priv;
  3963. int rc = 0;
  3964. switch (regnum) {
  3965. case MII_BMCR: /* Basic mode control register */
  3966. rc = BMCR_FULLDPLX;
  3967. if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
  3968. (card->info.link_type != QETH_LINK_TYPE_OSN) &&
  3969. (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
  3970. rc |= BMCR_SPEED100;
  3971. break;
  3972. case MII_BMSR: /* Basic mode status register */
  3973. rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
  3974. BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
  3975. BMSR_100BASE4;
  3976. break;
  3977. case MII_PHYSID1: /* PHYS ID 1 */
  3978. rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
  3979. dev->dev_addr[2];
  3980. rc = (rc >> 5) & 0xFFFF;
  3981. break;
  3982. case MII_PHYSID2: /* PHYS ID 2 */
  3983. rc = (dev->dev_addr[2] << 10) & 0xFFFF;
  3984. break;
  3985. case MII_ADVERTISE: /* Advertisement control reg */
  3986. rc = ADVERTISE_ALL;
  3987. break;
  3988. case MII_LPA: /* Link partner ability reg */
  3989. rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
  3990. LPA_100BASE4 | LPA_LPACK;
  3991. break;
  3992. case MII_EXPANSION: /* Expansion register */
  3993. break;
  3994. case MII_DCOUNTER: /* disconnect counter */
  3995. break;
  3996. case MII_FCSCOUNTER: /* false carrier counter */
  3997. break;
  3998. case MII_NWAYTEST: /* N-way auto-neg test register */
  3999. break;
  4000. case MII_RERRCOUNTER: /* rx error counter */
  4001. rc = card->stats.rx_errors;
  4002. break;
  4003. case MII_SREVISION: /* silicon revision */
  4004. break;
  4005. case MII_RESV1: /* reserved 1 */
  4006. break;
  4007. case MII_LBRERROR: /* loopback, rx, bypass error */
  4008. break;
  4009. case MII_PHYADDR: /* physical address */
  4010. break;
  4011. case MII_RESV2: /* reserved 2 */
  4012. break;
  4013. case MII_TPISTATUS: /* TPI status for 10mbps */
  4014. break;
  4015. case MII_NCONFIG: /* network interface config */
  4016. break;
  4017. default:
  4018. break;
  4019. }
  4020. return rc;
  4021. }
  4022. static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
  4023. struct qeth_cmd_buffer *iob, int len,
  4024. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  4025. unsigned long),
  4026. void *reply_param)
  4027. {
  4028. u16 s1, s2;
  4029. QETH_CARD_TEXT(card, 4, "sendsnmp");
  4030. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  4031. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  4032. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  4033. /* adjust PDU length fields in IPA_PDU_HEADER */
  4034. s1 = (u32) IPA_PDU_HEADER_SIZE + len;
  4035. s2 = (u32) len;
  4036. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  4037. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  4038. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  4039. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  4040. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  4041. reply_cb, reply_param);
  4042. }
  4043. static int qeth_snmp_command_cb(struct qeth_card *card,
  4044. struct qeth_reply *reply, unsigned long sdata)
  4045. {
  4046. struct qeth_ipa_cmd *cmd;
  4047. struct qeth_arp_query_info *qinfo;
  4048. struct qeth_snmp_cmd *snmp;
  4049. unsigned char *data;
  4050. __u16 data_len;
  4051. QETH_CARD_TEXT(card, 3, "snpcmdcb");
  4052. cmd = (struct qeth_ipa_cmd *) sdata;
  4053. data = (unsigned char *)((char *)cmd - reply->offset);
  4054. qinfo = (struct qeth_arp_query_info *) reply->param;
  4055. snmp = &cmd->data.setadapterparms.data.snmp;
  4056. if (cmd->hdr.return_code) {
  4057. QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
  4058. return 0;
  4059. }
  4060. if (cmd->data.setadapterparms.hdr.return_code) {
  4061. cmd->hdr.return_code =
  4062. cmd->data.setadapterparms.hdr.return_code;
  4063. QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
  4064. return 0;
  4065. }
  4066. data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
  4067. if (cmd->data.setadapterparms.hdr.seq_no == 1)
  4068. data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
  4069. else
  4070. data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
  4071. /* check if there is enough room in userspace */
  4072. if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
  4073. QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
  4074. cmd->hdr.return_code = IPA_RC_ENOMEM;
  4075. return 0;
  4076. }
  4077. QETH_CARD_TEXT_(card, 4, "snore%i",
  4078. cmd->data.setadapterparms.hdr.used_total);
  4079. QETH_CARD_TEXT_(card, 4, "sseqn%i",
  4080. cmd->data.setadapterparms.hdr.seq_no);
  4081. /*copy entries to user buffer*/
  4082. if (cmd->data.setadapterparms.hdr.seq_no == 1) {
  4083. memcpy(qinfo->udata + qinfo->udata_offset,
  4084. (char *)snmp,
  4085. data_len + offsetof(struct qeth_snmp_cmd, data));
  4086. qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
  4087. } else {
  4088. memcpy(qinfo->udata + qinfo->udata_offset,
  4089. (char *)&snmp->request, data_len);
  4090. }
  4091. qinfo->udata_offset += data_len;
  4092. /* check if all replies received ... */
  4093. QETH_CARD_TEXT_(card, 4, "srtot%i",
  4094. cmd->data.setadapterparms.hdr.used_total);
  4095. QETH_CARD_TEXT_(card, 4, "srseq%i",
  4096. cmd->data.setadapterparms.hdr.seq_no);
  4097. if (cmd->data.setadapterparms.hdr.seq_no <
  4098. cmd->data.setadapterparms.hdr.used_total)
  4099. return 1;
  4100. return 0;
  4101. }
  4102. static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
  4103. {
  4104. struct qeth_cmd_buffer *iob;
  4105. struct qeth_ipa_cmd *cmd;
  4106. struct qeth_snmp_ureq *ureq;
  4107. unsigned int req_len;
  4108. struct qeth_arp_query_info qinfo = {0, };
  4109. int rc = 0;
  4110. QETH_CARD_TEXT(card, 3, "snmpcmd");
  4111. if (card->info.guestlan)
  4112. return -EOPNOTSUPP;
  4113. if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
  4114. (!card->options.layer2)) {
  4115. return -EOPNOTSUPP;
  4116. }
  4117. /* skip 4 bytes (data_len struct member) to get req_len */
  4118. if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
  4119. return -EFAULT;
  4120. if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
  4121. sizeof(struct qeth_ipacmd_hdr) -
  4122. sizeof(struct qeth_ipacmd_setadpparms_hdr)))
  4123. return -EINVAL;
  4124. ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
  4125. if (IS_ERR(ureq)) {
  4126. QETH_CARD_TEXT(card, 2, "snmpnome");
  4127. return PTR_ERR(ureq);
  4128. }
  4129. qinfo.udata_len = ureq->hdr.data_len;
  4130. qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
  4131. if (!qinfo.udata) {
  4132. kfree(ureq);
  4133. return -ENOMEM;
  4134. }
  4135. qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
  4136. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
  4137. QETH_SNMP_SETADP_CMDLENGTH + req_len);
  4138. if (!iob) {
  4139. rc = -ENOMEM;
  4140. goto out;
  4141. }
  4142. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4143. memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
  4144. rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
  4145. qeth_snmp_command_cb, (void *)&qinfo);
  4146. if (rc)
  4147. QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
  4148. QETH_CARD_IFNAME(card), rc);
  4149. else {
  4150. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4151. rc = -EFAULT;
  4152. }
  4153. out:
  4154. kfree(ureq);
  4155. kfree(qinfo.udata);
  4156. return rc;
  4157. }
  4158. static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
  4159. struct qeth_reply *reply, unsigned long data)
  4160. {
  4161. struct qeth_ipa_cmd *cmd;
  4162. struct qeth_qoat_priv *priv;
  4163. char *resdata;
  4164. int resdatalen;
  4165. QETH_CARD_TEXT(card, 3, "qoatcb");
  4166. cmd = (struct qeth_ipa_cmd *)data;
  4167. priv = (struct qeth_qoat_priv *)reply->param;
  4168. resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
  4169. resdata = (char *)data + 28;
  4170. if (resdatalen > (priv->buffer_len - priv->response_len)) {
  4171. cmd->hdr.return_code = IPA_RC_FFFF;
  4172. return 0;
  4173. }
  4174. memcpy((priv->buffer + priv->response_len), resdata,
  4175. resdatalen);
  4176. priv->response_len += resdatalen;
  4177. if (cmd->data.setadapterparms.hdr.seq_no <
  4178. cmd->data.setadapterparms.hdr.used_total)
  4179. return 1;
  4180. return 0;
  4181. }
  4182. static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
  4183. {
  4184. int rc = 0;
  4185. struct qeth_cmd_buffer *iob;
  4186. struct qeth_ipa_cmd *cmd;
  4187. struct qeth_query_oat *oat_req;
  4188. struct qeth_query_oat_data oat_data;
  4189. struct qeth_qoat_priv priv;
  4190. void __user *tmp;
  4191. QETH_CARD_TEXT(card, 3, "qoatcmd");
  4192. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
  4193. rc = -EOPNOTSUPP;
  4194. goto out;
  4195. }
  4196. if (copy_from_user(&oat_data, udata,
  4197. sizeof(struct qeth_query_oat_data))) {
  4198. rc = -EFAULT;
  4199. goto out;
  4200. }
  4201. priv.buffer_len = oat_data.buffer_len;
  4202. priv.response_len = 0;
  4203. priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
  4204. if (!priv.buffer) {
  4205. rc = -ENOMEM;
  4206. goto out;
  4207. }
  4208. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
  4209. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  4210. sizeof(struct qeth_query_oat));
  4211. if (!iob) {
  4212. rc = -ENOMEM;
  4213. goto out_free;
  4214. }
  4215. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4216. oat_req = &cmd->data.setadapterparms.data.query_oat;
  4217. oat_req->subcmd_code = oat_data.command;
  4218. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
  4219. &priv);
  4220. if (!rc) {
  4221. if (is_compat_task())
  4222. tmp = compat_ptr(oat_data.ptr);
  4223. else
  4224. tmp = (void __user *)(unsigned long)oat_data.ptr;
  4225. if (copy_to_user(tmp, priv.buffer,
  4226. priv.response_len)) {
  4227. rc = -EFAULT;
  4228. goto out_free;
  4229. }
  4230. oat_data.response_len = priv.response_len;
  4231. if (copy_to_user(udata, &oat_data,
  4232. sizeof(struct qeth_query_oat_data)))
  4233. rc = -EFAULT;
  4234. } else
  4235. if (rc == IPA_RC_FFFF)
  4236. rc = -EFAULT;
  4237. out_free:
  4238. kfree(priv.buffer);
  4239. out:
  4240. return rc;
  4241. }
  4242. static int qeth_query_card_info_cb(struct qeth_card *card,
  4243. struct qeth_reply *reply, unsigned long data)
  4244. {
  4245. struct qeth_ipa_cmd *cmd;
  4246. struct qeth_query_card_info *card_info;
  4247. struct carrier_info *carrier_info;
  4248. QETH_CARD_TEXT(card, 2, "qcrdincb");
  4249. carrier_info = (struct carrier_info *)reply->param;
  4250. cmd = (struct qeth_ipa_cmd *)data;
  4251. card_info = &cmd->data.setadapterparms.data.card_info;
  4252. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  4253. carrier_info->card_type = card_info->card_type;
  4254. carrier_info->port_mode = card_info->port_mode;
  4255. carrier_info->port_speed = card_info->port_speed;
  4256. }
  4257. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  4258. return 0;
  4259. }
  4260. static int qeth_query_card_info(struct qeth_card *card,
  4261. struct carrier_info *carrier_info)
  4262. {
  4263. struct qeth_cmd_buffer *iob;
  4264. QETH_CARD_TEXT(card, 2, "qcrdinfo");
  4265. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
  4266. return -EOPNOTSUPP;
  4267. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
  4268. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  4269. if (!iob)
  4270. return -ENOMEM;
  4271. return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
  4272. (void *)carrier_info);
  4273. }
  4274. /**
  4275. * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
  4276. * @card: pointer to a qeth_card
  4277. *
  4278. * Returns
  4279. * 0, if a MAC address has been set for the card's netdevice
  4280. * a return code, for various error conditions
  4281. */
  4282. int qeth_vm_request_mac(struct qeth_card *card)
  4283. {
  4284. struct diag26c_mac_resp *response;
  4285. struct diag26c_mac_req *request;
  4286. struct ccw_dev_id id;
  4287. int rc;
  4288. QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
  4289. if (!card->dev)
  4290. return -ENODEV;
  4291. request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
  4292. response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
  4293. if (!request || !response) {
  4294. rc = -ENOMEM;
  4295. goto out;
  4296. }
  4297. ccw_device_get_id(CARD_DDEV(card), &id);
  4298. request->resp_buf_len = sizeof(*response);
  4299. request->resp_version = DIAG26C_VERSION2;
  4300. request->op_code = DIAG26C_GET_MAC;
  4301. request->devno = id.devno;
  4302. rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
  4303. if (rc)
  4304. goto out;
  4305. if (request->resp_buf_len < sizeof(*response) ||
  4306. response->version != request->resp_version) {
  4307. rc = -EIO;
  4308. QETH_DBF_TEXT(SETUP, 2, "badresp");
  4309. QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
  4310. sizeof(request->resp_buf_len));
  4311. } else if (!is_valid_ether_addr(response->mac)) {
  4312. rc = -EINVAL;
  4313. QETH_DBF_TEXT(SETUP, 2, "badmac");
  4314. QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
  4315. } else {
  4316. ether_addr_copy(card->dev->dev_addr, response->mac);
  4317. }
  4318. out:
  4319. kfree(response);
  4320. kfree(request);
  4321. return rc;
  4322. }
  4323. EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
  4324. static int qeth_get_qdio_q_format(struct qeth_card *card)
  4325. {
  4326. if (card->info.type == QETH_CARD_TYPE_IQD)
  4327. return QDIO_IQDIO_QFMT;
  4328. else
  4329. return QDIO_QETH_QFMT;
  4330. }
  4331. static void qeth_determine_capabilities(struct qeth_card *card)
  4332. {
  4333. int rc;
  4334. int length;
  4335. char *prcd;
  4336. struct ccw_device *ddev;
  4337. int ddev_offline = 0;
  4338. QETH_DBF_TEXT(SETUP, 2, "detcapab");
  4339. ddev = CARD_DDEV(card);
  4340. if (!ddev->online) {
  4341. ddev_offline = 1;
  4342. rc = ccw_device_set_online(ddev);
  4343. if (rc) {
  4344. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4345. goto out;
  4346. }
  4347. }
  4348. rc = qeth_read_conf_data(card, (void **) &prcd, &length);
  4349. if (rc) {
  4350. QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
  4351. dev_name(&card->gdev->dev), rc);
  4352. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4353. goto out_offline;
  4354. }
  4355. qeth_configure_unitaddr(card, prcd);
  4356. if (ddev_offline)
  4357. qeth_configure_blkt_default(card, prcd);
  4358. kfree(prcd);
  4359. rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
  4360. if (rc)
  4361. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4362. QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
  4363. QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
  4364. QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
  4365. QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
  4366. QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
  4367. if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
  4368. ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
  4369. ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
  4370. dev_info(&card->gdev->dev,
  4371. "Completion Queueing supported\n");
  4372. } else {
  4373. card->options.cq = QETH_CQ_NOTAVAILABLE;
  4374. }
  4375. out_offline:
  4376. if (ddev_offline == 1)
  4377. ccw_device_set_offline(ddev);
  4378. out:
  4379. return;
  4380. }
  4381. static void qeth_qdio_establish_cq(struct qeth_card *card,
  4382. struct qdio_buffer **in_sbal_ptrs,
  4383. void (**queue_start_poll)
  4384. (struct ccw_device *, int,
  4385. unsigned long))
  4386. {
  4387. int i;
  4388. if (card->options.cq == QETH_CQ_ENABLED) {
  4389. int offset = QDIO_MAX_BUFFERS_PER_Q *
  4390. (card->qdio.no_in_queues - 1);
  4391. i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
  4392. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4393. in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
  4394. virt_to_phys(card->qdio.c_q->bufs[i].buffer);
  4395. }
  4396. queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
  4397. }
  4398. }
  4399. static int qeth_qdio_establish(struct qeth_card *card)
  4400. {
  4401. struct qdio_initialize init_data;
  4402. char *qib_param_field;
  4403. struct qdio_buffer **in_sbal_ptrs;
  4404. void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
  4405. struct qdio_buffer **out_sbal_ptrs;
  4406. int i, j, k;
  4407. int rc = 0;
  4408. QETH_DBF_TEXT(SETUP, 2, "qdioest");
  4409. qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
  4410. GFP_KERNEL);
  4411. if (!qib_param_field) {
  4412. rc = -ENOMEM;
  4413. goto out_free_nothing;
  4414. }
  4415. qeth_create_qib_param_field(card, qib_param_field);
  4416. qeth_create_qib_param_field_blkt(card, qib_param_field);
  4417. in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
  4418. QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
  4419. GFP_KERNEL);
  4420. if (!in_sbal_ptrs) {
  4421. rc = -ENOMEM;
  4422. goto out_free_qib_param;
  4423. }
  4424. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4425. in_sbal_ptrs[i] = (struct qdio_buffer *)
  4426. virt_to_phys(card->qdio.in_q->bufs[i].buffer);
  4427. }
  4428. queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
  4429. GFP_KERNEL);
  4430. if (!queue_start_poll) {
  4431. rc = -ENOMEM;
  4432. goto out_free_in_sbals;
  4433. }
  4434. for (i = 0; i < card->qdio.no_in_queues; ++i)
  4435. queue_start_poll[i] = card->discipline->start_poll;
  4436. qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
  4437. out_sbal_ptrs =
  4438. kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
  4439. sizeof(void *), GFP_KERNEL);
  4440. if (!out_sbal_ptrs) {
  4441. rc = -ENOMEM;
  4442. goto out_free_queue_start_poll;
  4443. }
  4444. for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
  4445. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
  4446. out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
  4447. card->qdio.out_qs[i]->bufs[j]->buffer);
  4448. }
  4449. memset(&init_data, 0, sizeof(struct qdio_initialize));
  4450. init_data.cdev = CARD_DDEV(card);
  4451. init_data.q_format = qeth_get_qdio_q_format(card);
  4452. init_data.qib_param_field_format = 0;
  4453. init_data.qib_param_field = qib_param_field;
  4454. init_data.no_input_qs = card->qdio.no_in_queues;
  4455. init_data.no_output_qs = card->qdio.no_out_queues;
  4456. init_data.input_handler = card->discipline->input_handler;
  4457. init_data.output_handler = card->discipline->output_handler;
  4458. init_data.queue_start_poll_array = queue_start_poll;
  4459. init_data.int_parm = (unsigned long) card;
  4460. init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
  4461. init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
  4462. init_data.output_sbal_state_array = card->qdio.out_bufstates;
  4463. init_data.scan_threshold =
  4464. (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
  4465. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
  4466. QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
  4467. rc = qdio_allocate(&init_data);
  4468. if (rc) {
  4469. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4470. goto out;
  4471. }
  4472. rc = qdio_establish(&init_data);
  4473. if (rc) {
  4474. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4475. qdio_free(CARD_DDEV(card));
  4476. }
  4477. }
  4478. switch (card->options.cq) {
  4479. case QETH_CQ_ENABLED:
  4480. dev_info(&card->gdev->dev, "Completion Queue support enabled");
  4481. break;
  4482. case QETH_CQ_DISABLED:
  4483. dev_info(&card->gdev->dev, "Completion Queue support disabled");
  4484. break;
  4485. default:
  4486. break;
  4487. }
  4488. out:
  4489. kfree(out_sbal_ptrs);
  4490. out_free_queue_start_poll:
  4491. kfree(queue_start_poll);
  4492. out_free_in_sbals:
  4493. kfree(in_sbal_ptrs);
  4494. out_free_qib_param:
  4495. kfree(qib_param_field);
  4496. out_free_nothing:
  4497. return rc;
  4498. }
  4499. static void qeth_core_free_card(struct qeth_card *card)
  4500. {
  4501. QETH_DBF_TEXT(SETUP, 2, "freecrd");
  4502. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  4503. qeth_clean_channel(&card->read);
  4504. qeth_clean_channel(&card->write);
  4505. if (card->dev)
  4506. free_netdev(card->dev);
  4507. qeth_free_qdio_buffers(card);
  4508. unregister_service_level(&card->qeth_service_level);
  4509. kfree(card);
  4510. }
  4511. void qeth_trace_features(struct qeth_card *card)
  4512. {
  4513. QETH_CARD_TEXT(card, 2, "features");
  4514. QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
  4515. QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
  4516. QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
  4517. QETH_CARD_HEX(card, 2, &card->info.diagass_support,
  4518. sizeof(card->info.diagass_support));
  4519. }
  4520. EXPORT_SYMBOL_GPL(qeth_trace_features);
  4521. static struct ccw_device_id qeth_ids[] = {
  4522. {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
  4523. .driver_info = QETH_CARD_TYPE_OSD},
  4524. {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
  4525. .driver_info = QETH_CARD_TYPE_IQD},
  4526. {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
  4527. .driver_info = QETH_CARD_TYPE_OSN},
  4528. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
  4529. .driver_info = QETH_CARD_TYPE_OSM},
  4530. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
  4531. .driver_info = QETH_CARD_TYPE_OSX},
  4532. {},
  4533. };
  4534. MODULE_DEVICE_TABLE(ccw, qeth_ids);
  4535. static struct ccw_driver qeth_ccw_driver = {
  4536. .driver = {
  4537. .owner = THIS_MODULE,
  4538. .name = "qeth",
  4539. },
  4540. .ids = qeth_ids,
  4541. .probe = ccwgroup_probe_ccwdev,
  4542. .remove = ccwgroup_remove_ccwdev,
  4543. };
  4544. int qeth_core_hardsetup_card(struct qeth_card *card)
  4545. {
  4546. int retries = 3;
  4547. int rc;
  4548. QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
  4549. atomic_set(&card->force_alloc_skb, 0);
  4550. qeth_update_from_chp_desc(card);
  4551. retry:
  4552. if (retries < 3)
  4553. QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
  4554. dev_name(&card->gdev->dev));
  4555. rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  4556. ccw_device_set_offline(CARD_DDEV(card));
  4557. ccw_device_set_offline(CARD_WDEV(card));
  4558. ccw_device_set_offline(CARD_RDEV(card));
  4559. qdio_free(CARD_DDEV(card));
  4560. rc = ccw_device_set_online(CARD_RDEV(card));
  4561. if (rc)
  4562. goto retriable;
  4563. rc = ccw_device_set_online(CARD_WDEV(card));
  4564. if (rc)
  4565. goto retriable;
  4566. rc = ccw_device_set_online(CARD_DDEV(card));
  4567. if (rc)
  4568. goto retriable;
  4569. retriable:
  4570. if (rc == -ERESTARTSYS) {
  4571. QETH_DBF_TEXT(SETUP, 2, "break1");
  4572. return rc;
  4573. } else if (rc) {
  4574. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  4575. if (--retries < 0)
  4576. goto out;
  4577. else
  4578. goto retry;
  4579. }
  4580. qeth_determine_capabilities(card);
  4581. qeth_init_tokens(card);
  4582. qeth_init_func_level(card);
  4583. rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
  4584. if (rc == -ERESTARTSYS) {
  4585. QETH_DBF_TEXT(SETUP, 2, "break2");
  4586. return rc;
  4587. } else if (rc) {
  4588. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4589. if (--retries < 0)
  4590. goto out;
  4591. else
  4592. goto retry;
  4593. }
  4594. rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
  4595. if (rc == -ERESTARTSYS) {
  4596. QETH_DBF_TEXT(SETUP, 2, "break3");
  4597. return rc;
  4598. } else if (rc) {
  4599. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  4600. if (--retries < 0)
  4601. goto out;
  4602. else
  4603. goto retry;
  4604. }
  4605. card->read_or_write_problem = 0;
  4606. rc = qeth_mpc_initialize(card);
  4607. if (rc) {
  4608. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4609. goto out;
  4610. }
  4611. rc = qeth_send_startlan(card);
  4612. if (rc) {
  4613. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4614. if (rc == IPA_RC_LAN_OFFLINE) {
  4615. dev_warn(&card->gdev->dev,
  4616. "The LAN is offline\n");
  4617. card->lan_online = 0;
  4618. } else {
  4619. rc = -ENODEV;
  4620. goto out;
  4621. }
  4622. } else
  4623. card->lan_online = 1;
  4624. card->options.ipa4.supported_funcs = 0;
  4625. card->options.ipa6.supported_funcs = 0;
  4626. card->options.adp.supported_funcs = 0;
  4627. card->options.sbp.supported_funcs = 0;
  4628. card->info.diagass_support = 0;
  4629. rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
  4630. if (rc == -ENOMEM)
  4631. goto out;
  4632. if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
  4633. rc = qeth_query_setadapterparms(card);
  4634. if (rc < 0) {
  4635. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  4636. goto out;
  4637. }
  4638. }
  4639. if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
  4640. rc = qeth_query_setdiagass(card);
  4641. if (rc < 0) {
  4642. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  4643. goto out;
  4644. }
  4645. }
  4646. return 0;
  4647. out:
  4648. dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
  4649. "an error on the device\n");
  4650. QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
  4651. dev_name(&card->gdev->dev), rc);
  4652. return rc;
  4653. }
  4654. EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
  4655. static int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
  4656. struct qdio_buffer_element *element,
  4657. struct sk_buff **pskb, int offset, int *pfrag,
  4658. int data_len)
  4659. {
  4660. struct page *page = virt_to_page(element->addr);
  4661. if (*pskb == NULL) {
  4662. if (qethbuffer->rx_skb) {
  4663. /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
  4664. *pskb = qethbuffer->rx_skb;
  4665. qethbuffer->rx_skb = NULL;
  4666. } else {
  4667. *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  4668. if (!(*pskb))
  4669. return -ENOMEM;
  4670. }
  4671. skb_reserve(*pskb, ETH_HLEN);
  4672. if (data_len <= QETH_RX_PULL_LEN) {
  4673. skb_put_data(*pskb, element->addr + offset, data_len);
  4674. } else {
  4675. get_page(page);
  4676. skb_put_data(*pskb, element->addr + offset,
  4677. QETH_RX_PULL_LEN);
  4678. skb_fill_page_desc(*pskb, *pfrag, page,
  4679. offset + QETH_RX_PULL_LEN,
  4680. data_len - QETH_RX_PULL_LEN);
  4681. (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
  4682. (*pskb)->len += data_len - QETH_RX_PULL_LEN;
  4683. (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
  4684. (*pfrag)++;
  4685. }
  4686. } else {
  4687. get_page(page);
  4688. skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
  4689. (*pskb)->data_len += data_len;
  4690. (*pskb)->len += data_len;
  4691. (*pskb)->truesize += data_len;
  4692. (*pfrag)++;
  4693. }
  4694. return 0;
  4695. }
  4696. static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
  4697. {
  4698. return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
  4699. }
  4700. struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
  4701. struct qeth_qdio_buffer *qethbuffer,
  4702. struct qdio_buffer_element **__element, int *__offset,
  4703. struct qeth_hdr **hdr)
  4704. {
  4705. struct qdio_buffer_element *element = *__element;
  4706. struct qdio_buffer *buffer = qethbuffer->buffer;
  4707. int offset = *__offset;
  4708. struct sk_buff *skb = NULL;
  4709. int skb_len = 0;
  4710. void *data_ptr;
  4711. int data_len;
  4712. int headroom = 0;
  4713. int use_rx_sg = 0;
  4714. int frag = 0;
  4715. /* qeth_hdr must not cross element boundaries */
  4716. if (element->length < offset + sizeof(struct qeth_hdr)) {
  4717. if (qeth_is_last_sbale(element))
  4718. return NULL;
  4719. element++;
  4720. offset = 0;
  4721. if (element->length < sizeof(struct qeth_hdr))
  4722. return NULL;
  4723. }
  4724. *hdr = element->addr + offset;
  4725. offset += sizeof(struct qeth_hdr);
  4726. switch ((*hdr)->hdr.l2.id) {
  4727. case QETH_HEADER_TYPE_LAYER2:
  4728. skb_len = (*hdr)->hdr.l2.pkt_length;
  4729. break;
  4730. case QETH_HEADER_TYPE_LAYER3:
  4731. skb_len = (*hdr)->hdr.l3.length;
  4732. headroom = ETH_HLEN;
  4733. break;
  4734. case QETH_HEADER_TYPE_OSN:
  4735. skb_len = (*hdr)->hdr.osn.pdu_length;
  4736. headroom = sizeof(struct qeth_hdr);
  4737. break;
  4738. default:
  4739. break;
  4740. }
  4741. if (!skb_len)
  4742. return NULL;
  4743. if (((skb_len >= card->options.rx_sg_cb) &&
  4744. (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
  4745. (!atomic_read(&card->force_alloc_skb))) ||
  4746. (card->options.cq == QETH_CQ_ENABLED)) {
  4747. use_rx_sg = 1;
  4748. } else {
  4749. skb = dev_alloc_skb(skb_len + headroom);
  4750. if (!skb)
  4751. goto no_mem;
  4752. if (headroom)
  4753. skb_reserve(skb, headroom);
  4754. }
  4755. data_ptr = element->addr + offset;
  4756. while (skb_len) {
  4757. data_len = min(skb_len, (int)(element->length - offset));
  4758. if (data_len) {
  4759. if (use_rx_sg) {
  4760. if (qeth_create_skb_frag(qethbuffer, element,
  4761. &skb, offset, &frag, data_len))
  4762. goto no_mem;
  4763. } else {
  4764. skb_put_data(skb, data_ptr, data_len);
  4765. }
  4766. }
  4767. skb_len -= data_len;
  4768. if (skb_len) {
  4769. if (qeth_is_last_sbale(element)) {
  4770. QETH_CARD_TEXT(card, 4, "unexeob");
  4771. QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
  4772. dev_kfree_skb_any(skb);
  4773. card->stats.rx_errors++;
  4774. return NULL;
  4775. }
  4776. element++;
  4777. offset = 0;
  4778. data_ptr = element->addr;
  4779. } else {
  4780. offset += data_len;
  4781. }
  4782. }
  4783. *__element = element;
  4784. *__offset = offset;
  4785. if (use_rx_sg && card->options.performance_stats) {
  4786. card->perf_stats.sg_skbs_rx++;
  4787. card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
  4788. }
  4789. return skb;
  4790. no_mem:
  4791. if (net_ratelimit()) {
  4792. QETH_CARD_TEXT(card, 2, "noskbmem");
  4793. }
  4794. card->stats.rx_dropped++;
  4795. return NULL;
  4796. }
  4797. EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
  4798. int qeth_poll(struct napi_struct *napi, int budget)
  4799. {
  4800. struct qeth_card *card = container_of(napi, struct qeth_card, napi);
  4801. int work_done = 0;
  4802. struct qeth_qdio_buffer *buffer;
  4803. int done;
  4804. int new_budget = budget;
  4805. if (card->options.performance_stats) {
  4806. card->perf_stats.inbound_cnt++;
  4807. card->perf_stats.inbound_start_time = qeth_get_micros();
  4808. }
  4809. while (1) {
  4810. if (!card->rx.b_count) {
  4811. card->rx.qdio_err = 0;
  4812. card->rx.b_count = qdio_get_next_buffers(
  4813. card->data.ccwdev, 0, &card->rx.b_index,
  4814. &card->rx.qdio_err);
  4815. if (card->rx.b_count <= 0) {
  4816. card->rx.b_count = 0;
  4817. break;
  4818. }
  4819. card->rx.b_element =
  4820. &card->qdio.in_q->bufs[card->rx.b_index]
  4821. .buffer->element[0];
  4822. card->rx.e_offset = 0;
  4823. }
  4824. while (card->rx.b_count) {
  4825. buffer = &card->qdio.in_q->bufs[card->rx.b_index];
  4826. if (!(card->rx.qdio_err &&
  4827. qeth_check_qdio_errors(card, buffer->buffer,
  4828. card->rx.qdio_err, "qinerr")))
  4829. work_done +=
  4830. card->discipline->process_rx_buffer(
  4831. card, new_budget, &done);
  4832. else
  4833. done = 1;
  4834. if (done) {
  4835. if (card->options.performance_stats)
  4836. card->perf_stats.bufs_rec++;
  4837. qeth_put_buffer_pool_entry(card,
  4838. buffer->pool_entry);
  4839. qeth_queue_input_buffer(card, card->rx.b_index);
  4840. card->rx.b_count--;
  4841. if (card->rx.b_count) {
  4842. card->rx.b_index =
  4843. (card->rx.b_index + 1) %
  4844. QDIO_MAX_BUFFERS_PER_Q;
  4845. card->rx.b_element =
  4846. &card->qdio.in_q
  4847. ->bufs[card->rx.b_index]
  4848. .buffer->element[0];
  4849. card->rx.e_offset = 0;
  4850. }
  4851. }
  4852. if (work_done >= budget)
  4853. goto out;
  4854. else
  4855. new_budget = budget - work_done;
  4856. }
  4857. }
  4858. napi_complete(napi);
  4859. if (qdio_start_irq(card->data.ccwdev, 0))
  4860. napi_schedule(&card->napi);
  4861. out:
  4862. if (card->options.performance_stats)
  4863. card->perf_stats.inbound_time += qeth_get_micros() -
  4864. card->perf_stats.inbound_start_time;
  4865. return work_done;
  4866. }
  4867. EXPORT_SYMBOL_GPL(qeth_poll);
  4868. int qeth_setassparms_cb(struct qeth_card *card,
  4869. struct qeth_reply *reply, unsigned long data)
  4870. {
  4871. struct qeth_ipa_cmd *cmd;
  4872. QETH_CARD_TEXT(card, 4, "defadpcb");
  4873. cmd = (struct qeth_ipa_cmd *) data;
  4874. if (cmd->hdr.return_code == 0) {
  4875. cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
  4876. if (cmd->hdr.prot_version == QETH_PROT_IPV4)
  4877. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  4878. if (cmd->hdr.prot_version == QETH_PROT_IPV6)
  4879. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  4880. }
  4881. return 0;
  4882. }
  4883. EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
  4884. struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
  4885. enum qeth_ipa_funcs ipa_func,
  4886. __u16 cmd_code, __u16 len,
  4887. enum qeth_prot_versions prot)
  4888. {
  4889. struct qeth_cmd_buffer *iob;
  4890. struct qeth_ipa_cmd *cmd;
  4891. QETH_CARD_TEXT(card, 4, "getasscm");
  4892. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
  4893. if (iob) {
  4894. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4895. cmd->data.setassparms.hdr.assist_no = ipa_func;
  4896. cmd->data.setassparms.hdr.length = 8 + len;
  4897. cmd->data.setassparms.hdr.command_code = cmd_code;
  4898. cmd->data.setassparms.hdr.return_code = 0;
  4899. cmd->data.setassparms.hdr.seq_no = 0;
  4900. }
  4901. return iob;
  4902. }
  4903. EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
  4904. int qeth_send_setassparms(struct qeth_card *card,
  4905. struct qeth_cmd_buffer *iob, __u16 len, long data,
  4906. int (*reply_cb)(struct qeth_card *,
  4907. struct qeth_reply *, unsigned long),
  4908. void *reply_param)
  4909. {
  4910. int rc;
  4911. struct qeth_ipa_cmd *cmd;
  4912. QETH_CARD_TEXT(card, 4, "sendassp");
  4913. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4914. if (len <= sizeof(__u32))
  4915. cmd->data.setassparms.data.flags_32bit = (__u32) data;
  4916. else /* (len > sizeof(__u32)) */
  4917. memcpy(&cmd->data.setassparms.data, (void *) data, len);
  4918. rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
  4919. return rc;
  4920. }
  4921. EXPORT_SYMBOL_GPL(qeth_send_setassparms);
  4922. int qeth_send_simple_setassparms(struct qeth_card *card,
  4923. enum qeth_ipa_funcs ipa_func,
  4924. __u16 cmd_code, long data)
  4925. {
  4926. int rc;
  4927. int length = 0;
  4928. struct qeth_cmd_buffer *iob;
  4929. QETH_CARD_TEXT(card, 4, "simassp4");
  4930. if (data)
  4931. length = sizeof(__u32);
  4932. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
  4933. length, QETH_PROT_IPV4);
  4934. if (!iob)
  4935. return -ENOMEM;
  4936. rc = qeth_send_setassparms(card, iob, length, data,
  4937. qeth_setassparms_cb, NULL);
  4938. return rc;
  4939. }
  4940. EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms);
  4941. static void qeth_unregister_dbf_views(void)
  4942. {
  4943. int x;
  4944. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4945. debug_unregister(qeth_dbf[x].id);
  4946. qeth_dbf[x].id = NULL;
  4947. }
  4948. }
  4949. void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
  4950. {
  4951. char dbf_txt_buf[32];
  4952. va_list args;
  4953. if (!debug_level_enabled(id, level))
  4954. return;
  4955. va_start(args, fmt);
  4956. vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
  4957. va_end(args);
  4958. debug_text_event(id, level, dbf_txt_buf);
  4959. }
  4960. EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
  4961. static int qeth_register_dbf_views(void)
  4962. {
  4963. int ret;
  4964. int x;
  4965. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4966. /* register the areas */
  4967. qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
  4968. qeth_dbf[x].pages,
  4969. qeth_dbf[x].areas,
  4970. qeth_dbf[x].len);
  4971. if (qeth_dbf[x].id == NULL) {
  4972. qeth_unregister_dbf_views();
  4973. return -ENOMEM;
  4974. }
  4975. /* register a view */
  4976. ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
  4977. if (ret) {
  4978. qeth_unregister_dbf_views();
  4979. return ret;
  4980. }
  4981. /* set a passing level */
  4982. debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
  4983. }
  4984. return 0;
  4985. }
  4986. int qeth_core_load_discipline(struct qeth_card *card,
  4987. enum qeth_discipline_id discipline)
  4988. {
  4989. int rc = 0;
  4990. mutex_lock(&qeth_mod_mutex);
  4991. switch (discipline) {
  4992. case QETH_DISCIPLINE_LAYER3:
  4993. card->discipline = try_then_request_module(
  4994. symbol_get(qeth_l3_discipline), "qeth_l3");
  4995. break;
  4996. case QETH_DISCIPLINE_LAYER2:
  4997. card->discipline = try_then_request_module(
  4998. symbol_get(qeth_l2_discipline), "qeth_l2");
  4999. break;
  5000. default:
  5001. break;
  5002. }
  5003. if (!card->discipline) {
  5004. dev_err(&card->gdev->dev, "There is no kernel module to "
  5005. "support discipline %d\n", discipline);
  5006. rc = -EINVAL;
  5007. }
  5008. mutex_unlock(&qeth_mod_mutex);
  5009. return rc;
  5010. }
  5011. void qeth_core_free_discipline(struct qeth_card *card)
  5012. {
  5013. if (card->options.layer2)
  5014. symbol_put(qeth_l2_discipline);
  5015. else
  5016. symbol_put(qeth_l3_discipline);
  5017. card->discipline = NULL;
  5018. }
  5019. const struct device_type qeth_generic_devtype = {
  5020. .name = "qeth_generic",
  5021. .groups = qeth_generic_attr_groups,
  5022. };
  5023. EXPORT_SYMBOL_GPL(qeth_generic_devtype);
  5024. static const struct device_type qeth_osn_devtype = {
  5025. .name = "qeth_osn",
  5026. .groups = qeth_osn_attr_groups,
  5027. };
  5028. #define DBF_NAME_LEN 20
  5029. struct qeth_dbf_entry {
  5030. char dbf_name[DBF_NAME_LEN];
  5031. debug_info_t *dbf_info;
  5032. struct list_head dbf_list;
  5033. };
  5034. static LIST_HEAD(qeth_dbf_list);
  5035. static DEFINE_MUTEX(qeth_dbf_list_mutex);
  5036. static debug_info_t *qeth_get_dbf_entry(char *name)
  5037. {
  5038. struct qeth_dbf_entry *entry;
  5039. debug_info_t *rc = NULL;
  5040. mutex_lock(&qeth_dbf_list_mutex);
  5041. list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
  5042. if (strcmp(entry->dbf_name, name) == 0) {
  5043. rc = entry->dbf_info;
  5044. break;
  5045. }
  5046. }
  5047. mutex_unlock(&qeth_dbf_list_mutex);
  5048. return rc;
  5049. }
  5050. static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
  5051. {
  5052. struct qeth_dbf_entry *new_entry;
  5053. card->debug = debug_register(name, 2, 1, 8);
  5054. if (!card->debug) {
  5055. QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
  5056. goto err;
  5057. }
  5058. if (debug_register_view(card->debug, &debug_hex_ascii_view))
  5059. goto err_dbg;
  5060. new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
  5061. if (!new_entry)
  5062. goto err_dbg;
  5063. strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
  5064. new_entry->dbf_info = card->debug;
  5065. mutex_lock(&qeth_dbf_list_mutex);
  5066. list_add(&new_entry->dbf_list, &qeth_dbf_list);
  5067. mutex_unlock(&qeth_dbf_list_mutex);
  5068. return 0;
  5069. err_dbg:
  5070. debug_unregister(card->debug);
  5071. err:
  5072. return -ENOMEM;
  5073. }
  5074. static void qeth_clear_dbf_list(void)
  5075. {
  5076. struct qeth_dbf_entry *entry, *tmp;
  5077. mutex_lock(&qeth_dbf_list_mutex);
  5078. list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
  5079. list_del(&entry->dbf_list);
  5080. debug_unregister(entry->dbf_info);
  5081. kfree(entry);
  5082. }
  5083. mutex_unlock(&qeth_dbf_list_mutex);
  5084. }
  5085. static int qeth_core_probe_device(struct ccwgroup_device *gdev)
  5086. {
  5087. struct qeth_card *card;
  5088. struct device *dev;
  5089. int rc;
  5090. enum qeth_discipline_id enforced_disc;
  5091. unsigned long flags;
  5092. char dbf_name[DBF_NAME_LEN];
  5093. QETH_DBF_TEXT(SETUP, 2, "probedev");
  5094. dev = &gdev->dev;
  5095. if (!get_device(dev))
  5096. return -ENODEV;
  5097. QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
  5098. card = qeth_alloc_card();
  5099. if (!card) {
  5100. QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
  5101. rc = -ENOMEM;
  5102. goto err_dev;
  5103. }
  5104. snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
  5105. dev_name(&gdev->dev));
  5106. card->debug = qeth_get_dbf_entry(dbf_name);
  5107. if (!card->debug) {
  5108. rc = qeth_add_dbf_entry(card, dbf_name);
  5109. if (rc)
  5110. goto err_card;
  5111. }
  5112. card->read.ccwdev = gdev->cdev[0];
  5113. card->write.ccwdev = gdev->cdev[1];
  5114. card->data.ccwdev = gdev->cdev[2];
  5115. dev_set_drvdata(&gdev->dev, card);
  5116. card->gdev = gdev;
  5117. gdev->cdev[0]->handler = qeth_irq;
  5118. gdev->cdev[1]->handler = qeth_irq;
  5119. gdev->cdev[2]->handler = qeth_irq;
  5120. rc = qeth_determine_card_type(card);
  5121. if (rc) {
  5122. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  5123. goto err_card;
  5124. }
  5125. rc = qeth_setup_card(card);
  5126. if (rc) {
  5127. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  5128. goto err_card;
  5129. }
  5130. qeth_determine_capabilities(card);
  5131. enforced_disc = qeth_enforce_discipline(card);
  5132. switch (enforced_disc) {
  5133. case QETH_DISCIPLINE_UNDETERMINED:
  5134. gdev->dev.type = &qeth_generic_devtype;
  5135. break;
  5136. default:
  5137. card->info.layer_enforced = true;
  5138. rc = qeth_core_load_discipline(card, enforced_disc);
  5139. if (rc)
  5140. goto err_card;
  5141. gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
  5142. ? card->discipline->devtype
  5143. : &qeth_osn_devtype;
  5144. rc = card->discipline->setup(card->gdev);
  5145. if (rc)
  5146. goto err_disc;
  5147. break;
  5148. }
  5149. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  5150. list_add_tail(&card->list, &qeth_core_card_list.list);
  5151. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  5152. return 0;
  5153. err_disc:
  5154. qeth_core_free_discipline(card);
  5155. err_card:
  5156. qeth_core_free_card(card);
  5157. err_dev:
  5158. put_device(dev);
  5159. return rc;
  5160. }
  5161. static void qeth_core_remove_device(struct ccwgroup_device *gdev)
  5162. {
  5163. unsigned long flags;
  5164. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5165. QETH_DBF_TEXT(SETUP, 2, "removedv");
  5166. if (card->discipline) {
  5167. card->discipline->remove(gdev);
  5168. qeth_core_free_discipline(card);
  5169. }
  5170. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  5171. list_del(&card->list);
  5172. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  5173. qeth_core_free_card(card);
  5174. dev_set_drvdata(&gdev->dev, NULL);
  5175. put_device(&gdev->dev);
  5176. return;
  5177. }
  5178. static int qeth_core_set_online(struct ccwgroup_device *gdev)
  5179. {
  5180. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5181. int rc = 0;
  5182. enum qeth_discipline_id def_discipline;
  5183. if (!card->discipline) {
  5184. if (card->info.type == QETH_CARD_TYPE_IQD)
  5185. def_discipline = QETH_DISCIPLINE_LAYER3;
  5186. else
  5187. def_discipline = QETH_DISCIPLINE_LAYER2;
  5188. rc = qeth_core_load_discipline(card, def_discipline);
  5189. if (rc)
  5190. goto err;
  5191. rc = card->discipline->setup(card->gdev);
  5192. if (rc) {
  5193. qeth_core_free_discipline(card);
  5194. goto err;
  5195. }
  5196. }
  5197. rc = card->discipline->set_online(gdev);
  5198. err:
  5199. return rc;
  5200. }
  5201. static int qeth_core_set_offline(struct ccwgroup_device *gdev)
  5202. {
  5203. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5204. return card->discipline->set_offline(gdev);
  5205. }
  5206. static void qeth_core_shutdown(struct ccwgroup_device *gdev)
  5207. {
  5208. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5209. qeth_set_allowed_threads(card, 0, 1);
  5210. if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
  5211. qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
  5212. qeth_qdio_clear_card(card, 0);
  5213. qeth_clear_qdio_buffers(card);
  5214. qdio_free(CARD_DDEV(card));
  5215. }
  5216. static int qeth_core_freeze(struct ccwgroup_device *gdev)
  5217. {
  5218. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5219. if (card->discipline && card->discipline->freeze)
  5220. return card->discipline->freeze(gdev);
  5221. return 0;
  5222. }
  5223. static int qeth_core_thaw(struct ccwgroup_device *gdev)
  5224. {
  5225. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5226. if (card->discipline && card->discipline->thaw)
  5227. return card->discipline->thaw(gdev);
  5228. return 0;
  5229. }
  5230. static int qeth_core_restore(struct ccwgroup_device *gdev)
  5231. {
  5232. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5233. if (card->discipline && card->discipline->restore)
  5234. return card->discipline->restore(gdev);
  5235. return 0;
  5236. }
  5237. static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
  5238. .driver = {
  5239. .owner = THIS_MODULE,
  5240. .name = "qeth",
  5241. },
  5242. .setup = qeth_core_probe_device,
  5243. .remove = qeth_core_remove_device,
  5244. .set_online = qeth_core_set_online,
  5245. .set_offline = qeth_core_set_offline,
  5246. .shutdown = qeth_core_shutdown,
  5247. .prepare = NULL,
  5248. .complete = NULL,
  5249. .freeze = qeth_core_freeze,
  5250. .thaw = qeth_core_thaw,
  5251. .restore = qeth_core_restore,
  5252. };
  5253. static ssize_t group_store(struct device_driver *ddrv, const char *buf,
  5254. size_t count)
  5255. {
  5256. int err;
  5257. err = ccwgroup_create_dev(qeth_core_root_dev,
  5258. &qeth_core_ccwgroup_driver, 3, buf);
  5259. return err ? err : count;
  5260. }
  5261. static DRIVER_ATTR_WO(group);
  5262. static struct attribute *qeth_drv_attrs[] = {
  5263. &driver_attr_group.attr,
  5264. NULL,
  5265. };
  5266. static struct attribute_group qeth_drv_attr_group = {
  5267. .attrs = qeth_drv_attrs,
  5268. };
  5269. static const struct attribute_group *qeth_drv_attr_groups[] = {
  5270. &qeth_drv_attr_group,
  5271. NULL,
  5272. };
  5273. int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  5274. {
  5275. struct qeth_card *card = dev->ml_priv;
  5276. struct mii_ioctl_data *mii_data;
  5277. int rc = 0;
  5278. if (!card)
  5279. return -ENODEV;
  5280. if (!qeth_card_hw_is_reachable(card))
  5281. return -ENODEV;
  5282. if (card->info.type == QETH_CARD_TYPE_OSN)
  5283. return -EPERM;
  5284. switch (cmd) {
  5285. case SIOC_QETH_ADP_SET_SNMP_CONTROL:
  5286. rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
  5287. break;
  5288. case SIOC_QETH_GET_CARD_TYPE:
  5289. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  5290. card->info.type == QETH_CARD_TYPE_OSM ||
  5291. card->info.type == QETH_CARD_TYPE_OSX) &&
  5292. !card->info.guestlan)
  5293. return 1;
  5294. else
  5295. return 0;
  5296. case SIOCGMIIPHY:
  5297. mii_data = if_mii(rq);
  5298. mii_data->phy_id = 0;
  5299. break;
  5300. case SIOCGMIIREG:
  5301. mii_data = if_mii(rq);
  5302. if (mii_data->phy_id != 0)
  5303. rc = -EINVAL;
  5304. else
  5305. mii_data->val_out = qeth_mdio_read(dev,
  5306. mii_data->phy_id, mii_data->reg_num);
  5307. break;
  5308. case SIOC_QETH_QUERY_OAT:
  5309. rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
  5310. break;
  5311. default:
  5312. if (card->discipline->do_ioctl)
  5313. rc = card->discipline->do_ioctl(dev, rq, cmd);
  5314. else
  5315. rc = -EOPNOTSUPP;
  5316. }
  5317. if (rc)
  5318. QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
  5319. return rc;
  5320. }
  5321. EXPORT_SYMBOL_GPL(qeth_do_ioctl);
  5322. static struct {
  5323. const char str[ETH_GSTRING_LEN];
  5324. } qeth_ethtool_stats_keys[] = {
  5325. /* 0 */{"rx skbs"},
  5326. {"rx buffers"},
  5327. {"tx skbs"},
  5328. {"tx buffers"},
  5329. {"tx skbs no packing"},
  5330. {"tx buffers no packing"},
  5331. {"tx skbs packing"},
  5332. {"tx buffers packing"},
  5333. {"tx sg skbs"},
  5334. {"tx sg frags"},
  5335. /* 10 */{"rx sg skbs"},
  5336. {"rx sg frags"},
  5337. {"rx sg page allocs"},
  5338. {"tx large kbytes"},
  5339. {"tx large count"},
  5340. {"tx pk state ch n->p"},
  5341. {"tx pk state ch p->n"},
  5342. {"tx pk watermark low"},
  5343. {"tx pk watermark high"},
  5344. {"queue 0 buffer usage"},
  5345. /* 20 */{"queue 1 buffer usage"},
  5346. {"queue 2 buffer usage"},
  5347. {"queue 3 buffer usage"},
  5348. {"rx poll time"},
  5349. {"rx poll count"},
  5350. {"rx do_QDIO time"},
  5351. {"rx do_QDIO count"},
  5352. {"tx handler time"},
  5353. {"tx handler count"},
  5354. {"tx time"},
  5355. /* 30 */{"tx count"},
  5356. {"tx do_QDIO time"},
  5357. {"tx do_QDIO count"},
  5358. {"tx csum"},
  5359. {"tx lin"},
  5360. {"tx linfail"},
  5361. {"cq handler count"},
  5362. {"cq handler time"}
  5363. };
  5364. int qeth_core_get_sset_count(struct net_device *dev, int stringset)
  5365. {
  5366. switch (stringset) {
  5367. case ETH_SS_STATS:
  5368. return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
  5369. default:
  5370. return -EINVAL;
  5371. }
  5372. }
  5373. EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
  5374. void qeth_core_get_ethtool_stats(struct net_device *dev,
  5375. struct ethtool_stats *stats, u64 *data)
  5376. {
  5377. struct qeth_card *card = dev->ml_priv;
  5378. data[0] = card->stats.rx_packets -
  5379. card->perf_stats.initial_rx_packets;
  5380. data[1] = card->perf_stats.bufs_rec;
  5381. data[2] = card->stats.tx_packets -
  5382. card->perf_stats.initial_tx_packets;
  5383. data[3] = card->perf_stats.bufs_sent;
  5384. data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
  5385. - card->perf_stats.skbs_sent_pack;
  5386. data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
  5387. data[6] = card->perf_stats.skbs_sent_pack;
  5388. data[7] = card->perf_stats.bufs_sent_pack;
  5389. data[8] = card->perf_stats.sg_skbs_sent;
  5390. data[9] = card->perf_stats.sg_frags_sent;
  5391. data[10] = card->perf_stats.sg_skbs_rx;
  5392. data[11] = card->perf_stats.sg_frags_rx;
  5393. data[12] = card->perf_stats.sg_alloc_page_rx;
  5394. data[13] = (card->perf_stats.large_send_bytes >> 10);
  5395. data[14] = card->perf_stats.large_send_cnt;
  5396. data[15] = card->perf_stats.sc_dp_p;
  5397. data[16] = card->perf_stats.sc_p_dp;
  5398. data[17] = QETH_LOW_WATERMARK_PACK;
  5399. data[18] = QETH_HIGH_WATERMARK_PACK;
  5400. data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
  5401. data[20] = (card->qdio.no_out_queues > 1) ?
  5402. atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
  5403. data[21] = (card->qdio.no_out_queues > 2) ?
  5404. atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
  5405. data[22] = (card->qdio.no_out_queues > 3) ?
  5406. atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
  5407. data[23] = card->perf_stats.inbound_time;
  5408. data[24] = card->perf_stats.inbound_cnt;
  5409. data[25] = card->perf_stats.inbound_do_qdio_time;
  5410. data[26] = card->perf_stats.inbound_do_qdio_cnt;
  5411. data[27] = card->perf_stats.outbound_handler_time;
  5412. data[28] = card->perf_stats.outbound_handler_cnt;
  5413. data[29] = card->perf_stats.outbound_time;
  5414. data[30] = card->perf_stats.outbound_cnt;
  5415. data[31] = card->perf_stats.outbound_do_qdio_time;
  5416. data[32] = card->perf_stats.outbound_do_qdio_cnt;
  5417. data[33] = card->perf_stats.tx_csum;
  5418. data[34] = card->perf_stats.tx_lin;
  5419. data[35] = card->perf_stats.tx_linfail;
  5420. data[36] = card->perf_stats.cq_cnt;
  5421. data[37] = card->perf_stats.cq_time;
  5422. }
  5423. EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
  5424. void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  5425. {
  5426. switch (stringset) {
  5427. case ETH_SS_STATS:
  5428. memcpy(data, &qeth_ethtool_stats_keys,
  5429. sizeof(qeth_ethtool_stats_keys));
  5430. break;
  5431. default:
  5432. WARN_ON(1);
  5433. break;
  5434. }
  5435. }
  5436. EXPORT_SYMBOL_GPL(qeth_core_get_strings);
  5437. void qeth_core_get_drvinfo(struct net_device *dev,
  5438. struct ethtool_drvinfo *info)
  5439. {
  5440. struct qeth_card *card = dev->ml_priv;
  5441. strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
  5442. sizeof(info->driver));
  5443. strlcpy(info->version, "1.0", sizeof(info->version));
  5444. strlcpy(info->fw_version, card->info.mcl_level,
  5445. sizeof(info->fw_version));
  5446. snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
  5447. CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
  5448. }
  5449. EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
  5450. /* Helper function to fill 'advertising' and 'supported' which are the same. */
  5451. /* Autoneg and full-duplex are supported and advertised unconditionally. */
  5452. /* Always advertise and support all speeds up to specified, and only one */
  5453. /* specified port type. */
  5454. static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
  5455. int maxspeed, int porttype)
  5456. {
  5457. ethtool_link_ksettings_zero_link_mode(cmd, supported);
  5458. ethtool_link_ksettings_zero_link_mode(cmd, advertising);
  5459. ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
  5460. ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
  5461. ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
  5462. switch (porttype) {
  5463. case PORT_TP:
  5464. ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
  5465. ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
  5466. break;
  5467. case PORT_FIBRE:
  5468. ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
  5469. ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
  5470. break;
  5471. default:
  5472. ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
  5473. ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
  5474. WARN_ON_ONCE(1);
  5475. }
  5476. /* fallthrough from high to low, to select all legal speeds: */
  5477. switch (maxspeed) {
  5478. case SPEED_10000:
  5479. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5480. 10000baseT_Full);
  5481. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5482. 10000baseT_Full);
  5483. case SPEED_1000:
  5484. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5485. 1000baseT_Full);
  5486. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5487. 1000baseT_Full);
  5488. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5489. 1000baseT_Half);
  5490. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5491. 1000baseT_Half);
  5492. case SPEED_100:
  5493. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5494. 100baseT_Full);
  5495. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5496. 100baseT_Full);
  5497. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5498. 100baseT_Half);
  5499. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5500. 100baseT_Half);
  5501. case SPEED_10:
  5502. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5503. 10baseT_Full);
  5504. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5505. 10baseT_Full);
  5506. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5507. 10baseT_Half);
  5508. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5509. 10baseT_Half);
  5510. /* end fallthrough */
  5511. break;
  5512. default:
  5513. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5514. 10baseT_Full);
  5515. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5516. 10baseT_Full);
  5517. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5518. 10baseT_Half);
  5519. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5520. 10baseT_Half);
  5521. WARN_ON_ONCE(1);
  5522. }
  5523. }
  5524. int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
  5525. struct ethtool_link_ksettings *cmd)
  5526. {
  5527. struct qeth_card *card = netdev->ml_priv;
  5528. enum qeth_link_types link_type;
  5529. struct carrier_info carrier_info;
  5530. int rc;
  5531. if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
  5532. link_type = QETH_LINK_TYPE_10GBIT_ETH;
  5533. else
  5534. link_type = card->info.link_type;
  5535. cmd->base.duplex = DUPLEX_FULL;
  5536. cmd->base.autoneg = AUTONEG_ENABLE;
  5537. cmd->base.phy_address = 0;
  5538. cmd->base.mdio_support = 0;
  5539. cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
  5540. cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
  5541. switch (link_type) {
  5542. case QETH_LINK_TYPE_FAST_ETH:
  5543. case QETH_LINK_TYPE_LANE_ETH100:
  5544. cmd->base.speed = SPEED_100;
  5545. cmd->base.port = PORT_TP;
  5546. break;
  5547. case QETH_LINK_TYPE_GBIT_ETH:
  5548. case QETH_LINK_TYPE_LANE_ETH1000:
  5549. cmd->base.speed = SPEED_1000;
  5550. cmd->base.port = PORT_FIBRE;
  5551. break;
  5552. case QETH_LINK_TYPE_10GBIT_ETH:
  5553. cmd->base.speed = SPEED_10000;
  5554. cmd->base.port = PORT_FIBRE;
  5555. break;
  5556. default:
  5557. cmd->base.speed = SPEED_10;
  5558. cmd->base.port = PORT_TP;
  5559. }
  5560. qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
  5561. /* Check if we can obtain more accurate information. */
  5562. /* If QUERY_CARD_INFO command is not supported or fails, */
  5563. /* just return the heuristics that was filled above. */
  5564. if (!qeth_card_hw_is_reachable(card))
  5565. return -ENODEV;
  5566. rc = qeth_query_card_info(card, &carrier_info);
  5567. if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
  5568. return 0;
  5569. if (rc) /* report error from the hardware operation */
  5570. return rc;
  5571. /* on success, fill in the information got from the hardware */
  5572. netdev_dbg(netdev,
  5573. "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
  5574. carrier_info.card_type,
  5575. carrier_info.port_mode,
  5576. carrier_info.port_speed);
  5577. /* Update attributes for which we've obtained more authoritative */
  5578. /* information, leave the rest the way they where filled above. */
  5579. switch (carrier_info.card_type) {
  5580. case CARD_INFO_TYPE_1G_COPPER_A:
  5581. case CARD_INFO_TYPE_1G_COPPER_B:
  5582. cmd->base.port = PORT_TP;
  5583. qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
  5584. break;
  5585. case CARD_INFO_TYPE_1G_FIBRE_A:
  5586. case CARD_INFO_TYPE_1G_FIBRE_B:
  5587. cmd->base.port = PORT_FIBRE;
  5588. qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
  5589. break;
  5590. case CARD_INFO_TYPE_10G_FIBRE_A:
  5591. case CARD_INFO_TYPE_10G_FIBRE_B:
  5592. cmd->base.port = PORT_FIBRE;
  5593. qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
  5594. break;
  5595. }
  5596. switch (carrier_info.port_mode) {
  5597. case CARD_INFO_PORTM_FULLDUPLEX:
  5598. cmd->base.duplex = DUPLEX_FULL;
  5599. break;
  5600. case CARD_INFO_PORTM_HALFDUPLEX:
  5601. cmd->base.duplex = DUPLEX_HALF;
  5602. break;
  5603. }
  5604. switch (carrier_info.port_speed) {
  5605. case CARD_INFO_PORTS_10M:
  5606. cmd->base.speed = SPEED_10;
  5607. break;
  5608. case CARD_INFO_PORTS_100M:
  5609. cmd->base.speed = SPEED_100;
  5610. break;
  5611. case CARD_INFO_PORTS_1G:
  5612. cmd->base.speed = SPEED_1000;
  5613. break;
  5614. case CARD_INFO_PORTS_10G:
  5615. cmd->base.speed = SPEED_10000;
  5616. break;
  5617. }
  5618. return 0;
  5619. }
  5620. EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
  5621. /* Callback to handle checksum offload command reply from OSA card.
  5622. * Verify that required features have been enabled on the card.
  5623. * Return error in hdr->return_code as this value is checked by caller.
  5624. *
  5625. * Always returns zero to indicate no further messages from the OSA card.
  5626. */
  5627. static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
  5628. struct qeth_reply *reply,
  5629. unsigned long data)
  5630. {
  5631. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  5632. struct qeth_checksum_cmd *chksum_cb =
  5633. (struct qeth_checksum_cmd *)reply->param;
  5634. QETH_CARD_TEXT(card, 4, "chkdoccb");
  5635. if (cmd->hdr.return_code)
  5636. return 0;
  5637. memset(chksum_cb, 0, sizeof(*chksum_cb));
  5638. if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
  5639. chksum_cb->supported =
  5640. cmd->data.setassparms.data.chksum.supported;
  5641. QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
  5642. }
  5643. if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
  5644. chksum_cb->supported =
  5645. cmd->data.setassparms.data.chksum.supported;
  5646. chksum_cb->enabled =
  5647. cmd->data.setassparms.data.chksum.enabled;
  5648. QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
  5649. QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
  5650. }
  5651. return 0;
  5652. }
  5653. /* Send command to OSA card and check results. */
  5654. static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
  5655. enum qeth_ipa_funcs ipa_func,
  5656. __u16 cmd_code, long data,
  5657. struct qeth_checksum_cmd *chksum_cb)
  5658. {
  5659. struct qeth_cmd_buffer *iob;
  5660. int rc = -ENOMEM;
  5661. QETH_CARD_TEXT(card, 4, "chkdocmd");
  5662. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
  5663. sizeof(__u32), QETH_PROT_IPV4);
  5664. if (iob)
  5665. rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
  5666. qeth_ipa_checksum_run_cmd_cb,
  5667. chksum_cb);
  5668. return rc;
  5669. }
  5670. static int qeth_send_checksum_on(struct qeth_card *card, int cstype)
  5671. {
  5672. const __u32 required_features = QETH_IPA_CHECKSUM_IP_HDR |
  5673. QETH_IPA_CHECKSUM_UDP |
  5674. QETH_IPA_CHECKSUM_TCP;
  5675. struct qeth_checksum_cmd chksum_cb;
  5676. int rc;
  5677. rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
  5678. &chksum_cb);
  5679. if (!rc) {
  5680. if ((required_features & chksum_cb.supported) !=
  5681. required_features)
  5682. rc = -EIO;
  5683. else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
  5684. cstype == IPA_INBOUND_CHECKSUM)
  5685. dev_warn(&card->gdev->dev,
  5686. "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
  5687. QETH_CARD_IFNAME(card));
  5688. }
  5689. if (rc) {
  5690. qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
  5691. dev_warn(&card->gdev->dev,
  5692. "Starting HW checksumming for %s failed, using SW checksumming\n",
  5693. QETH_CARD_IFNAME(card));
  5694. return rc;
  5695. }
  5696. rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
  5697. chksum_cb.supported, &chksum_cb);
  5698. if (!rc) {
  5699. if ((required_features & chksum_cb.enabled) !=
  5700. required_features)
  5701. rc = -EIO;
  5702. }
  5703. if (rc) {
  5704. qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
  5705. dev_warn(&card->gdev->dev,
  5706. "Enabling HW checksumming for %s failed, using SW checksumming\n",
  5707. QETH_CARD_IFNAME(card));
  5708. return rc;
  5709. }
  5710. dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n",
  5711. cstype == IPA_INBOUND_CHECKSUM ? "in" : "out");
  5712. return 0;
  5713. }
  5714. static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype)
  5715. {
  5716. int rc = (on) ? qeth_send_checksum_on(card, cstype)
  5717. : qeth_send_simple_setassparms(card, cstype,
  5718. IPA_CMD_ASS_STOP, 0);
  5719. return rc ? -EIO : 0;
  5720. }
  5721. static int qeth_set_ipa_tso(struct qeth_card *card, int on)
  5722. {
  5723. int rc;
  5724. QETH_CARD_TEXT(card, 3, "sttso");
  5725. if (on) {
  5726. rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
  5727. IPA_CMD_ASS_START, 0);
  5728. if (rc) {
  5729. dev_warn(&card->gdev->dev,
  5730. "Starting outbound TCP segmentation offload for %s failed\n",
  5731. QETH_CARD_IFNAME(card));
  5732. return -EIO;
  5733. }
  5734. dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
  5735. } else {
  5736. rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
  5737. IPA_CMD_ASS_STOP, 0);
  5738. }
  5739. return rc;
  5740. }
  5741. /* try to restore device features on a device after recovery */
  5742. int qeth_recover_features(struct net_device *dev)
  5743. {
  5744. struct qeth_card *card = dev->ml_priv;
  5745. netdev_features_t recover = dev->features;
  5746. if (recover & NETIF_F_IP_CSUM) {
  5747. if (qeth_set_ipa_csum(card, 1, IPA_OUTBOUND_CHECKSUM))
  5748. recover ^= NETIF_F_IP_CSUM;
  5749. }
  5750. if (recover & NETIF_F_RXCSUM) {
  5751. if (qeth_set_ipa_csum(card, 1, IPA_INBOUND_CHECKSUM))
  5752. recover ^= NETIF_F_RXCSUM;
  5753. }
  5754. if (recover & NETIF_F_TSO) {
  5755. if (qeth_set_ipa_tso(card, 1))
  5756. recover ^= NETIF_F_TSO;
  5757. }
  5758. if (recover == dev->features)
  5759. return 0;
  5760. dev_warn(&card->gdev->dev,
  5761. "Device recovery failed to restore all offload features\n");
  5762. dev->features = recover;
  5763. return -EIO;
  5764. }
  5765. EXPORT_SYMBOL_GPL(qeth_recover_features);
  5766. int qeth_set_features(struct net_device *dev, netdev_features_t features)
  5767. {
  5768. struct qeth_card *card = dev->ml_priv;
  5769. netdev_features_t changed = dev->features ^ features;
  5770. int rc = 0;
  5771. QETH_DBF_TEXT(SETUP, 2, "setfeat");
  5772. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5773. if ((changed & NETIF_F_IP_CSUM)) {
  5774. rc = qeth_set_ipa_csum(card,
  5775. features & NETIF_F_IP_CSUM ? 1 : 0,
  5776. IPA_OUTBOUND_CHECKSUM);
  5777. if (rc)
  5778. changed ^= NETIF_F_IP_CSUM;
  5779. }
  5780. if ((changed & NETIF_F_RXCSUM)) {
  5781. rc = qeth_set_ipa_csum(card,
  5782. features & NETIF_F_RXCSUM ? 1 : 0,
  5783. IPA_INBOUND_CHECKSUM);
  5784. if (rc)
  5785. changed ^= NETIF_F_RXCSUM;
  5786. }
  5787. if ((changed & NETIF_F_TSO)) {
  5788. rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
  5789. if (rc)
  5790. changed ^= NETIF_F_TSO;
  5791. }
  5792. /* everything changed successfully? */
  5793. if ((dev->features ^ features) == changed)
  5794. return 0;
  5795. /* something went wrong. save changed features and return error */
  5796. dev->features ^= changed;
  5797. return -EIO;
  5798. }
  5799. EXPORT_SYMBOL_GPL(qeth_set_features);
  5800. netdev_features_t qeth_fix_features(struct net_device *dev,
  5801. netdev_features_t features)
  5802. {
  5803. struct qeth_card *card = dev->ml_priv;
  5804. QETH_DBF_TEXT(SETUP, 2, "fixfeat");
  5805. if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
  5806. features &= ~NETIF_F_IP_CSUM;
  5807. if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
  5808. features &= ~NETIF_F_RXCSUM;
  5809. if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
  5810. features &= ~NETIF_F_TSO;
  5811. /* if the card isn't up, remove features that require hw changes */
  5812. if (card->state == CARD_STATE_DOWN ||
  5813. card->state == CARD_STATE_RECOVER)
  5814. features = features & ~(NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
  5815. NETIF_F_TSO);
  5816. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5817. return features;
  5818. }
  5819. EXPORT_SYMBOL_GPL(qeth_fix_features);
  5820. static int __init qeth_core_init(void)
  5821. {
  5822. int rc;
  5823. pr_info("loading core functions\n");
  5824. INIT_LIST_HEAD(&qeth_core_card_list.list);
  5825. INIT_LIST_HEAD(&qeth_dbf_list);
  5826. rwlock_init(&qeth_core_card_list.rwlock);
  5827. mutex_init(&qeth_mod_mutex);
  5828. qeth_wq = create_singlethread_workqueue("qeth_wq");
  5829. rc = qeth_register_dbf_views();
  5830. if (rc)
  5831. goto out_err;
  5832. qeth_core_root_dev = root_device_register("qeth");
  5833. rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
  5834. if (rc)
  5835. goto register_err;
  5836. qeth_core_header_cache = kmem_cache_create("qeth_hdr",
  5837. sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
  5838. if (!qeth_core_header_cache) {
  5839. rc = -ENOMEM;
  5840. goto slab_err;
  5841. }
  5842. qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
  5843. sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
  5844. if (!qeth_qdio_outbuf_cache) {
  5845. rc = -ENOMEM;
  5846. goto cqslab_err;
  5847. }
  5848. rc = ccw_driver_register(&qeth_ccw_driver);
  5849. if (rc)
  5850. goto ccw_err;
  5851. qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
  5852. rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
  5853. if (rc)
  5854. goto ccwgroup_err;
  5855. return 0;
  5856. ccwgroup_err:
  5857. ccw_driver_unregister(&qeth_ccw_driver);
  5858. ccw_err:
  5859. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5860. cqslab_err:
  5861. kmem_cache_destroy(qeth_core_header_cache);
  5862. slab_err:
  5863. root_device_unregister(qeth_core_root_dev);
  5864. register_err:
  5865. qeth_unregister_dbf_views();
  5866. out_err:
  5867. pr_err("Initializing the qeth device driver failed\n");
  5868. return rc;
  5869. }
  5870. static void __exit qeth_core_exit(void)
  5871. {
  5872. qeth_clear_dbf_list();
  5873. destroy_workqueue(qeth_wq);
  5874. ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
  5875. ccw_driver_unregister(&qeth_ccw_driver);
  5876. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5877. kmem_cache_destroy(qeth_core_header_cache);
  5878. root_device_unregister(qeth_core_root_dev);
  5879. qeth_unregister_dbf_views();
  5880. pr_info("core functions removed\n");
  5881. }
  5882. module_init(qeth_core_init);
  5883. module_exit(qeth_core_exit);
  5884. MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
  5885. MODULE_DESCRIPTION("qeth core functions");
  5886. MODULE_LICENSE("GPL");