ctcm_fsms.c 74 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299
  1. /*
  2. * Copyright IBM Corp. 2001, 2007
  3. * Authors: Fritz Elfert (felfert@millenux.com)
  4. * Peter Tiedemann (ptiedem@de.ibm.com)
  5. * MPC additions :
  6. * Belinda Thompson (belindat@us.ibm.com)
  7. * Andy Richter (richtera@us.ibm.com)
  8. */
  9. #undef DEBUG
  10. #undef DEBUGDATA
  11. #undef DEBUGCCW
  12. #define KMSG_COMPONENT "ctcm"
  13. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  14. #include <linux/module.h>
  15. #include <linux/init.h>
  16. #include <linux/kernel.h>
  17. #include <linux/slab.h>
  18. #include <linux/errno.h>
  19. #include <linux/types.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/timer.h>
  22. #include <linux/bitops.h>
  23. #include <linux/signal.h>
  24. #include <linux/string.h>
  25. #include <linux/ip.h>
  26. #include <linux/if_arp.h>
  27. #include <linux/tcp.h>
  28. #include <linux/skbuff.h>
  29. #include <linux/ctype.h>
  30. #include <net/dst.h>
  31. #include <linux/io.h>
  32. #include <asm/ccwdev.h>
  33. #include <asm/ccwgroup.h>
  34. #include <linux/uaccess.h>
  35. #include <asm/idals.h>
  36. #include "fsm.h"
  37. #include "ctcm_dbug.h"
  38. #include "ctcm_main.h"
  39. #include "ctcm_fsms.h"
  40. const char *dev_state_names[] = {
  41. [DEV_STATE_STOPPED] = "Stopped",
  42. [DEV_STATE_STARTWAIT_RXTX] = "StartWait RXTX",
  43. [DEV_STATE_STARTWAIT_RX] = "StartWait RX",
  44. [DEV_STATE_STARTWAIT_TX] = "StartWait TX",
  45. [DEV_STATE_STOPWAIT_RXTX] = "StopWait RXTX",
  46. [DEV_STATE_STOPWAIT_RX] = "StopWait RX",
  47. [DEV_STATE_STOPWAIT_TX] = "StopWait TX",
  48. [DEV_STATE_RUNNING] = "Running",
  49. };
  50. const char *dev_event_names[] = {
  51. [DEV_EVENT_START] = "Start",
  52. [DEV_EVENT_STOP] = "Stop",
  53. [DEV_EVENT_RXUP] = "RX up",
  54. [DEV_EVENT_TXUP] = "TX up",
  55. [DEV_EVENT_RXDOWN] = "RX down",
  56. [DEV_EVENT_TXDOWN] = "TX down",
  57. [DEV_EVENT_RESTART] = "Restart",
  58. };
  59. const char *ctc_ch_event_names[] = {
  60. [CTC_EVENT_IO_SUCCESS] = "ccw_device success",
  61. [CTC_EVENT_IO_EBUSY] = "ccw_device busy",
  62. [CTC_EVENT_IO_ENODEV] = "ccw_device enodev",
  63. [CTC_EVENT_IO_UNKNOWN] = "ccw_device unknown",
  64. [CTC_EVENT_ATTNBUSY] = "Status ATTN & BUSY",
  65. [CTC_EVENT_ATTN] = "Status ATTN",
  66. [CTC_EVENT_BUSY] = "Status BUSY",
  67. [CTC_EVENT_UC_RCRESET] = "Unit check remote reset",
  68. [CTC_EVENT_UC_RSRESET] = "Unit check remote system reset",
  69. [CTC_EVENT_UC_TXTIMEOUT] = "Unit check TX timeout",
  70. [CTC_EVENT_UC_TXPARITY] = "Unit check TX parity",
  71. [CTC_EVENT_UC_HWFAIL] = "Unit check Hardware failure",
  72. [CTC_EVENT_UC_RXPARITY] = "Unit check RX parity",
  73. [CTC_EVENT_UC_ZERO] = "Unit check ZERO",
  74. [CTC_EVENT_UC_UNKNOWN] = "Unit check Unknown",
  75. [CTC_EVENT_SC_UNKNOWN] = "SubChannel check Unknown",
  76. [CTC_EVENT_MC_FAIL] = "Machine check failure",
  77. [CTC_EVENT_MC_GOOD] = "Machine check operational",
  78. [CTC_EVENT_IRQ] = "IRQ normal",
  79. [CTC_EVENT_FINSTAT] = "IRQ final",
  80. [CTC_EVENT_TIMER] = "Timer",
  81. [CTC_EVENT_START] = "Start",
  82. [CTC_EVENT_STOP] = "Stop",
  83. /*
  84. * additional MPC events
  85. */
  86. [CTC_EVENT_SEND_XID] = "XID Exchange",
  87. [CTC_EVENT_RSWEEP_TIMER] = "MPC Group Sweep Timer",
  88. };
  89. const char *ctc_ch_state_names[] = {
  90. [CTC_STATE_IDLE] = "Idle",
  91. [CTC_STATE_STOPPED] = "Stopped",
  92. [CTC_STATE_STARTWAIT] = "StartWait",
  93. [CTC_STATE_STARTRETRY] = "StartRetry",
  94. [CTC_STATE_SETUPWAIT] = "SetupWait",
  95. [CTC_STATE_RXINIT] = "RX init",
  96. [CTC_STATE_TXINIT] = "TX init",
  97. [CTC_STATE_RX] = "RX",
  98. [CTC_STATE_TX] = "TX",
  99. [CTC_STATE_RXIDLE] = "RX idle",
  100. [CTC_STATE_TXIDLE] = "TX idle",
  101. [CTC_STATE_RXERR] = "RX error",
  102. [CTC_STATE_TXERR] = "TX error",
  103. [CTC_STATE_TERM] = "Terminating",
  104. [CTC_STATE_DTERM] = "Restarting",
  105. [CTC_STATE_NOTOP] = "Not operational",
  106. /*
  107. * additional MPC states
  108. */
  109. [CH_XID0_PENDING] = "Pending XID0 Start",
  110. [CH_XID0_INPROGRESS] = "In XID0 Negotiations ",
  111. [CH_XID7_PENDING] = "Pending XID7 P1 Start",
  112. [CH_XID7_PENDING1] = "Active XID7 P1 Exchange ",
  113. [CH_XID7_PENDING2] = "Pending XID7 P2 Start ",
  114. [CH_XID7_PENDING3] = "Active XID7 P2 Exchange ",
  115. [CH_XID7_PENDING4] = "XID7 Complete - Pending READY ",
  116. };
  117. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg);
  118. /*
  119. * ----- static ctcm actions for channel statemachine -----
  120. *
  121. */
  122. static void chx_txdone(fsm_instance *fi, int event, void *arg);
  123. static void chx_rx(fsm_instance *fi, int event, void *arg);
  124. static void chx_rxidle(fsm_instance *fi, int event, void *arg);
  125. static void chx_firstio(fsm_instance *fi, int event, void *arg);
  126. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  127. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  128. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  129. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  130. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  131. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  132. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  133. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  134. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  135. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  136. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  137. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  138. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  139. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  140. /*
  141. * ----- static ctcmpc actions for ctcmpc channel statemachine -----
  142. *
  143. */
  144. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg);
  145. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg);
  146. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg);
  147. /* shared :
  148. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  149. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  150. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  151. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  152. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  153. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  154. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  155. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  156. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  157. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  158. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  159. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  160. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  161. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  162. */
  163. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg);
  164. static void ctcmpc_chx_attnbusy(fsm_instance *, int, void *);
  165. static void ctcmpc_chx_resend(fsm_instance *, int, void *);
  166. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg);
  167. /**
  168. * Check return code of a preceding ccw_device call, halt_IO etc...
  169. *
  170. * ch : The channel, the error belongs to.
  171. * Returns the error code (!= 0) to inspect.
  172. */
  173. void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg)
  174. {
  175. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  176. "%s(%s): %s: %04x\n",
  177. CTCM_FUNTAIL, ch->id, msg, rc);
  178. switch (rc) {
  179. case -EBUSY:
  180. pr_info("%s: The communication peer is busy\n",
  181. ch->id);
  182. fsm_event(ch->fsm, CTC_EVENT_IO_EBUSY, ch);
  183. break;
  184. case -ENODEV:
  185. pr_err("%s: The specified target device is not valid\n",
  186. ch->id);
  187. fsm_event(ch->fsm, CTC_EVENT_IO_ENODEV, ch);
  188. break;
  189. default:
  190. pr_err("An I/O operation resulted in error %04x\n",
  191. rc);
  192. fsm_event(ch->fsm, CTC_EVENT_IO_UNKNOWN, ch);
  193. }
  194. }
  195. void ctcm_purge_skb_queue(struct sk_buff_head *q)
  196. {
  197. struct sk_buff *skb;
  198. CTCM_DBF_TEXT(TRACE, CTC_DBF_DEBUG, __func__);
  199. while ((skb = skb_dequeue(q))) {
  200. refcount_dec(&skb->users);
  201. dev_kfree_skb_any(skb);
  202. }
  203. }
  204. /**
  205. * NOP action for statemachines
  206. */
  207. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg)
  208. {
  209. }
  210. /*
  211. * Actions for channel - statemachines.
  212. */
  213. /**
  214. * Normal data has been send. Free the corresponding
  215. * skb (it's in io_queue), reset dev->tbusy and
  216. * revert to idle state.
  217. *
  218. * fi An instance of a channel statemachine.
  219. * event The event, just happened.
  220. * arg Generic pointer, casted from channel * upon call.
  221. */
  222. static void chx_txdone(fsm_instance *fi, int event, void *arg)
  223. {
  224. struct channel *ch = arg;
  225. struct net_device *dev = ch->netdev;
  226. struct ctcm_priv *priv = dev->ml_priv;
  227. struct sk_buff *skb;
  228. int first = 1;
  229. int i;
  230. unsigned long duration;
  231. unsigned long done_stamp = jiffies;
  232. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  233. duration = done_stamp - ch->prof.send_stamp;
  234. if (duration > ch->prof.tx_time)
  235. ch->prof.tx_time = duration;
  236. if (ch->irb->scsw.cmd.count != 0)
  237. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  238. "%s(%s): TX not complete, remaining %d bytes",
  239. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  240. fsm_deltimer(&ch->timer);
  241. while ((skb = skb_dequeue(&ch->io_queue))) {
  242. priv->stats.tx_packets++;
  243. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  244. if (first) {
  245. priv->stats.tx_bytes += 2;
  246. first = 0;
  247. }
  248. refcount_dec(&skb->users);
  249. dev_kfree_skb_irq(skb);
  250. }
  251. spin_lock(&ch->collect_lock);
  252. clear_normalized_cda(&ch->ccw[4]);
  253. if (ch->collect_len > 0) {
  254. int rc;
  255. if (ctcm_checkalloc_buffer(ch)) {
  256. spin_unlock(&ch->collect_lock);
  257. return;
  258. }
  259. ch->trans_skb->data = ch->trans_skb_data;
  260. skb_reset_tail_pointer(ch->trans_skb);
  261. ch->trans_skb->len = 0;
  262. if (ch->prof.maxmulti < (ch->collect_len + 2))
  263. ch->prof.maxmulti = ch->collect_len + 2;
  264. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  265. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  266. *((__u16 *)skb_put(ch->trans_skb, 2)) = ch->collect_len + 2;
  267. i = 0;
  268. while ((skb = skb_dequeue(&ch->collect_queue))) {
  269. skb_copy_from_linear_data(skb,
  270. skb_put(ch->trans_skb, skb->len), skb->len);
  271. priv->stats.tx_packets++;
  272. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  273. refcount_dec(&skb->users);
  274. dev_kfree_skb_irq(skb);
  275. i++;
  276. }
  277. ch->collect_len = 0;
  278. spin_unlock(&ch->collect_lock);
  279. ch->ccw[1].count = ch->trans_skb->len;
  280. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  281. ch->prof.send_stamp = jiffies;
  282. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  283. (unsigned long)ch, 0xff, 0);
  284. ch->prof.doios_multi++;
  285. if (rc != 0) {
  286. priv->stats.tx_dropped += i;
  287. priv->stats.tx_errors += i;
  288. fsm_deltimer(&ch->timer);
  289. ctcm_ccw_check_rc(ch, rc, "chained TX");
  290. }
  291. } else {
  292. spin_unlock(&ch->collect_lock);
  293. fsm_newstate(fi, CTC_STATE_TXIDLE);
  294. }
  295. ctcm_clear_busy_do(dev);
  296. }
  297. /**
  298. * Initial data is sent.
  299. * Notify device statemachine that we are up and
  300. * running.
  301. *
  302. * fi An instance of a channel statemachine.
  303. * event The event, just happened.
  304. * arg Generic pointer, casted from channel * upon call.
  305. */
  306. void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg)
  307. {
  308. struct channel *ch = arg;
  309. struct net_device *dev = ch->netdev;
  310. struct ctcm_priv *priv = dev->ml_priv;
  311. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  312. fsm_deltimer(&ch->timer);
  313. fsm_newstate(fi, CTC_STATE_TXIDLE);
  314. fsm_event(priv->fsm, DEV_EVENT_TXUP, ch->netdev);
  315. }
  316. /**
  317. * Got normal data, check for sanity, queue it up, allocate new buffer
  318. * trigger bottom half, and initiate next read.
  319. *
  320. * fi An instance of a channel statemachine.
  321. * event The event, just happened.
  322. * arg Generic pointer, casted from channel * upon call.
  323. */
  324. static void chx_rx(fsm_instance *fi, int event, void *arg)
  325. {
  326. struct channel *ch = arg;
  327. struct net_device *dev = ch->netdev;
  328. struct ctcm_priv *priv = dev->ml_priv;
  329. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  330. struct sk_buff *skb = ch->trans_skb;
  331. __u16 block_len = *((__u16 *)skb->data);
  332. int check_len;
  333. int rc;
  334. fsm_deltimer(&ch->timer);
  335. if (len < 8) {
  336. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  337. "%s(%s): got packet with length %d < 8\n",
  338. CTCM_FUNTAIL, dev->name, len);
  339. priv->stats.rx_dropped++;
  340. priv->stats.rx_length_errors++;
  341. goto again;
  342. }
  343. if (len > ch->max_bufsize) {
  344. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  345. "%s(%s): got packet with length %d > %d\n",
  346. CTCM_FUNTAIL, dev->name, len, ch->max_bufsize);
  347. priv->stats.rx_dropped++;
  348. priv->stats.rx_length_errors++;
  349. goto again;
  350. }
  351. /*
  352. * VM TCP seems to have a bug sending 2 trailing bytes of garbage.
  353. */
  354. switch (ch->protocol) {
  355. case CTCM_PROTO_S390:
  356. case CTCM_PROTO_OS390:
  357. check_len = block_len + 2;
  358. break;
  359. default:
  360. check_len = block_len;
  361. break;
  362. }
  363. if ((len < block_len) || (len > check_len)) {
  364. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  365. "%s(%s): got block length %d != rx length %d\n",
  366. CTCM_FUNTAIL, dev->name, block_len, len);
  367. if (do_debug)
  368. ctcmpc_dump_skb(skb, 0);
  369. *((__u16 *)skb->data) = len;
  370. priv->stats.rx_dropped++;
  371. priv->stats.rx_length_errors++;
  372. goto again;
  373. }
  374. if (block_len > 2) {
  375. *((__u16 *)skb->data) = block_len - 2;
  376. ctcm_unpack_skb(ch, skb);
  377. }
  378. again:
  379. skb->data = ch->trans_skb_data;
  380. skb_reset_tail_pointer(skb);
  381. skb->len = 0;
  382. if (ctcm_checkalloc_buffer(ch))
  383. return;
  384. ch->ccw[1].count = ch->max_bufsize;
  385. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  386. (unsigned long)ch, 0xff, 0);
  387. if (rc != 0)
  388. ctcm_ccw_check_rc(ch, rc, "normal RX");
  389. }
  390. /**
  391. * Initialize connection by sending a __u16 of value 0.
  392. *
  393. * fi An instance of a channel statemachine.
  394. * event The event, just happened.
  395. * arg Generic pointer, casted from channel * upon call.
  396. */
  397. static void chx_firstio(fsm_instance *fi, int event, void *arg)
  398. {
  399. int rc;
  400. struct channel *ch = arg;
  401. int fsmstate = fsm_getstate(fi);
  402. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  403. "%s(%s) : %02x",
  404. CTCM_FUNTAIL, ch->id, fsmstate);
  405. ch->sense_rc = 0; /* reset unit check report control */
  406. if (fsmstate == CTC_STATE_TXIDLE)
  407. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  408. "%s(%s): remote side issued READ?, init.\n",
  409. CTCM_FUNTAIL, ch->id);
  410. fsm_deltimer(&ch->timer);
  411. if (ctcm_checkalloc_buffer(ch))
  412. return;
  413. if ((fsmstate == CTC_STATE_SETUPWAIT) &&
  414. (ch->protocol == CTCM_PROTO_OS390)) {
  415. /* OS/390 resp. z/OS */
  416. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  417. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  418. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC,
  419. CTC_EVENT_TIMER, ch);
  420. chx_rxidle(fi, event, arg);
  421. } else {
  422. struct net_device *dev = ch->netdev;
  423. struct ctcm_priv *priv = dev->ml_priv;
  424. fsm_newstate(fi, CTC_STATE_TXIDLE);
  425. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  426. }
  427. return;
  428. }
  429. /*
  430. * Don't setup a timer for receiving the initial RX frame
  431. * if in compatibility mode, since VM TCP delays the initial
  432. * frame until it has some data to send.
  433. */
  434. if ((CHANNEL_DIRECTION(ch->flags) == CTCM_WRITE) ||
  435. (ch->protocol != CTCM_PROTO_S390))
  436. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  437. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  438. ch->ccw[1].count = 2; /* Transfer only length */
  439. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)
  440. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  441. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  442. (unsigned long)ch, 0xff, 0);
  443. if (rc != 0) {
  444. fsm_deltimer(&ch->timer);
  445. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  446. ctcm_ccw_check_rc(ch, rc, "init IO");
  447. }
  448. /*
  449. * If in compatibility mode since we don't setup a timer, we
  450. * also signal RX channel up immediately. This enables us
  451. * to send packets early which in turn usually triggers some
  452. * reply from VM TCP which brings up the RX channel to it's
  453. * final state.
  454. */
  455. if ((CHANNEL_DIRECTION(ch->flags) == CTCM_READ) &&
  456. (ch->protocol == CTCM_PROTO_S390)) {
  457. struct net_device *dev = ch->netdev;
  458. struct ctcm_priv *priv = dev->ml_priv;
  459. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  460. }
  461. }
  462. /**
  463. * Got initial data, check it. If OK,
  464. * notify device statemachine that we are up and
  465. * running.
  466. *
  467. * fi An instance of a channel statemachine.
  468. * event The event, just happened.
  469. * arg Generic pointer, casted from channel * upon call.
  470. */
  471. static void chx_rxidle(fsm_instance *fi, int event, void *arg)
  472. {
  473. struct channel *ch = arg;
  474. struct net_device *dev = ch->netdev;
  475. struct ctcm_priv *priv = dev->ml_priv;
  476. __u16 buflen;
  477. int rc;
  478. fsm_deltimer(&ch->timer);
  479. buflen = *((__u16 *)ch->trans_skb->data);
  480. CTCM_PR_DEBUG("%s: %s: Initial RX count = %d\n",
  481. __func__, dev->name, buflen);
  482. if (buflen >= CTCM_INITIAL_BLOCKLEN) {
  483. if (ctcm_checkalloc_buffer(ch))
  484. return;
  485. ch->ccw[1].count = ch->max_bufsize;
  486. fsm_newstate(fi, CTC_STATE_RXIDLE);
  487. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  488. (unsigned long)ch, 0xff, 0);
  489. if (rc != 0) {
  490. fsm_newstate(fi, CTC_STATE_RXINIT);
  491. ctcm_ccw_check_rc(ch, rc, "initial RX");
  492. } else
  493. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  494. } else {
  495. CTCM_PR_DEBUG("%s: %s: Initial RX count %d not %d\n",
  496. __func__, dev->name,
  497. buflen, CTCM_INITIAL_BLOCKLEN);
  498. chx_firstio(fi, event, arg);
  499. }
  500. }
  501. /**
  502. * Set channel into extended mode.
  503. *
  504. * fi An instance of a channel statemachine.
  505. * event The event, just happened.
  506. * arg Generic pointer, casted from channel * upon call.
  507. */
  508. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg)
  509. {
  510. struct channel *ch = arg;
  511. int rc;
  512. unsigned long saveflags = 0;
  513. int timeout = CTCM_TIME_5_SEC;
  514. fsm_deltimer(&ch->timer);
  515. if (IS_MPC(ch)) {
  516. timeout = 1500;
  517. CTCM_PR_DEBUG("enter %s: cp=%i ch=0x%p id=%s\n",
  518. __func__, smp_processor_id(), ch, ch->id);
  519. }
  520. fsm_addtimer(&ch->timer, timeout, CTC_EVENT_TIMER, ch);
  521. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  522. CTCM_CCW_DUMP((char *)&ch->ccw[6], sizeof(struct ccw1) * 2);
  523. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  524. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  525. /* Such conditional locking is undeterministic in
  526. * static view. => ignore sparse warnings here. */
  527. rc = ccw_device_start(ch->cdev, &ch->ccw[6],
  528. (unsigned long)ch, 0xff, 0);
  529. if (event == CTC_EVENT_TIMER) /* see above comments */
  530. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  531. if (rc != 0) {
  532. fsm_deltimer(&ch->timer);
  533. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  534. ctcm_ccw_check_rc(ch, rc, "set Mode");
  535. } else
  536. ch->retry = 0;
  537. }
  538. /**
  539. * Setup channel.
  540. *
  541. * fi An instance of a channel statemachine.
  542. * event The event, just happened.
  543. * arg Generic pointer, casted from channel * upon call.
  544. */
  545. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg)
  546. {
  547. struct channel *ch = arg;
  548. unsigned long saveflags;
  549. int rc;
  550. CTCM_DBF_TEXT_(SETUP, CTC_DBF_INFO, "%s(%s): %s",
  551. CTCM_FUNTAIL, ch->id,
  552. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ? "RX" : "TX");
  553. if (ch->trans_skb != NULL) {
  554. clear_normalized_cda(&ch->ccw[1]);
  555. dev_kfree_skb(ch->trans_skb);
  556. ch->trans_skb = NULL;
  557. }
  558. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  559. ch->ccw[1].cmd_code = CCW_CMD_READ;
  560. ch->ccw[1].flags = CCW_FLAG_SLI;
  561. ch->ccw[1].count = 0;
  562. } else {
  563. ch->ccw[1].cmd_code = CCW_CMD_WRITE;
  564. ch->ccw[1].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  565. ch->ccw[1].count = 0;
  566. }
  567. if (ctcm_checkalloc_buffer(ch)) {
  568. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  569. "%s(%s): %s trans_skb alloc delayed "
  570. "until first transfer",
  571. CTCM_FUNTAIL, ch->id,
  572. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ?
  573. "RX" : "TX");
  574. }
  575. ch->ccw[0].cmd_code = CCW_CMD_PREPARE;
  576. ch->ccw[0].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  577. ch->ccw[0].count = 0;
  578. ch->ccw[0].cda = 0;
  579. ch->ccw[2].cmd_code = CCW_CMD_NOOP; /* jointed CE + DE */
  580. ch->ccw[2].flags = CCW_FLAG_SLI;
  581. ch->ccw[2].count = 0;
  582. ch->ccw[2].cda = 0;
  583. memcpy(&ch->ccw[3], &ch->ccw[0], sizeof(struct ccw1) * 3);
  584. ch->ccw[4].cda = 0;
  585. ch->ccw[4].flags &= ~CCW_FLAG_IDA;
  586. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  587. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  588. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  589. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  590. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  591. if (rc != 0) {
  592. if (rc != -EBUSY)
  593. fsm_deltimer(&ch->timer);
  594. ctcm_ccw_check_rc(ch, rc, "initial HaltIO");
  595. }
  596. }
  597. /**
  598. * Shutdown a channel.
  599. *
  600. * fi An instance of a channel statemachine.
  601. * event The event, just happened.
  602. * arg Generic pointer, casted from channel * upon call.
  603. */
  604. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg)
  605. {
  606. struct channel *ch = arg;
  607. unsigned long saveflags = 0;
  608. int rc;
  609. int oldstate;
  610. fsm_deltimer(&ch->timer);
  611. if (IS_MPC(ch))
  612. fsm_deltimer(&ch->sweep_timer);
  613. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  614. if (event == CTC_EVENT_STOP) /* only for STOP not yet locked */
  615. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  616. /* Such conditional locking is undeterministic in
  617. * static view. => ignore sparse warnings here. */
  618. oldstate = fsm_getstate(fi);
  619. fsm_newstate(fi, CTC_STATE_TERM);
  620. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  621. if (event == CTC_EVENT_STOP)
  622. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  623. /* see remark above about conditional locking */
  624. if (rc != 0 && rc != -EBUSY) {
  625. fsm_deltimer(&ch->timer);
  626. if (event != CTC_EVENT_STOP) {
  627. fsm_newstate(fi, oldstate);
  628. ctcm_ccw_check_rc(ch, rc, (char *)__func__);
  629. }
  630. }
  631. }
  632. /**
  633. * Cleanup helper for chx_fail and chx_stopped
  634. * cleanup channels queue and notify interface statemachine.
  635. *
  636. * fi An instance of a channel statemachine.
  637. * state The next state (depending on caller).
  638. * ch The channel to operate on.
  639. */
  640. static void ctcm_chx_cleanup(fsm_instance *fi, int state,
  641. struct channel *ch)
  642. {
  643. struct net_device *dev = ch->netdev;
  644. struct ctcm_priv *priv = dev->ml_priv;
  645. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  646. "%s(%s): %s[%d]\n",
  647. CTCM_FUNTAIL, dev->name, ch->id, state);
  648. fsm_deltimer(&ch->timer);
  649. if (IS_MPC(ch))
  650. fsm_deltimer(&ch->sweep_timer);
  651. fsm_newstate(fi, state);
  652. if (state == CTC_STATE_STOPPED && ch->trans_skb != NULL) {
  653. clear_normalized_cda(&ch->ccw[1]);
  654. dev_kfree_skb_any(ch->trans_skb);
  655. ch->trans_skb = NULL;
  656. }
  657. ch->th_seg = 0x00;
  658. ch->th_seq_num = 0x00;
  659. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  660. skb_queue_purge(&ch->io_queue);
  661. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  662. } else {
  663. ctcm_purge_skb_queue(&ch->io_queue);
  664. if (IS_MPC(ch))
  665. ctcm_purge_skb_queue(&ch->sweep_queue);
  666. spin_lock(&ch->collect_lock);
  667. ctcm_purge_skb_queue(&ch->collect_queue);
  668. ch->collect_len = 0;
  669. spin_unlock(&ch->collect_lock);
  670. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  671. }
  672. }
  673. /**
  674. * A channel has successfully been halted.
  675. * Cleanup it's queue and notify interface statemachine.
  676. *
  677. * fi An instance of a channel statemachine.
  678. * event The event, just happened.
  679. * arg Generic pointer, casted from channel * upon call.
  680. */
  681. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg)
  682. {
  683. ctcm_chx_cleanup(fi, CTC_STATE_STOPPED, arg);
  684. }
  685. /**
  686. * A stop command from device statemachine arrived and we are in
  687. * not operational mode. Set state to stopped.
  688. *
  689. * fi An instance of a channel statemachine.
  690. * event The event, just happened.
  691. * arg Generic pointer, casted from channel * upon call.
  692. */
  693. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg)
  694. {
  695. fsm_newstate(fi, CTC_STATE_STOPPED);
  696. }
  697. /**
  698. * A machine check for no path, not operational status or gone device has
  699. * happened.
  700. * Cleanup queue and notify interface statemachine.
  701. *
  702. * fi An instance of a channel statemachine.
  703. * event The event, just happened.
  704. * arg Generic pointer, casted from channel * upon call.
  705. */
  706. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg)
  707. {
  708. ctcm_chx_cleanup(fi, CTC_STATE_NOTOP, arg);
  709. }
  710. /**
  711. * Handle error during setup of channel.
  712. *
  713. * fi An instance of a channel statemachine.
  714. * event The event, just happened.
  715. * arg Generic pointer, casted from channel * upon call.
  716. */
  717. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg)
  718. {
  719. struct channel *ch = arg;
  720. struct net_device *dev = ch->netdev;
  721. struct ctcm_priv *priv = dev->ml_priv;
  722. /*
  723. * Special case: Got UC_RCRESET on setmode.
  724. * This means that remote side isn't setup. In this case
  725. * simply retry after some 10 secs...
  726. */
  727. if ((fsm_getstate(fi) == CTC_STATE_SETUPWAIT) &&
  728. ((event == CTC_EVENT_UC_RCRESET) ||
  729. (event == CTC_EVENT_UC_RSRESET))) {
  730. fsm_newstate(fi, CTC_STATE_STARTRETRY);
  731. fsm_deltimer(&ch->timer);
  732. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  733. if (!IS_MPC(ch) &&
  734. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)) {
  735. int rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  736. if (rc != 0)
  737. ctcm_ccw_check_rc(ch, rc,
  738. "HaltIO in chx_setuperr");
  739. }
  740. return;
  741. }
  742. CTCM_DBF_TEXT_(ERROR, CTC_DBF_CRIT,
  743. "%s(%s) : %s error during %s channel setup state=%s\n",
  744. CTCM_FUNTAIL, dev->name, ctc_ch_event_names[event],
  745. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ? "RX" : "TX",
  746. fsm_getstate_str(fi));
  747. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  748. fsm_newstate(fi, CTC_STATE_RXERR);
  749. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  750. } else {
  751. fsm_newstate(fi, CTC_STATE_TXERR);
  752. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  753. }
  754. }
  755. /**
  756. * Restart a channel after an error.
  757. *
  758. * fi An instance of a channel statemachine.
  759. * event The event, just happened.
  760. * arg Generic pointer, casted from channel * upon call.
  761. */
  762. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg)
  763. {
  764. struct channel *ch = arg;
  765. struct net_device *dev = ch->netdev;
  766. unsigned long saveflags = 0;
  767. int oldstate;
  768. int rc;
  769. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  770. "%s: %s[%d] of %s\n",
  771. CTCM_FUNTAIL, ch->id, event, dev->name);
  772. fsm_deltimer(&ch->timer);
  773. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  774. oldstate = fsm_getstate(fi);
  775. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  776. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  777. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  778. /* Such conditional locking is a known problem for
  779. * sparse because its undeterministic in static view.
  780. * Warnings should be ignored here. */
  781. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  782. if (event == CTC_EVENT_TIMER)
  783. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  784. if (rc != 0) {
  785. if (rc != -EBUSY) {
  786. fsm_deltimer(&ch->timer);
  787. fsm_newstate(fi, oldstate);
  788. }
  789. ctcm_ccw_check_rc(ch, rc, "HaltIO in ctcm_chx_restart");
  790. }
  791. }
  792. /**
  793. * Handle error during RX initial handshake (exchange of
  794. * 0-length block header)
  795. *
  796. * fi An instance of a channel statemachine.
  797. * event The event, just happened.
  798. * arg Generic pointer, casted from channel * upon call.
  799. */
  800. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg)
  801. {
  802. struct channel *ch = arg;
  803. struct net_device *dev = ch->netdev;
  804. struct ctcm_priv *priv = dev->ml_priv;
  805. if (event == CTC_EVENT_TIMER) {
  806. if (!IS_MPCDEV(dev))
  807. /* TODO : check if MPC deletes timer somewhere */
  808. fsm_deltimer(&ch->timer);
  809. if (ch->retry++ < 3)
  810. ctcm_chx_restart(fi, event, arg);
  811. else {
  812. fsm_newstate(fi, CTC_STATE_RXERR);
  813. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  814. }
  815. } else {
  816. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  817. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  818. ctc_ch_event_names[event], fsm_getstate_str(fi));
  819. dev_warn(&dev->dev,
  820. "Initialization failed with RX/TX init handshake "
  821. "error %s\n", ctc_ch_event_names[event]);
  822. }
  823. }
  824. /**
  825. * Notify device statemachine if we gave up initialization
  826. * of RX channel.
  827. *
  828. * fi An instance of a channel statemachine.
  829. * event The event, just happened.
  830. * arg Generic pointer, casted from channel * upon call.
  831. */
  832. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg)
  833. {
  834. struct channel *ch = arg;
  835. struct net_device *dev = ch->netdev;
  836. struct ctcm_priv *priv = dev->ml_priv;
  837. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  838. "%s(%s): RX %s busy, init. fail",
  839. CTCM_FUNTAIL, dev->name, ch->id);
  840. fsm_newstate(fi, CTC_STATE_RXERR);
  841. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  842. }
  843. /**
  844. * Handle RX Unit check remote reset (remote disconnected)
  845. *
  846. * fi An instance of a channel statemachine.
  847. * event The event, just happened.
  848. * arg Generic pointer, casted from channel * upon call.
  849. */
  850. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg)
  851. {
  852. struct channel *ch = arg;
  853. struct channel *ch2;
  854. struct net_device *dev = ch->netdev;
  855. struct ctcm_priv *priv = dev->ml_priv;
  856. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  857. "%s: %s: remote disconnect - re-init ...",
  858. CTCM_FUNTAIL, dev->name);
  859. fsm_deltimer(&ch->timer);
  860. /*
  861. * Notify device statemachine
  862. */
  863. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  864. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  865. fsm_newstate(fi, CTC_STATE_DTERM);
  866. ch2 = priv->channel[CTCM_WRITE];
  867. fsm_newstate(ch2->fsm, CTC_STATE_DTERM);
  868. ccw_device_halt(ch->cdev, (unsigned long)ch);
  869. ccw_device_halt(ch2->cdev, (unsigned long)ch2);
  870. }
  871. /**
  872. * Handle error during TX channel initialization.
  873. *
  874. * fi An instance of a channel statemachine.
  875. * event The event, just happened.
  876. * arg Generic pointer, casted from channel * upon call.
  877. */
  878. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg)
  879. {
  880. struct channel *ch = arg;
  881. struct net_device *dev = ch->netdev;
  882. struct ctcm_priv *priv = dev->ml_priv;
  883. if (event == CTC_EVENT_TIMER) {
  884. fsm_deltimer(&ch->timer);
  885. if (ch->retry++ < 3)
  886. ctcm_chx_restart(fi, event, arg);
  887. else {
  888. fsm_newstate(fi, CTC_STATE_TXERR);
  889. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  890. }
  891. } else {
  892. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  893. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  894. ctc_ch_event_names[event], fsm_getstate_str(fi));
  895. dev_warn(&dev->dev,
  896. "Initialization failed with RX/TX init handshake "
  897. "error %s\n", ctc_ch_event_names[event]);
  898. }
  899. }
  900. /**
  901. * Handle TX timeout by retrying operation.
  902. *
  903. * fi An instance of a channel statemachine.
  904. * event The event, just happened.
  905. * arg Generic pointer, casted from channel * upon call.
  906. */
  907. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg)
  908. {
  909. struct channel *ch = arg;
  910. struct net_device *dev = ch->netdev;
  911. struct ctcm_priv *priv = dev->ml_priv;
  912. struct sk_buff *skb;
  913. CTCM_PR_DEBUG("Enter: %s: cp=%i ch=0x%p id=%s\n",
  914. __func__, smp_processor_id(), ch, ch->id);
  915. fsm_deltimer(&ch->timer);
  916. if (ch->retry++ > 3) {
  917. struct mpc_group *gptr = priv->mpcg;
  918. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  919. "%s: %s: retries exceeded",
  920. CTCM_FUNTAIL, ch->id);
  921. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  922. /* call restart if not MPC or if MPC and mpcg fsm is ready.
  923. use gptr as mpc indicator */
  924. if (!(gptr && (fsm_getstate(gptr->fsm) != MPCG_STATE_READY)))
  925. ctcm_chx_restart(fi, event, arg);
  926. goto done;
  927. }
  928. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  929. "%s : %s: retry %d",
  930. CTCM_FUNTAIL, ch->id, ch->retry);
  931. skb = skb_peek(&ch->io_queue);
  932. if (skb) {
  933. int rc = 0;
  934. unsigned long saveflags = 0;
  935. clear_normalized_cda(&ch->ccw[4]);
  936. ch->ccw[4].count = skb->len;
  937. if (set_normalized_cda(&ch->ccw[4], skb->data)) {
  938. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  939. "%s: %s: IDAL alloc failed",
  940. CTCM_FUNTAIL, ch->id);
  941. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  942. ctcm_chx_restart(fi, event, arg);
  943. goto done;
  944. }
  945. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  946. if (event == CTC_EVENT_TIMER) /* for TIMER not yet locked */
  947. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  948. /* Such conditional locking is a known problem for
  949. * sparse because its undeterministic in static view.
  950. * Warnings should be ignored here. */
  951. if (do_debug_ccw)
  952. ctcmpc_dumpit((char *)&ch->ccw[3],
  953. sizeof(struct ccw1) * 3);
  954. rc = ccw_device_start(ch->cdev, &ch->ccw[3],
  955. (unsigned long)ch, 0xff, 0);
  956. if (event == CTC_EVENT_TIMER)
  957. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev),
  958. saveflags);
  959. if (rc != 0) {
  960. fsm_deltimer(&ch->timer);
  961. ctcm_ccw_check_rc(ch, rc, "TX in chx_txretry");
  962. ctcm_purge_skb_queue(&ch->io_queue);
  963. }
  964. }
  965. done:
  966. return;
  967. }
  968. /**
  969. * Handle fatal errors during an I/O command.
  970. *
  971. * fi An instance of a channel statemachine.
  972. * event The event, just happened.
  973. * arg Generic pointer, casted from channel * upon call.
  974. */
  975. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg)
  976. {
  977. struct channel *ch = arg;
  978. struct net_device *dev = ch->netdev;
  979. struct ctcm_priv *priv = dev->ml_priv;
  980. int rd = CHANNEL_DIRECTION(ch->flags);
  981. fsm_deltimer(&ch->timer);
  982. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  983. "%s: %s: %s unrecoverable channel error",
  984. CTCM_FUNTAIL, ch->id, rd == CTCM_READ ? "RX" : "TX");
  985. if (IS_MPC(ch)) {
  986. priv->stats.tx_dropped++;
  987. priv->stats.tx_errors++;
  988. }
  989. if (rd == CTCM_READ) {
  990. fsm_newstate(fi, CTC_STATE_RXERR);
  991. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  992. } else {
  993. fsm_newstate(fi, CTC_STATE_TXERR);
  994. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  995. }
  996. }
  997. /*
  998. * The ctcm statemachine for a channel.
  999. */
  1000. const fsm_node ch_fsm[] = {
  1001. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  1002. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  1003. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1004. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1005. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  1006. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1007. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1008. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1009. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1010. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1011. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1012. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1013. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1014. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1015. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1016. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1017. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1018. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1019. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1020. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1021. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1022. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, chx_firstio },
  1023. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1024. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1025. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1026. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1027. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1028. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1029. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1030. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, chx_rxidle },
  1031. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1032. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1033. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1034. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1035. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1036. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, chx_firstio },
  1037. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1038. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1039. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1040. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, chx_rx },
  1041. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1042. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1043. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1044. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, chx_rx },
  1045. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1046. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1047. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1048. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1049. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1050. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1051. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1052. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1053. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1054. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1055. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, chx_firstio },
  1056. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1057. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1058. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1059. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1060. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1061. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1062. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1063. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1064. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1065. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1066. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1067. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1068. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1069. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1070. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1071. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1072. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1073. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1074. { CTC_STATE_TX, CTC_EVENT_FINSTAT, chx_txdone },
  1075. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_txretry },
  1076. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_txretry },
  1077. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1078. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1079. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1080. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1081. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1082. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1083. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1084. };
  1085. int ch_fsm_len = ARRAY_SIZE(ch_fsm);
  1086. /*
  1087. * MPC actions for mpc channel statemachine
  1088. * handling of MPC protocol requires extra
  1089. * statemachine and actions which are prefixed ctcmpc_ .
  1090. * The ctc_ch_states and ctc_ch_state_names,
  1091. * ctc_ch_events and ctc_ch_event_names share the ctcm definitions
  1092. * which are expanded by some elements.
  1093. */
  1094. /*
  1095. * Actions for mpc channel statemachine.
  1096. */
  1097. /**
  1098. * Normal data has been send. Free the corresponding
  1099. * skb (it's in io_queue), reset dev->tbusy and
  1100. * revert to idle state.
  1101. *
  1102. * fi An instance of a channel statemachine.
  1103. * event The event, just happened.
  1104. * arg Generic pointer, casted from channel * upon call.
  1105. */
  1106. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg)
  1107. {
  1108. struct channel *ch = arg;
  1109. struct net_device *dev = ch->netdev;
  1110. struct ctcm_priv *priv = dev->ml_priv;
  1111. struct mpc_group *grp = priv->mpcg;
  1112. struct sk_buff *skb;
  1113. int first = 1;
  1114. int i;
  1115. __u32 data_space;
  1116. unsigned long duration;
  1117. struct sk_buff *peekskb;
  1118. int rc;
  1119. struct th_header *header;
  1120. struct pdu *p_header;
  1121. unsigned long done_stamp = jiffies;
  1122. CTCM_PR_DEBUG("Enter %s: %s cp:%i\n",
  1123. __func__, dev->name, smp_processor_id());
  1124. duration = done_stamp - ch->prof.send_stamp;
  1125. if (duration > ch->prof.tx_time)
  1126. ch->prof.tx_time = duration;
  1127. if (ch->irb->scsw.cmd.count != 0)
  1128. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_DEBUG,
  1129. "%s(%s): TX not complete, remaining %d bytes",
  1130. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  1131. fsm_deltimer(&ch->timer);
  1132. while ((skb = skb_dequeue(&ch->io_queue))) {
  1133. priv->stats.tx_packets++;
  1134. priv->stats.tx_bytes += skb->len - TH_HEADER_LENGTH;
  1135. if (first) {
  1136. priv->stats.tx_bytes += 2;
  1137. first = 0;
  1138. }
  1139. refcount_dec(&skb->users);
  1140. dev_kfree_skb_irq(skb);
  1141. }
  1142. spin_lock(&ch->collect_lock);
  1143. clear_normalized_cda(&ch->ccw[4]);
  1144. if ((ch->collect_len <= 0) || (grp->in_sweep != 0)) {
  1145. spin_unlock(&ch->collect_lock);
  1146. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1147. goto done;
  1148. }
  1149. if (ctcm_checkalloc_buffer(ch)) {
  1150. spin_unlock(&ch->collect_lock);
  1151. goto done;
  1152. }
  1153. ch->trans_skb->data = ch->trans_skb_data;
  1154. skb_reset_tail_pointer(ch->trans_skb);
  1155. ch->trans_skb->len = 0;
  1156. if (ch->prof.maxmulti < (ch->collect_len + TH_HEADER_LENGTH))
  1157. ch->prof.maxmulti = ch->collect_len + TH_HEADER_LENGTH;
  1158. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  1159. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  1160. i = 0;
  1161. p_header = NULL;
  1162. data_space = grp->group_max_buflen - TH_HEADER_LENGTH;
  1163. CTCM_PR_DBGDATA("%s: building trans_skb from collect_q"
  1164. " data_space:%04x\n",
  1165. __func__, data_space);
  1166. while ((skb = skb_dequeue(&ch->collect_queue))) {
  1167. skb_put_data(ch->trans_skb, skb->data, skb->len);
  1168. p_header = (struct pdu *)
  1169. (skb_tail_pointer(ch->trans_skb) - skb->len);
  1170. p_header->pdu_flag = 0x00;
  1171. if (be16_to_cpu(skb->protocol) == ETH_P_SNAP)
  1172. p_header->pdu_flag |= 0x60;
  1173. else
  1174. p_header->pdu_flag |= 0x20;
  1175. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1176. __func__, ch->trans_skb->len);
  1177. CTCM_PR_DBGDATA("%s: pdu header and data for up"
  1178. " to 32 bytes sent to vtam\n", __func__);
  1179. CTCM_D3_DUMP((char *)p_header, min_t(int, skb->len, 32));
  1180. ch->collect_len -= skb->len;
  1181. data_space -= skb->len;
  1182. priv->stats.tx_packets++;
  1183. priv->stats.tx_bytes += skb->len;
  1184. refcount_dec(&skb->users);
  1185. dev_kfree_skb_any(skb);
  1186. peekskb = skb_peek(&ch->collect_queue);
  1187. if (peekskb->len > data_space)
  1188. break;
  1189. i++;
  1190. }
  1191. /* p_header points to the last one we handled */
  1192. if (p_header)
  1193. p_header->pdu_flag |= PDU_LAST; /*Say it's the last one*/
  1194. header = kzalloc(TH_HEADER_LENGTH, gfp_type());
  1195. if (!header) {
  1196. spin_unlock(&ch->collect_lock);
  1197. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1198. goto done;
  1199. }
  1200. header->th_ch_flag = TH_HAS_PDU; /* Normal data */
  1201. ch->th_seq_num++;
  1202. header->th_seq_num = ch->th_seq_num;
  1203. CTCM_PR_DBGDATA("%s: ToVTAM_th_seq= %08x\n" ,
  1204. __func__, ch->th_seq_num);
  1205. memcpy(skb_push(ch->trans_skb, TH_HEADER_LENGTH), header,
  1206. TH_HEADER_LENGTH); /* put the TH on the packet */
  1207. kfree(header);
  1208. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1209. __func__, ch->trans_skb->len);
  1210. CTCM_PR_DBGDATA("%s: up-to-50 bytes of trans_skb "
  1211. "data to vtam from collect_q\n", __func__);
  1212. CTCM_D3_DUMP((char *)ch->trans_skb->data,
  1213. min_t(int, ch->trans_skb->len, 50));
  1214. spin_unlock(&ch->collect_lock);
  1215. clear_normalized_cda(&ch->ccw[1]);
  1216. CTCM_PR_DBGDATA("ccwcda=0x%p data=0x%p\n",
  1217. (void *)(unsigned long)ch->ccw[1].cda,
  1218. ch->trans_skb->data);
  1219. ch->ccw[1].count = ch->max_bufsize;
  1220. if (set_normalized_cda(&ch->ccw[1], ch->trans_skb->data)) {
  1221. dev_kfree_skb_any(ch->trans_skb);
  1222. ch->trans_skb = NULL;
  1223. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_ERROR,
  1224. "%s: %s: IDAL alloc failed",
  1225. CTCM_FUNTAIL, ch->id);
  1226. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1227. return;
  1228. }
  1229. CTCM_PR_DBGDATA("ccwcda=0x%p data=0x%p\n",
  1230. (void *)(unsigned long)ch->ccw[1].cda,
  1231. ch->trans_skb->data);
  1232. ch->ccw[1].count = ch->trans_skb->len;
  1233. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  1234. ch->prof.send_stamp = jiffies;
  1235. if (do_debug_ccw)
  1236. ctcmpc_dumpit((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1237. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1238. (unsigned long)ch, 0xff, 0);
  1239. ch->prof.doios_multi++;
  1240. if (rc != 0) {
  1241. priv->stats.tx_dropped += i;
  1242. priv->stats.tx_errors += i;
  1243. fsm_deltimer(&ch->timer);
  1244. ctcm_ccw_check_rc(ch, rc, "chained TX");
  1245. }
  1246. done:
  1247. ctcm_clear_busy(dev);
  1248. return;
  1249. }
  1250. /**
  1251. * Got normal data, check for sanity, queue it up, allocate new buffer
  1252. * trigger bottom half, and initiate next read.
  1253. *
  1254. * fi An instance of a channel statemachine.
  1255. * event The event, just happened.
  1256. * arg Generic pointer, casted from channel * upon call.
  1257. */
  1258. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg)
  1259. {
  1260. struct channel *ch = arg;
  1261. struct net_device *dev = ch->netdev;
  1262. struct ctcm_priv *priv = dev->ml_priv;
  1263. struct mpc_group *grp = priv->mpcg;
  1264. struct sk_buff *skb = ch->trans_skb;
  1265. struct sk_buff *new_skb;
  1266. unsigned long saveflags = 0; /* avoids compiler warning */
  1267. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  1268. CTCM_PR_DEBUG("%s: %s: cp:%i %s maxbuf : %04x, len: %04x\n",
  1269. CTCM_FUNTAIL, dev->name, smp_processor_id(),
  1270. ch->id, ch->max_bufsize, len);
  1271. fsm_deltimer(&ch->timer);
  1272. if (skb == NULL) {
  1273. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1274. "%s(%s): TRANS_SKB = NULL",
  1275. CTCM_FUNTAIL, dev->name);
  1276. goto again;
  1277. }
  1278. if (len < TH_HEADER_LENGTH) {
  1279. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1280. "%s(%s): packet length %d to short",
  1281. CTCM_FUNTAIL, dev->name, len);
  1282. priv->stats.rx_dropped++;
  1283. priv->stats.rx_length_errors++;
  1284. } else {
  1285. /* must have valid th header or game over */
  1286. __u32 block_len = len;
  1287. len = TH_HEADER_LENGTH + XID2_LENGTH + 4;
  1288. new_skb = __dev_alloc_skb(ch->max_bufsize, GFP_ATOMIC);
  1289. if (new_skb == NULL) {
  1290. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1291. "%s(%d): skb allocation failed",
  1292. CTCM_FUNTAIL, dev->name);
  1293. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1294. goto again;
  1295. }
  1296. switch (fsm_getstate(grp->fsm)) {
  1297. case MPCG_STATE_RESET:
  1298. case MPCG_STATE_INOP:
  1299. dev_kfree_skb_any(new_skb);
  1300. break;
  1301. case MPCG_STATE_FLOWC:
  1302. case MPCG_STATE_READY:
  1303. skb_put_data(new_skb, skb->data, block_len);
  1304. skb_queue_tail(&ch->io_queue, new_skb);
  1305. tasklet_schedule(&ch->ch_tasklet);
  1306. break;
  1307. default:
  1308. skb_put_data(new_skb, skb->data, len);
  1309. skb_queue_tail(&ch->io_queue, new_skb);
  1310. tasklet_hi_schedule(&ch->ch_tasklet);
  1311. break;
  1312. }
  1313. }
  1314. again:
  1315. switch (fsm_getstate(grp->fsm)) {
  1316. int rc, dolock;
  1317. case MPCG_STATE_FLOWC:
  1318. case MPCG_STATE_READY:
  1319. if (ctcm_checkalloc_buffer(ch))
  1320. break;
  1321. ch->trans_skb->data = ch->trans_skb_data;
  1322. skb_reset_tail_pointer(ch->trans_skb);
  1323. ch->trans_skb->len = 0;
  1324. ch->ccw[1].count = ch->max_bufsize;
  1325. if (do_debug_ccw)
  1326. ctcmpc_dumpit((char *)&ch->ccw[0],
  1327. sizeof(struct ccw1) * 3);
  1328. dolock = !in_irq();
  1329. if (dolock)
  1330. spin_lock_irqsave(
  1331. get_ccwdev_lock(ch->cdev), saveflags);
  1332. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1333. (unsigned long)ch, 0xff, 0);
  1334. if (dolock) /* see remark about conditional locking */
  1335. spin_unlock_irqrestore(
  1336. get_ccwdev_lock(ch->cdev), saveflags);
  1337. if (rc != 0)
  1338. ctcm_ccw_check_rc(ch, rc, "normal RX");
  1339. default:
  1340. break;
  1341. }
  1342. CTCM_PR_DEBUG("Exit %s: %s, ch=0x%p, id=%s\n",
  1343. __func__, dev->name, ch, ch->id);
  1344. }
  1345. /**
  1346. * Initialize connection by sending a __u16 of value 0.
  1347. *
  1348. * fi An instance of a channel statemachine.
  1349. * event The event, just happened.
  1350. * arg Generic pointer, casted from channel * upon call.
  1351. */
  1352. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg)
  1353. {
  1354. struct channel *ch = arg;
  1355. struct net_device *dev = ch->netdev;
  1356. struct ctcm_priv *priv = dev->ml_priv;
  1357. struct mpc_group *gptr = priv->mpcg;
  1358. CTCM_PR_DEBUG("Enter %s: id=%s, ch=0x%p\n",
  1359. __func__, ch->id, ch);
  1360. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_INFO,
  1361. "%s: %s: chstate:%i, grpstate:%i, prot:%i\n",
  1362. CTCM_FUNTAIL, ch->id, fsm_getstate(fi),
  1363. fsm_getstate(gptr->fsm), ch->protocol);
  1364. if (fsm_getstate(fi) == CTC_STATE_TXIDLE)
  1365. MPC_DBF_DEV_NAME(TRACE, dev, "remote side issued READ? ");
  1366. fsm_deltimer(&ch->timer);
  1367. if (ctcm_checkalloc_buffer(ch))
  1368. goto done;
  1369. switch (fsm_getstate(fi)) {
  1370. case CTC_STATE_STARTRETRY:
  1371. case CTC_STATE_SETUPWAIT:
  1372. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  1373. ctcmpc_chx_rxidle(fi, event, arg);
  1374. } else {
  1375. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1376. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  1377. }
  1378. goto done;
  1379. default:
  1380. break;
  1381. }
  1382. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)
  1383. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  1384. done:
  1385. CTCM_PR_DEBUG("Exit %s: id=%s, ch=0x%p\n",
  1386. __func__, ch->id, ch);
  1387. return;
  1388. }
  1389. /**
  1390. * Got initial data, check it. If OK,
  1391. * notify device statemachine that we are up and
  1392. * running.
  1393. *
  1394. * fi An instance of a channel statemachine.
  1395. * event The event, just happened.
  1396. * arg Generic pointer, casted from channel * upon call.
  1397. */
  1398. void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg)
  1399. {
  1400. struct channel *ch = arg;
  1401. struct net_device *dev = ch->netdev;
  1402. struct ctcm_priv *priv = dev->ml_priv;
  1403. struct mpc_group *grp = priv->mpcg;
  1404. int rc;
  1405. unsigned long saveflags = 0; /* avoids compiler warning */
  1406. fsm_deltimer(&ch->timer);
  1407. CTCM_PR_DEBUG("%s: %s: %s: cp:%i, chstate:%i grpstate:%i\n",
  1408. __func__, ch->id, dev->name, smp_processor_id(),
  1409. fsm_getstate(fi), fsm_getstate(grp->fsm));
  1410. fsm_newstate(fi, CTC_STATE_RXIDLE);
  1411. /* XID processing complete */
  1412. switch (fsm_getstate(grp->fsm)) {
  1413. case MPCG_STATE_FLOWC:
  1414. case MPCG_STATE_READY:
  1415. if (ctcm_checkalloc_buffer(ch))
  1416. goto done;
  1417. ch->trans_skb->data = ch->trans_skb_data;
  1418. skb_reset_tail_pointer(ch->trans_skb);
  1419. ch->trans_skb->len = 0;
  1420. ch->ccw[1].count = ch->max_bufsize;
  1421. CTCM_CCW_DUMP((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1422. if (event == CTC_EVENT_START)
  1423. /* see remark about conditional locking */
  1424. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  1425. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1426. (unsigned long)ch, 0xff, 0);
  1427. if (event == CTC_EVENT_START)
  1428. spin_unlock_irqrestore(
  1429. get_ccwdev_lock(ch->cdev), saveflags);
  1430. if (rc != 0) {
  1431. fsm_newstate(fi, CTC_STATE_RXINIT);
  1432. ctcm_ccw_check_rc(ch, rc, "initial RX");
  1433. goto done;
  1434. }
  1435. break;
  1436. default:
  1437. break;
  1438. }
  1439. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  1440. done:
  1441. return;
  1442. }
  1443. /*
  1444. * ctcmpc channel FSM action
  1445. * called from several points in ctcmpc_ch_fsm
  1446. * ctcmpc only
  1447. */
  1448. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg)
  1449. {
  1450. struct channel *ch = arg;
  1451. struct net_device *dev = ch->netdev;
  1452. struct ctcm_priv *priv = dev->ml_priv;
  1453. struct mpc_group *grp = priv->mpcg;
  1454. CTCM_PR_DEBUG("%s(%s): %s(ch=0x%p), cp=%i, ChStat:%s, GrpStat:%s\n",
  1455. __func__, dev->name, ch->id, ch, smp_processor_id(),
  1456. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1457. switch (fsm_getstate(grp->fsm)) {
  1458. case MPCG_STATE_XID2INITW:
  1459. /* ok..start yside xid exchanges */
  1460. if (!ch->in_mpcgroup)
  1461. break;
  1462. if (fsm_getstate(ch->fsm) == CH_XID0_PENDING) {
  1463. fsm_deltimer(&grp->timer);
  1464. fsm_addtimer(&grp->timer,
  1465. MPC_XID_TIMEOUT_VALUE,
  1466. MPCG_EVENT_TIMER, dev);
  1467. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1468. } else if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1469. /* attn rcvd before xid0 processed via bh */
  1470. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1471. break;
  1472. case MPCG_STATE_XID2INITX:
  1473. case MPCG_STATE_XID0IOWAIT:
  1474. case MPCG_STATE_XID0IOWAIX:
  1475. /* attn rcvd before xid0 processed on ch
  1476. but mid-xid0 processing for group */
  1477. if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1478. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1479. break;
  1480. case MPCG_STATE_XID7INITW:
  1481. case MPCG_STATE_XID7INITX:
  1482. case MPCG_STATE_XID7INITI:
  1483. case MPCG_STATE_XID7INITZ:
  1484. switch (fsm_getstate(ch->fsm)) {
  1485. case CH_XID7_PENDING:
  1486. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1487. break;
  1488. case CH_XID7_PENDING2:
  1489. fsm_newstate(ch->fsm, CH_XID7_PENDING3);
  1490. break;
  1491. }
  1492. fsm_event(grp->fsm, MPCG_EVENT_XID7DONE, dev);
  1493. break;
  1494. }
  1495. return;
  1496. }
  1497. /*
  1498. * ctcmpc channel FSM action
  1499. * called from one point in ctcmpc_ch_fsm
  1500. * ctcmpc only
  1501. */
  1502. static void ctcmpc_chx_attnbusy(fsm_instance *fsm, int event, void *arg)
  1503. {
  1504. struct channel *ch = arg;
  1505. struct net_device *dev = ch->netdev;
  1506. struct ctcm_priv *priv = dev->ml_priv;
  1507. struct mpc_group *grp = priv->mpcg;
  1508. CTCM_PR_DEBUG("%s(%s): %s\n ChState:%s GrpState:%s\n",
  1509. __func__, dev->name, ch->id,
  1510. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1511. fsm_deltimer(&ch->timer);
  1512. switch (fsm_getstate(grp->fsm)) {
  1513. case MPCG_STATE_XID0IOWAIT:
  1514. /* vtam wants to be primary.start yside xid exchanges*/
  1515. /* only receive one attn-busy at a time so must not */
  1516. /* change state each time */
  1517. grp->changed_side = 1;
  1518. fsm_newstate(grp->fsm, MPCG_STATE_XID2INITW);
  1519. break;
  1520. case MPCG_STATE_XID2INITW:
  1521. if (grp->changed_side == 1) {
  1522. grp->changed_side = 2;
  1523. break;
  1524. }
  1525. /* process began via call to establish_conn */
  1526. /* so must report failure instead of reverting */
  1527. /* back to ready-for-xid passive state */
  1528. if (grp->estconnfunc)
  1529. goto done;
  1530. /* this attnbusy is NOT the result of xside xid */
  1531. /* collisions so yside must have been triggered */
  1532. /* by an ATTN that was not intended to start XID */
  1533. /* processing. Revert back to ready-for-xid and */
  1534. /* wait for ATTN interrupt to signal xid start */
  1535. if (fsm_getstate(ch->fsm) == CH_XID0_INPROGRESS) {
  1536. fsm_newstate(ch->fsm, CH_XID0_PENDING) ;
  1537. fsm_deltimer(&grp->timer);
  1538. goto done;
  1539. }
  1540. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1541. goto done;
  1542. case MPCG_STATE_XID2INITX:
  1543. /* XID2 was received before ATTN Busy for second
  1544. channel.Send yside xid for second channel.
  1545. */
  1546. if (grp->changed_side == 1) {
  1547. grp->changed_side = 2;
  1548. break;
  1549. }
  1550. case MPCG_STATE_XID0IOWAIX:
  1551. case MPCG_STATE_XID7INITW:
  1552. case MPCG_STATE_XID7INITX:
  1553. case MPCG_STATE_XID7INITI:
  1554. case MPCG_STATE_XID7INITZ:
  1555. default:
  1556. /* multiple attn-busy indicates too out-of-sync */
  1557. /* and they are certainly not being received as part */
  1558. /* of valid mpc group negotiations.. */
  1559. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1560. goto done;
  1561. }
  1562. if (grp->changed_side == 1) {
  1563. fsm_deltimer(&grp->timer);
  1564. fsm_addtimer(&grp->timer, MPC_XID_TIMEOUT_VALUE,
  1565. MPCG_EVENT_TIMER, dev);
  1566. }
  1567. if (ch->in_mpcgroup)
  1568. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1569. else
  1570. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1571. "%s(%s): channel %s not added to group",
  1572. CTCM_FUNTAIL, dev->name, ch->id);
  1573. done:
  1574. return;
  1575. }
  1576. /*
  1577. * ctcmpc channel FSM action
  1578. * called from several points in ctcmpc_ch_fsm
  1579. * ctcmpc only
  1580. */
  1581. static void ctcmpc_chx_resend(fsm_instance *fsm, int event, void *arg)
  1582. {
  1583. struct channel *ch = arg;
  1584. struct net_device *dev = ch->netdev;
  1585. struct ctcm_priv *priv = dev->ml_priv;
  1586. struct mpc_group *grp = priv->mpcg;
  1587. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1588. return;
  1589. }
  1590. /*
  1591. * ctcmpc channel FSM action
  1592. * called from several points in ctcmpc_ch_fsm
  1593. * ctcmpc only
  1594. */
  1595. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg)
  1596. {
  1597. struct channel *ach = arg;
  1598. struct net_device *dev = ach->netdev;
  1599. struct ctcm_priv *priv = dev->ml_priv;
  1600. struct mpc_group *grp = priv->mpcg;
  1601. struct channel *wch = priv->channel[CTCM_WRITE];
  1602. struct channel *rch = priv->channel[CTCM_READ];
  1603. struct sk_buff *skb;
  1604. struct th_sweep *header;
  1605. int rc = 0;
  1606. unsigned long saveflags = 0;
  1607. CTCM_PR_DEBUG("ctcmpc enter: %s(): cp=%i ch=0x%p id=%s\n",
  1608. __func__, smp_processor_id(), ach, ach->id);
  1609. if (grp->in_sweep == 0)
  1610. goto done;
  1611. CTCM_PR_DBGDATA("%s: 1: ToVTAM_th_seq= %08x\n" ,
  1612. __func__, wch->th_seq_num);
  1613. CTCM_PR_DBGDATA("%s: 1: FromVTAM_th_seq= %08x\n" ,
  1614. __func__, rch->th_seq_num);
  1615. if (fsm_getstate(wch->fsm) != CTC_STATE_TXIDLE) {
  1616. /* give the previous IO time to complete */
  1617. fsm_addtimer(&wch->sweep_timer,
  1618. 200, CTC_EVENT_RSWEEP_TIMER, wch);
  1619. goto done;
  1620. }
  1621. skb = skb_dequeue(&wch->sweep_queue);
  1622. if (!skb)
  1623. goto done;
  1624. if (set_normalized_cda(&wch->ccw[4], skb->data)) {
  1625. grp->in_sweep = 0;
  1626. ctcm_clear_busy_do(dev);
  1627. dev_kfree_skb_any(skb);
  1628. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1629. goto done;
  1630. } else {
  1631. refcount_inc(&skb->users);
  1632. skb_queue_tail(&wch->io_queue, skb);
  1633. }
  1634. /* send out the sweep */
  1635. wch->ccw[4].count = skb->len;
  1636. header = (struct th_sweep *)skb->data;
  1637. switch (header->th.th_ch_flag) {
  1638. case TH_SWEEP_REQ:
  1639. grp->sweep_req_pend_num--;
  1640. break;
  1641. case TH_SWEEP_RESP:
  1642. grp->sweep_rsp_pend_num--;
  1643. break;
  1644. }
  1645. header->sw.th_last_seq = wch->th_seq_num;
  1646. CTCM_CCW_DUMP((char *)&wch->ccw[3], sizeof(struct ccw1) * 3);
  1647. CTCM_PR_DBGDATA("%s: sweep packet\n", __func__);
  1648. CTCM_D3_DUMP((char *)header, TH_SWEEP_LENGTH);
  1649. fsm_addtimer(&wch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, wch);
  1650. fsm_newstate(wch->fsm, CTC_STATE_TX);
  1651. spin_lock_irqsave(get_ccwdev_lock(wch->cdev), saveflags);
  1652. wch->prof.send_stamp = jiffies;
  1653. rc = ccw_device_start(wch->cdev, &wch->ccw[3],
  1654. (unsigned long) wch, 0xff, 0);
  1655. spin_unlock_irqrestore(get_ccwdev_lock(wch->cdev), saveflags);
  1656. if ((grp->sweep_req_pend_num == 0) &&
  1657. (grp->sweep_rsp_pend_num == 0)) {
  1658. grp->in_sweep = 0;
  1659. rch->th_seq_num = 0x00;
  1660. wch->th_seq_num = 0x00;
  1661. ctcm_clear_busy_do(dev);
  1662. }
  1663. CTCM_PR_DBGDATA("%s: To-/From-VTAM_th_seq = %08x/%08x\n" ,
  1664. __func__, wch->th_seq_num, rch->th_seq_num);
  1665. if (rc != 0)
  1666. ctcm_ccw_check_rc(wch, rc, "send sweep");
  1667. done:
  1668. return;
  1669. }
  1670. /*
  1671. * The ctcmpc statemachine for a channel.
  1672. */
  1673. const fsm_node ctcmpc_ch_fsm[] = {
  1674. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  1675. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  1676. { CTC_STATE_STOPPED, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1677. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1678. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1679. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  1680. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1681. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1682. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1683. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1684. { CTC_STATE_NOTOP, CTC_EVENT_UC_RCRESET, ctcm_chx_stop },
  1685. { CTC_STATE_NOTOP, CTC_EVENT_UC_RSRESET, ctcm_chx_stop },
  1686. { CTC_STATE_NOTOP, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1687. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1688. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1689. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1690. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1691. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1692. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1693. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1694. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1695. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1696. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1697. { CTC_STATE_STARTRETRY, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1698. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1699. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1700. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1701. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1702. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1703. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1704. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1705. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1706. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1707. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1708. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, ctcmpc_chx_rxidle },
  1709. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1710. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1711. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1712. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1713. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1714. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, ctcmpc_chx_firstio },
  1715. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1716. { CH_XID0_PENDING, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1717. { CH_XID0_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1718. { CH_XID0_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1719. { CH_XID0_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1720. { CH_XID0_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1721. { CH_XID0_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1722. { CH_XID0_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1723. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1724. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1725. { CH_XID0_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1726. { CH_XID0_INPROGRESS, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1727. { CH_XID0_INPROGRESS, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1728. { CH_XID0_INPROGRESS, CTC_EVENT_STOP, ctcm_chx_haltio },
  1729. { CH_XID0_INPROGRESS, CTC_EVENT_START, ctcm_action_nop },
  1730. { CH_XID0_INPROGRESS, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1731. { CH_XID0_INPROGRESS, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1732. { CH_XID0_INPROGRESS, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1733. { CH_XID0_INPROGRESS, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1734. { CH_XID0_INPROGRESS, CTC_EVENT_ATTNBUSY, ctcmpc_chx_attnbusy },
  1735. { CH_XID0_INPROGRESS, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1736. { CH_XID0_INPROGRESS, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1737. { CH_XID7_PENDING, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1738. { CH_XID7_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1739. { CH_XID7_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1740. { CH_XID7_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1741. { CH_XID7_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1742. { CH_XID7_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1743. { CH_XID7_PENDING, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1744. { CH_XID7_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1745. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1746. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1747. { CH_XID7_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1748. { CH_XID7_PENDING, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1749. { CH_XID7_PENDING, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1750. { CH_XID7_PENDING1, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1751. { CH_XID7_PENDING1, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1752. { CH_XID7_PENDING1, CTC_EVENT_STOP, ctcm_chx_haltio },
  1753. { CH_XID7_PENDING1, CTC_EVENT_START, ctcm_action_nop },
  1754. { CH_XID7_PENDING1, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1755. { CH_XID7_PENDING1, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1756. { CH_XID7_PENDING1, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1757. { CH_XID7_PENDING1, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1758. { CH_XID7_PENDING1, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1759. { CH_XID7_PENDING1, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1760. { CH_XID7_PENDING1, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1761. { CH_XID7_PENDING1, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1762. { CH_XID7_PENDING2, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1763. { CH_XID7_PENDING2, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1764. { CH_XID7_PENDING2, CTC_EVENT_STOP, ctcm_chx_haltio },
  1765. { CH_XID7_PENDING2, CTC_EVENT_START, ctcm_action_nop },
  1766. { CH_XID7_PENDING2, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1767. { CH_XID7_PENDING2, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1768. { CH_XID7_PENDING2, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1769. { CH_XID7_PENDING2, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1770. { CH_XID7_PENDING2, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1771. { CH_XID7_PENDING2, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1772. { CH_XID7_PENDING2, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1773. { CH_XID7_PENDING2, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1774. { CH_XID7_PENDING3, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1775. { CH_XID7_PENDING3, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1776. { CH_XID7_PENDING3, CTC_EVENT_STOP, ctcm_chx_haltio },
  1777. { CH_XID7_PENDING3, CTC_EVENT_START, ctcm_action_nop },
  1778. { CH_XID7_PENDING3, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1779. { CH_XID7_PENDING3, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1780. { CH_XID7_PENDING3, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1781. { CH_XID7_PENDING3, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1782. { CH_XID7_PENDING3, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1783. { CH_XID7_PENDING3, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1784. { CH_XID7_PENDING3, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1785. { CH_XID7_PENDING3, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1786. { CH_XID7_PENDING4, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1787. { CH_XID7_PENDING4, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1788. { CH_XID7_PENDING4, CTC_EVENT_STOP, ctcm_chx_haltio },
  1789. { CH_XID7_PENDING4, CTC_EVENT_START, ctcm_action_nop },
  1790. { CH_XID7_PENDING4, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1791. { CH_XID7_PENDING4, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1792. { CH_XID7_PENDING4, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1793. { CH_XID7_PENDING4, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1794. { CH_XID7_PENDING4, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1795. { CH_XID7_PENDING4, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1796. { CH_XID7_PENDING4, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1797. { CH_XID7_PENDING4, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1798. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1799. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1800. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1801. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1802. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1803. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1804. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1805. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1806. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1807. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1808. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1809. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1810. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1811. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1812. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1813. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1814. { CTC_STATE_TXINIT, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1815. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1816. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1817. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1818. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1819. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1820. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1821. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1822. { CTC_STATE_TXIDLE, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1823. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1824. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1825. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1826. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1827. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1828. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1829. { CTC_STATE_TERM, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1830. { CTC_STATE_TERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1831. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1832. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1833. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1834. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1835. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1836. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1837. { CTC_STATE_DTERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1838. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1839. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1840. { CTC_STATE_TX, CTC_EVENT_FINSTAT, ctcmpc_chx_txdone },
  1841. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1842. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1843. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1844. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1845. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1846. { CTC_STATE_TX, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1847. { CTC_STATE_TX, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1848. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1849. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1850. { CTC_STATE_TXERR, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1851. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1852. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1853. };
  1854. int mpc_ch_fsm_len = ARRAY_SIZE(ctcmpc_ch_fsm);
  1855. /*
  1856. * Actions for interface - statemachine.
  1857. */
  1858. /**
  1859. * Startup channels by sending CTC_EVENT_START to each channel.
  1860. *
  1861. * fi An instance of an interface statemachine.
  1862. * event The event, just happened.
  1863. * arg Generic pointer, casted from struct net_device * upon call.
  1864. */
  1865. static void dev_action_start(fsm_instance *fi, int event, void *arg)
  1866. {
  1867. struct net_device *dev = arg;
  1868. struct ctcm_priv *priv = dev->ml_priv;
  1869. int direction;
  1870. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1871. fsm_deltimer(&priv->restart_timer);
  1872. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  1873. if (IS_MPC(priv))
  1874. priv->mpcg->channels_terminating = 0;
  1875. for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
  1876. struct channel *ch = priv->channel[direction];
  1877. fsm_event(ch->fsm, CTC_EVENT_START, ch);
  1878. }
  1879. }
  1880. /**
  1881. * Shutdown channels by sending CTC_EVENT_STOP to each channel.
  1882. *
  1883. * fi An instance of an interface statemachine.
  1884. * event The event, just happened.
  1885. * arg Generic pointer, casted from struct net_device * upon call.
  1886. */
  1887. static void dev_action_stop(fsm_instance *fi, int event, void *arg)
  1888. {
  1889. int direction;
  1890. struct net_device *dev = arg;
  1891. struct ctcm_priv *priv = dev->ml_priv;
  1892. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1893. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1894. for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
  1895. struct channel *ch = priv->channel[direction];
  1896. fsm_event(ch->fsm, CTC_EVENT_STOP, ch);
  1897. ch->th_seq_num = 0x00;
  1898. CTCM_PR_DEBUG("%s: CH_th_seq= %08x\n",
  1899. __func__, ch->th_seq_num);
  1900. }
  1901. if (IS_MPC(priv))
  1902. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1903. }
  1904. static void dev_action_restart(fsm_instance *fi, int event, void *arg)
  1905. {
  1906. int restart_timer;
  1907. struct net_device *dev = arg;
  1908. struct ctcm_priv *priv = dev->ml_priv;
  1909. CTCMY_DBF_DEV_NAME(TRACE, dev, "");
  1910. if (IS_MPC(priv)) {
  1911. restart_timer = CTCM_TIME_1_SEC;
  1912. } else {
  1913. restart_timer = CTCM_TIME_5_SEC;
  1914. }
  1915. dev_info(&dev->dev, "Restarting device\n");
  1916. dev_action_stop(fi, event, arg);
  1917. fsm_event(priv->fsm, DEV_EVENT_STOP, dev);
  1918. if (IS_MPC(priv))
  1919. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1920. /* going back into start sequence too quickly can */
  1921. /* result in the other side becoming unreachable due */
  1922. /* to sense reported when IO is aborted */
  1923. fsm_addtimer(&priv->restart_timer, restart_timer,
  1924. DEV_EVENT_START, dev);
  1925. }
  1926. /**
  1927. * Called from channel statemachine
  1928. * when a channel is up and running.
  1929. *
  1930. * fi An instance of an interface statemachine.
  1931. * event The event, just happened.
  1932. * arg Generic pointer, casted from struct net_device * upon call.
  1933. */
  1934. static void dev_action_chup(fsm_instance *fi, int event, void *arg)
  1935. {
  1936. struct net_device *dev = arg;
  1937. struct ctcm_priv *priv = dev->ml_priv;
  1938. int dev_stat = fsm_getstate(fi);
  1939. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  1940. "%s(%s): priv = %p [%d,%d]\n ", CTCM_FUNTAIL,
  1941. dev->name, dev->ml_priv, dev_stat, event);
  1942. switch (fsm_getstate(fi)) {
  1943. case DEV_STATE_STARTWAIT_RXTX:
  1944. if (event == DEV_EVENT_RXUP)
  1945. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  1946. else
  1947. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  1948. break;
  1949. case DEV_STATE_STARTWAIT_RX:
  1950. if (event == DEV_EVENT_RXUP) {
  1951. fsm_newstate(fi, DEV_STATE_RUNNING);
  1952. dev_info(&dev->dev,
  1953. "Connected with remote side\n");
  1954. ctcm_clear_busy(dev);
  1955. }
  1956. break;
  1957. case DEV_STATE_STARTWAIT_TX:
  1958. if (event == DEV_EVENT_TXUP) {
  1959. fsm_newstate(fi, DEV_STATE_RUNNING);
  1960. dev_info(&dev->dev,
  1961. "Connected with remote side\n");
  1962. ctcm_clear_busy(dev);
  1963. }
  1964. break;
  1965. case DEV_STATE_STOPWAIT_TX:
  1966. if (event == DEV_EVENT_RXUP)
  1967. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1968. break;
  1969. case DEV_STATE_STOPWAIT_RX:
  1970. if (event == DEV_EVENT_TXUP)
  1971. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1972. break;
  1973. }
  1974. if (IS_MPC(priv)) {
  1975. if (event == DEV_EVENT_RXUP)
  1976. mpc_channel_action(priv->channel[CTCM_READ],
  1977. CTCM_READ, MPC_CHANNEL_ADD);
  1978. else
  1979. mpc_channel_action(priv->channel[CTCM_WRITE],
  1980. CTCM_WRITE, MPC_CHANNEL_ADD);
  1981. }
  1982. }
  1983. /**
  1984. * Called from device statemachine
  1985. * when a channel has been shutdown.
  1986. *
  1987. * fi An instance of an interface statemachine.
  1988. * event The event, just happened.
  1989. * arg Generic pointer, casted from struct net_device * upon call.
  1990. */
  1991. static void dev_action_chdown(fsm_instance *fi, int event, void *arg)
  1992. {
  1993. struct net_device *dev = arg;
  1994. struct ctcm_priv *priv = dev->ml_priv;
  1995. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1996. switch (fsm_getstate(fi)) {
  1997. case DEV_STATE_RUNNING:
  1998. if (event == DEV_EVENT_TXDOWN)
  1999. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  2000. else
  2001. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  2002. break;
  2003. case DEV_STATE_STARTWAIT_RX:
  2004. if (event == DEV_EVENT_TXDOWN)
  2005. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  2006. break;
  2007. case DEV_STATE_STARTWAIT_TX:
  2008. if (event == DEV_EVENT_RXDOWN)
  2009. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  2010. break;
  2011. case DEV_STATE_STOPWAIT_RXTX:
  2012. if (event == DEV_EVENT_TXDOWN)
  2013. fsm_newstate(fi, DEV_STATE_STOPWAIT_RX);
  2014. else
  2015. fsm_newstate(fi, DEV_STATE_STOPWAIT_TX);
  2016. break;
  2017. case DEV_STATE_STOPWAIT_RX:
  2018. if (event == DEV_EVENT_RXDOWN)
  2019. fsm_newstate(fi, DEV_STATE_STOPPED);
  2020. break;
  2021. case DEV_STATE_STOPWAIT_TX:
  2022. if (event == DEV_EVENT_TXDOWN)
  2023. fsm_newstate(fi, DEV_STATE_STOPPED);
  2024. break;
  2025. }
  2026. if (IS_MPC(priv)) {
  2027. if (event == DEV_EVENT_RXDOWN)
  2028. mpc_channel_action(priv->channel[CTCM_READ],
  2029. CTCM_READ, MPC_CHANNEL_REMOVE);
  2030. else
  2031. mpc_channel_action(priv->channel[CTCM_WRITE],
  2032. CTCM_WRITE, MPC_CHANNEL_REMOVE);
  2033. }
  2034. }
  2035. const fsm_node dev_fsm[] = {
  2036. { DEV_STATE_STOPPED, DEV_EVENT_START, dev_action_start },
  2037. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_START, dev_action_start },
  2038. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2039. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2040. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2041. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_START, dev_action_start },
  2042. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2043. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2044. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2045. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2046. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_START, dev_action_start },
  2047. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2048. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2049. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2050. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2051. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_STOP, dev_action_stop },
  2052. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXUP, dev_action_chup },
  2053. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXUP, dev_action_chup },
  2054. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2055. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2056. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2057. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_STOP, dev_action_stop },
  2058. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2059. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2060. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2061. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2062. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_STOP, dev_action_stop },
  2063. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2064. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2065. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2066. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2067. { DEV_STATE_RUNNING, DEV_EVENT_STOP, dev_action_stop },
  2068. { DEV_STATE_RUNNING, DEV_EVENT_RXDOWN, dev_action_chdown },
  2069. { DEV_STATE_RUNNING, DEV_EVENT_TXDOWN, dev_action_chdown },
  2070. { DEV_STATE_RUNNING, DEV_EVENT_TXUP, ctcm_action_nop },
  2071. { DEV_STATE_RUNNING, DEV_EVENT_RXUP, ctcm_action_nop },
  2072. { DEV_STATE_RUNNING, DEV_EVENT_RESTART, dev_action_restart },
  2073. };
  2074. int dev_fsm_len = ARRAY_SIZE(dev_fsm);
  2075. /* --- This is the END my friend --- */