pinctrl-meson8b.c 31 KB

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  1. /*
  2. * Pin controller and GPIO driver for Amlogic Meson8b.
  3. *
  4. * Copyright (C) 2015 Endless Mobile, Inc.
  5. * Author: Carlo Caione <carlo@endlessm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  13. */
  14. #include <dt-bindings/gpio/meson8b-gpio.h>
  15. #include "pinctrl-meson.h"
  16. #define AO_OFF 130
  17. static const struct pinctrl_pin_desc meson8b_cbus_pins[] = {
  18. MESON_PIN(GPIOX_0, 0),
  19. MESON_PIN(GPIOX_1, 0),
  20. MESON_PIN(GPIOX_2, 0),
  21. MESON_PIN(GPIOX_3, 0),
  22. MESON_PIN(GPIOX_4, 0),
  23. MESON_PIN(GPIOX_5, 0),
  24. MESON_PIN(GPIOX_6, 0),
  25. MESON_PIN(GPIOX_7, 0),
  26. MESON_PIN(GPIOX_8, 0),
  27. MESON_PIN(GPIOX_9, 0),
  28. MESON_PIN(GPIOX_10, 0),
  29. MESON_PIN(GPIOX_11, 0),
  30. MESON_PIN(GPIOX_16, 0),
  31. MESON_PIN(GPIOX_17, 0),
  32. MESON_PIN(GPIOX_18, 0),
  33. MESON_PIN(GPIOX_19, 0),
  34. MESON_PIN(GPIOX_20, 0),
  35. MESON_PIN(GPIOX_21, 0),
  36. MESON_PIN(GPIOY_0, 0),
  37. MESON_PIN(GPIOY_1, 0),
  38. MESON_PIN(GPIOY_3, 0),
  39. MESON_PIN(GPIOY_6, 0),
  40. MESON_PIN(GPIOY_7, 0),
  41. MESON_PIN(GPIOY_8, 0),
  42. MESON_PIN(GPIOY_9, 0),
  43. MESON_PIN(GPIOY_10, 0),
  44. MESON_PIN(GPIOY_11, 0),
  45. MESON_PIN(GPIOY_12, 0),
  46. MESON_PIN(GPIOY_13, 0),
  47. MESON_PIN(GPIOY_14, 0),
  48. MESON_PIN(GPIODV_9, 0),
  49. MESON_PIN(GPIODV_24, 0),
  50. MESON_PIN(GPIODV_25, 0),
  51. MESON_PIN(GPIODV_26, 0),
  52. MESON_PIN(GPIODV_27, 0),
  53. MESON_PIN(GPIODV_28, 0),
  54. MESON_PIN(GPIODV_29, 0),
  55. MESON_PIN(GPIOH_0, 0),
  56. MESON_PIN(GPIOH_1, 0),
  57. MESON_PIN(GPIOH_2, 0),
  58. MESON_PIN(GPIOH_3, 0),
  59. MESON_PIN(GPIOH_4, 0),
  60. MESON_PIN(GPIOH_5, 0),
  61. MESON_PIN(GPIOH_6, 0),
  62. MESON_PIN(GPIOH_7, 0),
  63. MESON_PIN(GPIOH_8, 0),
  64. MESON_PIN(GPIOH_9, 0),
  65. MESON_PIN(CARD_0, 0),
  66. MESON_PIN(CARD_1, 0),
  67. MESON_PIN(CARD_2, 0),
  68. MESON_PIN(CARD_3, 0),
  69. MESON_PIN(CARD_4, 0),
  70. MESON_PIN(CARD_5, 0),
  71. MESON_PIN(CARD_6, 0),
  72. MESON_PIN(BOOT_0, 0),
  73. MESON_PIN(BOOT_1, 0),
  74. MESON_PIN(BOOT_2, 0),
  75. MESON_PIN(BOOT_3, 0),
  76. MESON_PIN(BOOT_4, 0),
  77. MESON_PIN(BOOT_5, 0),
  78. MESON_PIN(BOOT_6, 0),
  79. MESON_PIN(BOOT_7, 0),
  80. MESON_PIN(BOOT_8, 0),
  81. MESON_PIN(BOOT_9, 0),
  82. MESON_PIN(BOOT_10, 0),
  83. MESON_PIN(BOOT_11, 0),
  84. MESON_PIN(BOOT_12, 0),
  85. MESON_PIN(BOOT_13, 0),
  86. MESON_PIN(BOOT_14, 0),
  87. MESON_PIN(BOOT_15, 0),
  88. MESON_PIN(BOOT_16, 0),
  89. MESON_PIN(BOOT_17, 0),
  90. MESON_PIN(BOOT_18, 0),
  91. MESON_PIN(DIF_0_P, 0),
  92. MESON_PIN(DIF_0_N, 0),
  93. MESON_PIN(DIF_1_P, 0),
  94. MESON_PIN(DIF_1_N, 0),
  95. MESON_PIN(DIF_2_P, 0),
  96. MESON_PIN(DIF_2_N, 0),
  97. MESON_PIN(DIF_3_P, 0),
  98. MESON_PIN(DIF_3_N, 0),
  99. MESON_PIN(DIF_4_P, 0),
  100. MESON_PIN(DIF_4_N, 0),
  101. };
  102. static const struct pinctrl_pin_desc meson8b_aobus_pins[] = {
  103. MESON_PIN(GPIOAO_0, AO_OFF),
  104. MESON_PIN(GPIOAO_1, AO_OFF),
  105. MESON_PIN(GPIOAO_2, AO_OFF),
  106. MESON_PIN(GPIOAO_3, AO_OFF),
  107. MESON_PIN(GPIOAO_4, AO_OFF),
  108. MESON_PIN(GPIOAO_5, AO_OFF),
  109. MESON_PIN(GPIOAO_6, AO_OFF),
  110. MESON_PIN(GPIOAO_7, AO_OFF),
  111. MESON_PIN(GPIOAO_8, AO_OFF),
  112. MESON_PIN(GPIOAO_9, AO_OFF),
  113. MESON_PIN(GPIOAO_10, AO_OFF),
  114. MESON_PIN(GPIOAO_11, AO_OFF),
  115. MESON_PIN(GPIOAO_12, AO_OFF),
  116. MESON_PIN(GPIOAO_13, AO_OFF),
  117. /*
  118. * The following 2 pins are not mentionned in the public datasheet
  119. * According to this datasheet, they can't be used with the gpio
  120. * interrupt controller
  121. */
  122. MESON_PIN(GPIO_BSD_EN, AO_OFF),
  123. MESON_PIN(GPIO_TEST_N, AO_OFF),
  124. };
  125. /* bank X */
  126. static const unsigned int sd_d0_a_pins[] = { PIN(GPIOX_0, 0) };
  127. static const unsigned int sd_d1_a_pins[] = { PIN(GPIOX_1, 0) };
  128. static const unsigned int sd_d2_a_pins[] = { PIN(GPIOX_2, 0) };
  129. static const unsigned int sd_d3_a_pins[] = { PIN(GPIOX_3, 0) };
  130. static const unsigned int sdxc_d0_0_a_pins[] = { PIN(GPIOX_4, 0) };
  131. static const unsigned int sdxc_d47_a_pins[] = { PIN(GPIOX_4, 0), PIN(GPIOX_5, 0),
  132. PIN(GPIOX_6, 0), PIN(GPIOX_7, 0) };
  133. static const unsigned int sdxc_d13_0_a_pins[] = { PIN(GPIOX_5, 0), PIN(GPIOX_6, 0),
  134. PIN(GPIOX_7, 0) };
  135. static const unsigned int sd_clk_a_pins[] = { PIN(GPIOX_8, 0) };
  136. static const unsigned int sd_cmd_a_pins[] = { PIN(GPIOX_9, 0) };
  137. static const unsigned int xtal_32k_out_pins[] = { PIN(GPIOX_10, 0) };
  138. static const unsigned int xtal_24m_out_pins[] = { PIN(GPIOX_11, 0) };
  139. static const unsigned int uart_tx_b0_pins[] = { PIN(GPIOX_16, 0) };
  140. static const unsigned int uart_rx_b0_pins[] = { PIN(GPIOX_17, 0) };
  141. static const unsigned int uart_cts_b0_pins[] = { PIN(GPIOX_18, 0) };
  142. static const unsigned int uart_rts_b0_pins[] = { PIN(GPIOX_19, 0) };
  143. static const unsigned int sdxc_d0_1_a_pins[] = { PIN(GPIOX_0, 0) };
  144. static const unsigned int sdxc_d13_1_a_pins[] = { PIN(GPIOX_1, 0), PIN(GPIOX_2, 0),
  145. PIN(GPIOX_3, 0) };
  146. static const unsigned int pcm_out_a_pins[] = { PIN(GPIOX_4, 0) };
  147. static const unsigned int pcm_in_a_pins[] = { PIN(GPIOX_5, 0) };
  148. static const unsigned int pcm_fs_a_pins[] = { PIN(GPIOX_6, 0) };
  149. static const unsigned int pcm_clk_a_pins[] = { PIN(GPIOX_7, 0) };
  150. static const unsigned int sdxc_clk_a_pins[] = { PIN(GPIOX_8, 0) };
  151. static const unsigned int sdxc_cmd_a_pins[] = { PIN(GPIOX_9, 0) };
  152. static const unsigned int pwm_vs_0_pins[] = { PIN(GPIOX_10, 0) };
  153. static const unsigned int pwm_e_pins[] = { PIN(GPIOX_10, 0) };
  154. static const unsigned int pwm_vs_1_pins[] = { PIN(GPIOX_11, 0) };
  155. static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_4, 0) };
  156. static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_5, 0) };
  157. static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_6, 0) };
  158. static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_7, 0) };
  159. static const unsigned int uart_tx_b1_pins[] = { PIN(GPIOX_8, 0) };
  160. static const unsigned int uart_rx_b1_pins[] = { PIN(GPIOX_9, 0) };
  161. static const unsigned int uart_cts_b1_pins[] = { PIN(GPIOX_10, 0) };
  162. static const unsigned int uart_rts_b1_pins[] = { PIN(GPIOX_20, 0) };
  163. static const unsigned int iso7816_0_clk_pins[] = { PIN(GPIOX_6, 0) };
  164. static const unsigned int iso7816_0_data_pins[] = { PIN(GPIOX_7, 0) };
  165. static const unsigned int spi_sclk_0_pins[] = { PIN(GPIOX_8, 0) };
  166. static const unsigned int spi_miso_0_pins[] = { PIN(GPIOX_9, 0) };
  167. static const unsigned int spi_mosi_0_pins[] = { PIN(GPIOX_10, 0) };
  168. static const unsigned int iso7816_det_pins[] = { PIN(GPIOX_16, 0) };
  169. static const unsigned int iso7816_reset_pins[] = { PIN(GPIOX_17, 0) };
  170. static const unsigned int iso7816_1_clk_pins[] = { PIN(GPIOX_18, 0) };
  171. static const unsigned int iso7816_1_data_pins[] = { PIN(GPIOX_19, 0) };
  172. static const unsigned int spi_ss0_0_pins[] = { PIN(GPIOX_20, 0) };
  173. static const unsigned int tsin_clk_b_pins[] = { PIN(GPIOX_8, 0) };
  174. static const unsigned int tsin_sop_b_pins[] = { PIN(GPIOX_9, 0) };
  175. static const unsigned int tsin_d0_b_pins[] = { PIN(GPIOX_10, 0) };
  176. static const unsigned int pwm_b_pins[] = { PIN(GPIOX_11, 0) };
  177. static const unsigned int i2c_sda_d0_pins[] = { PIN(GPIOX_16, 0) };
  178. static const unsigned int i2c_sck_d0_pins[] = { PIN(GPIOX_17, 0) };
  179. static const unsigned int tsin_d_valid_b_pins[] = { PIN(GPIOX_20, 0) };
  180. /* bank Y */
  181. static const unsigned int tsin_d_valid_a_pins[] = { PIN(GPIOY_0, 0) };
  182. static const unsigned int tsin_sop_a_pins[] = { PIN(GPIOY_1, 0) };
  183. static const unsigned int tsin_d17_a_pins[] = { PIN(GPIOY_6, 0), PIN(GPIOY_7, 0),
  184. PIN(GPIOY_10, 0), PIN(GPIOY_11, 0),
  185. PIN(GPIOY_12, 0), PIN(GPIOY_13, 0),
  186. PIN(GPIOY_14, 0) };
  187. static const unsigned int tsin_clk_a_pins[] = { PIN(GPIOY_8, 0) };
  188. static const unsigned int tsin_d0_a_pins[] = { PIN(GPIOY_9, 0) };
  189. static const unsigned int spdif_out_0_pins[] = { PIN(GPIOY_3, 0) };
  190. static const unsigned int xtal_24m_pins[] = { PIN(GPIOY_3, 0) };
  191. static const unsigned int iso7816_2_clk_pins[] = { PIN(GPIOY_13, 0) };
  192. static const unsigned int iso7816_2_data_pins[] = { PIN(GPIOY_14, 0) };
  193. /* bank DV */
  194. static const unsigned int pwm_d_pins[] = { PIN(GPIODV_28, 0) };
  195. static const unsigned int pwm_c0_pins[] = { PIN(GPIODV_29, 0) };
  196. static const unsigned int pwm_vs_2_pins[] = { PIN(GPIODV_9, 0) };
  197. static const unsigned int pwm_vs_3_pins[] = { PIN(GPIODV_28, 0) };
  198. static const unsigned int pwm_vs_4_pins[] = { PIN(GPIODV_29, 0) };
  199. static const unsigned int xtal24_out_pins[] = { PIN(GPIODV_29, 0) };
  200. static const unsigned int uart_tx_c_pins[] = { PIN(GPIODV_24, 0) };
  201. static const unsigned int uart_rx_c_pins[] = { PIN(GPIODV_25, 0) };
  202. static const unsigned int uart_cts_c_pins[] = { PIN(GPIODV_26, 0) };
  203. static const unsigned int uart_rts_c_pins[] = { PIN(GPIODV_27, 0) };
  204. static const unsigned int pwm_c1_pins[] = { PIN(GPIODV_9, 0) };
  205. static const unsigned int i2c_sda_a_pins[] = { PIN(GPIODV_24, 0) };
  206. static const unsigned int i2c_sck_a_pins[] = { PIN(GPIODV_25, 0) };
  207. static const unsigned int i2c_sda_b0_pins[] = { PIN(GPIODV_26, 0) };
  208. static const unsigned int i2c_sck_b0_pins[] = { PIN(GPIODV_27, 0) };
  209. static const unsigned int i2c_sda_c0_pins[] = { PIN(GPIODV_28, 0) };
  210. static const unsigned int i2c_sck_c0_pins[] = { PIN(GPIODV_29, 0) };
  211. /* bank H */
  212. static const unsigned int hdmi_hpd_pins[] = { PIN(GPIOH_0, 0) };
  213. static const unsigned int hdmi_sda_pins[] = { PIN(GPIOH_1, 0) };
  214. static const unsigned int hdmi_scl_pins[] = { PIN(GPIOH_2, 0) };
  215. static const unsigned int hdmi_cec_0_pins[] = { PIN(GPIOH_3, 0) };
  216. static const unsigned int eth_txd1_0_pins[] = { PIN(GPIOH_5, 0) };
  217. static const unsigned int eth_txd0_0_pins[] = { PIN(GPIOH_6, 0) };
  218. static const unsigned int clk_24m_out_pins[] = { PIN(GPIOH_9, 0) };
  219. static const unsigned int spi_ss1_pins[] = { PIN(GPIOH_0, 0) };
  220. static const unsigned int spi_ss2_pins[] = { PIN(GPIOH_1, 0) };
  221. static const unsigned int spi_ss0_1_pins[] = { PIN(GPIOH_3, 0) };
  222. static const unsigned int spi_miso_1_pins[] = { PIN(GPIOH_4, 0) };
  223. static const unsigned int spi_mosi_1_pins[] = { PIN(GPIOH_5, 0) };
  224. static const unsigned int spi_sclk_1_pins[] = { PIN(GPIOH_6, 0) };
  225. static const unsigned int eth_txd3_pins[] = { PIN(GPIOH_7, 0) };
  226. static const unsigned int eth_txd2_pins[] = { PIN(GPIOH_8, 0) };
  227. static const unsigned int eth_tx_clk_pins[] = { PIN(GPIOH_9, 0) };
  228. static const unsigned int i2c_sda_b1_pins[] = { PIN(GPIOH_3, 0) };
  229. static const unsigned int i2c_sck_b1_pins[] = { PIN(GPIOH_4, 0) };
  230. static const unsigned int i2c_sda_c1_pins[] = { PIN(GPIOH_5, 0) };
  231. static const unsigned int i2c_sck_c1_pins[] = { PIN(GPIOH_6, 0) };
  232. static const unsigned int i2c_sda_d1_pins[] = { PIN(GPIOH_7, 0) };
  233. static const unsigned int i2c_sck_d1_pins[] = { PIN(GPIOH_8, 0) };
  234. /* bank BOOT */
  235. static const unsigned int nand_io_pins[] = { PIN(BOOT_0, 0), PIN(BOOT_1, 0),
  236. PIN(BOOT_2, 0), PIN(BOOT_3, 0),
  237. PIN(BOOT_4, 0), PIN(BOOT_5, 0),
  238. PIN(BOOT_6, 0), PIN(BOOT_7, 0) };
  239. static const unsigned int nand_io_ce0_pins[] = { PIN(BOOT_8, 0) };
  240. static const unsigned int nand_io_ce1_pins[] = { PIN(BOOT_9, 0) };
  241. static const unsigned int nand_io_rb0_pins[] = { PIN(BOOT_10, 0) };
  242. static const unsigned int nand_ale_pins[] = { PIN(BOOT_11, 0) };
  243. static const unsigned int nand_cle_pins[] = { PIN(BOOT_12, 0) };
  244. static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_13, 0) };
  245. static const unsigned int nand_ren_clk_pins[] = { PIN(BOOT_14, 0) };
  246. static const unsigned int nand_dqs_15_pins[] = { PIN(BOOT_15, 0) };
  247. static const unsigned int nand_dqs_18_pins[] = { PIN(BOOT_18, 0) };
  248. static const unsigned int sdxc_d0_c_pins[] = { PIN(BOOT_0, 0)};
  249. static const unsigned int sdxc_d13_c_pins[] = { PIN(BOOT_1, 0), PIN(BOOT_2, 0),
  250. PIN(BOOT_3, 0) };
  251. static const unsigned int sdxc_d47_c_pins[] = { PIN(BOOT_4, 0), PIN(BOOT_5, 0),
  252. PIN(BOOT_6, 0), PIN(BOOT_7, 0) };
  253. static const unsigned int sdxc_clk_c_pins[] = { PIN(BOOT_8, 0) };
  254. static const unsigned int sdxc_cmd_c_pins[] = { PIN(BOOT_10, 0) };
  255. static const unsigned int nor_d_pins[] = { PIN(BOOT_11, 0) };
  256. static const unsigned int nor_q_pins[] = { PIN(BOOT_12, 0) };
  257. static const unsigned int nor_c_pins[] = { PIN(BOOT_13, 0) };
  258. static const unsigned int nor_cs_pins[] = { PIN(BOOT_18, 0) };
  259. static const unsigned int sd_d0_c_pins[] = { PIN(BOOT_0, 0) };
  260. static const unsigned int sd_d1_c_pins[] = { PIN(BOOT_1, 0) };
  261. static const unsigned int sd_d2_c_pins[] = { PIN(BOOT_2, 0) };
  262. static const unsigned int sd_d3_c_pins[] = { PIN(BOOT_3, 0) };
  263. static const unsigned int sd_cmd_c_pins[] = { PIN(BOOT_8, 0) };
  264. static const unsigned int sd_clk_c_pins[] = { PIN(BOOT_10, 0) };
  265. /* bank CARD */
  266. static const unsigned int sd_d1_b_pins[] = { PIN(CARD_0, 0) };
  267. static const unsigned int sd_d0_b_pins[] = { PIN(CARD_1, 0) };
  268. static const unsigned int sd_clk_b_pins[] = { PIN(CARD_2, 0) };
  269. static const unsigned int sd_cmd_b_pins[] = { PIN(CARD_3, 0) };
  270. static const unsigned int sd_d3_b_pins[] = { PIN(CARD_4, 0) };
  271. static const unsigned int sd_d2_b_pins[] = { PIN(CARD_5, 0) };
  272. static const unsigned int sdxc_d13_b_pins[] = { PIN(CARD_0, 0), PIN(CARD_4, 0),
  273. PIN(CARD_5, 0) };
  274. static const unsigned int sdxc_d0_b_pins[] = { PIN(CARD_1, 0) };
  275. static const unsigned int sdxc_clk_b_pins[] = { PIN(CARD_2, 0) };
  276. static const unsigned int sdxc_cmd_b_pins[] = { PIN(CARD_3, 0) };
  277. /* bank AO */
  278. static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, AO_OFF) };
  279. static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, AO_OFF) };
  280. static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, AO_OFF) };
  281. static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, AO_OFF) };
  282. static const unsigned int i2c_mst_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) };
  283. static const unsigned int i2c_mst_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) };
  284. static const unsigned int clk_32k_in_out_pins[] = { PIN(GPIOAO_6, AO_OFF) };
  285. static const unsigned int remote_input_pins[] = { PIN(GPIOAO_7, AO_OFF) };
  286. static const unsigned int hdmi_cec_1_pins[] = { PIN(GPIOAO_12, AO_OFF) };
  287. static const unsigned int ir_blaster_pins[] = { PIN(GPIOAO_13, AO_OFF) };
  288. static const unsigned int pwm_c2_pins[] = { PIN(GPIOAO_3, AO_OFF) };
  289. static const unsigned int i2c_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) };
  290. static const unsigned int i2c_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) };
  291. static const unsigned int ir_remote_out_pins[] = { PIN(GPIOAO_7, AO_OFF) };
  292. static const unsigned int i2s_am_clk_out_pins[] = { PIN(GPIOAO_8, AO_OFF) };
  293. static const unsigned int i2s_ao_clk_out_pins[] = { PIN(GPIOAO_9, AO_OFF) };
  294. static const unsigned int i2s_lr_clk_out_pins[] = { PIN(GPIOAO_10, AO_OFF) };
  295. static const unsigned int i2s_out_01_pins[] = { PIN(GPIOAO_11, AO_OFF) };
  296. static const unsigned int uart_tx_ao_b0_pins[] = { PIN(GPIOAO_0, AO_OFF) };
  297. static const unsigned int uart_rx_ao_b0_pins[] = { PIN(GPIOAO_1, AO_OFF) };
  298. static const unsigned int uart_cts_ao_b_pins[] = { PIN(GPIOAO_2, AO_OFF) };
  299. static const unsigned int uart_rts_ao_b_pins[] = { PIN(GPIOAO_3, AO_OFF) };
  300. static const unsigned int uart_tx_ao_b1_pins[] = { PIN(GPIOAO_4, AO_OFF) };
  301. static const unsigned int uart_rx_ao_b1_pins[] = { PIN(GPIOAO_5, AO_OFF) };
  302. static const unsigned int spdif_out_1_pins[] = { PIN(GPIOAO_6, AO_OFF) };
  303. static const unsigned int i2s_in_ch01_pins[] = { PIN(GPIOAO_6, AO_OFF) };
  304. static const unsigned int i2s_ao_clk_in_pins[] = { PIN(GPIOAO_9, AO_OFF) };
  305. static const unsigned int i2s_lr_clk_in_pins[] = { PIN(GPIOAO_10, AO_OFF) };
  306. /* bank DIF */
  307. static const unsigned int eth_rxd1_pins[] = { PIN(DIF_0_P, 0) };
  308. static const unsigned int eth_rxd0_pins[] = { PIN(DIF_0_N, 0) };
  309. static const unsigned int eth_rx_dv_pins[] = { PIN(DIF_1_P, 0) };
  310. static const unsigned int eth_rx_clk_pins[] = { PIN(DIF_1_N, 0) };
  311. static const unsigned int eth_txd0_1_pins[] = { PIN(DIF_2_P, 0) };
  312. static const unsigned int eth_txd1_1_pins[] = { PIN(DIF_2_N, 0) };
  313. static const unsigned int eth_tx_en_pins[] = { PIN(DIF_3_P, 0) };
  314. static const unsigned int eth_ref_clk_pins[] = { PIN(DIF_3_N, 0) };
  315. static const unsigned int eth_mdc_pins[] = { PIN(DIF_4_P, 0) };
  316. static const unsigned int eth_mdio_en_pins[] = { PIN(DIF_4_N, 0) };
  317. static struct meson_pmx_group meson8b_cbus_groups[] = {
  318. GPIO_GROUP(GPIOX_0, 0),
  319. GPIO_GROUP(GPIOX_1, 0),
  320. GPIO_GROUP(GPIOX_2, 0),
  321. GPIO_GROUP(GPIOX_3, 0),
  322. GPIO_GROUP(GPIOX_4, 0),
  323. GPIO_GROUP(GPIOX_5, 0),
  324. GPIO_GROUP(GPIOX_6, 0),
  325. GPIO_GROUP(GPIOX_7, 0),
  326. GPIO_GROUP(GPIOX_8, 0),
  327. GPIO_GROUP(GPIOX_9, 0),
  328. GPIO_GROUP(GPIOX_10, 0),
  329. GPIO_GROUP(GPIOX_11, 0),
  330. GPIO_GROUP(GPIOX_16, 0),
  331. GPIO_GROUP(GPIOX_17, 0),
  332. GPIO_GROUP(GPIOX_18, 0),
  333. GPIO_GROUP(GPIOX_19, 0),
  334. GPIO_GROUP(GPIOX_20, 0),
  335. GPIO_GROUP(GPIOX_21, 0),
  336. GPIO_GROUP(GPIOY_0, 0),
  337. GPIO_GROUP(GPIOY_1, 0),
  338. GPIO_GROUP(GPIOY_3, 0),
  339. GPIO_GROUP(GPIOY_6, 0),
  340. GPIO_GROUP(GPIOY_7, 0),
  341. GPIO_GROUP(GPIOY_8, 0),
  342. GPIO_GROUP(GPIOY_9, 0),
  343. GPIO_GROUP(GPIOY_10, 0),
  344. GPIO_GROUP(GPIOY_11, 0),
  345. GPIO_GROUP(GPIOY_12, 0),
  346. GPIO_GROUP(GPIOY_13, 0),
  347. GPIO_GROUP(GPIOY_14, 0),
  348. GPIO_GROUP(GPIODV_9, 0),
  349. GPIO_GROUP(GPIODV_24, 0),
  350. GPIO_GROUP(GPIODV_25, 0),
  351. GPIO_GROUP(GPIODV_26, 0),
  352. GPIO_GROUP(GPIODV_27, 0),
  353. GPIO_GROUP(GPIODV_28, 0),
  354. GPIO_GROUP(GPIODV_29, 0),
  355. GPIO_GROUP(GPIOH_0, 0),
  356. GPIO_GROUP(GPIOH_1, 0),
  357. GPIO_GROUP(GPIOH_2, 0),
  358. GPIO_GROUP(GPIOH_3, 0),
  359. GPIO_GROUP(GPIOH_4, 0),
  360. GPIO_GROUP(GPIOH_5, 0),
  361. GPIO_GROUP(GPIOH_6, 0),
  362. GPIO_GROUP(GPIOH_7, 0),
  363. GPIO_GROUP(GPIOH_8, 0),
  364. GPIO_GROUP(GPIOH_9, 0),
  365. GPIO_GROUP(DIF_0_P, 0),
  366. GPIO_GROUP(DIF_0_N, 0),
  367. GPIO_GROUP(DIF_1_P, 0),
  368. GPIO_GROUP(DIF_1_N, 0),
  369. GPIO_GROUP(DIF_2_P, 0),
  370. GPIO_GROUP(DIF_2_N, 0),
  371. GPIO_GROUP(DIF_3_P, 0),
  372. GPIO_GROUP(DIF_3_N, 0),
  373. GPIO_GROUP(DIF_4_P, 0),
  374. GPIO_GROUP(DIF_4_N, 0),
  375. /* bank X */
  376. GROUP(sd_d0_a, 8, 5),
  377. GROUP(sd_d1_a, 8, 4),
  378. GROUP(sd_d2_a, 8, 3),
  379. GROUP(sd_d3_a, 8, 2),
  380. GROUP(sdxc_d0_0_a, 5, 29),
  381. GROUP(sdxc_d47_a, 5, 12),
  382. GROUP(sdxc_d13_0_a, 5, 28),
  383. GROUP(sd_clk_a, 8, 1),
  384. GROUP(sd_cmd_a, 8, 0),
  385. GROUP(xtal_32k_out, 3, 22),
  386. GROUP(xtal_24m_out, 3, 20),
  387. GROUP(uart_tx_b0, 4, 9),
  388. GROUP(uart_rx_b0, 4, 8),
  389. GROUP(uart_cts_b0, 4, 7),
  390. GROUP(uart_rts_b0, 4, 6),
  391. GROUP(sdxc_d0_1_a, 5, 14),
  392. GROUP(sdxc_d13_1_a, 5, 13),
  393. GROUP(pcm_out_a, 3, 30),
  394. GROUP(pcm_in_a, 3, 29),
  395. GROUP(pcm_fs_a, 3, 28),
  396. GROUP(pcm_clk_a, 3, 27),
  397. GROUP(sdxc_clk_a, 5, 11),
  398. GROUP(sdxc_cmd_a, 5, 10),
  399. GROUP(pwm_vs_0, 7, 31),
  400. GROUP(pwm_e, 9, 19),
  401. GROUP(pwm_vs_1, 7, 30),
  402. GROUP(uart_tx_a, 4, 17),
  403. GROUP(uart_rx_a, 4, 16),
  404. GROUP(uart_cts_a, 4, 15),
  405. GROUP(uart_rts_a, 4, 14),
  406. GROUP(uart_tx_b1, 6, 19),
  407. GROUP(uart_rx_b1, 6, 18),
  408. GROUP(uart_cts_b1, 6, 17),
  409. GROUP(uart_rts_b1, 6, 16),
  410. GROUP(iso7816_0_clk, 5, 9),
  411. GROUP(iso7816_0_data, 5, 8),
  412. GROUP(spi_sclk_0, 4, 22),
  413. GROUP(spi_miso_0, 4, 24),
  414. GROUP(spi_mosi_0, 4, 23),
  415. GROUP(iso7816_det, 4, 21),
  416. GROUP(iso7816_reset, 4, 20),
  417. GROUP(iso7816_1_clk, 4, 19),
  418. GROUP(iso7816_1_data, 4, 18),
  419. GROUP(spi_ss0_0, 4, 25),
  420. GROUP(tsin_clk_b, 3, 6),
  421. GROUP(tsin_sop_b, 3, 7),
  422. GROUP(tsin_d0_b, 3, 8),
  423. GROUP(pwm_b, 2, 3),
  424. GROUP(i2c_sda_d0, 4, 5),
  425. GROUP(i2c_sck_d0, 4, 4),
  426. GROUP(tsin_d_valid_b, 3, 9),
  427. /* bank Y */
  428. GROUP(tsin_d_valid_a, 3, 2),
  429. GROUP(tsin_sop_a, 3, 1),
  430. GROUP(tsin_d17_a, 3, 5),
  431. GROUP(tsin_clk_a, 3, 0),
  432. GROUP(tsin_d0_a, 3, 4),
  433. GROUP(spdif_out_0, 1, 7),
  434. GROUP(xtal_24m, 3, 18),
  435. GROUP(iso7816_2_clk, 5, 7),
  436. GROUP(iso7816_2_data, 5, 6),
  437. /* bank DV */
  438. GROUP(pwm_d, 3, 26),
  439. GROUP(pwm_c0, 3, 25),
  440. GROUP(pwm_vs_2, 7, 28),
  441. GROUP(pwm_vs_3, 7, 27),
  442. GROUP(pwm_vs_4, 7, 26),
  443. GROUP(xtal24_out, 7, 25),
  444. GROUP(uart_tx_c, 6, 23),
  445. GROUP(uart_rx_c, 6, 22),
  446. GROUP(uart_cts_c, 6, 21),
  447. GROUP(uart_rts_c, 6, 20),
  448. GROUP(pwm_c1, 3, 24),
  449. GROUP(i2c_sda_a, 9, 31),
  450. GROUP(i2c_sck_a, 9, 30),
  451. GROUP(i2c_sda_b0, 9, 29),
  452. GROUP(i2c_sck_b0, 9, 28),
  453. GROUP(i2c_sda_c0, 9, 27),
  454. GROUP(i2c_sck_c0, 9, 26),
  455. /* bank H */
  456. GROUP(hdmi_hpd, 1, 26),
  457. GROUP(hdmi_sda, 1, 25),
  458. GROUP(hdmi_scl, 1, 24),
  459. GROUP(hdmi_cec_0, 1, 23),
  460. GROUP(eth_txd1_0, 7, 21),
  461. GROUP(eth_txd0_0, 7, 20),
  462. GROUP(clk_24m_out, 4, 1),
  463. GROUP(spi_ss1, 8, 11),
  464. GROUP(spi_ss2, 8, 12),
  465. GROUP(spi_ss0_1, 9, 13),
  466. GROUP(spi_miso_1, 9, 12),
  467. GROUP(spi_mosi_1, 9, 11),
  468. GROUP(spi_sclk_1, 9, 10),
  469. GROUP(eth_txd3, 6, 13),
  470. GROUP(eth_txd2, 6, 12),
  471. GROUP(eth_tx_clk, 6, 11),
  472. GROUP(i2c_sda_b1, 5, 27),
  473. GROUP(i2c_sck_b1, 5, 26),
  474. GROUP(i2c_sda_c1, 5, 25),
  475. GROUP(i2c_sck_c1, 5, 24),
  476. GROUP(i2c_sda_d1, 4, 3),
  477. GROUP(i2c_sck_d1, 4, 2),
  478. /* bank BOOT */
  479. GROUP(nand_io, 2, 26),
  480. GROUP(nand_io_ce0, 2, 25),
  481. GROUP(nand_io_ce1, 2, 24),
  482. GROUP(nand_io_rb0, 2, 17),
  483. GROUP(nand_ale, 2, 21),
  484. GROUP(nand_cle, 2, 20),
  485. GROUP(nand_wen_clk, 2, 19),
  486. GROUP(nand_ren_clk, 2, 18),
  487. GROUP(nand_dqs_15, 2, 27),
  488. GROUP(nand_dqs_18, 2, 28),
  489. GROUP(sdxc_d0_c, 4, 30),
  490. GROUP(sdxc_d13_c, 4, 29),
  491. GROUP(sdxc_d47_c, 4, 28),
  492. GROUP(sdxc_clk_c, 7, 19),
  493. GROUP(sdxc_cmd_c, 7, 18),
  494. GROUP(nor_d, 5, 1),
  495. GROUP(nor_q, 5, 3),
  496. GROUP(nor_c, 5, 2),
  497. GROUP(nor_cs, 5, 0),
  498. GROUP(sd_d0_c, 6, 29),
  499. GROUP(sd_d1_c, 6, 28),
  500. GROUP(sd_d2_c, 6, 27),
  501. GROUP(sd_d3_c, 6, 26),
  502. GROUP(sd_cmd_c, 6, 30),
  503. GROUP(sd_clk_c, 6, 31),
  504. /* bank CARD */
  505. GROUP(sd_d1_b, 2, 14),
  506. GROUP(sd_d0_b, 2, 15),
  507. GROUP(sd_clk_b, 2, 11),
  508. GROUP(sd_cmd_b, 2, 10),
  509. GROUP(sd_d3_b, 2, 12),
  510. GROUP(sd_d2_b, 2, 13),
  511. GROUP(sdxc_d13_b, 2, 6),
  512. GROUP(sdxc_d0_b, 2, 7),
  513. GROUP(sdxc_clk_b, 2, 5),
  514. GROUP(sdxc_cmd_b, 2, 4),
  515. /* bank DIF */
  516. GROUP(eth_rxd1, 6, 0),
  517. GROUP(eth_rxd0, 6, 1),
  518. GROUP(eth_rx_dv, 6, 2),
  519. GROUP(eth_rx_clk, 6, 3),
  520. GROUP(eth_txd0_1, 6, 4),
  521. GROUP(eth_txd1_1, 6, 5),
  522. GROUP(eth_tx_en, 6, 6),
  523. GROUP(eth_ref_clk, 6, 8),
  524. GROUP(eth_mdc, 6, 9),
  525. GROUP(eth_mdio_en, 6, 10),
  526. };
  527. static struct meson_pmx_group meson8b_aobus_groups[] = {
  528. GPIO_GROUP(GPIOAO_0, AO_OFF),
  529. GPIO_GROUP(GPIOAO_1, AO_OFF),
  530. GPIO_GROUP(GPIOAO_2, AO_OFF),
  531. GPIO_GROUP(GPIOAO_3, AO_OFF),
  532. GPIO_GROUP(GPIOAO_4, AO_OFF),
  533. GPIO_GROUP(GPIOAO_5, AO_OFF),
  534. GPIO_GROUP(GPIOAO_6, AO_OFF),
  535. GPIO_GROUP(GPIOAO_7, AO_OFF),
  536. GPIO_GROUP(GPIOAO_8, AO_OFF),
  537. GPIO_GROUP(GPIOAO_9, AO_OFF),
  538. GPIO_GROUP(GPIOAO_10, AO_OFF),
  539. GPIO_GROUP(GPIOAO_11, AO_OFF),
  540. GPIO_GROUP(GPIOAO_12, AO_OFF),
  541. GPIO_GROUP(GPIOAO_13, AO_OFF),
  542. GPIO_GROUP(GPIO_BSD_EN, AO_OFF),
  543. GPIO_GROUP(GPIO_TEST_N, AO_OFF),
  544. /* bank AO */
  545. GROUP(uart_tx_ao_a, 0, 12),
  546. GROUP(uart_rx_ao_a, 0, 11),
  547. GROUP(uart_cts_ao_a, 0, 10),
  548. GROUP(uart_rts_ao_a, 0, 9),
  549. GROUP(i2c_mst_sck_ao, 0, 6),
  550. GROUP(i2c_mst_sda_ao, 0, 5),
  551. GROUP(clk_32k_in_out, 0, 18),
  552. GROUP(remote_input, 0, 0),
  553. GROUP(hdmi_cec_1, 0, 17),
  554. GROUP(ir_blaster, 0, 31),
  555. GROUP(pwm_c2, 0, 22),
  556. GROUP(i2c_sck_ao, 0, 2),
  557. GROUP(i2c_sda_ao, 0, 1),
  558. GROUP(ir_remote_out, 0, 21),
  559. GROUP(i2s_am_clk_out, 0, 30),
  560. GROUP(i2s_ao_clk_out, 0, 29),
  561. GROUP(i2s_lr_clk_out, 0, 28),
  562. GROUP(i2s_out_01, 0, 27),
  563. GROUP(uart_tx_ao_b0, 0, 26),
  564. GROUP(uart_rx_ao_b0, 0, 25),
  565. GROUP(uart_cts_ao_b, 0, 8),
  566. GROUP(uart_rts_ao_b, 0, 7),
  567. GROUP(uart_tx_ao_b1, 0, 24),
  568. GROUP(uart_rx_ao_b1, 0, 23),
  569. GROUP(spdif_out_1, 0, 16),
  570. GROUP(i2s_in_ch01, 0, 13),
  571. GROUP(i2s_ao_clk_in, 0, 15),
  572. GROUP(i2s_lr_clk_in, 0, 14),
  573. };
  574. static const char * const gpio_groups[] = {
  575. "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
  576. "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
  577. "GPIOX_10", "GPIOX_11", "GPIOX_16", "GPIOX_17", "GPIOX_18",
  578. "GPIOX_19", "GPIOX_20", "GPIOX_21",
  579. "GPIOY_0", "GPIOY_1", "GPIOY_3", "GPIOY_6", "GPIOY_7",
  580. "GPIOY_8", "GPIOY_9", "GPIOY_10", "GPIOY_11", "GPIOY_12",
  581. "GPIOY_13", "GPIOY_14",
  582. "GPIODV_9", "GPIODV_24", "GPIODV_25", "GPIODV_26",
  583. "GPIODV_27", "GPIODV_28", "GPIODV_29",
  584. "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4",
  585. "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9",
  586. "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
  587. "CARD_5", "CARD_6",
  588. "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
  589. "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
  590. "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
  591. "BOOT_15", "BOOT_16", "BOOT_17", "BOOT_18",
  592. "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3",
  593. "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7",
  594. "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11",
  595. "GPIOAO_12", "GPIOAO_13", "GPIO_BSD_EN", "GPIO_TEST_N",
  596. "DIF_0_P", "DIF_0_N", "DIF_1_P", "DIF_1_N",
  597. "DIF_2_P", "DIF_2_N", "DIF_3_P", "DIF_3_N",
  598. "DIF_4_P", "DIF_4_N"
  599. };
  600. static const char * const sd_a_groups[] = {
  601. "sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a",
  602. "sd_cmd_a"
  603. };
  604. static const char * const sdxc_a_groups[] = {
  605. "sdxc_d0_0_a", "sdxc_d13_0_a", "sdxc_d47_a", "sdxc_clk_a",
  606. "sdxc_cmd_a", "sdxc_d0_1_a", "sdxc_d0_13_1_a"
  607. };
  608. static const char * const pcm_a_groups[] = {
  609. "pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a"
  610. };
  611. static const char * const uart_a_groups[] = {
  612. "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a"
  613. };
  614. static const char * const uart_b_groups[] = {
  615. "uart_tx_b0", "uart_rx_b0", "uart_cts_b0", "uart_rts_b0",
  616. "uart_tx_b1", "uart_rx_b1", "uart_cts_b1", "uart_rts_b1"
  617. };
  618. static const char * const iso7816_groups[] = {
  619. "iso7816_det", "iso7816_reset", "iso7816_0_clk", "iso7816_0_data",
  620. "iso7816_1_clk", "iso7816_1_data", "iso7816_2_clk", "iso7816_2_data"
  621. };
  622. static const char * const i2c_d_groups[] = {
  623. "i2c_sda_d0", "i2c_sck_d0", "i2c_sda_d1", "i2c_sck_d1"
  624. };
  625. static const char * const xtal_groups[] = {
  626. "xtal_32k_out", "xtal_24m_out", "xtal_24m", "xtal24_out"
  627. };
  628. static const char * const uart_c_groups[] = {
  629. "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c"
  630. };
  631. static const char * const i2c_c_groups[] = {
  632. "i2c_sda_c0", "i2c_sck_c0", "i2c_sda_c1", "i2c_sck_c1"
  633. };
  634. static const char * const hdmi_groups[] = {
  635. "hdmi_hpd", "hdmi_sda", "hdmi_scl", "hdmi_cec_0"
  636. };
  637. static const char * const hdmi_cec_groups[] = {
  638. "hdmi_cec_1"
  639. };
  640. static const char * const spi_groups[] = {
  641. "spi_ss0_0", "spi_miso_0", "spi_mosi_0", "spi_sclk_0",
  642. "spi_ss0_1", "spi_ss1", "spi_sclk_1", "spi_mosi_1",
  643. "spi_miso_1", "spi_ss2"
  644. };
  645. static const char * const ethernet_groups[] = {
  646. "eth_tx_clk", "eth_tx_en", "eth_txd1_0", "eth_txd1_1",
  647. "eth_txd0_0", "eth_txd0_1", "eth_rx_clk", "eth_rx_dv",
  648. "eth_rxd1", "eth_rxd0", "eth_mdio_en", "eth_mdc", "eth_ref_clk",
  649. "eth_txd2", "eth_txd3"
  650. };
  651. static const char * const i2c_a_groups[] = {
  652. "i2c_sda_a", "i2c_sck_a",
  653. };
  654. static const char * const i2c_b_groups[] = {
  655. "i2c_sda_b0", "i2c_sck_b0", "i2c_sda_b1", "i2c_sck_b1"
  656. };
  657. static const char * const sd_c_groups[] = {
  658. "sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c",
  659. "sd_cmd_c", "sd_clk_c"
  660. };
  661. static const char * const sdxc_c_groups[] = {
  662. "sdxc_d0_c", "sdxc_d13_c", "sdxc_d47_c", "sdxc_cmd_c",
  663. "sdxc_clk_c"
  664. };
  665. static const char * const nand_groups[] = {
  666. "nand_io", "nand_io_ce0", "nand_io_ce1",
  667. "nand_io_rb0", "nand_ale", "nand_cle",
  668. "nand_wen_clk", "nand_ren_clk", "nand_dqs_15",
  669. "nand_dqs_18"
  670. };
  671. static const char * const nor_groups[] = {
  672. "nor_d", "nor_q", "nor_c", "nor_cs"
  673. };
  674. static const char * const sd_b_groups[] = {
  675. "sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b",
  676. "sd_d3_b", "sd_d2_b"
  677. };
  678. static const char * const sdxc_b_groups[] = {
  679. "sdxc_d13_b", "sdxc_d0_b", "sdxc_clk_b", "sdxc_cmd_b"
  680. };
  681. static const char * const uart_ao_groups[] = {
  682. "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a"
  683. };
  684. static const char * const remote_groups[] = {
  685. "remote_input", "ir_blaster", "ir_remote_out"
  686. };
  687. static const char * const i2c_slave_ao_groups[] = {
  688. "i2c_sck_ao", "i2c_sda_ao"
  689. };
  690. static const char * const uart_ao_b_groups[] = {
  691. "uart_tx_ao_b0", "uart_rx_ao_b0", "uart_tx_ao_b1", "uart_rx_ao_b1",
  692. "uart_cts_ao_b", "uart_rts_ao_b"
  693. };
  694. static const char * const i2c_mst_ao_groups[] = {
  695. "i2c_mst_sck_ao", "i2c_mst_sda_ao"
  696. };
  697. static const char * const clk_24m_groups[] = {
  698. "clk_24m_out"
  699. };
  700. static const char * const clk_32k_groups[] = {
  701. "clk_32k_in_out"
  702. };
  703. static const char * const spdif_0_groups[] = {
  704. "spdif_out_0"
  705. };
  706. static const char * const spdif_1_groups[] = {
  707. "spdif_out_1"
  708. };
  709. static const char * const i2s_groups[] = {
  710. "i2s_am_clk_out", "i2s_ao_clk_out", "i2s_lr_clk_out",
  711. "i2s_out_01", "i2s_in_ch01", "i2s_ao_clk_in",
  712. "i2s_lr_clk_in"
  713. };
  714. static const char * const pwm_b_groups[] = {
  715. "pwm_b"
  716. };
  717. static const char * const pwm_c_groups[] = {
  718. "pwm_c0", "pwm_c1"
  719. };
  720. static const char * const pwm_c_ao_groups[] = {
  721. "pwm_c2"
  722. };
  723. static const char * const pwm_d_groups[] = {
  724. "pwm_d"
  725. };
  726. static const char * const pwm_e_groups[] = {
  727. "pwm_e"
  728. };
  729. static const char * const pwm_vs_groups[] = {
  730. "pwm_vs_0", "pwm_vs_1", "pwm_vs_2",
  731. "pwm_vs_3", "pwm_vs_4"
  732. };
  733. static const char * const tsin_a_groups[] = {
  734. "tsin_d0_a", "tsin_d17_a", "tsin_clk_a", "tsin_sop_a",
  735. "tsin_d_valid_a"
  736. };
  737. static const char * const tsin_b_groups[] = {
  738. "tsin_d0_b", "tsin_clk_b", "tsin_sop_b", "tsin_d_valid_b"
  739. };
  740. static struct meson_pmx_func meson8b_cbus_functions[] = {
  741. FUNCTION(gpio),
  742. FUNCTION(sd_a),
  743. FUNCTION(sdxc_a),
  744. FUNCTION(pcm_a),
  745. FUNCTION(uart_a),
  746. FUNCTION(uart_b),
  747. FUNCTION(iso7816),
  748. FUNCTION(i2c_d),
  749. FUNCTION(xtal),
  750. FUNCTION(uart_c),
  751. FUNCTION(i2c_c),
  752. FUNCTION(hdmi),
  753. FUNCTION(spi),
  754. FUNCTION(ethernet),
  755. FUNCTION(i2c_a),
  756. FUNCTION(i2c_b),
  757. FUNCTION(sd_c),
  758. FUNCTION(sdxc_c),
  759. FUNCTION(nand),
  760. FUNCTION(nor),
  761. FUNCTION(sd_b),
  762. FUNCTION(sdxc_b),
  763. FUNCTION(spdif_0),
  764. FUNCTION(pwm_b),
  765. FUNCTION(pwm_c),
  766. FUNCTION(pwm_d),
  767. FUNCTION(pwm_e),
  768. FUNCTION(pwm_vs),
  769. FUNCTION(tsin_a),
  770. FUNCTION(tsin_b),
  771. FUNCTION(clk_24m),
  772. };
  773. static struct meson_pmx_func meson8b_aobus_functions[] = {
  774. FUNCTION(uart_ao),
  775. FUNCTION(uart_ao_b),
  776. FUNCTION(i2c_slave_ao),
  777. FUNCTION(i2c_mst_ao),
  778. FUNCTION(i2s),
  779. FUNCTION(remote),
  780. FUNCTION(clk_32k),
  781. FUNCTION(pwm_c_ao),
  782. FUNCTION(spdif_1),
  783. FUNCTION(hdmi_cec),
  784. };
  785. static struct meson_bank meson8b_cbus_banks[] = {
  786. /* name first last irq pullen pull dir out in */
  787. BANK("X", PIN(GPIOX_0, 0), PIN(GPIOX_21, 0), 97, 118, 4, 0, 4, 0, 0, 0, 1, 0, 2, 0),
  788. BANK("Y", PIN(GPIOY_0, 0), PIN(GPIOY_14, 0), 80, 96, 3, 0, 3, 0, 3, 0, 4, 0, 5, 0),
  789. BANK("DV", PIN(GPIODV_9, 0), PIN(GPIODV_29, 0), 59, 79, 0, 0, 0, 0, 7, 0, 8, 0, 9, 0),
  790. BANK("H", PIN(GPIOH_0, 0), PIN(GPIOH_9, 0), 14, 23, 1, 16, 1, 16, 9, 19, 10, 19, 11, 19),
  791. BANK("CARD", PIN(CARD_0, 0), PIN(CARD_6, 0), 43, 49, 2, 20, 2, 20, 0, 22, 1, 22, 2, 22),
  792. BANK("BOOT", PIN(BOOT_0, 0), PIN(BOOT_18, 0), 24, 42, 2, 0, 2, 0, 9, 0, 10, 0, 11, 0),
  793. /*
  794. * The following bank is not mentionned in the public datasheet
  795. * There is no information whether it can be used with the gpio
  796. * interrupt controller
  797. */
  798. BANK("DIF", PIN(DIF_0_P, 0), PIN(DIF_4_N, 0), -1, -1, 5, 8, 5, 8, 12, 12, 13, 12, 14, 12),
  799. };
  800. static struct meson_bank meson8b_aobus_banks[] = {
  801. /* name first last irq pullen pull dir out in */
  802. BANK("AO", PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 13, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
  803. };
  804. struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
  805. .name = "cbus-banks",
  806. .pin_base = 0,
  807. .pins = meson8b_cbus_pins,
  808. .groups = meson8b_cbus_groups,
  809. .funcs = meson8b_cbus_functions,
  810. .banks = meson8b_cbus_banks,
  811. .num_pins = ARRAY_SIZE(meson8b_cbus_pins),
  812. .num_groups = ARRAY_SIZE(meson8b_cbus_groups),
  813. .num_funcs = ARRAY_SIZE(meson8b_cbus_functions),
  814. .num_banks = ARRAY_SIZE(meson8b_cbus_banks),
  815. };
  816. struct meson_pinctrl_data meson8b_aobus_pinctrl_data = {
  817. .name = "aobus-banks",
  818. .pin_base = 130,
  819. .pins = meson8b_aobus_pins,
  820. .groups = meson8b_aobus_groups,
  821. .funcs = meson8b_aobus_functions,
  822. .banks = meson8b_aobus_banks,
  823. .num_pins = ARRAY_SIZE(meson8b_aobus_pins),
  824. .num_groups = ARRAY_SIZE(meson8b_aobus_groups),
  825. .num_funcs = ARRAY_SIZE(meson8b_aobus_functions),
  826. .num_banks = ARRAY_SIZE(meson8b_aobus_banks),
  827. };