pci-sysfs.c 44 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include <linux/of.h>
  31. #include "pci.h"
  32. static int sysfs_initialized; /* = 0 */
  33. /* show configuration fields */
  34. #define pci_config_attr(field, format_string) \
  35. static ssize_t \
  36. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  37. { \
  38. struct pci_dev *pdev; \
  39. \
  40. pdev = to_pci_dev(dev); \
  41. return sprintf(buf, format_string, pdev->field); \
  42. } \
  43. static DEVICE_ATTR_RO(field)
  44. pci_config_attr(vendor, "0x%04x\n");
  45. pci_config_attr(device, "0x%04x\n");
  46. pci_config_attr(subsystem_vendor, "0x%04x\n");
  47. pci_config_attr(subsystem_device, "0x%04x\n");
  48. pci_config_attr(revision, "0x%02x\n");
  49. pci_config_attr(class, "0x%06x\n");
  50. pci_config_attr(irq, "%u\n");
  51. static ssize_t broken_parity_status_show(struct device *dev,
  52. struct device_attribute *attr,
  53. char *buf)
  54. {
  55. struct pci_dev *pdev = to_pci_dev(dev);
  56. return sprintf(buf, "%u\n", pdev->broken_parity_status);
  57. }
  58. static ssize_t broken_parity_status_store(struct device *dev,
  59. struct device_attribute *attr,
  60. const char *buf, size_t count)
  61. {
  62. struct pci_dev *pdev = to_pci_dev(dev);
  63. unsigned long val;
  64. if (kstrtoul(buf, 0, &val) < 0)
  65. return -EINVAL;
  66. pdev->broken_parity_status = !!val;
  67. return count;
  68. }
  69. static DEVICE_ATTR_RW(broken_parity_status);
  70. static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
  71. struct device_attribute *attr, char *buf)
  72. {
  73. const struct cpumask *mask;
  74. #ifdef CONFIG_NUMA
  75. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  76. cpumask_of_node(dev_to_node(dev));
  77. #else
  78. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  79. #endif
  80. return cpumap_print_to_pagebuf(list, buf, mask);
  81. }
  82. static ssize_t local_cpus_show(struct device *dev,
  83. struct device_attribute *attr, char *buf)
  84. {
  85. return pci_dev_show_local_cpu(dev, false, attr, buf);
  86. }
  87. static DEVICE_ATTR_RO(local_cpus);
  88. static ssize_t local_cpulist_show(struct device *dev,
  89. struct device_attribute *attr, char *buf)
  90. {
  91. return pci_dev_show_local_cpu(dev, true, attr, buf);
  92. }
  93. static DEVICE_ATTR_RO(local_cpulist);
  94. /*
  95. * PCI Bus Class Devices
  96. */
  97. static ssize_t cpuaffinity_show(struct device *dev,
  98. struct device_attribute *attr, char *buf)
  99. {
  100. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  101. return cpumap_print_to_pagebuf(false, buf, cpumask);
  102. }
  103. static DEVICE_ATTR_RO(cpuaffinity);
  104. static ssize_t cpulistaffinity_show(struct device *dev,
  105. struct device_attribute *attr, char *buf)
  106. {
  107. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  108. return cpumap_print_to_pagebuf(true, buf, cpumask);
  109. }
  110. static DEVICE_ATTR_RO(cpulistaffinity);
  111. /* show resources */
  112. static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
  113. char *buf)
  114. {
  115. struct pci_dev *pci_dev = to_pci_dev(dev);
  116. char *str = buf;
  117. int i;
  118. int max;
  119. resource_size_t start, end;
  120. if (pci_dev->subordinate)
  121. max = DEVICE_COUNT_RESOURCE;
  122. else
  123. max = PCI_BRIDGE_RESOURCES;
  124. for (i = 0; i < max; i++) {
  125. struct resource *res = &pci_dev->resource[i];
  126. pci_resource_to_user(pci_dev, i, res, &start, &end);
  127. str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
  128. (unsigned long long)start,
  129. (unsigned long long)end,
  130. (unsigned long long)res->flags);
  131. }
  132. return (str - buf);
  133. }
  134. static DEVICE_ATTR_RO(resource);
  135. static ssize_t max_link_speed_show(struct device *dev,
  136. struct device_attribute *attr, char *buf)
  137. {
  138. struct pci_dev *pci_dev = to_pci_dev(dev);
  139. u32 linkcap;
  140. int err;
  141. const char *speed;
  142. err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap);
  143. if (err)
  144. return -EINVAL;
  145. switch (linkcap & PCI_EXP_LNKCAP_SLS) {
  146. case PCI_EXP_LNKCAP_SLS_8_0GB:
  147. speed = "8 GT/s";
  148. break;
  149. case PCI_EXP_LNKCAP_SLS_5_0GB:
  150. speed = "5 GT/s";
  151. break;
  152. case PCI_EXP_LNKCAP_SLS_2_5GB:
  153. speed = "2.5 GT/s";
  154. break;
  155. default:
  156. speed = "Unknown speed";
  157. }
  158. return sprintf(buf, "%s\n", speed);
  159. }
  160. static DEVICE_ATTR_RO(max_link_speed);
  161. static ssize_t max_link_width_show(struct device *dev,
  162. struct device_attribute *attr, char *buf)
  163. {
  164. struct pci_dev *pci_dev = to_pci_dev(dev);
  165. u32 linkcap;
  166. int err;
  167. err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap);
  168. if (err)
  169. return -EINVAL;
  170. return sprintf(buf, "%u\n", (linkcap & PCI_EXP_LNKCAP_MLW) >> 4);
  171. }
  172. static DEVICE_ATTR_RO(max_link_width);
  173. static ssize_t current_link_speed_show(struct device *dev,
  174. struct device_attribute *attr, char *buf)
  175. {
  176. struct pci_dev *pci_dev = to_pci_dev(dev);
  177. u16 linkstat;
  178. int err;
  179. const char *speed;
  180. err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
  181. if (err)
  182. return -EINVAL;
  183. switch (linkstat & PCI_EXP_LNKSTA_CLS) {
  184. case PCI_EXP_LNKSTA_CLS_8_0GB:
  185. speed = "8 GT/s";
  186. break;
  187. case PCI_EXP_LNKSTA_CLS_5_0GB:
  188. speed = "5 GT/s";
  189. break;
  190. case PCI_EXP_LNKSTA_CLS_2_5GB:
  191. speed = "2.5 GT/s";
  192. break;
  193. default:
  194. speed = "Unknown speed";
  195. }
  196. return sprintf(buf, "%s\n", speed);
  197. }
  198. static DEVICE_ATTR_RO(current_link_speed);
  199. static ssize_t current_link_width_show(struct device *dev,
  200. struct device_attribute *attr, char *buf)
  201. {
  202. struct pci_dev *pci_dev = to_pci_dev(dev);
  203. u16 linkstat;
  204. int err;
  205. err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
  206. if (err)
  207. return -EINVAL;
  208. return sprintf(buf, "%u\n",
  209. (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
  210. }
  211. static DEVICE_ATTR_RO(current_link_width);
  212. static ssize_t secondary_bus_number_show(struct device *dev,
  213. struct device_attribute *attr,
  214. char *buf)
  215. {
  216. struct pci_dev *pci_dev = to_pci_dev(dev);
  217. u8 sec_bus;
  218. int err;
  219. err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
  220. if (err)
  221. return -EINVAL;
  222. return sprintf(buf, "%u\n", sec_bus);
  223. }
  224. static DEVICE_ATTR_RO(secondary_bus_number);
  225. static ssize_t subordinate_bus_number_show(struct device *dev,
  226. struct device_attribute *attr,
  227. char *buf)
  228. {
  229. struct pci_dev *pci_dev = to_pci_dev(dev);
  230. u8 sub_bus;
  231. int err;
  232. err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
  233. if (err)
  234. return -EINVAL;
  235. return sprintf(buf, "%u\n", sub_bus);
  236. }
  237. static DEVICE_ATTR_RO(subordinate_bus_number);
  238. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
  239. char *buf)
  240. {
  241. struct pci_dev *pci_dev = to_pci_dev(dev);
  242. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
  243. pci_dev->vendor, pci_dev->device,
  244. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  245. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  246. (u8)(pci_dev->class));
  247. }
  248. static DEVICE_ATTR_RO(modalias);
  249. static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
  250. const char *buf, size_t count)
  251. {
  252. struct pci_dev *pdev = to_pci_dev(dev);
  253. unsigned long val;
  254. ssize_t result = kstrtoul(buf, 0, &val);
  255. if (result < 0)
  256. return result;
  257. /* this can crash the machine when done on the "wrong" device */
  258. if (!capable(CAP_SYS_ADMIN))
  259. return -EPERM;
  260. if (!val) {
  261. if (pci_is_enabled(pdev))
  262. pci_disable_device(pdev);
  263. else
  264. result = -EIO;
  265. } else
  266. result = pci_enable_device(pdev);
  267. return result < 0 ? result : count;
  268. }
  269. static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
  270. char *buf)
  271. {
  272. struct pci_dev *pdev;
  273. pdev = to_pci_dev(dev);
  274. return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
  275. }
  276. static DEVICE_ATTR_RW(enable);
  277. #ifdef CONFIG_NUMA
  278. static ssize_t numa_node_store(struct device *dev,
  279. struct device_attribute *attr, const char *buf,
  280. size_t count)
  281. {
  282. struct pci_dev *pdev = to_pci_dev(dev);
  283. int node, ret;
  284. if (!capable(CAP_SYS_ADMIN))
  285. return -EPERM;
  286. ret = kstrtoint(buf, 0, &node);
  287. if (ret)
  288. return ret;
  289. if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
  290. return -EINVAL;
  291. if (node != NUMA_NO_NODE && !node_online(node))
  292. return -EINVAL;
  293. add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
  294. dev_alert(&pdev->dev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
  295. node);
  296. dev->numa_node = node;
  297. return count;
  298. }
  299. static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
  300. char *buf)
  301. {
  302. return sprintf(buf, "%d\n", dev->numa_node);
  303. }
  304. static DEVICE_ATTR_RW(numa_node);
  305. #endif
  306. static ssize_t dma_mask_bits_show(struct device *dev,
  307. struct device_attribute *attr, char *buf)
  308. {
  309. struct pci_dev *pdev = to_pci_dev(dev);
  310. return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
  311. }
  312. static DEVICE_ATTR_RO(dma_mask_bits);
  313. static ssize_t consistent_dma_mask_bits_show(struct device *dev,
  314. struct device_attribute *attr,
  315. char *buf)
  316. {
  317. return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
  318. }
  319. static DEVICE_ATTR_RO(consistent_dma_mask_bits);
  320. static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
  321. char *buf)
  322. {
  323. struct pci_dev *pdev = to_pci_dev(dev);
  324. struct pci_bus *subordinate = pdev->subordinate;
  325. return sprintf(buf, "%u\n", subordinate ?
  326. !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
  327. : !pdev->no_msi);
  328. }
  329. static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
  330. const char *buf, size_t count)
  331. {
  332. struct pci_dev *pdev = to_pci_dev(dev);
  333. struct pci_bus *subordinate = pdev->subordinate;
  334. unsigned long val;
  335. if (kstrtoul(buf, 0, &val) < 0)
  336. return -EINVAL;
  337. if (!capable(CAP_SYS_ADMIN))
  338. return -EPERM;
  339. /*
  340. * "no_msi" and "bus_flags" only affect what happens when a driver
  341. * requests MSI or MSI-X. They don't affect any drivers that have
  342. * already requested MSI or MSI-X.
  343. */
  344. if (!subordinate) {
  345. pdev->no_msi = !val;
  346. dev_info(&pdev->dev, "MSI/MSI-X %s for future drivers\n",
  347. val ? "allowed" : "disallowed");
  348. return count;
  349. }
  350. if (val)
  351. subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  352. else
  353. subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  354. dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
  355. val ? "allowed" : "disallowed");
  356. return count;
  357. }
  358. static DEVICE_ATTR_RW(msi_bus);
  359. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  360. size_t count)
  361. {
  362. unsigned long val;
  363. struct pci_bus *b = NULL;
  364. if (kstrtoul(buf, 0, &val) < 0)
  365. return -EINVAL;
  366. if (val) {
  367. pci_lock_rescan_remove();
  368. while ((b = pci_find_next_bus(b)) != NULL)
  369. pci_rescan_bus(b);
  370. pci_unlock_rescan_remove();
  371. }
  372. return count;
  373. }
  374. static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
  375. static struct attribute *pci_bus_attrs[] = {
  376. &bus_attr_rescan.attr,
  377. NULL,
  378. };
  379. static const struct attribute_group pci_bus_group = {
  380. .attrs = pci_bus_attrs,
  381. };
  382. const struct attribute_group *pci_bus_groups[] = {
  383. &pci_bus_group,
  384. NULL,
  385. };
  386. static ssize_t dev_rescan_store(struct device *dev,
  387. struct device_attribute *attr, const char *buf,
  388. size_t count)
  389. {
  390. unsigned long val;
  391. struct pci_dev *pdev = to_pci_dev(dev);
  392. if (kstrtoul(buf, 0, &val) < 0)
  393. return -EINVAL;
  394. if (val) {
  395. pci_lock_rescan_remove();
  396. pci_rescan_bus(pdev->bus);
  397. pci_unlock_rescan_remove();
  398. }
  399. return count;
  400. }
  401. static struct device_attribute dev_rescan_attr = __ATTR(rescan,
  402. (S_IWUSR|S_IWGRP),
  403. NULL, dev_rescan_store);
  404. static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
  405. const char *buf, size_t count)
  406. {
  407. unsigned long val;
  408. if (kstrtoul(buf, 0, &val) < 0)
  409. return -EINVAL;
  410. if (val && device_remove_file_self(dev, attr))
  411. pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
  412. return count;
  413. }
  414. static struct device_attribute dev_remove_attr = __ATTR(remove,
  415. (S_IWUSR|S_IWGRP),
  416. NULL, remove_store);
  417. static ssize_t dev_bus_rescan_store(struct device *dev,
  418. struct device_attribute *attr,
  419. const char *buf, size_t count)
  420. {
  421. unsigned long val;
  422. struct pci_bus *bus = to_pci_bus(dev);
  423. if (kstrtoul(buf, 0, &val) < 0)
  424. return -EINVAL;
  425. if (val) {
  426. pci_lock_rescan_remove();
  427. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  428. pci_rescan_bus_bridge_resize(bus->self);
  429. else
  430. pci_rescan_bus(bus);
  431. pci_unlock_rescan_remove();
  432. }
  433. return count;
  434. }
  435. static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
  436. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  437. static ssize_t d3cold_allowed_store(struct device *dev,
  438. struct device_attribute *attr,
  439. const char *buf, size_t count)
  440. {
  441. struct pci_dev *pdev = to_pci_dev(dev);
  442. unsigned long val;
  443. if (kstrtoul(buf, 0, &val) < 0)
  444. return -EINVAL;
  445. pdev->d3cold_allowed = !!val;
  446. if (pdev->d3cold_allowed)
  447. pci_d3cold_enable(pdev);
  448. else
  449. pci_d3cold_disable(pdev);
  450. pm_runtime_resume(dev);
  451. return count;
  452. }
  453. static ssize_t d3cold_allowed_show(struct device *dev,
  454. struct device_attribute *attr, char *buf)
  455. {
  456. struct pci_dev *pdev = to_pci_dev(dev);
  457. return sprintf(buf, "%u\n", pdev->d3cold_allowed);
  458. }
  459. static DEVICE_ATTR_RW(d3cold_allowed);
  460. #endif
  461. #ifdef CONFIG_OF
  462. static ssize_t devspec_show(struct device *dev,
  463. struct device_attribute *attr, char *buf)
  464. {
  465. struct pci_dev *pdev = to_pci_dev(dev);
  466. struct device_node *np = pci_device_to_OF_node(pdev);
  467. if (np == NULL)
  468. return 0;
  469. return sprintf(buf, "%pOF", np);
  470. }
  471. static DEVICE_ATTR_RO(devspec);
  472. #endif
  473. #ifdef CONFIG_PCI_IOV
  474. static ssize_t sriov_totalvfs_show(struct device *dev,
  475. struct device_attribute *attr,
  476. char *buf)
  477. {
  478. struct pci_dev *pdev = to_pci_dev(dev);
  479. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  480. }
  481. static ssize_t sriov_numvfs_show(struct device *dev,
  482. struct device_attribute *attr,
  483. char *buf)
  484. {
  485. struct pci_dev *pdev = to_pci_dev(dev);
  486. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  487. }
  488. /*
  489. * num_vfs > 0; number of VFs to enable
  490. * num_vfs = 0; disable all VFs
  491. *
  492. * Note: SRIOV spec doesn't allow partial VF
  493. * disable, so it's all or none.
  494. */
  495. static ssize_t sriov_numvfs_store(struct device *dev,
  496. struct device_attribute *attr,
  497. const char *buf, size_t count)
  498. {
  499. struct pci_dev *pdev = to_pci_dev(dev);
  500. int ret;
  501. u16 num_vfs;
  502. ret = kstrtou16(buf, 0, &num_vfs);
  503. if (ret < 0)
  504. return ret;
  505. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  506. return -ERANGE;
  507. device_lock(&pdev->dev);
  508. if (num_vfs == pdev->sriov->num_VFs)
  509. goto exit;
  510. /* is PF driver loaded w/callback */
  511. if (!pdev->driver || !pdev->driver->sriov_configure) {
  512. dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
  513. ret = -ENOENT;
  514. goto exit;
  515. }
  516. if (num_vfs == 0) {
  517. /* disable VFs */
  518. ret = pdev->driver->sriov_configure(pdev, 0);
  519. goto exit;
  520. }
  521. /* enable VFs */
  522. if (pdev->sriov->num_VFs) {
  523. dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  524. pdev->sriov->num_VFs, num_vfs);
  525. ret = -EBUSY;
  526. goto exit;
  527. }
  528. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  529. if (ret < 0)
  530. goto exit;
  531. if (ret != num_vfs)
  532. dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
  533. num_vfs, ret);
  534. exit:
  535. device_unlock(&pdev->dev);
  536. if (ret < 0)
  537. return ret;
  538. return count;
  539. }
  540. static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
  541. struct device_attribute *attr,
  542. char *buf)
  543. {
  544. struct pci_dev *pdev = to_pci_dev(dev);
  545. return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe);
  546. }
  547. static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
  548. struct device_attribute *attr,
  549. const char *buf, size_t count)
  550. {
  551. struct pci_dev *pdev = to_pci_dev(dev);
  552. bool drivers_autoprobe;
  553. if (kstrtobool(buf, &drivers_autoprobe) < 0)
  554. return -EINVAL;
  555. pdev->sriov->drivers_autoprobe = drivers_autoprobe;
  556. return count;
  557. }
  558. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  559. static struct device_attribute sriov_numvfs_attr =
  560. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  561. sriov_numvfs_show, sriov_numvfs_store);
  562. static struct device_attribute sriov_drivers_autoprobe_attr =
  563. __ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP),
  564. sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store);
  565. #endif /* CONFIG_PCI_IOV */
  566. static ssize_t driver_override_store(struct device *dev,
  567. struct device_attribute *attr,
  568. const char *buf, size_t count)
  569. {
  570. struct pci_dev *pdev = to_pci_dev(dev);
  571. char *driver_override, *old, *cp;
  572. /* We need to keep extra room for a newline */
  573. if (count >= (PAGE_SIZE - 1))
  574. return -EINVAL;
  575. driver_override = kstrndup(buf, count, GFP_KERNEL);
  576. if (!driver_override)
  577. return -ENOMEM;
  578. cp = strchr(driver_override, '\n');
  579. if (cp)
  580. *cp = '\0';
  581. device_lock(dev);
  582. old = pdev->driver_override;
  583. if (strlen(driver_override)) {
  584. pdev->driver_override = driver_override;
  585. } else {
  586. kfree(driver_override);
  587. pdev->driver_override = NULL;
  588. }
  589. device_unlock(dev);
  590. kfree(old);
  591. return count;
  592. }
  593. static ssize_t driver_override_show(struct device *dev,
  594. struct device_attribute *attr, char *buf)
  595. {
  596. struct pci_dev *pdev = to_pci_dev(dev);
  597. ssize_t len;
  598. device_lock(dev);
  599. len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
  600. device_unlock(dev);
  601. return len;
  602. }
  603. static DEVICE_ATTR_RW(driver_override);
  604. static struct attribute *pci_dev_attrs[] = {
  605. &dev_attr_resource.attr,
  606. &dev_attr_vendor.attr,
  607. &dev_attr_device.attr,
  608. &dev_attr_subsystem_vendor.attr,
  609. &dev_attr_subsystem_device.attr,
  610. &dev_attr_revision.attr,
  611. &dev_attr_class.attr,
  612. &dev_attr_irq.attr,
  613. &dev_attr_local_cpus.attr,
  614. &dev_attr_local_cpulist.attr,
  615. &dev_attr_modalias.attr,
  616. #ifdef CONFIG_NUMA
  617. &dev_attr_numa_node.attr,
  618. #endif
  619. &dev_attr_dma_mask_bits.attr,
  620. &dev_attr_consistent_dma_mask_bits.attr,
  621. &dev_attr_enable.attr,
  622. &dev_attr_broken_parity_status.attr,
  623. &dev_attr_msi_bus.attr,
  624. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  625. &dev_attr_d3cold_allowed.attr,
  626. #endif
  627. #ifdef CONFIG_OF
  628. &dev_attr_devspec.attr,
  629. #endif
  630. &dev_attr_driver_override.attr,
  631. NULL,
  632. };
  633. static struct attribute *pci_bridge_attrs[] = {
  634. &dev_attr_subordinate_bus_number.attr,
  635. &dev_attr_secondary_bus_number.attr,
  636. NULL,
  637. };
  638. static struct attribute *pcie_dev_attrs[] = {
  639. &dev_attr_current_link_speed.attr,
  640. &dev_attr_current_link_width.attr,
  641. &dev_attr_max_link_width.attr,
  642. &dev_attr_max_link_speed.attr,
  643. NULL,
  644. };
  645. static struct attribute *pcibus_attrs[] = {
  646. &dev_attr_rescan.attr,
  647. &dev_attr_cpuaffinity.attr,
  648. &dev_attr_cpulistaffinity.attr,
  649. NULL,
  650. };
  651. static const struct attribute_group pcibus_group = {
  652. .attrs = pcibus_attrs,
  653. };
  654. const struct attribute_group *pcibus_groups[] = {
  655. &pcibus_group,
  656. NULL,
  657. };
  658. static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
  659. char *buf)
  660. {
  661. struct pci_dev *pdev = to_pci_dev(dev);
  662. struct pci_dev *vga_dev = vga_default_device();
  663. if (vga_dev)
  664. return sprintf(buf, "%u\n", (pdev == vga_dev));
  665. return sprintf(buf, "%u\n",
  666. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  667. IORESOURCE_ROM_SHADOW));
  668. }
  669. static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  670. static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
  671. struct bin_attribute *bin_attr, char *buf,
  672. loff_t off, size_t count)
  673. {
  674. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  675. unsigned int size = 64;
  676. loff_t init_off = off;
  677. u8 *data = (u8 *) buf;
  678. /* Several chips lock up trying to read undefined config space */
  679. if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
  680. size = dev->cfg_size;
  681. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  682. size = 128;
  683. if (off > size)
  684. return 0;
  685. if (off + count > size) {
  686. size -= off;
  687. count = size;
  688. } else {
  689. size = count;
  690. }
  691. pci_config_pm_runtime_get(dev);
  692. if ((off & 1) && size) {
  693. u8 val;
  694. pci_user_read_config_byte(dev, off, &val);
  695. data[off - init_off] = val;
  696. off++;
  697. size--;
  698. }
  699. if ((off & 3) && size > 2) {
  700. u16 val;
  701. pci_user_read_config_word(dev, off, &val);
  702. data[off - init_off] = val & 0xff;
  703. data[off - init_off + 1] = (val >> 8) & 0xff;
  704. off += 2;
  705. size -= 2;
  706. }
  707. while (size > 3) {
  708. u32 val;
  709. pci_user_read_config_dword(dev, off, &val);
  710. data[off - init_off] = val & 0xff;
  711. data[off - init_off + 1] = (val >> 8) & 0xff;
  712. data[off - init_off + 2] = (val >> 16) & 0xff;
  713. data[off - init_off + 3] = (val >> 24) & 0xff;
  714. off += 4;
  715. size -= 4;
  716. }
  717. if (size >= 2) {
  718. u16 val;
  719. pci_user_read_config_word(dev, off, &val);
  720. data[off - init_off] = val & 0xff;
  721. data[off - init_off + 1] = (val >> 8) & 0xff;
  722. off += 2;
  723. size -= 2;
  724. }
  725. if (size > 0) {
  726. u8 val;
  727. pci_user_read_config_byte(dev, off, &val);
  728. data[off - init_off] = val;
  729. off++;
  730. --size;
  731. }
  732. pci_config_pm_runtime_put(dev);
  733. return count;
  734. }
  735. static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
  736. struct bin_attribute *bin_attr, char *buf,
  737. loff_t off, size_t count)
  738. {
  739. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  740. unsigned int size = count;
  741. loff_t init_off = off;
  742. u8 *data = (u8 *) buf;
  743. if (off > dev->cfg_size)
  744. return 0;
  745. if (off + count > dev->cfg_size) {
  746. size = dev->cfg_size - off;
  747. count = size;
  748. }
  749. pci_config_pm_runtime_get(dev);
  750. if ((off & 1) && size) {
  751. pci_user_write_config_byte(dev, off, data[off - init_off]);
  752. off++;
  753. size--;
  754. }
  755. if ((off & 3) && size > 2) {
  756. u16 val = data[off - init_off];
  757. val |= (u16) data[off - init_off + 1] << 8;
  758. pci_user_write_config_word(dev, off, val);
  759. off += 2;
  760. size -= 2;
  761. }
  762. while (size > 3) {
  763. u32 val = data[off - init_off];
  764. val |= (u32) data[off - init_off + 1] << 8;
  765. val |= (u32) data[off - init_off + 2] << 16;
  766. val |= (u32) data[off - init_off + 3] << 24;
  767. pci_user_write_config_dword(dev, off, val);
  768. off += 4;
  769. size -= 4;
  770. }
  771. if (size >= 2) {
  772. u16 val = data[off - init_off];
  773. val |= (u16) data[off - init_off + 1] << 8;
  774. pci_user_write_config_word(dev, off, val);
  775. off += 2;
  776. size -= 2;
  777. }
  778. if (size) {
  779. pci_user_write_config_byte(dev, off, data[off - init_off]);
  780. off++;
  781. --size;
  782. }
  783. pci_config_pm_runtime_put(dev);
  784. return count;
  785. }
  786. static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj,
  787. struct bin_attribute *bin_attr, char *buf,
  788. loff_t off, size_t count)
  789. {
  790. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  791. if (bin_attr->size > 0) {
  792. if (off > bin_attr->size)
  793. count = 0;
  794. else if (count > bin_attr->size - off)
  795. count = bin_attr->size - off;
  796. }
  797. return pci_read_vpd(dev, off, count, buf);
  798. }
  799. static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj,
  800. struct bin_attribute *bin_attr, char *buf,
  801. loff_t off, size_t count)
  802. {
  803. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  804. if (bin_attr->size > 0) {
  805. if (off > bin_attr->size)
  806. count = 0;
  807. else if (count > bin_attr->size - off)
  808. count = bin_attr->size - off;
  809. }
  810. return pci_write_vpd(dev, off, count, buf);
  811. }
  812. #ifdef HAVE_PCI_LEGACY
  813. /**
  814. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  815. * @filp: open sysfs file
  816. * @kobj: kobject corresponding to file to read from
  817. * @bin_attr: struct bin_attribute for this file
  818. * @buf: buffer to store results
  819. * @off: offset into legacy I/O port space
  820. * @count: number of bytes to read
  821. *
  822. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  823. * callback routine (pci_legacy_read).
  824. */
  825. static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  826. struct bin_attribute *bin_attr, char *buf,
  827. loff_t off, size_t count)
  828. {
  829. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  830. /* Only support 1, 2 or 4 byte accesses */
  831. if (count != 1 && count != 2 && count != 4)
  832. return -EINVAL;
  833. return pci_legacy_read(bus, off, (u32 *)buf, count);
  834. }
  835. /**
  836. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  837. * @filp: open sysfs file
  838. * @kobj: kobject corresponding to file to read from
  839. * @bin_attr: struct bin_attribute for this file
  840. * @buf: buffer containing value to be written
  841. * @off: offset into legacy I/O port space
  842. * @count: number of bytes to write
  843. *
  844. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  845. * callback routine (pci_legacy_write).
  846. */
  847. static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  848. struct bin_attribute *bin_attr, char *buf,
  849. loff_t off, size_t count)
  850. {
  851. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  852. /* Only support 1, 2 or 4 byte accesses */
  853. if (count != 1 && count != 2 && count != 4)
  854. return -EINVAL;
  855. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  856. }
  857. /**
  858. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  859. * @filp: open sysfs file
  860. * @kobj: kobject corresponding to device to be mapped
  861. * @attr: struct bin_attribute for this file
  862. * @vma: struct vm_area_struct passed to mmap
  863. *
  864. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  865. * legacy memory space (first meg of bus space) into application virtual
  866. * memory space.
  867. */
  868. static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  869. struct bin_attribute *attr,
  870. struct vm_area_struct *vma)
  871. {
  872. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  873. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  874. }
  875. /**
  876. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  877. * @filp: open sysfs file
  878. * @kobj: kobject corresponding to device to be mapped
  879. * @attr: struct bin_attribute for this file
  880. * @vma: struct vm_area_struct passed to mmap
  881. *
  882. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  883. * legacy IO space (first meg of bus space) into application virtual
  884. * memory space. Returns -ENOSYS if the operation isn't supported
  885. */
  886. static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  887. struct bin_attribute *attr,
  888. struct vm_area_struct *vma)
  889. {
  890. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  891. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  892. }
  893. /**
  894. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  895. * @b: bus to create files under
  896. * @mmap_type: I/O port or memory
  897. *
  898. * Stub implementation. Can be overridden by arch if necessary.
  899. */
  900. void __weak pci_adjust_legacy_attr(struct pci_bus *b,
  901. enum pci_mmap_state mmap_type)
  902. {
  903. }
  904. /**
  905. * pci_create_legacy_files - create legacy I/O port and memory files
  906. * @b: bus to create files under
  907. *
  908. * Some platforms allow access to legacy I/O port and ISA memory space on
  909. * a per-bus basis. This routine creates the files and ties them into
  910. * their associated read, write and mmap files from pci-sysfs.c
  911. *
  912. * On error unwind, but don't propagate the error to the caller
  913. * as it is ok to set up the PCI bus without these files.
  914. */
  915. void pci_create_legacy_files(struct pci_bus *b)
  916. {
  917. int error;
  918. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  919. GFP_ATOMIC);
  920. if (!b->legacy_io)
  921. goto kzalloc_err;
  922. sysfs_bin_attr_init(b->legacy_io);
  923. b->legacy_io->attr.name = "legacy_io";
  924. b->legacy_io->size = 0xffff;
  925. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  926. b->legacy_io->read = pci_read_legacy_io;
  927. b->legacy_io->write = pci_write_legacy_io;
  928. b->legacy_io->mmap = pci_mmap_legacy_io;
  929. pci_adjust_legacy_attr(b, pci_mmap_io);
  930. error = device_create_bin_file(&b->dev, b->legacy_io);
  931. if (error)
  932. goto legacy_io_err;
  933. /* Allocated above after the legacy_io struct */
  934. b->legacy_mem = b->legacy_io + 1;
  935. sysfs_bin_attr_init(b->legacy_mem);
  936. b->legacy_mem->attr.name = "legacy_mem";
  937. b->legacy_mem->size = 1024*1024;
  938. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  939. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  940. pci_adjust_legacy_attr(b, pci_mmap_mem);
  941. error = device_create_bin_file(&b->dev, b->legacy_mem);
  942. if (error)
  943. goto legacy_mem_err;
  944. return;
  945. legacy_mem_err:
  946. device_remove_bin_file(&b->dev, b->legacy_io);
  947. legacy_io_err:
  948. kfree(b->legacy_io);
  949. b->legacy_io = NULL;
  950. kzalloc_err:
  951. printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
  952. return;
  953. }
  954. void pci_remove_legacy_files(struct pci_bus *b)
  955. {
  956. if (b->legacy_io) {
  957. device_remove_bin_file(&b->dev, b->legacy_io);
  958. device_remove_bin_file(&b->dev, b->legacy_mem);
  959. kfree(b->legacy_io); /* both are allocated here */
  960. }
  961. }
  962. #endif /* HAVE_PCI_LEGACY */
  963. #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
  964. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  965. enum pci_mmap_api mmap_api)
  966. {
  967. unsigned long nr, start, size;
  968. resource_size_t pci_start = 0, pci_end;
  969. if (pci_resource_len(pdev, resno) == 0)
  970. return 0;
  971. nr = vma_pages(vma);
  972. start = vma->vm_pgoff;
  973. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  974. if (mmap_api == PCI_MMAP_PROCFS) {
  975. pci_resource_to_user(pdev, resno, &pdev->resource[resno],
  976. &pci_start, &pci_end);
  977. pci_start >>= PAGE_SHIFT;
  978. }
  979. if (start >= pci_start && start < pci_start + size &&
  980. start + nr <= pci_start + size)
  981. return 1;
  982. return 0;
  983. }
  984. /**
  985. * pci_mmap_resource - map a PCI resource into user memory space
  986. * @kobj: kobject for mapping
  987. * @attr: struct bin_attribute for the file being mapped
  988. * @vma: struct vm_area_struct passed into the mmap
  989. * @write_combine: 1 for write_combine mapping
  990. *
  991. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  992. */
  993. static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  994. struct vm_area_struct *vma, int write_combine)
  995. {
  996. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  997. int bar = (unsigned long)attr->private;
  998. enum pci_mmap_state mmap_type;
  999. struct resource *res = &pdev->resource[bar];
  1000. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
  1001. return -EINVAL;
  1002. if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) {
  1003. WARN(1, "process \"%s\" tried to map 0x%08lx bytes at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  1004. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  1005. pci_name(pdev), bar,
  1006. (u64)pci_resource_start(pdev, bar),
  1007. (u64)pci_resource_len(pdev, bar));
  1008. return -EINVAL;
  1009. }
  1010. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  1011. return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
  1012. }
  1013. static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  1014. struct bin_attribute *attr,
  1015. struct vm_area_struct *vma)
  1016. {
  1017. return pci_mmap_resource(kobj, attr, vma, 0);
  1018. }
  1019. static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  1020. struct bin_attribute *attr,
  1021. struct vm_area_struct *vma)
  1022. {
  1023. return pci_mmap_resource(kobj, attr, vma, 1);
  1024. }
  1025. static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
  1026. struct bin_attribute *attr, char *buf,
  1027. loff_t off, size_t count, bool write)
  1028. {
  1029. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1030. int bar = (unsigned long)attr->private;
  1031. unsigned long port = off;
  1032. port += pci_resource_start(pdev, bar);
  1033. if (port > pci_resource_end(pdev, bar))
  1034. return 0;
  1035. if (port + count - 1 > pci_resource_end(pdev, bar))
  1036. return -EINVAL;
  1037. switch (count) {
  1038. case 1:
  1039. if (write)
  1040. outb(*(u8 *)buf, port);
  1041. else
  1042. *(u8 *)buf = inb(port);
  1043. return 1;
  1044. case 2:
  1045. if (write)
  1046. outw(*(u16 *)buf, port);
  1047. else
  1048. *(u16 *)buf = inw(port);
  1049. return 2;
  1050. case 4:
  1051. if (write)
  1052. outl(*(u32 *)buf, port);
  1053. else
  1054. *(u32 *)buf = inl(port);
  1055. return 4;
  1056. }
  1057. return -EINVAL;
  1058. }
  1059. static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
  1060. struct bin_attribute *attr, char *buf,
  1061. loff_t off, size_t count)
  1062. {
  1063. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  1064. }
  1065. static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
  1066. struct bin_attribute *attr, char *buf,
  1067. loff_t off, size_t count)
  1068. {
  1069. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  1070. }
  1071. /**
  1072. * pci_remove_resource_files - cleanup resource files
  1073. * @pdev: dev to cleanup
  1074. *
  1075. * If we created resource files for @pdev, remove them from sysfs and
  1076. * free their resources.
  1077. */
  1078. static void pci_remove_resource_files(struct pci_dev *pdev)
  1079. {
  1080. int i;
  1081. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  1082. struct bin_attribute *res_attr;
  1083. res_attr = pdev->res_attr[i];
  1084. if (res_attr) {
  1085. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  1086. kfree(res_attr);
  1087. }
  1088. res_attr = pdev->res_attr_wc[i];
  1089. if (res_attr) {
  1090. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  1091. kfree(res_attr);
  1092. }
  1093. }
  1094. }
  1095. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  1096. {
  1097. /* allocate attribute structure, piggyback attribute name */
  1098. int name_len = write_combine ? 13 : 10;
  1099. struct bin_attribute *res_attr;
  1100. char *res_attr_name;
  1101. int retval;
  1102. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  1103. if (!res_attr)
  1104. return -ENOMEM;
  1105. res_attr_name = (char *)(res_attr + 1);
  1106. sysfs_bin_attr_init(res_attr);
  1107. if (write_combine) {
  1108. pdev->res_attr_wc[num] = res_attr;
  1109. sprintf(res_attr_name, "resource%d_wc", num);
  1110. res_attr->mmap = pci_mmap_resource_wc;
  1111. } else {
  1112. pdev->res_attr[num] = res_attr;
  1113. sprintf(res_attr_name, "resource%d", num);
  1114. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  1115. res_attr->read = pci_read_resource_io;
  1116. res_attr->write = pci_write_resource_io;
  1117. if (arch_can_pci_mmap_io())
  1118. res_attr->mmap = pci_mmap_resource_uc;
  1119. } else {
  1120. res_attr->mmap = pci_mmap_resource_uc;
  1121. }
  1122. }
  1123. res_attr->attr.name = res_attr_name;
  1124. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  1125. res_attr->size = pci_resource_len(pdev, num);
  1126. res_attr->private = (void *)(unsigned long)num;
  1127. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  1128. if (retval)
  1129. kfree(res_attr);
  1130. return retval;
  1131. }
  1132. /**
  1133. * pci_create_resource_files - create resource files in sysfs for @dev
  1134. * @pdev: dev in question
  1135. *
  1136. * Walk the resources in @pdev creating files for each resource available.
  1137. */
  1138. static int pci_create_resource_files(struct pci_dev *pdev)
  1139. {
  1140. int i;
  1141. int retval;
  1142. /* Expose the PCI resources from this device as files */
  1143. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  1144. /* skip empty resources */
  1145. if (!pci_resource_len(pdev, i))
  1146. continue;
  1147. retval = pci_create_attr(pdev, i, 0);
  1148. /* for prefetchable resources, create a WC mappable file */
  1149. if (!retval && arch_can_pci_mmap_wc() &&
  1150. pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1151. retval = pci_create_attr(pdev, i, 1);
  1152. if (retval) {
  1153. pci_remove_resource_files(pdev);
  1154. return retval;
  1155. }
  1156. }
  1157. return 0;
  1158. }
  1159. #else /* !HAVE_PCI_MMAP */
  1160. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1161. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1162. #endif /* HAVE_PCI_MMAP */
  1163. /**
  1164. * pci_write_rom - used to enable access to the PCI ROM display
  1165. * @filp: sysfs file
  1166. * @kobj: kernel object handle
  1167. * @bin_attr: struct bin_attribute for this file
  1168. * @buf: user input
  1169. * @off: file offset
  1170. * @count: number of byte in input
  1171. *
  1172. * writing anything except 0 enables it
  1173. */
  1174. static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
  1175. struct bin_attribute *bin_attr, char *buf,
  1176. loff_t off, size_t count)
  1177. {
  1178. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1179. if ((off == 0) && (*buf == '0') && (count == 2))
  1180. pdev->rom_attr_enabled = 0;
  1181. else
  1182. pdev->rom_attr_enabled = 1;
  1183. return count;
  1184. }
  1185. /**
  1186. * pci_read_rom - read a PCI ROM
  1187. * @filp: sysfs file
  1188. * @kobj: kernel object handle
  1189. * @bin_attr: struct bin_attribute for this file
  1190. * @buf: where to put the data we read from the ROM
  1191. * @off: file offset
  1192. * @count: number of bytes to read
  1193. *
  1194. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1195. * device corresponding to @kobj.
  1196. */
  1197. static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
  1198. struct bin_attribute *bin_attr, char *buf,
  1199. loff_t off, size_t count)
  1200. {
  1201. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1202. void __iomem *rom;
  1203. size_t size;
  1204. if (!pdev->rom_attr_enabled)
  1205. return -EINVAL;
  1206. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1207. if (!rom || !size)
  1208. return -EIO;
  1209. if (off >= size)
  1210. count = 0;
  1211. else {
  1212. if (off + count > size)
  1213. count = size - off;
  1214. memcpy_fromio(buf, rom + off, count);
  1215. }
  1216. pci_unmap_rom(pdev, rom);
  1217. return count;
  1218. }
  1219. static const struct bin_attribute pci_config_attr = {
  1220. .attr = {
  1221. .name = "config",
  1222. .mode = S_IRUGO | S_IWUSR,
  1223. },
  1224. .size = PCI_CFG_SPACE_SIZE,
  1225. .read = pci_read_config,
  1226. .write = pci_write_config,
  1227. };
  1228. static const struct bin_attribute pcie_config_attr = {
  1229. .attr = {
  1230. .name = "config",
  1231. .mode = S_IRUGO | S_IWUSR,
  1232. },
  1233. .size = PCI_CFG_SPACE_EXP_SIZE,
  1234. .read = pci_read_config,
  1235. .write = pci_write_config,
  1236. };
  1237. static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
  1238. const char *buf, size_t count)
  1239. {
  1240. struct pci_dev *pdev = to_pci_dev(dev);
  1241. unsigned long val;
  1242. ssize_t result = kstrtoul(buf, 0, &val);
  1243. if (result < 0)
  1244. return result;
  1245. if (val != 1)
  1246. return -EINVAL;
  1247. result = pci_reset_function(pdev);
  1248. if (result < 0)
  1249. return result;
  1250. return count;
  1251. }
  1252. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1253. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1254. {
  1255. int retval;
  1256. struct bin_attribute *attr;
  1257. /* If the device has VPD, try to expose it in sysfs. */
  1258. if (dev->vpd) {
  1259. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1260. if (!attr)
  1261. return -ENOMEM;
  1262. sysfs_bin_attr_init(attr);
  1263. attr->size = 0;
  1264. attr->attr.name = "vpd";
  1265. attr->attr.mode = S_IRUSR | S_IWUSR;
  1266. attr->read = read_vpd_attr;
  1267. attr->write = write_vpd_attr;
  1268. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1269. if (retval) {
  1270. kfree(attr);
  1271. return retval;
  1272. }
  1273. dev->vpd->attr = attr;
  1274. }
  1275. /* Active State Power Management */
  1276. pcie_aspm_create_sysfs_dev_files(dev);
  1277. if (!pci_probe_reset_function(dev)) {
  1278. retval = device_create_file(&dev->dev, &reset_attr);
  1279. if (retval)
  1280. goto error;
  1281. dev->reset_fn = 1;
  1282. }
  1283. return 0;
  1284. error:
  1285. pcie_aspm_remove_sysfs_dev_files(dev);
  1286. if (dev->vpd && dev->vpd->attr) {
  1287. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1288. kfree(dev->vpd->attr);
  1289. }
  1290. return retval;
  1291. }
  1292. int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
  1293. {
  1294. int retval;
  1295. int rom_size;
  1296. struct bin_attribute *attr;
  1297. if (!sysfs_initialized)
  1298. return -EACCES;
  1299. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1300. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1301. else
  1302. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1303. if (retval)
  1304. goto err;
  1305. retval = pci_create_resource_files(pdev);
  1306. if (retval)
  1307. goto err_config_file;
  1308. /* If the device has a ROM, try to expose it in sysfs. */
  1309. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1310. if (rom_size) {
  1311. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1312. if (!attr) {
  1313. retval = -ENOMEM;
  1314. goto err_resource_files;
  1315. }
  1316. sysfs_bin_attr_init(attr);
  1317. attr->size = rom_size;
  1318. attr->attr.name = "rom";
  1319. attr->attr.mode = S_IRUSR | S_IWUSR;
  1320. attr->read = pci_read_rom;
  1321. attr->write = pci_write_rom;
  1322. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1323. if (retval) {
  1324. kfree(attr);
  1325. goto err_resource_files;
  1326. }
  1327. pdev->rom_attr = attr;
  1328. }
  1329. /* add sysfs entries for various capabilities */
  1330. retval = pci_create_capabilities_sysfs(pdev);
  1331. if (retval)
  1332. goto err_rom_file;
  1333. pci_create_firmware_label_files(pdev);
  1334. return 0;
  1335. err_rom_file:
  1336. if (pdev->rom_attr) {
  1337. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1338. kfree(pdev->rom_attr);
  1339. pdev->rom_attr = NULL;
  1340. }
  1341. err_resource_files:
  1342. pci_remove_resource_files(pdev);
  1343. err_config_file:
  1344. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1345. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1346. else
  1347. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1348. err:
  1349. return retval;
  1350. }
  1351. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1352. {
  1353. if (dev->vpd && dev->vpd->attr) {
  1354. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1355. kfree(dev->vpd->attr);
  1356. }
  1357. pcie_aspm_remove_sysfs_dev_files(dev);
  1358. if (dev->reset_fn) {
  1359. device_remove_file(&dev->dev, &reset_attr);
  1360. dev->reset_fn = 0;
  1361. }
  1362. }
  1363. /**
  1364. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1365. * @pdev: device whose entries we should free
  1366. *
  1367. * Cleanup when @pdev is removed from sysfs.
  1368. */
  1369. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1370. {
  1371. if (!sysfs_initialized)
  1372. return;
  1373. pci_remove_capabilities_sysfs(pdev);
  1374. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1375. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1376. else
  1377. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1378. pci_remove_resource_files(pdev);
  1379. if (pdev->rom_attr) {
  1380. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1381. kfree(pdev->rom_attr);
  1382. pdev->rom_attr = NULL;
  1383. }
  1384. pci_remove_firmware_label_files(pdev);
  1385. }
  1386. static int __init pci_sysfs_init(void)
  1387. {
  1388. struct pci_dev *pdev = NULL;
  1389. int retval;
  1390. sysfs_initialized = 1;
  1391. for_each_pci_dev(pdev) {
  1392. retval = pci_create_sysfs_dev_files(pdev);
  1393. if (retval) {
  1394. pci_dev_put(pdev);
  1395. return retval;
  1396. }
  1397. }
  1398. return 0;
  1399. }
  1400. late_initcall(pci_sysfs_init);
  1401. static struct attribute *pci_dev_dev_attrs[] = {
  1402. &vga_attr.attr,
  1403. NULL,
  1404. };
  1405. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1406. struct attribute *a, int n)
  1407. {
  1408. struct device *dev = kobj_to_dev(kobj);
  1409. struct pci_dev *pdev = to_pci_dev(dev);
  1410. if (a == &vga_attr.attr)
  1411. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1412. return 0;
  1413. return a->mode;
  1414. }
  1415. static struct attribute *pci_dev_hp_attrs[] = {
  1416. &dev_remove_attr.attr,
  1417. &dev_rescan_attr.attr,
  1418. NULL,
  1419. };
  1420. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1421. struct attribute *a, int n)
  1422. {
  1423. struct device *dev = kobj_to_dev(kobj);
  1424. struct pci_dev *pdev = to_pci_dev(dev);
  1425. if (pdev->is_virtfn)
  1426. return 0;
  1427. return a->mode;
  1428. }
  1429. static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
  1430. struct attribute *a, int n)
  1431. {
  1432. struct device *dev = kobj_to_dev(kobj);
  1433. struct pci_dev *pdev = to_pci_dev(dev);
  1434. if (pci_is_bridge(pdev))
  1435. return a->mode;
  1436. return 0;
  1437. }
  1438. static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
  1439. struct attribute *a, int n)
  1440. {
  1441. struct device *dev = kobj_to_dev(kobj);
  1442. struct pci_dev *pdev = to_pci_dev(dev);
  1443. if (pci_is_pcie(pdev))
  1444. return a->mode;
  1445. return 0;
  1446. }
  1447. static const struct attribute_group pci_dev_group = {
  1448. .attrs = pci_dev_attrs,
  1449. };
  1450. const struct attribute_group *pci_dev_groups[] = {
  1451. &pci_dev_group,
  1452. NULL,
  1453. };
  1454. static const struct attribute_group pci_bridge_group = {
  1455. .attrs = pci_bridge_attrs,
  1456. };
  1457. const struct attribute_group *pci_bridge_groups[] = {
  1458. &pci_bridge_group,
  1459. NULL,
  1460. };
  1461. static const struct attribute_group pcie_dev_group = {
  1462. .attrs = pcie_dev_attrs,
  1463. };
  1464. const struct attribute_group *pcie_dev_groups[] = {
  1465. &pcie_dev_group,
  1466. NULL,
  1467. };
  1468. static const struct attribute_group pci_dev_hp_attr_group = {
  1469. .attrs = pci_dev_hp_attrs,
  1470. .is_visible = pci_dev_hp_attrs_are_visible,
  1471. };
  1472. #ifdef CONFIG_PCI_IOV
  1473. static struct attribute *sriov_dev_attrs[] = {
  1474. &sriov_totalvfs_attr.attr,
  1475. &sriov_numvfs_attr.attr,
  1476. &sriov_drivers_autoprobe_attr.attr,
  1477. NULL,
  1478. };
  1479. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1480. struct attribute *a, int n)
  1481. {
  1482. struct device *dev = kobj_to_dev(kobj);
  1483. if (!dev_is_pf(dev))
  1484. return 0;
  1485. return a->mode;
  1486. }
  1487. static const struct attribute_group sriov_dev_attr_group = {
  1488. .attrs = sriov_dev_attrs,
  1489. .is_visible = sriov_attrs_are_visible,
  1490. };
  1491. #endif /* CONFIG_PCI_IOV */
  1492. static const struct attribute_group pci_dev_attr_group = {
  1493. .attrs = pci_dev_dev_attrs,
  1494. .is_visible = pci_dev_attrs_are_visible,
  1495. };
  1496. static const struct attribute_group pci_bridge_attr_group = {
  1497. .attrs = pci_bridge_attrs,
  1498. .is_visible = pci_bridge_attrs_are_visible,
  1499. };
  1500. static const struct attribute_group pcie_dev_attr_group = {
  1501. .attrs = pcie_dev_attrs,
  1502. .is_visible = pcie_dev_attrs_are_visible,
  1503. };
  1504. static const struct attribute_group *pci_dev_attr_groups[] = {
  1505. &pci_dev_attr_group,
  1506. &pci_dev_hp_attr_group,
  1507. #ifdef CONFIG_PCI_IOV
  1508. &sriov_dev_attr_group,
  1509. #endif
  1510. &pci_bridge_attr_group,
  1511. &pcie_dev_attr_group,
  1512. NULL,
  1513. };
  1514. struct device_type pci_dev_type = {
  1515. .groups = pci_dev_attr_groups,
  1516. };