iov.c 18 KB

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  1. /*
  2. * drivers/pci/iov.c
  3. *
  4. * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
  5. *
  6. * PCI Express I/O Virtualization (IOV) support.
  7. * Single Root IOV 1.0
  8. * Address Translation Service 1.0
  9. */
  10. #include <linux/pci.h>
  11. #include <linux/slab.h>
  12. #include <linux/mutex.h>
  13. #include <linux/export.h>
  14. #include <linux/string.h>
  15. #include <linux/delay.h>
  16. #include <linux/pci-ats.h>
  17. #include "pci.h"
  18. #define VIRTFN_ID_LEN 16
  19. int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id)
  20. {
  21. if (!dev->is_physfn)
  22. return -EINVAL;
  23. return dev->bus->number + ((dev->devfn + dev->sriov->offset +
  24. dev->sriov->stride * vf_id) >> 8);
  25. }
  26. int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id)
  27. {
  28. if (!dev->is_physfn)
  29. return -EINVAL;
  30. return (dev->devfn + dev->sriov->offset +
  31. dev->sriov->stride * vf_id) & 0xff;
  32. }
  33. /*
  34. * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
  35. * change when NumVFs changes.
  36. *
  37. * Update iov->offset and iov->stride when NumVFs is written.
  38. */
  39. static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
  40. {
  41. struct pci_sriov *iov = dev->sriov;
  42. pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
  43. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
  44. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
  45. }
  46. /*
  47. * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride
  48. * determine how many additional bus numbers will be consumed by VFs.
  49. *
  50. * Iterate over all valid NumVFs, validate offset and stride, and calculate
  51. * the maximum number of bus numbers that could ever be required.
  52. */
  53. static int compute_max_vf_buses(struct pci_dev *dev)
  54. {
  55. struct pci_sriov *iov = dev->sriov;
  56. int nr_virtfn, busnr, rc = 0;
  57. for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) {
  58. pci_iov_set_numvfs(dev, nr_virtfn);
  59. if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) {
  60. rc = -EIO;
  61. goto out;
  62. }
  63. busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
  64. if (busnr > iov->max_VF_buses)
  65. iov->max_VF_buses = busnr;
  66. }
  67. out:
  68. pci_iov_set_numvfs(dev, 0);
  69. return rc;
  70. }
  71. static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
  72. {
  73. struct pci_bus *child;
  74. if (bus->number == busnr)
  75. return bus;
  76. child = pci_find_bus(pci_domain_nr(bus), busnr);
  77. if (child)
  78. return child;
  79. child = pci_add_new_bus(bus, NULL, busnr);
  80. if (!child)
  81. return NULL;
  82. pci_bus_insert_busn_res(child, busnr, busnr);
  83. return child;
  84. }
  85. static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
  86. {
  87. if (physbus != virtbus && list_empty(&virtbus->devices))
  88. pci_remove_bus(virtbus);
  89. }
  90. resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
  91. {
  92. if (!dev->is_physfn)
  93. return 0;
  94. return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
  95. }
  96. int pci_iov_add_virtfn(struct pci_dev *dev, int id, int reset)
  97. {
  98. int i;
  99. int rc = -ENOMEM;
  100. u64 size;
  101. char buf[VIRTFN_ID_LEN];
  102. struct pci_dev *virtfn;
  103. struct resource *res;
  104. struct pci_sriov *iov = dev->sriov;
  105. struct pci_bus *bus;
  106. bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
  107. if (!bus)
  108. goto failed;
  109. virtfn = pci_alloc_dev(bus);
  110. if (!virtfn)
  111. goto failed0;
  112. virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
  113. virtfn->vendor = dev->vendor;
  114. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
  115. rc = pci_setup_device(virtfn);
  116. if (rc)
  117. goto failed0;
  118. virtfn->dev.parent = dev->dev.parent;
  119. virtfn->physfn = pci_dev_get(dev);
  120. virtfn->is_virtfn = 1;
  121. virtfn->multifunction = 0;
  122. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  123. res = &dev->resource[i + PCI_IOV_RESOURCES];
  124. if (!res->parent)
  125. continue;
  126. virtfn->resource[i].name = pci_name(virtfn);
  127. virtfn->resource[i].flags = res->flags;
  128. size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
  129. virtfn->resource[i].start = res->start + size * id;
  130. virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
  131. rc = request_resource(res, &virtfn->resource[i]);
  132. BUG_ON(rc);
  133. }
  134. if (reset)
  135. __pci_reset_function(virtfn);
  136. pci_device_add(virtfn, virtfn->bus);
  137. pci_bus_add_device(virtfn);
  138. sprintf(buf, "virtfn%u", id);
  139. rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
  140. if (rc)
  141. goto failed1;
  142. rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
  143. if (rc)
  144. goto failed2;
  145. kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
  146. return 0;
  147. failed2:
  148. sysfs_remove_link(&dev->dev.kobj, buf);
  149. failed1:
  150. pci_dev_put(dev);
  151. pci_stop_and_remove_bus_device(virtfn);
  152. failed0:
  153. virtfn_remove_bus(dev->bus, bus);
  154. failed:
  155. return rc;
  156. }
  157. void pci_iov_remove_virtfn(struct pci_dev *dev, int id, int reset)
  158. {
  159. char buf[VIRTFN_ID_LEN];
  160. struct pci_dev *virtfn;
  161. virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
  162. pci_iov_virtfn_bus(dev, id),
  163. pci_iov_virtfn_devfn(dev, id));
  164. if (!virtfn)
  165. return;
  166. if (reset) {
  167. device_release_driver(&virtfn->dev);
  168. __pci_reset_function(virtfn);
  169. }
  170. sprintf(buf, "virtfn%u", id);
  171. sysfs_remove_link(&dev->dev.kobj, buf);
  172. /*
  173. * pci_stop_dev() could have been called for this virtfn already,
  174. * so the directory for the virtfn may have been removed before.
  175. * Double check to avoid spurious sysfs warnings.
  176. */
  177. if (virtfn->dev.kobj.sd)
  178. sysfs_remove_link(&virtfn->dev.kobj, "physfn");
  179. pci_stop_and_remove_bus_device(virtfn);
  180. virtfn_remove_bus(dev->bus, virtfn->bus);
  181. /* balance pci_get_domain_bus_and_slot() */
  182. pci_dev_put(virtfn);
  183. pci_dev_put(dev);
  184. }
  185. int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
  186. {
  187. return 0;
  188. }
  189. int __weak pcibios_sriov_disable(struct pci_dev *pdev)
  190. {
  191. return 0;
  192. }
  193. static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
  194. {
  195. int rc;
  196. int i;
  197. int nres;
  198. u16 initial;
  199. struct resource *res;
  200. struct pci_dev *pdev;
  201. struct pci_sriov *iov = dev->sriov;
  202. int bars = 0;
  203. int bus;
  204. if (!nr_virtfn)
  205. return 0;
  206. if (iov->num_VFs)
  207. return -EINVAL;
  208. pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
  209. if (initial > iov->total_VFs ||
  210. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
  211. return -EIO;
  212. if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
  213. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
  214. return -EINVAL;
  215. nres = 0;
  216. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  217. bars |= (1 << (i + PCI_IOV_RESOURCES));
  218. res = &dev->resource[i + PCI_IOV_RESOURCES];
  219. if (res->parent)
  220. nres++;
  221. }
  222. if (nres != iov->nres) {
  223. dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
  224. return -ENOMEM;
  225. }
  226. bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
  227. if (bus > dev->bus->busn_res.end) {
  228. dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
  229. nr_virtfn, bus, &dev->bus->busn_res);
  230. return -ENOMEM;
  231. }
  232. if (pci_enable_resources(dev, bars)) {
  233. dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
  234. return -ENOMEM;
  235. }
  236. if (iov->link != dev->devfn) {
  237. pdev = pci_get_slot(dev->bus, iov->link);
  238. if (!pdev)
  239. return -ENODEV;
  240. if (!pdev->is_physfn) {
  241. pci_dev_put(pdev);
  242. return -ENOSYS;
  243. }
  244. rc = sysfs_create_link(&dev->dev.kobj,
  245. &pdev->dev.kobj, "dep_link");
  246. pci_dev_put(pdev);
  247. if (rc)
  248. return rc;
  249. }
  250. iov->initial_VFs = initial;
  251. if (nr_virtfn < initial)
  252. initial = nr_virtfn;
  253. rc = pcibios_sriov_enable(dev, initial);
  254. if (rc) {
  255. dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n", rc);
  256. goto err_pcibios;
  257. }
  258. pci_iov_set_numvfs(dev, nr_virtfn);
  259. iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
  260. pci_cfg_access_lock(dev);
  261. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  262. msleep(100);
  263. pci_cfg_access_unlock(dev);
  264. for (i = 0; i < initial; i++) {
  265. rc = pci_iov_add_virtfn(dev, i, 0);
  266. if (rc)
  267. goto failed;
  268. }
  269. kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
  270. iov->num_VFs = nr_virtfn;
  271. return 0;
  272. failed:
  273. while (i--)
  274. pci_iov_remove_virtfn(dev, i, 0);
  275. err_pcibios:
  276. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  277. pci_cfg_access_lock(dev);
  278. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  279. ssleep(1);
  280. pci_cfg_access_unlock(dev);
  281. pcibios_sriov_disable(dev);
  282. if (iov->link != dev->devfn)
  283. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  284. pci_iov_set_numvfs(dev, 0);
  285. return rc;
  286. }
  287. static void sriov_disable(struct pci_dev *dev)
  288. {
  289. int i;
  290. struct pci_sriov *iov = dev->sriov;
  291. if (!iov->num_VFs)
  292. return;
  293. for (i = 0; i < iov->num_VFs; i++)
  294. pci_iov_remove_virtfn(dev, i, 0);
  295. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  296. pci_cfg_access_lock(dev);
  297. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  298. ssleep(1);
  299. pci_cfg_access_unlock(dev);
  300. pcibios_sriov_disable(dev);
  301. if (iov->link != dev->devfn)
  302. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  303. iov->num_VFs = 0;
  304. pci_iov_set_numvfs(dev, 0);
  305. }
  306. static int sriov_init(struct pci_dev *dev, int pos)
  307. {
  308. int i, bar64;
  309. int rc;
  310. int nres;
  311. u32 pgsz;
  312. u16 ctrl, total;
  313. struct pci_sriov *iov;
  314. struct resource *res;
  315. struct pci_dev *pdev;
  316. pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
  317. if (ctrl & PCI_SRIOV_CTRL_VFE) {
  318. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
  319. ssleep(1);
  320. }
  321. ctrl = 0;
  322. list_for_each_entry(pdev, &dev->bus->devices, bus_list)
  323. if (pdev->is_physfn)
  324. goto found;
  325. pdev = NULL;
  326. if (pci_ari_enabled(dev->bus))
  327. ctrl |= PCI_SRIOV_CTRL_ARI;
  328. found:
  329. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
  330. pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
  331. if (!total)
  332. return 0;
  333. pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
  334. i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
  335. pgsz &= ~((1 << i) - 1);
  336. if (!pgsz)
  337. return -EIO;
  338. pgsz &= ~(pgsz - 1);
  339. pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
  340. iov = kzalloc(sizeof(*iov), GFP_KERNEL);
  341. if (!iov)
  342. return -ENOMEM;
  343. nres = 0;
  344. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  345. res = &dev->resource[i + PCI_IOV_RESOURCES];
  346. /*
  347. * If it is already FIXED, don't change it, something
  348. * (perhaps EA or header fixups) wants it this way.
  349. */
  350. if (res->flags & IORESOURCE_PCI_FIXED)
  351. bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
  352. else
  353. bar64 = __pci_read_base(dev, pci_bar_unknown, res,
  354. pos + PCI_SRIOV_BAR + i * 4);
  355. if (!res->flags)
  356. continue;
  357. if (resource_size(res) & (PAGE_SIZE - 1)) {
  358. rc = -EIO;
  359. goto failed;
  360. }
  361. iov->barsz[i] = resource_size(res);
  362. res->end = res->start + resource_size(res) * total - 1;
  363. dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
  364. i, res, i, total);
  365. i += bar64;
  366. nres++;
  367. }
  368. iov->pos = pos;
  369. iov->nres = nres;
  370. iov->ctrl = ctrl;
  371. iov->total_VFs = total;
  372. iov->pgsz = pgsz;
  373. iov->self = dev;
  374. iov->drivers_autoprobe = true;
  375. pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
  376. pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
  377. if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
  378. iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
  379. if (pdev)
  380. iov->dev = pci_dev_get(pdev);
  381. else
  382. iov->dev = dev;
  383. dev->sriov = iov;
  384. dev->is_physfn = 1;
  385. rc = compute_max_vf_buses(dev);
  386. if (rc)
  387. goto fail_max_buses;
  388. return 0;
  389. fail_max_buses:
  390. dev->sriov = NULL;
  391. dev->is_physfn = 0;
  392. failed:
  393. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  394. res = &dev->resource[i + PCI_IOV_RESOURCES];
  395. res->flags = 0;
  396. }
  397. kfree(iov);
  398. return rc;
  399. }
  400. static void sriov_release(struct pci_dev *dev)
  401. {
  402. BUG_ON(dev->sriov->num_VFs);
  403. if (dev != dev->sriov->dev)
  404. pci_dev_put(dev->sriov->dev);
  405. kfree(dev->sriov);
  406. dev->sriov = NULL;
  407. }
  408. static void sriov_restore_state(struct pci_dev *dev)
  409. {
  410. int i;
  411. u16 ctrl;
  412. struct pci_sriov *iov = dev->sriov;
  413. pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
  414. if (ctrl & PCI_SRIOV_CTRL_VFE)
  415. return;
  416. for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
  417. pci_update_resource(dev, i);
  418. pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
  419. pci_iov_set_numvfs(dev, iov->num_VFs);
  420. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  421. if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
  422. msleep(100);
  423. }
  424. /**
  425. * pci_iov_init - initialize the IOV capability
  426. * @dev: the PCI device
  427. *
  428. * Returns 0 on success, or negative on failure.
  429. */
  430. int pci_iov_init(struct pci_dev *dev)
  431. {
  432. int pos;
  433. if (!pci_is_pcie(dev))
  434. return -ENODEV;
  435. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
  436. if (pos)
  437. return sriov_init(dev, pos);
  438. return -ENODEV;
  439. }
  440. /**
  441. * pci_iov_release - release resources used by the IOV capability
  442. * @dev: the PCI device
  443. */
  444. void pci_iov_release(struct pci_dev *dev)
  445. {
  446. if (dev->is_physfn)
  447. sriov_release(dev);
  448. }
  449. /**
  450. * pci_iov_update_resource - update a VF BAR
  451. * @dev: the PCI device
  452. * @resno: the resource number
  453. *
  454. * Update a VF BAR in the SR-IOV capability of a PF.
  455. */
  456. void pci_iov_update_resource(struct pci_dev *dev, int resno)
  457. {
  458. struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL;
  459. struct resource *res = dev->resource + resno;
  460. int vf_bar = resno - PCI_IOV_RESOURCES;
  461. struct pci_bus_region region;
  462. u16 cmd;
  463. u32 new;
  464. int reg;
  465. /*
  466. * The generic pci_restore_bars() path calls this for all devices,
  467. * including VFs and non-SR-IOV devices. If this is not a PF, we
  468. * have nothing to do.
  469. */
  470. if (!iov)
  471. return;
  472. pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd);
  473. if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) {
  474. dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n",
  475. vf_bar, res);
  476. return;
  477. }
  478. /*
  479. * Ignore unimplemented BARs, unused resource slots for 64-bit
  480. * BARs, and non-movable resources, e.g., those described via
  481. * Enhanced Allocation.
  482. */
  483. if (!res->flags)
  484. return;
  485. if (res->flags & IORESOURCE_UNSET)
  486. return;
  487. if (res->flags & IORESOURCE_PCI_FIXED)
  488. return;
  489. pcibios_resource_to_bus(dev->bus, &region, res);
  490. new = region.start;
  491. new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;
  492. reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar;
  493. pci_write_config_dword(dev, reg, new);
  494. if (res->flags & IORESOURCE_MEM_64) {
  495. new = region.start >> 16 >> 16;
  496. pci_write_config_dword(dev, reg + 4, new);
  497. }
  498. }
  499. resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev,
  500. int resno)
  501. {
  502. return pci_iov_resource_size(dev, resno);
  503. }
  504. /**
  505. * pci_sriov_resource_alignment - get resource alignment for VF BAR
  506. * @dev: the PCI device
  507. * @resno: the resource number
  508. *
  509. * Returns the alignment of the VF BAR found in the SR-IOV capability.
  510. * This is not the same as the resource size which is defined as
  511. * the VF BAR size multiplied by the number of VFs. The alignment
  512. * is just the VF BAR size.
  513. */
  514. resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
  515. {
  516. return pcibios_iov_resource_alignment(dev, resno);
  517. }
  518. /**
  519. * pci_restore_iov_state - restore the state of the IOV capability
  520. * @dev: the PCI device
  521. */
  522. void pci_restore_iov_state(struct pci_dev *dev)
  523. {
  524. if (dev->is_physfn)
  525. sriov_restore_state(dev);
  526. }
  527. /**
  528. * pci_iov_bus_range - find bus range used by Virtual Function
  529. * @bus: the PCI bus
  530. *
  531. * Returns max number of buses (exclude current one) used by Virtual
  532. * Functions.
  533. */
  534. int pci_iov_bus_range(struct pci_bus *bus)
  535. {
  536. int max = 0;
  537. struct pci_dev *dev;
  538. list_for_each_entry(dev, &bus->devices, bus_list) {
  539. if (!dev->is_physfn)
  540. continue;
  541. if (dev->sriov->max_VF_buses > max)
  542. max = dev->sriov->max_VF_buses;
  543. }
  544. return max ? max - bus->number : 0;
  545. }
  546. /**
  547. * pci_enable_sriov - enable the SR-IOV capability
  548. * @dev: the PCI device
  549. * @nr_virtfn: number of virtual functions to enable
  550. *
  551. * Returns 0 on success, or negative on failure.
  552. */
  553. int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
  554. {
  555. might_sleep();
  556. if (!dev->is_physfn)
  557. return -ENOSYS;
  558. return sriov_enable(dev, nr_virtfn);
  559. }
  560. EXPORT_SYMBOL_GPL(pci_enable_sriov);
  561. /**
  562. * pci_disable_sriov - disable the SR-IOV capability
  563. * @dev: the PCI device
  564. */
  565. void pci_disable_sriov(struct pci_dev *dev)
  566. {
  567. might_sleep();
  568. if (!dev->is_physfn)
  569. return;
  570. sriov_disable(dev);
  571. }
  572. EXPORT_SYMBOL_GPL(pci_disable_sriov);
  573. /**
  574. * pci_num_vf - return number of VFs associated with a PF device_release_driver
  575. * @dev: the PCI device
  576. *
  577. * Returns number of VFs, or 0 if SR-IOV is not enabled.
  578. */
  579. int pci_num_vf(struct pci_dev *dev)
  580. {
  581. if (!dev->is_physfn)
  582. return 0;
  583. return dev->sriov->num_VFs;
  584. }
  585. EXPORT_SYMBOL_GPL(pci_num_vf);
  586. /**
  587. * pci_vfs_assigned - returns number of VFs are assigned to a guest
  588. * @dev: the PCI device
  589. *
  590. * Returns number of VFs belonging to this device that are assigned to a guest.
  591. * If device is not a physical function returns 0.
  592. */
  593. int pci_vfs_assigned(struct pci_dev *dev)
  594. {
  595. struct pci_dev *vfdev;
  596. unsigned int vfs_assigned = 0;
  597. unsigned short dev_id;
  598. /* only search if we are a PF */
  599. if (!dev->is_physfn)
  600. return 0;
  601. /*
  602. * determine the device ID for the VFs, the vendor ID will be the
  603. * same as the PF so there is no need to check for that one
  604. */
  605. pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
  606. /* loop through all the VFs to see if we own any that are assigned */
  607. vfdev = pci_get_device(dev->vendor, dev_id, NULL);
  608. while (vfdev) {
  609. /*
  610. * It is considered assigned if it is a virtual function with
  611. * our dev as the physical function and the assigned bit is set
  612. */
  613. if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
  614. pci_is_dev_assigned(vfdev))
  615. vfs_assigned++;
  616. vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
  617. }
  618. return vfs_assigned;
  619. }
  620. EXPORT_SYMBOL_GPL(pci_vfs_assigned);
  621. /**
  622. * pci_sriov_set_totalvfs -- reduce the TotalVFs available
  623. * @dev: the PCI PF device
  624. * @numvfs: number that should be used for TotalVFs supported
  625. *
  626. * Should be called from PF driver's probe routine with
  627. * device's mutex held.
  628. *
  629. * Returns 0 if PF is an SRIOV-capable device and
  630. * value of numvfs valid. If not a PF return -ENOSYS;
  631. * if numvfs is invalid return -EINVAL;
  632. * if VFs already enabled, return -EBUSY.
  633. */
  634. int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
  635. {
  636. if (!dev->is_physfn)
  637. return -ENOSYS;
  638. if (numvfs > dev->sriov->total_VFs)
  639. return -EINVAL;
  640. /* Shouldn't change if VFs already enabled */
  641. if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
  642. return -EBUSY;
  643. else
  644. dev->sriov->driver_max_VFs = numvfs;
  645. return 0;
  646. }
  647. EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
  648. /**
  649. * pci_sriov_get_totalvfs -- get total VFs supported on this device
  650. * @dev: the PCI PF device
  651. *
  652. * For a PCIe device with SRIOV support, return the PCIe
  653. * SRIOV capability value of TotalVFs or the value of driver_max_VFs
  654. * if the driver reduced it. Otherwise 0.
  655. */
  656. int pci_sriov_get_totalvfs(struct pci_dev *dev)
  657. {
  658. if (!dev->is_physfn)
  659. return 0;
  660. if (dev->sriov->driver_max_VFs)
  661. return dev->sriov->driver_max_VFs;
  662. return dev->sriov->total_VFs;
  663. }
  664. EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);